vfio_pci.c 36 KB

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  1. /*
  2. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  3. * Author: Alex Williamson <alex.williamson@redhat.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Derived from original vfio:
  10. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  11. * Author: Tom Lyon, pugs@cisco.com
  12. */
  13. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14. #include <linux/device.h>
  15. #include <linux/eventfd.h>
  16. #include <linux/file.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/iommu.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/notifier.h>
  22. #include <linux/pci.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/types.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vfio.h>
  28. #include <linux/vgaarb.h>
  29. #include "vfio_pci_private.h"
  30. #define DRIVER_VERSION "0.2"
  31. #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
  32. #define DRIVER_DESC "VFIO PCI - User Level meta-driver"
  33. static char ids[1024] __initdata;
  34. module_param_string(ids, ids, sizeof(ids), 0);
  35. MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
  36. static bool nointxmask;
  37. module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
  38. MODULE_PARM_DESC(nointxmask,
  39. "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
  40. #ifdef CONFIG_VFIO_PCI_VGA
  41. static bool disable_vga;
  42. module_param(disable_vga, bool, S_IRUGO);
  43. MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
  44. #endif
  45. static bool disable_idle_d3;
  46. module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
  47. MODULE_PARM_DESC(disable_idle_d3,
  48. "Disable using the PCI D3 low power state for idle, unused devices");
  49. static DEFINE_MUTEX(driver_lock);
  50. static inline bool vfio_vga_disabled(void)
  51. {
  52. #ifdef CONFIG_VFIO_PCI_VGA
  53. return disable_vga;
  54. #else
  55. return true;
  56. #endif
  57. }
  58. /*
  59. * Our VGA arbiter participation is limited since we don't know anything
  60. * about the device itself. However, if the device is the only VGA device
  61. * downstream of a bridge and VFIO VGA support is disabled, then we can
  62. * safely return legacy VGA IO and memory as not decoded since the user
  63. * has no way to get to it and routing can be disabled externally at the
  64. * bridge.
  65. */
  66. static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
  67. {
  68. struct vfio_pci_device *vdev = opaque;
  69. struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
  70. unsigned char max_busnr;
  71. unsigned int decodes;
  72. if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
  73. return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  74. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  75. max_busnr = pci_bus_max_busnr(pdev->bus);
  76. decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
  77. while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
  78. if (tmp == pdev ||
  79. pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
  80. pci_is_root_bus(tmp->bus))
  81. continue;
  82. if (tmp->bus->number >= pdev->bus->number &&
  83. tmp->bus->number <= max_busnr) {
  84. pci_dev_put(tmp);
  85. decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  86. break;
  87. }
  88. }
  89. return decodes;
  90. }
  91. static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
  92. {
  93. return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
  94. }
  95. static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
  96. {
  97. struct resource *res;
  98. int bar;
  99. struct vfio_pci_dummy_resource *dummy_res;
  100. INIT_LIST_HEAD(&vdev->dummy_resources_list);
  101. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  102. res = vdev->pdev->resource + bar;
  103. if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
  104. goto no_mmap;
  105. if (!(res->flags & IORESOURCE_MEM))
  106. goto no_mmap;
  107. /*
  108. * The PCI core shouldn't set up a resource with a
  109. * type but zero size. But there may be bugs that
  110. * cause us to do that.
  111. */
  112. if (!resource_size(res))
  113. goto no_mmap;
  114. if (resource_size(res) >= PAGE_SIZE) {
  115. vdev->bar_mmap_supported[bar] = true;
  116. continue;
  117. }
  118. if (!(res->start & ~PAGE_MASK)) {
  119. /*
  120. * Add a dummy resource to reserve the remainder
  121. * of the exclusive page in case that hot-add
  122. * device's bar is assigned into it.
  123. */
  124. dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL);
  125. if (dummy_res == NULL)
  126. goto no_mmap;
  127. dummy_res->resource.name = "vfio sub-page reserved";
  128. dummy_res->resource.start = res->end + 1;
  129. dummy_res->resource.end = res->start + PAGE_SIZE - 1;
  130. dummy_res->resource.flags = res->flags;
  131. if (request_resource(res->parent,
  132. &dummy_res->resource)) {
  133. kfree(dummy_res);
  134. goto no_mmap;
  135. }
  136. dummy_res->index = bar;
  137. list_add(&dummy_res->res_next,
  138. &vdev->dummy_resources_list);
  139. vdev->bar_mmap_supported[bar] = true;
  140. continue;
  141. }
  142. /*
  143. * Here we don't handle the case when the BAR is not page
  144. * aligned because we can't expect the BAR will be
  145. * assigned into the same location in a page in guest
  146. * when we passthrough the BAR. And it's hard to access
  147. * this BAR in userspace because we have no way to get
  148. * the BAR's location in a page.
  149. */
  150. no_mmap:
  151. vdev->bar_mmap_supported[bar] = false;
  152. }
  153. }
  154. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
  155. static void vfio_pci_disable(struct vfio_pci_device *vdev);
  156. /*
  157. * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
  158. * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
  159. * If a device implements the former but not the latter we would typically
  160. * expect broken_intx_masking be set and require an exclusive interrupt.
  161. * However since we do have control of the device's ability to assert INTx,
  162. * we can instead pretend that the device does not implement INTx, virtualizing
  163. * the pin register to report zero and maintaining DisINTx set on the host.
  164. */
  165. static bool vfio_pci_nointx(struct pci_dev *pdev)
  166. {
  167. switch (pdev->vendor) {
  168. case PCI_VENDOR_ID_INTEL:
  169. switch (pdev->device) {
  170. /* All i40e (XL710/X710) 10/20/40GbE NICs */
  171. case 0x1572:
  172. case 0x1574:
  173. case 0x1580 ... 0x1581:
  174. case 0x1583 ... 0x1589:
  175. case 0x37d0 ... 0x37d2:
  176. return true;
  177. default:
  178. return false;
  179. }
  180. }
  181. return false;
  182. }
  183. static int vfio_pci_enable(struct vfio_pci_device *vdev)
  184. {
  185. struct pci_dev *pdev = vdev->pdev;
  186. int ret;
  187. u16 cmd;
  188. u8 msix_pos;
  189. pci_set_power_state(pdev, PCI_D0);
  190. /* Don't allow our initial saved state to include busmaster */
  191. pci_clear_master(pdev);
  192. ret = pci_enable_device(pdev);
  193. if (ret)
  194. return ret;
  195. vdev->reset_works = (pci_reset_function(pdev) == 0);
  196. pci_save_state(pdev);
  197. vdev->pci_saved_state = pci_store_saved_state(pdev);
  198. if (!vdev->pci_saved_state)
  199. pr_debug("%s: Couldn't store %s saved state\n",
  200. __func__, dev_name(&pdev->dev));
  201. if (likely(!nointxmask)) {
  202. if (vfio_pci_nointx(pdev)) {
  203. dev_info(&pdev->dev, "Masking broken INTx support\n");
  204. vdev->nointx = true;
  205. pci_intx(pdev, 0);
  206. } else
  207. vdev->pci_2_3 = pci_intx_mask_supported(pdev);
  208. }
  209. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  210. if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
  211. cmd &= ~PCI_COMMAND_INTX_DISABLE;
  212. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  213. }
  214. ret = vfio_config_init(vdev);
  215. if (ret) {
  216. kfree(vdev->pci_saved_state);
  217. vdev->pci_saved_state = NULL;
  218. pci_disable_device(pdev);
  219. return ret;
  220. }
  221. msix_pos = pdev->msix_cap;
  222. if (msix_pos) {
  223. u16 flags;
  224. u32 table;
  225. pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
  226. pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
  227. vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
  228. vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
  229. vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
  230. } else
  231. vdev->msix_bar = 0xFF;
  232. if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
  233. vdev->has_vga = true;
  234. if (vfio_pci_is_vga(pdev) &&
  235. pdev->vendor == PCI_VENDOR_ID_INTEL &&
  236. IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
  237. ret = vfio_pci_igd_init(vdev);
  238. if (ret) {
  239. dev_warn(&vdev->pdev->dev,
  240. "Failed to setup Intel IGD regions\n");
  241. vfio_pci_disable(vdev);
  242. return ret;
  243. }
  244. }
  245. vfio_pci_probe_mmaps(vdev);
  246. return 0;
  247. }
  248. static void vfio_pci_disable(struct vfio_pci_device *vdev)
  249. {
  250. struct pci_dev *pdev = vdev->pdev;
  251. struct vfio_pci_dummy_resource *dummy_res, *tmp;
  252. int i, bar;
  253. /* Stop the device from further DMA */
  254. pci_clear_master(pdev);
  255. vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
  256. VFIO_IRQ_SET_ACTION_TRIGGER,
  257. vdev->irq_type, 0, 0, NULL);
  258. vdev->virq_disabled = false;
  259. for (i = 0; i < vdev->num_regions; i++)
  260. vdev->region[i].ops->release(vdev, &vdev->region[i]);
  261. vdev->num_regions = 0;
  262. kfree(vdev->region);
  263. vdev->region = NULL; /* don't krealloc a freed pointer */
  264. vfio_config_free(vdev);
  265. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  266. if (!vdev->barmap[bar])
  267. continue;
  268. pci_iounmap(pdev, vdev->barmap[bar]);
  269. pci_release_selected_regions(pdev, 1 << bar);
  270. vdev->barmap[bar] = NULL;
  271. }
  272. list_for_each_entry_safe(dummy_res, tmp,
  273. &vdev->dummy_resources_list, res_next) {
  274. list_del(&dummy_res->res_next);
  275. release_resource(&dummy_res->resource);
  276. kfree(dummy_res);
  277. }
  278. vdev->needs_reset = true;
  279. /*
  280. * If we have saved state, restore it. If we can reset the device,
  281. * even better. Resetting with current state seems better than
  282. * nothing, but saving and restoring current state without reset
  283. * is just busy work.
  284. */
  285. if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
  286. pr_info("%s: Couldn't reload %s saved state\n",
  287. __func__, dev_name(&pdev->dev));
  288. if (!vdev->reset_works)
  289. goto out;
  290. pci_save_state(pdev);
  291. }
  292. /*
  293. * Disable INTx and MSI, presumably to avoid spurious interrupts
  294. * during reset. Stolen from pci_reset_function()
  295. */
  296. pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
  297. /*
  298. * Try to reset the device. The success of this is dependent on
  299. * being able to lock the device, which is not always possible.
  300. */
  301. if (vdev->reset_works && !pci_try_reset_function(pdev))
  302. vdev->needs_reset = false;
  303. pci_restore_state(pdev);
  304. out:
  305. pci_disable_device(pdev);
  306. vfio_pci_try_bus_reset(vdev);
  307. if (!disable_idle_d3)
  308. pci_set_power_state(pdev, PCI_D3hot);
  309. }
  310. static void vfio_pci_release(void *device_data)
  311. {
  312. struct vfio_pci_device *vdev = device_data;
  313. mutex_lock(&driver_lock);
  314. if (!(--vdev->refcnt)) {
  315. vfio_spapr_pci_eeh_release(vdev->pdev);
  316. vfio_pci_disable(vdev);
  317. }
  318. mutex_unlock(&driver_lock);
  319. module_put(THIS_MODULE);
  320. }
  321. static int vfio_pci_open(void *device_data)
  322. {
  323. struct vfio_pci_device *vdev = device_data;
  324. int ret = 0;
  325. if (!try_module_get(THIS_MODULE))
  326. return -ENODEV;
  327. mutex_lock(&driver_lock);
  328. if (!vdev->refcnt) {
  329. ret = vfio_pci_enable(vdev);
  330. if (ret)
  331. goto error;
  332. vfio_spapr_pci_eeh_open(vdev->pdev);
  333. }
  334. vdev->refcnt++;
  335. error:
  336. mutex_unlock(&driver_lock);
  337. if (ret)
  338. module_put(THIS_MODULE);
  339. return ret;
  340. }
  341. static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
  342. {
  343. if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
  344. u8 pin;
  345. pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
  346. if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && !vdev->nointx && pin)
  347. return 1;
  348. } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
  349. u8 pos;
  350. u16 flags;
  351. pos = vdev->pdev->msi_cap;
  352. if (pos) {
  353. pci_read_config_word(vdev->pdev,
  354. pos + PCI_MSI_FLAGS, &flags);
  355. return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
  356. }
  357. } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
  358. u8 pos;
  359. u16 flags;
  360. pos = vdev->pdev->msix_cap;
  361. if (pos) {
  362. pci_read_config_word(vdev->pdev,
  363. pos + PCI_MSIX_FLAGS, &flags);
  364. return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
  365. }
  366. } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
  367. if (pci_is_pcie(vdev->pdev))
  368. return 1;
  369. } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
  370. return 1;
  371. }
  372. return 0;
  373. }
  374. static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
  375. {
  376. (*(int *)data)++;
  377. return 0;
  378. }
  379. struct vfio_pci_fill_info {
  380. int max;
  381. int cur;
  382. struct vfio_pci_dependent_device *devices;
  383. };
  384. static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
  385. {
  386. struct vfio_pci_fill_info *fill = data;
  387. struct iommu_group *iommu_group;
  388. if (fill->cur == fill->max)
  389. return -EAGAIN; /* Something changed, try again */
  390. iommu_group = iommu_group_get(&pdev->dev);
  391. if (!iommu_group)
  392. return -EPERM; /* Cannot reset non-isolated devices */
  393. fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
  394. fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
  395. fill->devices[fill->cur].bus = pdev->bus->number;
  396. fill->devices[fill->cur].devfn = pdev->devfn;
  397. fill->cur++;
  398. iommu_group_put(iommu_group);
  399. return 0;
  400. }
  401. struct vfio_pci_group_entry {
  402. struct vfio_group *group;
  403. int id;
  404. };
  405. struct vfio_pci_group_info {
  406. int count;
  407. struct vfio_pci_group_entry *groups;
  408. };
  409. static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
  410. {
  411. struct vfio_pci_group_info *info = data;
  412. struct iommu_group *group;
  413. int id, i;
  414. group = iommu_group_get(&pdev->dev);
  415. if (!group)
  416. return -EPERM;
  417. id = iommu_group_id(group);
  418. for (i = 0; i < info->count; i++)
  419. if (info->groups[i].id == id)
  420. break;
  421. iommu_group_put(group);
  422. return (i == info->count) ? -EINVAL : 0;
  423. }
  424. static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
  425. {
  426. for (; pdev; pdev = pdev->bus->self)
  427. if (pdev->bus == slot->bus)
  428. return (pdev->slot == slot);
  429. return false;
  430. }
  431. struct vfio_pci_walk_info {
  432. int (*fn)(struct pci_dev *, void *data);
  433. void *data;
  434. struct pci_dev *pdev;
  435. bool slot;
  436. int ret;
  437. };
  438. static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
  439. {
  440. struct vfio_pci_walk_info *walk = data;
  441. if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
  442. walk->ret = walk->fn(pdev, walk->data);
  443. return walk->ret;
  444. }
  445. static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
  446. int (*fn)(struct pci_dev *,
  447. void *data), void *data,
  448. bool slot)
  449. {
  450. struct vfio_pci_walk_info walk = {
  451. .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
  452. };
  453. pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
  454. return walk.ret;
  455. }
  456. static int msix_sparse_mmap_cap(struct vfio_pci_device *vdev,
  457. struct vfio_info_cap *caps)
  458. {
  459. struct vfio_region_info_cap_sparse_mmap *sparse;
  460. size_t end, size;
  461. int nr_areas = 2, i = 0, ret;
  462. end = pci_resource_len(vdev->pdev, vdev->msix_bar);
  463. /* If MSI-X table is aligned to the start or end, only one area */
  464. if (((vdev->msix_offset & PAGE_MASK) == 0) ||
  465. (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) >= end))
  466. nr_areas = 1;
  467. size = sizeof(*sparse) + (nr_areas * sizeof(*sparse->areas));
  468. sparse = kzalloc(size, GFP_KERNEL);
  469. if (!sparse)
  470. return -ENOMEM;
  471. sparse->nr_areas = nr_areas;
  472. if (vdev->msix_offset & PAGE_MASK) {
  473. sparse->areas[i].offset = 0;
  474. sparse->areas[i].size = vdev->msix_offset & PAGE_MASK;
  475. i++;
  476. }
  477. if (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) < end) {
  478. sparse->areas[i].offset = PAGE_ALIGN(vdev->msix_offset +
  479. vdev->msix_size);
  480. sparse->areas[i].size = end - sparse->areas[i].offset;
  481. i++;
  482. }
  483. ret = vfio_info_add_capability(caps, VFIO_REGION_INFO_CAP_SPARSE_MMAP,
  484. sparse);
  485. kfree(sparse);
  486. return ret;
  487. }
  488. int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
  489. unsigned int type, unsigned int subtype,
  490. const struct vfio_pci_regops *ops,
  491. size_t size, u32 flags, void *data)
  492. {
  493. struct vfio_pci_region *region;
  494. region = krealloc(vdev->region,
  495. (vdev->num_regions + 1) * sizeof(*region),
  496. GFP_KERNEL);
  497. if (!region)
  498. return -ENOMEM;
  499. vdev->region = region;
  500. vdev->region[vdev->num_regions].type = type;
  501. vdev->region[vdev->num_regions].subtype = subtype;
  502. vdev->region[vdev->num_regions].ops = ops;
  503. vdev->region[vdev->num_regions].size = size;
  504. vdev->region[vdev->num_regions].flags = flags;
  505. vdev->region[vdev->num_regions].data = data;
  506. vdev->num_regions++;
  507. return 0;
  508. }
  509. static long vfio_pci_ioctl(void *device_data,
  510. unsigned int cmd, unsigned long arg)
  511. {
  512. struct vfio_pci_device *vdev = device_data;
  513. unsigned long minsz;
  514. if (cmd == VFIO_DEVICE_GET_INFO) {
  515. struct vfio_device_info info;
  516. minsz = offsetofend(struct vfio_device_info, num_irqs);
  517. if (copy_from_user(&info, (void __user *)arg, minsz))
  518. return -EFAULT;
  519. if (info.argsz < minsz)
  520. return -EINVAL;
  521. info.flags = VFIO_DEVICE_FLAGS_PCI;
  522. if (vdev->reset_works)
  523. info.flags |= VFIO_DEVICE_FLAGS_RESET;
  524. info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
  525. info.num_irqs = VFIO_PCI_NUM_IRQS;
  526. return copy_to_user((void __user *)arg, &info, minsz) ?
  527. -EFAULT : 0;
  528. } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
  529. struct pci_dev *pdev = vdev->pdev;
  530. struct vfio_region_info info;
  531. struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
  532. int i, ret;
  533. minsz = offsetofend(struct vfio_region_info, offset);
  534. if (copy_from_user(&info, (void __user *)arg, minsz))
  535. return -EFAULT;
  536. if (info.argsz < minsz)
  537. return -EINVAL;
  538. switch (info.index) {
  539. case VFIO_PCI_CONFIG_REGION_INDEX:
  540. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  541. info.size = pdev->cfg_size;
  542. info.flags = VFIO_REGION_INFO_FLAG_READ |
  543. VFIO_REGION_INFO_FLAG_WRITE;
  544. break;
  545. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  546. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  547. info.size = pci_resource_len(pdev, info.index);
  548. if (!info.size) {
  549. info.flags = 0;
  550. break;
  551. }
  552. info.flags = VFIO_REGION_INFO_FLAG_READ |
  553. VFIO_REGION_INFO_FLAG_WRITE;
  554. if (vdev->bar_mmap_supported[info.index]) {
  555. info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
  556. if (info.index == vdev->msix_bar) {
  557. ret = msix_sparse_mmap_cap(vdev, &caps);
  558. if (ret)
  559. return ret;
  560. }
  561. }
  562. break;
  563. case VFIO_PCI_ROM_REGION_INDEX:
  564. {
  565. void __iomem *io;
  566. size_t size;
  567. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  568. info.flags = 0;
  569. /* Report the BAR size, not the ROM size */
  570. info.size = pci_resource_len(pdev, info.index);
  571. if (!info.size) {
  572. /* Shadow ROMs appear as PCI option ROMs */
  573. if (pdev->resource[PCI_ROM_RESOURCE].flags &
  574. IORESOURCE_ROM_SHADOW)
  575. info.size = 0x20000;
  576. else
  577. break;
  578. }
  579. /* Is it really there? */
  580. io = pci_map_rom(pdev, &size);
  581. if (!io || !size) {
  582. info.size = 0;
  583. break;
  584. }
  585. pci_unmap_rom(pdev, io);
  586. info.flags = VFIO_REGION_INFO_FLAG_READ;
  587. break;
  588. }
  589. case VFIO_PCI_VGA_REGION_INDEX:
  590. if (!vdev->has_vga)
  591. return -EINVAL;
  592. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  593. info.size = 0xc0000;
  594. info.flags = VFIO_REGION_INFO_FLAG_READ |
  595. VFIO_REGION_INFO_FLAG_WRITE;
  596. break;
  597. default:
  598. {
  599. struct vfio_region_info_cap_type cap_type;
  600. if (info.index >=
  601. VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  602. return -EINVAL;
  603. i = info.index - VFIO_PCI_NUM_REGIONS;
  604. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  605. info.size = vdev->region[i].size;
  606. info.flags = vdev->region[i].flags;
  607. cap_type.type = vdev->region[i].type;
  608. cap_type.subtype = vdev->region[i].subtype;
  609. ret = vfio_info_add_capability(&caps,
  610. VFIO_REGION_INFO_CAP_TYPE,
  611. &cap_type);
  612. if (ret)
  613. return ret;
  614. }
  615. }
  616. if (caps.size) {
  617. info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
  618. if (info.argsz < sizeof(info) + caps.size) {
  619. info.argsz = sizeof(info) + caps.size;
  620. info.cap_offset = 0;
  621. } else {
  622. vfio_info_cap_shift(&caps, sizeof(info));
  623. if (copy_to_user((void __user *)arg +
  624. sizeof(info), caps.buf,
  625. caps.size)) {
  626. kfree(caps.buf);
  627. return -EFAULT;
  628. }
  629. info.cap_offset = sizeof(info);
  630. }
  631. kfree(caps.buf);
  632. }
  633. return copy_to_user((void __user *)arg, &info, minsz) ?
  634. -EFAULT : 0;
  635. } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
  636. struct vfio_irq_info info;
  637. minsz = offsetofend(struct vfio_irq_info, count);
  638. if (copy_from_user(&info, (void __user *)arg, minsz))
  639. return -EFAULT;
  640. if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
  641. return -EINVAL;
  642. switch (info.index) {
  643. case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
  644. case VFIO_PCI_REQ_IRQ_INDEX:
  645. break;
  646. case VFIO_PCI_ERR_IRQ_INDEX:
  647. if (pci_is_pcie(vdev->pdev))
  648. break;
  649. /* pass thru to return error */
  650. default:
  651. return -EINVAL;
  652. }
  653. info.flags = VFIO_IRQ_INFO_EVENTFD;
  654. info.count = vfio_pci_get_irq_count(vdev, info.index);
  655. if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
  656. info.flags |= (VFIO_IRQ_INFO_MASKABLE |
  657. VFIO_IRQ_INFO_AUTOMASKED);
  658. else
  659. info.flags |= VFIO_IRQ_INFO_NORESIZE;
  660. return copy_to_user((void __user *)arg, &info, minsz) ?
  661. -EFAULT : 0;
  662. } else if (cmd == VFIO_DEVICE_SET_IRQS) {
  663. struct vfio_irq_set hdr;
  664. u8 *data = NULL;
  665. int max, ret = 0;
  666. size_t data_size = 0;
  667. minsz = offsetofend(struct vfio_irq_set, count);
  668. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  669. return -EFAULT;
  670. max = vfio_pci_get_irq_count(vdev, hdr.index);
  671. ret = vfio_set_irqs_validate_and_prepare(&hdr, max,
  672. VFIO_PCI_NUM_IRQS, &data_size);
  673. if (ret)
  674. return ret;
  675. if (data_size) {
  676. data = memdup_user((void __user *)(arg + minsz),
  677. data_size);
  678. if (IS_ERR(data))
  679. return PTR_ERR(data);
  680. }
  681. mutex_lock(&vdev->igate);
  682. ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
  683. hdr.start, hdr.count, data);
  684. mutex_unlock(&vdev->igate);
  685. kfree(data);
  686. return ret;
  687. } else if (cmd == VFIO_DEVICE_RESET) {
  688. return vdev->reset_works ?
  689. pci_try_reset_function(vdev->pdev) : -EINVAL;
  690. } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
  691. struct vfio_pci_hot_reset_info hdr;
  692. struct vfio_pci_fill_info fill = { 0 };
  693. struct vfio_pci_dependent_device *devices = NULL;
  694. bool slot = false;
  695. int ret = 0;
  696. minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
  697. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  698. return -EFAULT;
  699. if (hdr.argsz < minsz)
  700. return -EINVAL;
  701. hdr.flags = 0;
  702. /* Can we do a slot or bus reset or neither? */
  703. if (!pci_probe_reset_slot(vdev->pdev->slot))
  704. slot = true;
  705. else if (pci_probe_reset_bus(vdev->pdev->bus))
  706. return -ENODEV;
  707. /* How many devices are affected? */
  708. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  709. vfio_pci_count_devs,
  710. &fill.max, slot);
  711. if (ret)
  712. return ret;
  713. WARN_ON(!fill.max); /* Should always be at least one */
  714. /*
  715. * If there's enough space, fill it now, otherwise return
  716. * -ENOSPC and the number of devices affected.
  717. */
  718. if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
  719. ret = -ENOSPC;
  720. hdr.count = fill.max;
  721. goto reset_info_exit;
  722. }
  723. devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
  724. if (!devices)
  725. return -ENOMEM;
  726. fill.devices = devices;
  727. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  728. vfio_pci_fill_devs,
  729. &fill, slot);
  730. /*
  731. * If a device was removed between counting and filling,
  732. * we may come up short of fill.max. If a device was
  733. * added, we'll have a return of -EAGAIN above.
  734. */
  735. if (!ret)
  736. hdr.count = fill.cur;
  737. reset_info_exit:
  738. if (copy_to_user((void __user *)arg, &hdr, minsz))
  739. ret = -EFAULT;
  740. if (!ret) {
  741. if (copy_to_user((void __user *)(arg + minsz), devices,
  742. hdr.count * sizeof(*devices)))
  743. ret = -EFAULT;
  744. }
  745. kfree(devices);
  746. return ret;
  747. } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
  748. struct vfio_pci_hot_reset hdr;
  749. int32_t *group_fds;
  750. struct vfio_pci_group_entry *groups;
  751. struct vfio_pci_group_info info;
  752. bool slot = false;
  753. int i, count = 0, ret = 0;
  754. minsz = offsetofend(struct vfio_pci_hot_reset, count);
  755. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  756. return -EFAULT;
  757. if (hdr.argsz < minsz || hdr.flags)
  758. return -EINVAL;
  759. /* Can we do a slot or bus reset or neither? */
  760. if (!pci_probe_reset_slot(vdev->pdev->slot))
  761. slot = true;
  762. else if (pci_probe_reset_bus(vdev->pdev->bus))
  763. return -ENODEV;
  764. /*
  765. * We can't let userspace give us an arbitrarily large
  766. * buffer to copy, so verify how many we think there
  767. * could be. Note groups can have multiple devices so
  768. * one group per device is the max.
  769. */
  770. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  771. vfio_pci_count_devs,
  772. &count, slot);
  773. if (ret)
  774. return ret;
  775. /* Somewhere between 1 and count is OK */
  776. if (!hdr.count || hdr.count > count)
  777. return -EINVAL;
  778. group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
  779. groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
  780. if (!group_fds || !groups) {
  781. kfree(group_fds);
  782. kfree(groups);
  783. return -ENOMEM;
  784. }
  785. if (copy_from_user(group_fds, (void __user *)(arg + minsz),
  786. hdr.count * sizeof(*group_fds))) {
  787. kfree(group_fds);
  788. kfree(groups);
  789. return -EFAULT;
  790. }
  791. /*
  792. * For each group_fd, get the group through the vfio external
  793. * user interface and store the group and iommu ID. This
  794. * ensures the group is held across the reset.
  795. */
  796. for (i = 0; i < hdr.count; i++) {
  797. struct vfio_group *group;
  798. struct fd f = fdget(group_fds[i]);
  799. if (!f.file) {
  800. ret = -EBADF;
  801. break;
  802. }
  803. group = vfio_group_get_external_user(f.file);
  804. fdput(f);
  805. if (IS_ERR(group)) {
  806. ret = PTR_ERR(group);
  807. break;
  808. }
  809. groups[i].group = group;
  810. groups[i].id = vfio_external_user_iommu_id(group);
  811. }
  812. kfree(group_fds);
  813. /* release reference to groups on error */
  814. if (ret)
  815. goto hot_reset_release;
  816. info.count = hdr.count;
  817. info.groups = groups;
  818. /*
  819. * Test whether all the affected devices are contained
  820. * by the set of groups provided by the user.
  821. */
  822. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  823. vfio_pci_validate_devs,
  824. &info, slot);
  825. if (!ret)
  826. /* User has access, do the reset */
  827. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  828. pci_try_reset_bus(vdev->pdev->bus);
  829. hot_reset_release:
  830. for (i--; i >= 0; i--)
  831. vfio_group_put_external_user(groups[i].group);
  832. kfree(groups);
  833. return ret;
  834. }
  835. return -ENOTTY;
  836. }
  837. static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
  838. size_t count, loff_t *ppos, bool iswrite)
  839. {
  840. unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
  841. struct vfio_pci_device *vdev = device_data;
  842. if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  843. return -EINVAL;
  844. switch (index) {
  845. case VFIO_PCI_CONFIG_REGION_INDEX:
  846. return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
  847. case VFIO_PCI_ROM_REGION_INDEX:
  848. if (iswrite)
  849. return -EINVAL;
  850. return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
  851. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  852. return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
  853. case VFIO_PCI_VGA_REGION_INDEX:
  854. return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
  855. default:
  856. index -= VFIO_PCI_NUM_REGIONS;
  857. return vdev->region[index].ops->rw(vdev, buf,
  858. count, ppos, iswrite);
  859. }
  860. return -EINVAL;
  861. }
  862. static ssize_t vfio_pci_read(void *device_data, char __user *buf,
  863. size_t count, loff_t *ppos)
  864. {
  865. if (!count)
  866. return 0;
  867. return vfio_pci_rw(device_data, buf, count, ppos, false);
  868. }
  869. static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
  870. size_t count, loff_t *ppos)
  871. {
  872. if (!count)
  873. return 0;
  874. return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
  875. }
  876. static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
  877. {
  878. struct vfio_pci_device *vdev = device_data;
  879. struct pci_dev *pdev = vdev->pdev;
  880. unsigned int index;
  881. u64 phys_len, req_len, pgoff, req_start;
  882. int ret;
  883. index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
  884. if (vma->vm_end < vma->vm_start)
  885. return -EINVAL;
  886. if ((vma->vm_flags & VM_SHARED) == 0)
  887. return -EINVAL;
  888. if (index >= VFIO_PCI_ROM_REGION_INDEX)
  889. return -EINVAL;
  890. if (!vdev->bar_mmap_supported[index])
  891. return -EINVAL;
  892. phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
  893. req_len = vma->vm_end - vma->vm_start;
  894. pgoff = vma->vm_pgoff &
  895. ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
  896. req_start = pgoff << PAGE_SHIFT;
  897. if (req_start + req_len > phys_len)
  898. return -EINVAL;
  899. if (index == vdev->msix_bar) {
  900. /*
  901. * Disallow mmaps overlapping the MSI-X table; users don't
  902. * get to touch this directly. We could find somewhere
  903. * else to map the overlap, but page granularity is only
  904. * a recommendation, not a requirement, so the user needs
  905. * to know which bits are real. Requiring them to mmap
  906. * around the table makes that clear.
  907. */
  908. /* If neither entirely above nor below, then it overlaps */
  909. if (!(req_start >= vdev->msix_offset + vdev->msix_size ||
  910. req_start + req_len <= vdev->msix_offset))
  911. return -EINVAL;
  912. }
  913. /*
  914. * Even though we don't make use of the barmap for the mmap,
  915. * we need to request the region and the barmap tracks that.
  916. */
  917. if (!vdev->barmap[index]) {
  918. ret = pci_request_selected_regions(pdev,
  919. 1 << index, "vfio-pci");
  920. if (ret)
  921. return ret;
  922. vdev->barmap[index] = pci_iomap(pdev, index, 0);
  923. if (!vdev->barmap[index]) {
  924. pci_release_selected_regions(pdev, 1 << index);
  925. return -ENOMEM;
  926. }
  927. }
  928. vma->vm_private_data = vdev;
  929. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  930. vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
  931. return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  932. req_len, vma->vm_page_prot);
  933. }
  934. static void vfio_pci_request(void *device_data, unsigned int count)
  935. {
  936. struct vfio_pci_device *vdev = device_data;
  937. mutex_lock(&vdev->igate);
  938. if (vdev->req_trigger) {
  939. if (!(count % 10))
  940. dev_notice_ratelimited(&vdev->pdev->dev,
  941. "Relaying device request to user (#%u)\n",
  942. count);
  943. eventfd_signal(vdev->req_trigger, 1);
  944. } else if (count == 0) {
  945. dev_warn(&vdev->pdev->dev,
  946. "No device request channel registered, blocked until released by user\n");
  947. }
  948. mutex_unlock(&vdev->igate);
  949. }
  950. static const struct vfio_device_ops vfio_pci_ops = {
  951. .name = "vfio-pci",
  952. .open = vfio_pci_open,
  953. .release = vfio_pci_release,
  954. .ioctl = vfio_pci_ioctl,
  955. .read = vfio_pci_read,
  956. .write = vfio_pci_write,
  957. .mmap = vfio_pci_mmap,
  958. .request = vfio_pci_request,
  959. };
  960. static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  961. {
  962. struct vfio_pci_device *vdev;
  963. struct iommu_group *group;
  964. int ret;
  965. if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
  966. return -EINVAL;
  967. group = vfio_iommu_group_get(&pdev->dev);
  968. if (!group)
  969. return -EINVAL;
  970. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  971. if (!vdev) {
  972. vfio_iommu_group_put(group, &pdev->dev);
  973. return -ENOMEM;
  974. }
  975. vdev->pdev = pdev;
  976. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  977. mutex_init(&vdev->igate);
  978. spin_lock_init(&vdev->irqlock);
  979. ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
  980. if (ret) {
  981. vfio_iommu_group_put(group, &pdev->dev);
  982. kfree(vdev);
  983. return ret;
  984. }
  985. if (vfio_pci_is_vga(pdev)) {
  986. vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
  987. vga_set_legacy_decoding(pdev,
  988. vfio_pci_set_vga_decode(vdev, false));
  989. }
  990. if (!disable_idle_d3) {
  991. /*
  992. * pci-core sets the device power state to an unknown value at
  993. * bootup and after being removed from a driver. The only
  994. * transition it allows from this unknown state is to D0, which
  995. * typically happens when a driver calls pci_enable_device().
  996. * We're not ready to enable the device yet, but we do want to
  997. * be able to get to D3. Therefore first do a D0 transition
  998. * before going to D3.
  999. */
  1000. pci_set_power_state(pdev, PCI_D0);
  1001. pci_set_power_state(pdev, PCI_D3hot);
  1002. }
  1003. return ret;
  1004. }
  1005. static void vfio_pci_remove(struct pci_dev *pdev)
  1006. {
  1007. struct vfio_pci_device *vdev;
  1008. vdev = vfio_del_group_dev(&pdev->dev);
  1009. if (!vdev)
  1010. return;
  1011. vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
  1012. kfree(vdev->region);
  1013. kfree(vdev);
  1014. if (vfio_pci_is_vga(pdev)) {
  1015. vga_client_register(pdev, NULL, NULL, NULL);
  1016. vga_set_legacy_decoding(pdev,
  1017. VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  1018. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
  1019. }
  1020. if (!disable_idle_d3)
  1021. pci_set_power_state(pdev, PCI_D0);
  1022. }
  1023. static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
  1024. pci_channel_state_t state)
  1025. {
  1026. struct vfio_pci_device *vdev;
  1027. struct vfio_device *device;
  1028. device = vfio_device_get_from_dev(&pdev->dev);
  1029. if (device == NULL)
  1030. return PCI_ERS_RESULT_DISCONNECT;
  1031. vdev = vfio_device_data(device);
  1032. if (vdev == NULL) {
  1033. vfio_device_put(device);
  1034. return PCI_ERS_RESULT_DISCONNECT;
  1035. }
  1036. mutex_lock(&vdev->igate);
  1037. if (vdev->err_trigger)
  1038. eventfd_signal(vdev->err_trigger, 1);
  1039. mutex_unlock(&vdev->igate);
  1040. vfio_device_put(device);
  1041. return PCI_ERS_RESULT_CAN_RECOVER;
  1042. }
  1043. static const struct pci_error_handlers vfio_err_handlers = {
  1044. .error_detected = vfio_pci_aer_err_detected,
  1045. };
  1046. static struct pci_driver vfio_pci_driver = {
  1047. .name = "vfio-pci",
  1048. .id_table = NULL, /* only dynamic ids */
  1049. .probe = vfio_pci_probe,
  1050. .remove = vfio_pci_remove,
  1051. .err_handler = &vfio_err_handlers,
  1052. };
  1053. struct vfio_devices {
  1054. struct vfio_device **devices;
  1055. int cur_index;
  1056. int max_index;
  1057. };
  1058. static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
  1059. {
  1060. struct vfio_devices *devs = data;
  1061. struct vfio_device *device;
  1062. if (devs->cur_index == devs->max_index)
  1063. return -ENOSPC;
  1064. device = vfio_device_get_from_dev(&pdev->dev);
  1065. if (!device)
  1066. return -EINVAL;
  1067. if (pci_dev_driver(pdev) != &vfio_pci_driver) {
  1068. vfio_device_put(device);
  1069. return -EBUSY;
  1070. }
  1071. devs->devices[devs->cur_index++] = device;
  1072. return 0;
  1073. }
  1074. /*
  1075. * Attempt to do a bus/slot reset if there are devices affected by a reset for
  1076. * this device that are needs_reset and all of the affected devices are unused
  1077. * (!refcnt). Callers are required to hold driver_lock when calling this to
  1078. * prevent device opens and concurrent bus reset attempts. We prevent device
  1079. * unbinds by acquiring and holding a reference to the vfio_device.
  1080. *
  1081. * NB: vfio-core considers a group to be viable even if some devices are
  1082. * bound to drivers like pci-stub or pcieport. Here we require all devices
  1083. * to be bound to vfio_pci since that's the only way we can be sure they
  1084. * stay put.
  1085. */
  1086. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
  1087. {
  1088. struct vfio_devices devs = { .cur_index = 0 };
  1089. int i = 0, ret = -EINVAL;
  1090. bool needs_reset = false, slot = false;
  1091. struct vfio_pci_device *tmp;
  1092. if (!pci_probe_reset_slot(vdev->pdev->slot))
  1093. slot = true;
  1094. else if (pci_probe_reset_bus(vdev->pdev->bus))
  1095. return;
  1096. if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
  1097. &i, slot) || !i)
  1098. return;
  1099. devs.max_index = i;
  1100. devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
  1101. if (!devs.devices)
  1102. return;
  1103. if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
  1104. vfio_pci_get_devs, &devs, slot))
  1105. goto put_devs;
  1106. for (i = 0; i < devs.cur_index; i++) {
  1107. tmp = vfio_device_data(devs.devices[i]);
  1108. if (tmp->needs_reset)
  1109. needs_reset = true;
  1110. if (tmp->refcnt)
  1111. goto put_devs;
  1112. }
  1113. if (needs_reset)
  1114. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  1115. pci_try_reset_bus(vdev->pdev->bus);
  1116. put_devs:
  1117. for (i = 0; i < devs.cur_index; i++) {
  1118. tmp = vfio_device_data(devs.devices[i]);
  1119. if (!ret)
  1120. tmp->needs_reset = false;
  1121. if (!tmp->refcnt && !disable_idle_d3)
  1122. pci_set_power_state(tmp->pdev, PCI_D3hot);
  1123. vfio_device_put(devs.devices[i]);
  1124. }
  1125. kfree(devs.devices);
  1126. }
  1127. static void __exit vfio_pci_cleanup(void)
  1128. {
  1129. pci_unregister_driver(&vfio_pci_driver);
  1130. vfio_pci_uninit_perm_bits();
  1131. }
  1132. static void __init vfio_pci_fill_ids(void)
  1133. {
  1134. char *p, *id;
  1135. int rc;
  1136. /* no ids passed actually */
  1137. if (ids[0] == '\0')
  1138. return;
  1139. /* add ids specified in the module parameter */
  1140. p = ids;
  1141. while ((id = strsep(&p, ","))) {
  1142. unsigned int vendor, device, subvendor = PCI_ANY_ID,
  1143. subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
  1144. int fields;
  1145. if (!strlen(id))
  1146. continue;
  1147. fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
  1148. &vendor, &device, &subvendor, &subdevice,
  1149. &class, &class_mask);
  1150. if (fields < 2) {
  1151. pr_warn("invalid id string \"%s\"\n", id);
  1152. continue;
  1153. }
  1154. rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
  1155. subvendor, subdevice, class, class_mask, 0);
  1156. if (rc)
  1157. pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
  1158. vendor, device, subvendor, subdevice,
  1159. class, class_mask, rc);
  1160. else
  1161. pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
  1162. vendor, device, subvendor, subdevice,
  1163. class, class_mask);
  1164. }
  1165. }
  1166. static int __init vfio_pci_init(void)
  1167. {
  1168. int ret;
  1169. /* Allocate shared config space permision data used by all devices */
  1170. ret = vfio_pci_init_perm_bits();
  1171. if (ret)
  1172. return ret;
  1173. /* Register and scan for devices */
  1174. ret = pci_register_driver(&vfio_pci_driver);
  1175. if (ret)
  1176. goto out_driver;
  1177. vfio_pci_fill_ids();
  1178. return 0;
  1179. out_driver:
  1180. vfio_pci_uninit_perm_bits();
  1181. return ret;
  1182. }
  1183. module_init(vfio_pci_init);
  1184. module_exit(vfio_pci_cleanup);
  1185. MODULE_VERSION(DRIVER_VERSION);
  1186. MODULE_LICENSE("GPL v2");
  1187. MODULE_AUTHOR(DRIVER_AUTHOR);
  1188. MODULE_DESCRIPTION(DRIVER_DESC);