ehci-q.c 43 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  22. *
  23. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  24. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  25. * buffers needed for the larger number). We use one QH per endpoint, queue
  26. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  27. *
  28. * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  29. * interrupts) needs careful scheduling. Performance improvements can be
  30. * an ongoing challenge. That's in "ehci-sched.c".
  31. *
  32. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  33. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  34. * (b) special fields in qh entries or (c) split iso entries. TTs will
  35. * buffer low/full speed data so the host collects it at high speed.
  36. */
  37. /*-------------------------------------------------------------------------*/
  38. /* fill a qtd, returning how much of the buffer we were able to queue up */
  39. static int
  40. qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  41. size_t len, int token, int maxpacket)
  42. {
  43. int i, count;
  44. u64 addr = buf;
  45. /* one buffer entry per 4K ... first might be short or unaligned */
  46. qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  47. qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  48. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  49. if (likely (len < count)) /* ... iff needed */
  50. count = len;
  51. else {
  52. buf += 0x1000;
  53. buf &= ~0x0fff;
  54. /* per-qtd limit: from 16K to 20K (best alignment) */
  55. for (i = 1; count < len && i < 5; i++) {
  56. addr = buf;
  57. qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  58. qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  59. (u32)(addr >> 32));
  60. buf += 0x1000;
  61. if ((count + 0x1000) < len)
  62. count += 0x1000;
  63. else
  64. count = len;
  65. }
  66. /* short packets may only terminate transfers */
  67. if (count != len)
  68. count -= (count % maxpacket);
  69. }
  70. qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  71. qtd->length = count;
  72. return count;
  73. }
  74. /*-------------------------------------------------------------------------*/
  75. static inline void
  76. qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  77. {
  78. struct ehci_qh_hw *hw = qh->hw;
  79. /* writes to an active overlay are unsafe */
  80. WARN_ON(qh->qh_state != QH_STATE_IDLE);
  81. hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  82. hw->hw_alt_next = EHCI_LIST_END(ehci);
  83. /* Except for control endpoints, we make hardware maintain data
  84. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  85. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  86. * ever clear it.
  87. */
  88. if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
  89. unsigned is_out, epnum;
  90. is_out = qh->is_out;
  91. epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
  92. if (unlikely(!usb_gettoggle(qh->ps.udev, epnum, is_out))) {
  93. hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
  94. usb_settoggle(qh->ps.udev, epnum, is_out, 1);
  95. }
  96. }
  97. hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
  98. }
  99. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  100. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  101. * recovery (including urb dequeue) would need software changes to a QH...
  102. */
  103. static void
  104. qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
  105. {
  106. struct ehci_qtd *qtd;
  107. qtd = list_entry(qh->qtd_list.next, struct ehci_qtd, qtd_list);
  108. /*
  109. * first qtd may already be partially processed.
  110. * If we come here during unlink, the QH overlay region
  111. * might have reference to the just unlinked qtd. The
  112. * qtd is updated in qh_completions(). Update the QH
  113. * overlay here.
  114. */
  115. if (qh->hw->hw_token & ACTIVE_BIT(ehci)) {
  116. qh->hw->hw_qtd_next = qtd->hw_next;
  117. if (qh->should_be_inactive)
  118. ehci_warn(ehci, "qh %p should be inactive!\n", qh);
  119. } else {
  120. qh_update(ehci, qh, qtd);
  121. }
  122. qh->should_be_inactive = 0;
  123. }
  124. /*-------------------------------------------------------------------------*/
  125. static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
  126. static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
  127. struct usb_host_endpoint *ep)
  128. {
  129. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  130. struct ehci_qh *qh = ep->hcpriv;
  131. unsigned long flags;
  132. spin_lock_irqsave(&ehci->lock, flags);
  133. qh->clearing_tt = 0;
  134. if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
  135. && ehci->rh_state == EHCI_RH_RUNNING)
  136. qh_link_async(ehci, qh);
  137. spin_unlock_irqrestore(&ehci->lock, flags);
  138. }
  139. static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
  140. struct urb *urb, u32 token)
  141. {
  142. /* If an async split transaction gets an error or is unlinked,
  143. * the TT buffer may be left in an indeterminate state. We
  144. * have to clear the TT buffer.
  145. *
  146. * Note: this routine is never called for Isochronous transfers.
  147. */
  148. if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
  149. #ifdef CONFIG_DYNAMIC_DEBUG
  150. struct usb_device *tt = urb->dev->tt->hub;
  151. dev_dbg(&tt->dev,
  152. "clear tt buffer port %d, a%d ep%d t%08x\n",
  153. urb->dev->ttport, urb->dev->devnum,
  154. usb_pipeendpoint(urb->pipe), token);
  155. #endif /* CONFIG_DYNAMIC_DEBUG */
  156. if (!ehci_is_TDI(ehci)
  157. || urb->dev->tt->hub !=
  158. ehci_to_hcd(ehci)->self.root_hub) {
  159. if (usb_hub_clear_tt_buffer(urb) == 0)
  160. qh->clearing_tt = 1;
  161. } else {
  162. /* REVISIT ARC-derived cores don't clear the root
  163. * hub TT buffer in this way...
  164. */
  165. }
  166. }
  167. }
  168. static int qtd_copy_status (
  169. struct ehci_hcd *ehci,
  170. struct urb *urb,
  171. size_t length,
  172. u32 token
  173. )
  174. {
  175. int status = -EINPROGRESS;
  176. /* count IN/OUT bytes, not SETUP (even short packets) */
  177. if (likely (QTD_PID (token) != 2))
  178. urb->actual_length += length - QTD_LENGTH (token);
  179. /* don't modify error codes */
  180. if (unlikely(urb->unlinked))
  181. return status;
  182. /* force cleanup after short read; not always an error */
  183. if (unlikely (IS_SHORT_READ (token)))
  184. status = -EREMOTEIO;
  185. /* serious "can't proceed" faults reported by the hardware */
  186. if (token & QTD_STS_HALT) {
  187. if (token & QTD_STS_BABBLE) {
  188. /* FIXME "must" disable babbling device's port too */
  189. status = -EOVERFLOW;
  190. /* CERR nonzero + halt --> stall */
  191. } else if (QTD_CERR(token)) {
  192. status = -EPIPE;
  193. /* In theory, more than one of the following bits can be set
  194. * since they are sticky and the transaction is retried.
  195. * Which to test first is rather arbitrary.
  196. */
  197. } else if (token & QTD_STS_MMF) {
  198. /* fs/ls interrupt xfer missed the complete-split */
  199. status = -EPROTO;
  200. } else if (token & QTD_STS_DBE) {
  201. status = (QTD_PID (token) == 1) /* IN ? */
  202. ? -ENOSR /* hc couldn't read data */
  203. : -ECOMM; /* hc couldn't write data */
  204. } else if (token & QTD_STS_XACT) {
  205. /* timeout, bad CRC, wrong PID, etc */
  206. ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
  207. urb->dev->devpath,
  208. usb_pipeendpoint(urb->pipe),
  209. usb_pipein(urb->pipe) ? "in" : "out");
  210. status = -EPROTO;
  211. } else { /* unknown */
  212. status = -EPROTO;
  213. }
  214. }
  215. return status;
  216. }
  217. static void
  218. ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
  219. {
  220. if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
  221. /* ... update hc-wide periodic stats */
  222. ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
  223. }
  224. if (unlikely(urb->unlinked)) {
  225. COUNT(ehci->stats.unlink);
  226. } else {
  227. /* report non-error and short read status as zero */
  228. if (status == -EINPROGRESS || status == -EREMOTEIO)
  229. status = 0;
  230. COUNT(ehci->stats.complete);
  231. }
  232. #ifdef EHCI_URB_TRACE
  233. ehci_dbg (ehci,
  234. "%s %s urb %p ep%d%s status %d len %d/%d\n",
  235. __func__, urb->dev->devpath, urb,
  236. usb_pipeendpoint (urb->pipe),
  237. usb_pipein (urb->pipe) ? "in" : "out",
  238. status,
  239. urb->actual_length, urb->transfer_buffer_length);
  240. #endif
  241. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  242. usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
  243. }
  244. static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  245. /*
  246. * Process and free completed qtds for a qh, returning URBs to drivers.
  247. * Chases up to qh->hw_current. Returns nonzero if the caller should
  248. * unlink qh.
  249. */
  250. static unsigned
  251. qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
  252. {
  253. struct ehci_qtd *last, *end = qh->dummy;
  254. struct list_head *entry, *tmp;
  255. int last_status;
  256. int stopped;
  257. u8 state;
  258. struct ehci_qh_hw *hw = qh->hw;
  259. /* completions (or tasks on other cpus) must never clobber HALT
  260. * till we've gone through and cleaned everything up, even when
  261. * they add urbs to this qh's queue or mark them for unlinking.
  262. *
  263. * NOTE: unlinking expects to be done in queue order.
  264. *
  265. * It's a bug for qh->qh_state to be anything other than
  266. * QH_STATE_IDLE, unless our caller is scan_async() or
  267. * scan_intr().
  268. */
  269. state = qh->qh_state;
  270. qh->qh_state = QH_STATE_COMPLETING;
  271. stopped = (state == QH_STATE_IDLE);
  272. rescan:
  273. last = NULL;
  274. last_status = -EINPROGRESS;
  275. qh->dequeue_during_giveback = 0;
  276. /* remove de-activated QTDs from front of queue.
  277. * after faults (including short reads), cleanup this urb
  278. * then let the queue advance.
  279. * if queue is stopped, handles unlinks.
  280. */
  281. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  282. struct ehci_qtd *qtd;
  283. struct urb *urb;
  284. u32 token = 0;
  285. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  286. urb = qtd->urb;
  287. /* clean up any state from previous QTD ...*/
  288. if (last) {
  289. if (likely (last->urb != urb)) {
  290. ehci_urb_done(ehci, last->urb, last_status);
  291. last_status = -EINPROGRESS;
  292. }
  293. ehci_qtd_free (ehci, last);
  294. last = NULL;
  295. }
  296. /* ignore urbs submitted during completions we reported */
  297. if (qtd == end)
  298. break;
  299. /* hardware copies qtd out of qh overlay */
  300. rmb ();
  301. token = hc32_to_cpu(ehci, qtd->hw_token);
  302. /* always clean up qtds the hc de-activated */
  303. retry_xacterr:
  304. if ((token & QTD_STS_ACTIVE) == 0) {
  305. /* Report Data Buffer Error: non-fatal but useful */
  306. if (token & QTD_STS_DBE)
  307. ehci_dbg(ehci,
  308. "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  309. urb,
  310. usb_endpoint_num(&urb->ep->desc),
  311. usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
  312. urb->transfer_buffer_length,
  313. qtd,
  314. qh);
  315. /* on STALL, error, and short reads this urb must
  316. * complete and all its qtds must be recycled.
  317. */
  318. if ((token & QTD_STS_HALT) != 0) {
  319. /* retry transaction errors until we
  320. * reach the software xacterr limit
  321. */
  322. if ((token & QTD_STS_XACT) &&
  323. QTD_CERR(token) == 0 &&
  324. ++qh->xacterrs < QH_XACTERR_MAX &&
  325. !urb->unlinked) {
  326. ehci_dbg(ehci,
  327. "detected XactErr len %zu/%zu retry %d\n",
  328. qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
  329. /* reset the token in the qtd and the
  330. * qh overlay (which still contains
  331. * the qtd) so that we pick up from
  332. * where we left off
  333. */
  334. token &= ~QTD_STS_HALT;
  335. token |= QTD_STS_ACTIVE |
  336. (EHCI_TUNE_CERR << 10);
  337. qtd->hw_token = cpu_to_hc32(ehci,
  338. token);
  339. wmb();
  340. hw->hw_token = cpu_to_hc32(ehci,
  341. token);
  342. goto retry_xacterr;
  343. }
  344. stopped = 1;
  345. qh->unlink_reason |= QH_UNLINK_HALTED;
  346. /* magic dummy for some short reads; qh won't advance.
  347. * that silicon quirk can kick in with this dummy too.
  348. *
  349. * other short reads won't stop the queue, including
  350. * control transfers (status stage handles that) or
  351. * most other single-qtd reads ... the queue stops if
  352. * URB_SHORT_NOT_OK was set so the driver submitting
  353. * the urbs could clean it up.
  354. */
  355. } else if (IS_SHORT_READ (token)
  356. && !(qtd->hw_alt_next
  357. & EHCI_LIST_END(ehci))) {
  358. stopped = 1;
  359. qh->unlink_reason |= QH_UNLINK_SHORT_READ;
  360. }
  361. /* stop scanning when we reach qtds the hc is using */
  362. } else if (likely (!stopped
  363. && ehci->rh_state >= EHCI_RH_RUNNING)) {
  364. break;
  365. /* scan the whole queue for unlinks whenever it stops */
  366. } else {
  367. stopped = 1;
  368. /* cancel everything if we halt, suspend, etc */
  369. if (ehci->rh_state < EHCI_RH_RUNNING) {
  370. last_status = -ESHUTDOWN;
  371. qh->unlink_reason |= QH_UNLINK_SHUTDOWN;
  372. }
  373. /* this qtd is active; skip it unless a previous qtd
  374. * for its urb faulted, or its urb was canceled.
  375. */
  376. else if (last_status == -EINPROGRESS && !urb->unlinked)
  377. continue;
  378. /*
  379. * If this was the active qtd when the qh was unlinked
  380. * and the overlay's token is active, then the overlay
  381. * hasn't been written back to the qtd yet so use its
  382. * token instead of the qtd's. After the qtd is
  383. * processed and removed, the overlay won't be valid
  384. * any more.
  385. */
  386. if (state == QH_STATE_IDLE &&
  387. qh->qtd_list.next == &qtd->qtd_list &&
  388. (hw->hw_token & ACTIVE_BIT(ehci))) {
  389. token = hc32_to_cpu(ehci, hw->hw_token);
  390. hw->hw_token &= ~ACTIVE_BIT(ehci);
  391. qh->should_be_inactive = 1;
  392. /* An unlink may leave an incomplete
  393. * async transaction in the TT buffer.
  394. * We have to clear it.
  395. */
  396. ehci_clear_tt_buffer(ehci, qh, urb, token);
  397. }
  398. }
  399. /* unless we already know the urb's status, collect qtd status
  400. * and update count of bytes transferred. in common short read
  401. * cases with only one data qtd (including control transfers),
  402. * queue processing won't halt. but with two or more qtds (for
  403. * example, with a 32 KB transfer), when the first qtd gets a
  404. * short read the second must be removed by hand.
  405. */
  406. if (last_status == -EINPROGRESS) {
  407. last_status = qtd_copy_status(ehci, urb,
  408. qtd->length, token);
  409. if (last_status == -EREMOTEIO
  410. && (qtd->hw_alt_next
  411. & EHCI_LIST_END(ehci)))
  412. last_status = -EINPROGRESS;
  413. /* As part of low/full-speed endpoint-halt processing
  414. * we must clear the TT buffer (11.17.5).
  415. */
  416. if (unlikely(last_status != -EINPROGRESS &&
  417. last_status != -EREMOTEIO)) {
  418. /* The TT's in some hubs malfunction when they
  419. * receive this request following a STALL (they
  420. * stop sending isochronous packets). Since a
  421. * STALL can't leave the TT buffer in a busy
  422. * state (if you believe Figures 11-48 - 11-51
  423. * in the USB 2.0 spec), we won't clear the TT
  424. * buffer in this case. Strictly speaking this
  425. * is a violation of the spec.
  426. */
  427. if (last_status != -EPIPE)
  428. ehci_clear_tt_buffer(ehci, qh, urb,
  429. token);
  430. }
  431. }
  432. /* if we're removing something not at the queue head,
  433. * patch the hardware queue pointer.
  434. */
  435. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  436. last = list_entry (qtd->qtd_list.prev,
  437. struct ehci_qtd, qtd_list);
  438. last->hw_next = qtd->hw_next;
  439. }
  440. /* remove qtd; it's recycled after possible urb completion */
  441. list_del (&qtd->qtd_list);
  442. last = qtd;
  443. /* reinit the xacterr counter for the next qtd */
  444. qh->xacterrs = 0;
  445. }
  446. /* last urb's completion might still need calling */
  447. if (likely (last != NULL)) {
  448. ehci_urb_done(ehci, last->urb, last_status);
  449. ehci_qtd_free (ehci, last);
  450. }
  451. /* Do we need to rescan for URBs dequeued during a giveback? */
  452. if (unlikely(qh->dequeue_during_giveback)) {
  453. /* If the QH is already unlinked, do the rescan now. */
  454. if (state == QH_STATE_IDLE)
  455. goto rescan;
  456. /* Otherwise the caller must unlink the QH. */
  457. }
  458. /* restore original state; caller must unlink or relink */
  459. qh->qh_state = state;
  460. /* be sure the hardware's done with the qh before refreshing
  461. * it after fault cleanup, or recovering from silicon wrongly
  462. * overlaying the dummy qtd (which reduces DMA chatter).
  463. *
  464. * We won't refresh a QH that's linked (after the HC
  465. * stopped the queue). That avoids a race:
  466. * - HC reads first part of QH;
  467. * - CPU updates that first part and the token;
  468. * - HC reads rest of that QH, including token
  469. * Result: HC gets an inconsistent image, and then
  470. * DMAs to/from the wrong memory (corrupting it).
  471. *
  472. * That should be rare for interrupt transfers,
  473. * except maybe high bandwidth ...
  474. */
  475. if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci))
  476. qh->unlink_reason |= QH_UNLINK_DUMMY_OVERLAY;
  477. /* Let the caller know if the QH needs to be unlinked. */
  478. return qh->unlink_reason;
  479. }
  480. /*-------------------------------------------------------------------------*/
  481. /*
  482. * reverse of qh_urb_transaction: free a list of TDs.
  483. * used for cleanup after errors, before HC sees an URB's TDs.
  484. */
  485. static void qtd_list_free (
  486. struct ehci_hcd *ehci,
  487. struct urb *urb,
  488. struct list_head *qtd_list
  489. ) {
  490. struct list_head *entry, *temp;
  491. list_for_each_safe (entry, temp, qtd_list) {
  492. struct ehci_qtd *qtd;
  493. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  494. list_del (&qtd->qtd_list);
  495. ehci_qtd_free (ehci, qtd);
  496. }
  497. }
  498. /*
  499. * create a list of filled qtds for this URB; won't link into qh.
  500. */
  501. static struct list_head *
  502. qh_urb_transaction (
  503. struct ehci_hcd *ehci,
  504. struct urb *urb,
  505. struct list_head *head,
  506. gfp_t flags
  507. ) {
  508. struct ehci_qtd *qtd, *qtd_prev;
  509. dma_addr_t buf;
  510. int len, this_sg_len, maxpacket;
  511. int is_input;
  512. u32 token;
  513. int i;
  514. struct scatterlist *sg;
  515. /*
  516. * URBs map to sequences of QTDs: one logical transaction
  517. */
  518. qtd = ehci_qtd_alloc (ehci, flags);
  519. if (unlikely (!qtd))
  520. return NULL;
  521. list_add_tail (&qtd->qtd_list, head);
  522. qtd->urb = urb;
  523. token = QTD_STS_ACTIVE;
  524. token |= (EHCI_TUNE_CERR << 10);
  525. /* for split transactions, SplitXState initialized to zero */
  526. len = urb->transfer_buffer_length;
  527. is_input = usb_pipein (urb->pipe);
  528. if (usb_pipecontrol (urb->pipe)) {
  529. /* SETUP pid */
  530. qtd_fill(ehci, qtd, urb->setup_dma,
  531. sizeof (struct usb_ctrlrequest),
  532. token | (2 /* "setup" */ << 8), 8);
  533. /* ... and always at least one more pid */
  534. token ^= QTD_TOGGLE;
  535. qtd_prev = qtd;
  536. qtd = ehci_qtd_alloc (ehci, flags);
  537. if (unlikely (!qtd))
  538. goto cleanup;
  539. qtd->urb = urb;
  540. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  541. list_add_tail (&qtd->qtd_list, head);
  542. /* for zero length DATA stages, STATUS is always IN */
  543. if (len == 0)
  544. token |= (1 /* "in" */ << 8);
  545. }
  546. /*
  547. * data transfer stage: buffer setup
  548. */
  549. i = urb->num_mapped_sgs;
  550. if (len > 0 && i > 0) {
  551. sg = urb->sg;
  552. buf = sg_dma_address(sg);
  553. /* urb->transfer_buffer_length may be smaller than the
  554. * size of the scatterlist (or vice versa)
  555. */
  556. this_sg_len = min_t(int, sg_dma_len(sg), len);
  557. } else {
  558. sg = NULL;
  559. buf = urb->transfer_dma;
  560. this_sg_len = len;
  561. }
  562. if (is_input)
  563. token |= (1 /* "in" */ << 8);
  564. /* else it's already initted to "out" pid (0 << 8) */
  565. maxpacket = usb_maxpacket(urb->dev, urb->pipe, !is_input);
  566. /*
  567. * buffer gets wrapped in one or more qtds;
  568. * last one may be "short" (including zero len)
  569. * and may serve as a control status ack
  570. */
  571. for (;;) {
  572. int this_qtd_len;
  573. this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
  574. maxpacket);
  575. this_sg_len -= this_qtd_len;
  576. len -= this_qtd_len;
  577. buf += this_qtd_len;
  578. /*
  579. * short reads advance to a "magic" dummy instead of the next
  580. * qtd ... that forces the queue to stop, for manual cleanup.
  581. * (this will usually be overridden later.)
  582. */
  583. if (is_input)
  584. qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
  585. /* qh makes control packets use qtd toggle; maybe switch it */
  586. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  587. token ^= QTD_TOGGLE;
  588. if (likely(this_sg_len <= 0)) {
  589. if (--i <= 0 || len <= 0)
  590. break;
  591. sg = sg_next(sg);
  592. buf = sg_dma_address(sg);
  593. this_sg_len = min_t(int, sg_dma_len(sg), len);
  594. }
  595. qtd_prev = qtd;
  596. qtd = ehci_qtd_alloc (ehci, flags);
  597. if (unlikely (!qtd))
  598. goto cleanup;
  599. qtd->urb = urb;
  600. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  601. list_add_tail (&qtd->qtd_list, head);
  602. }
  603. /*
  604. * unless the caller requires manual cleanup after short reads,
  605. * have the alt_next mechanism keep the queue running after the
  606. * last data qtd (the only one, for control and most other cases).
  607. */
  608. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  609. || usb_pipecontrol (urb->pipe)))
  610. qtd->hw_alt_next = EHCI_LIST_END(ehci);
  611. /*
  612. * control requests may need a terminating data "status" ack;
  613. * other OUT ones may need a terminating short packet
  614. * (zero length).
  615. */
  616. if (likely (urb->transfer_buffer_length != 0)) {
  617. int one_more = 0;
  618. if (usb_pipecontrol (urb->pipe)) {
  619. one_more = 1;
  620. token ^= 0x0100; /* "in" <--> "out" */
  621. token |= QTD_TOGGLE; /* force DATA1 */
  622. } else if (usb_pipeout(urb->pipe)
  623. && (urb->transfer_flags & URB_ZERO_PACKET)
  624. && !(urb->transfer_buffer_length % maxpacket)) {
  625. one_more = 1;
  626. }
  627. if (one_more) {
  628. qtd_prev = qtd;
  629. qtd = ehci_qtd_alloc (ehci, flags);
  630. if (unlikely (!qtd))
  631. goto cleanup;
  632. qtd->urb = urb;
  633. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  634. list_add_tail (&qtd->qtd_list, head);
  635. /* never any data in such packets */
  636. qtd_fill(ehci, qtd, 0, 0, token, 0);
  637. }
  638. }
  639. /* by default, enable interrupt on urb completion */
  640. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  641. qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
  642. return head;
  643. cleanup:
  644. qtd_list_free (ehci, urb, head);
  645. return NULL;
  646. }
  647. /*-------------------------------------------------------------------------*/
  648. // Would be best to create all qh's from config descriptors,
  649. // when each interface/altsetting is established. Unlink
  650. // any previous qh and cancel its urbs first; endpoints are
  651. // implicitly reset then (data toggle too).
  652. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  653. /*
  654. * Each QH holds a qtd list; a QH is used for everything except iso.
  655. *
  656. * For interrupt urbs, the scheduler must set the microframe scheduling
  657. * mask(s) each time the QH gets scheduled. For highspeed, that's
  658. * just one microframe in the s-mask. For split interrupt transactions
  659. * there are additional complications: c-mask, maybe FSTNs.
  660. */
  661. static struct ehci_qh *
  662. qh_make (
  663. struct ehci_hcd *ehci,
  664. struct urb *urb,
  665. gfp_t flags
  666. ) {
  667. struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
  668. struct usb_host_endpoint *ep;
  669. u32 info1 = 0, info2 = 0;
  670. int is_input, type;
  671. int maxp = 0;
  672. int mult;
  673. struct usb_tt *tt = urb->dev->tt;
  674. struct ehci_qh_hw *hw;
  675. if (!qh)
  676. return qh;
  677. /*
  678. * init endpoint/device data for this QH
  679. */
  680. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  681. info1 |= usb_pipedevice (urb->pipe) << 0;
  682. is_input = usb_pipein (urb->pipe);
  683. type = usb_pipetype (urb->pipe);
  684. ep = usb_pipe_endpoint (urb->dev, urb->pipe);
  685. maxp = usb_endpoint_maxp (&ep->desc);
  686. mult = usb_endpoint_maxp_mult (&ep->desc);
  687. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  688. * acts like up to 3KB, but is built from smaller packets.
  689. */
  690. if (maxp > 1024) {
  691. ehci_dbg(ehci, "bogus qh maxpacket %d\n", maxp);
  692. goto done;
  693. }
  694. /* Compute interrupt scheduling parameters just once, and save.
  695. * - allowing for high bandwidth, how many nsec/uframe are used?
  696. * - split transactions need a second CSPLIT uframe; same question
  697. * - splits also need a schedule gap (for full/low speed I/O)
  698. * - qh has a polling interval
  699. *
  700. * For control/bulk requests, the HC or TT handles these.
  701. */
  702. if (type == PIPE_INTERRUPT) {
  703. unsigned tmp;
  704. qh->ps.usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  705. is_input, 0, mult * maxp));
  706. qh->ps.phase = NO_FRAME;
  707. if (urb->dev->speed == USB_SPEED_HIGH) {
  708. qh->ps.c_usecs = 0;
  709. qh->gap_uf = 0;
  710. if (urb->interval > 1 && urb->interval < 8) {
  711. /* NOTE interval 2 or 4 uframes could work.
  712. * But interval 1 scheduling is simpler, and
  713. * includes high bandwidth.
  714. */
  715. urb->interval = 1;
  716. } else if (urb->interval > ehci->periodic_size << 3) {
  717. urb->interval = ehci->periodic_size << 3;
  718. }
  719. qh->ps.period = urb->interval >> 3;
  720. /* period for bandwidth allocation */
  721. tmp = min_t(unsigned, EHCI_BANDWIDTH_SIZE,
  722. 1 << (urb->ep->desc.bInterval - 1));
  723. /* Allow urb->interval to override */
  724. qh->ps.bw_uperiod = min_t(unsigned, tmp, urb->interval);
  725. qh->ps.bw_period = qh->ps.bw_uperiod >> 3;
  726. } else {
  727. int think_time;
  728. /* gap is f(FS/LS transfer times) */
  729. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  730. is_input, 0, maxp) / (125 * 1000);
  731. /* FIXME this just approximates SPLIT/CSPLIT times */
  732. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  733. qh->ps.c_usecs = qh->ps.usecs + HS_USECS(0);
  734. qh->ps.usecs = HS_USECS(1);
  735. } else { // SPLIT+DATA, gap, CSPLIT
  736. qh->ps.usecs += HS_USECS(1);
  737. qh->ps.c_usecs = HS_USECS(0);
  738. }
  739. think_time = tt ? tt->think_time : 0;
  740. qh->ps.tt_usecs = NS_TO_US(think_time +
  741. usb_calc_bus_time (urb->dev->speed,
  742. is_input, 0, maxp));
  743. if (urb->interval > ehci->periodic_size)
  744. urb->interval = ehci->periodic_size;
  745. qh->ps.period = urb->interval;
  746. /* period for bandwidth allocation */
  747. tmp = min_t(unsigned, EHCI_BANDWIDTH_FRAMES,
  748. urb->ep->desc.bInterval);
  749. tmp = rounddown_pow_of_two(tmp);
  750. /* Allow urb->interval to override */
  751. qh->ps.bw_period = min_t(unsigned, tmp, urb->interval);
  752. qh->ps.bw_uperiod = qh->ps.bw_period << 3;
  753. }
  754. }
  755. /* support for tt scheduling, and access to toggles */
  756. qh->ps.udev = urb->dev;
  757. qh->ps.ep = urb->ep;
  758. /* using TT? */
  759. switch (urb->dev->speed) {
  760. case USB_SPEED_LOW:
  761. info1 |= QH_LOW_SPEED;
  762. /* FALL THROUGH */
  763. case USB_SPEED_FULL:
  764. /* EPS 0 means "full" */
  765. if (type != PIPE_INTERRUPT)
  766. info1 |= (EHCI_TUNE_RL_TT << 28);
  767. if (type == PIPE_CONTROL) {
  768. info1 |= QH_CONTROL_EP; /* for TT */
  769. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  770. }
  771. info1 |= maxp << 16;
  772. info2 |= (EHCI_TUNE_MULT_TT << 30);
  773. /* Some Freescale processors have an erratum in which the
  774. * port number in the queue head was 0..N-1 instead of 1..N.
  775. */
  776. if (ehci_has_fsl_portno_bug(ehci))
  777. info2 |= (urb->dev->ttport-1) << 23;
  778. else
  779. info2 |= urb->dev->ttport << 23;
  780. /* set the address of the TT; for TDI's integrated
  781. * root hub tt, leave it zeroed.
  782. */
  783. if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
  784. info2 |= tt->hub->devnum << 16;
  785. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  786. break;
  787. case USB_SPEED_HIGH: /* no TT involved */
  788. info1 |= QH_HIGH_SPEED;
  789. if (type == PIPE_CONTROL) {
  790. info1 |= (EHCI_TUNE_RL_HS << 28);
  791. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  792. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  793. info2 |= (EHCI_TUNE_MULT_HS << 30);
  794. } else if (type == PIPE_BULK) {
  795. info1 |= (EHCI_TUNE_RL_HS << 28);
  796. /* The USB spec says that high speed bulk endpoints
  797. * always use 512 byte maxpacket. But some device
  798. * vendors decided to ignore that, and MSFT is happy
  799. * to help them do so. So now people expect to use
  800. * such nonconformant devices with Linux too; sigh.
  801. */
  802. info1 |= maxp << 16;
  803. info2 |= (EHCI_TUNE_MULT_HS << 30);
  804. } else { /* PIPE_INTERRUPT */
  805. info1 |= maxp << 16;
  806. info2 |= mult << 30;
  807. }
  808. break;
  809. default:
  810. ehci_dbg(ehci, "bogus dev %p speed %d\n", urb->dev,
  811. urb->dev->speed);
  812. done:
  813. qh_destroy(ehci, qh);
  814. return NULL;
  815. }
  816. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  817. /* init as live, toggle clear */
  818. qh->qh_state = QH_STATE_IDLE;
  819. hw = qh->hw;
  820. hw->hw_info1 = cpu_to_hc32(ehci, info1);
  821. hw->hw_info2 = cpu_to_hc32(ehci, info2);
  822. qh->is_out = !is_input;
  823. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  824. return qh;
  825. }
  826. /*-------------------------------------------------------------------------*/
  827. static void enable_async(struct ehci_hcd *ehci)
  828. {
  829. if (ehci->async_count++)
  830. return;
  831. /* Stop waiting to turn off the async schedule */
  832. ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_ASYNC);
  833. /* Don't start the schedule until ASS is 0 */
  834. ehci_poll_ASS(ehci);
  835. turn_on_io_watchdog(ehci);
  836. }
  837. static void disable_async(struct ehci_hcd *ehci)
  838. {
  839. if (--ehci->async_count)
  840. return;
  841. /* The async schedule and unlink lists are supposed to be empty */
  842. WARN_ON(ehci->async->qh_next.qh || !list_empty(&ehci->async_unlink) ||
  843. !list_empty(&ehci->async_idle));
  844. /* Don't turn off the schedule until ASS is 1 */
  845. ehci_poll_ASS(ehci);
  846. }
  847. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  848. static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  849. {
  850. __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
  851. struct ehci_qh *head;
  852. /* Don't link a QH if there's a Clear-TT-Buffer pending */
  853. if (unlikely(qh->clearing_tt))
  854. return;
  855. WARN_ON(qh->qh_state != QH_STATE_IDLE);
  856. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  857. qh_refresh(ehci, qh);
  858. /* splice right after start */
  859. head = ehci->async;
  860. qh->qh_next = head->qh_next;
  861. qh->hw->hw_next = head->hw->hw_next;
  862. wmb ();
  863. head->qh_next.qh = qh;
  864. head->hw->hw_next = dma;
  865. qh->qh_state = QH_STATE_LINKED;
  866. qh->xacterrs = 0;
  867. qh->unlink_reason = 0;
  868. /* qtd completions reported later by interrupt */
  869. enable_async(ehci);
  870. }
  871. /*-------------------------------------------------------------------------*/
  872. /*
  873. * For control/bulk/interrupt, return QH with these TDs appended.
  874. * Allocates and initializes the QH if necessary.
  875. * Returns null if it can't allocate a QH it needs to.
  876. * If the QH has TDs (urbs) already, that's great.
  877. */
  878. static struct ehci_qh *qh_append_tds (
  879. struct ehci_hcd *ehci,
  880. struct urb *urb,
  881. struct list_head *qtd_list,
  882. int epnum,
  883. void **ptr
  884. )
  885. {
  886. struct ehci_qh *qh = NULL;
  887. __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
  888. qh = (struct ehci_qh *) *ptr;
  889. if (unlikely (qh == NULL)) {
  890. /* can't sleep here, we have ehci->lock... */
  891. qh = qh_make (ehci, urb, GFP_ATOMIC);
  892. *ptr = qh;
  893. }
  894. if (likely (qh != NULL)) {
  895. struct ehci_qtd *qtd;
  896. if (unlikely (list_empty (qtd_list)))
  897. qtd = NULL;
  898. else
  899. qtd = list_entry (qtd_list->next, struct ehci_qtd,
  900. qtd_list);
  901. /* control qh may need patching ... */
  902. if (unlikely (epnum == 0)) {
  903. /* usb_reset_device() briefly reverts to address 0 */
  904. if (usb_pipedevice (urb->pipe) == 0)
  905. qh->hw->hw_info1 &= ~qh_addr_mask;
  906. }
  907. /* just one way to queue requests: swap with the dummy qtd.
  908. * only hc or qh_refresh() ever modify the overlay.
  909. */
  910. if (likely (qtd != NULL)) {
  911. struct ehci_qtd *dummy;
  912. dma_addr_t dma;
  913. __hc32 token;
  914. /* to avoid racing the HC, use the dummy td instead of
  915. * the first td of our list (becomes new dummy). both
  916. * tds stay deactivated until we're done, when the
  917. * HC is allowed to fetch the old dummy (4.10.2).
  918. */
  919. token = qtd->hw_token;
  920. qtd->hw_token = HALT_BIT(ehci);
  921. dummy = qh->dummy;
  922. dma = dummy->qtd_dma;
  923. *dummy = *qtd;
  924. dummy->qtd_dma = dma;
  925. list_del (&qtd->qtd_list);
  926. list_add (&dummy->qtd_list, qtd_list);
  927. list_splice_tail(qtd_list, &qh->qtd_list);
  928. ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
  929. qh->dummy = qtd;
  930. /* hc must see the new dummy at list end */
  931. dma = qtd->qtd_dma;
  932. qtd = list_entry (qh->qtd_list.prev,
  933. struct ehci_qtd, qtd_list);
  934. qtd->hw_next = QTD_NEXT(ehci, dma);
  935. /* let the hc process these next qtds */
  936. wmb ();
  937. dummy->hw_token = token;
  938. urb->hcpriv = qh;
  939. }
  940. }
  941. return qh;
  942. }
  943. /*-------------------------------------------------------------------------*/
  944. static int
  945. submit_async (
  946. struct ehci_hcd *ehci,
  947. struct urb *urb,
  948. struct list_head *qtd_list,
  949. gfp_t mem_flags
  950. ) {
  951. int epnum;
  952. unsigned long flags;
  953. struct ehci_qh *qh = NULL;
  954. int rc;
  955. epnum = urb->ep->desc.bEndpointAddress;
  956. #ifdef EHCI_URB_TRACE
  957. {
  958. struct ehci_qtd *qtd;
  959. qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
  960. ehci_dbg(ehci,
  961. "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  962. __func__, urb->dev->devpath, urb,
  963. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  964. urb->transfer_buffer_length,
  965. qtd, urb->ep->hcpriv);
  966. }
  967. #endif
  968. spin_lock_irqsave (&ehci->lock, flags);
  969. if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
  970. rc = -ESHUTDOWN;
  971. goto done;
  972. }
  973. rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
  974. if (unlikely(rc))
  975. goto done;
  976. qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
  977. if (unlikely(qh == NULL)) {
  978. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  979. rc = -ENOMEM;
  980. goto done;
  981. }
  982. /* Control/bulk operations through TTs don't need scheduling,
  983. * the HC and TT handle it when the TT has a buffer ready.
  984. */
  985. if (likely (qh->qh_state == QH_STATE_IDLE))
  986. qh_link_async(ehci, qh);
  987. done:
  988. spin_unlock_irqrestore (&ehci->lock, flags);
  989. if (unlikely (qh == NULL))
  990. qtd_list_free (ehci, urb, qtd_list);
  991. return rc;
  992. }
  993. /*-------------------------------------------------------------------------*/
  994. #ifdef CONFIG_USB_HCD_TEST_MODE
  995. /*
  996. * This function creates the qtds and submits them for the
  997. * SINGLE_STEP_SET_FEATURE Test.
  998. * This is done in two parts: first SETUP req for GetDesc is sent then
  999. * 15 seconds later, the IN stage for GetDesc starts to req data from dev
  1000. *
  1001. * is_setup : i/p arguement decides which of the two stage needs to be
  1002. * performed; TRUE - SETUP and FALSE - IN+STATUS
  1003. * Returns 0 if success
  1004. */
  1005. static int submit_single_step_set_feature(
  1006. struct usb_hcd *hcd,
  1007. struct urb *urb,
  1008. int is_setup
  1009. ) {
  1010. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  1011. struct list_head qtd_list;
  1012. struct list_head *head;
  1013. struct ehci_qtd *qtd, *qtd_prev;
  1014. dma_addr_t buf;
  1015. int len, maxpacket;
  1016. u32 token;
  1017. INIT_LIST_HEAD(&qtd_list);
  1018. head = &qtd_list;
  1019. /* URBs map to sequences of QTDs: one logical transaction */
  1020. qtd = ehci_qtd_alloc(ehci, GFP_KERNEL);
  1021. if (unlikely(!qtd))
  1022. return -1;
  1023. list_add_tail(&qtd->qtd_list, head);
  1024. qtd->urb = urb;
  1025. token = QTD_STS_ACTIVE;
  1026. token |= (EHCI_TUNE_CERR << 10);
  1027. len = urb->transfer_buffer_length;
  1028. /*
  1029. * Check if the request is to perform just the SETUP stage (getDesc)
  1030. * as in SINGLE_STEP_SET_FEATURE test, DATA stage (IN) happens
  1031. * 15 secs after the setup
  1032. */
  1033. if (is_setup) {
  1034. /* SETUP pid */
  1035. qtd_fill(ehci, qtd, urb->setup_dma,
  1036. sizeof(struct usb_ctrlrequest),
  1037. token | (2 /* "setup" */ << 8), 8);
  1038. submit_async(ehci, urb, &qtd_list, GFP_ATOMIC);
  1039. return 0; /*Return now; we shall come back after 15 seconds*/
  1040. }
  1041. /*
  1042. * IN: data transfer stage: buffer setup : start the IN txn phase for
  1043. * the get_Desc SETUP which was sent 15seconds back
  1044. */
  1045. token ^= QTD_TOGGLE; /*We need to start IN with DATA-1 Pid-sequence*/
  1046. buf = urb->transfer_dma;
  1047. token |= (1 /* "in" */ << 8); /*This is IN stage*/
  1048. maxpacket = usb_maxpacket(urb->dev, urb->pipe, 0);
  1049. qtd_fill(ehci, qtd, buf, len, token, maxpacket);
  1050. /*
  1051. * Our IN phase shall always be a short read; so keep the queue running
  1052. * and let it advance to the next qtd which zero length OUT status
  1053. */
  1054. qtd->hw_alt_next = EHCI_LIST_END(ehci);
  1055. /* STATUS stage for GetDesc control request */
  1056. token ^= 0x0100; /* "in" <--> "out" */
  1057. token |= QTD_TOGGLE; /* force DATA1 */
  1058. qtd_prev = qtd;
  1059. qtd = ehci_qtd_alloc(ehci, GFP_ATOMIC);
  1060. if (unlikely(!qtd))
  1061. goto cleanup;
  1062. qtd->urb = urb;
  1063. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  1064. list_add_tail(&qtd->qtd_list, head);
  1065. /* dont fill any data in such packets */
  1066. qtd_fill(ehci, qtd, 0, 0, token, 0);
  1067. /* by default, enable interrupt on urb completion */
  1068. if (likely(!(urb->transfer_flags & URB_NO_INTERRUPT)))
  1069. qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
  1070. submit_async(ehci, urb, &qtd_list, GFP_KERNEL);
  1071. return 0;
  1072. cleanup:
  1073. qtd_list_free(ehci, urb, head);
  1074. return -1;
  1075. }
  1076. #endif /* CONFIG_USB_HCD_TEST_MODE */
  1077. /*-------------------------------------------------------------------------*/
  1078. static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
  1079. {
  1080. struct ehci_qh *prev;
  1081. /* Add to the end of the list of QHs waiting for the next IAAD */
  1082. qh->qh_state = QH_STATE_UNLINK_WAIT;
  1083. list_add_tail(&qh->unlink_node, &ehci->async_unlink);
  1084. /* Unlink it from the schedule */
  1085. prev = ehci->async;
  1086. while (prev->qh_next.qh != qh)
  1087. prev = prev->qh_next.qh;
  1088. prev->hw->hw_next = qh->hw->hw_next;
  1089. prev->qh_next = qh->qh_next;
  1090. if (ehci->qh_scan_next == qh)
  1091. ehci->qh_scan_next = qh->qh_next.qh;
  1092. }
  1093. static void start_iaa_cycle(struct ehci_hcd *ehci)
  1094. {
  1095. /* If the controller isn't running, we don't have to wait for it */
  1096. if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
  1097. end_unlink_async(ehci);
  1098. /* Otherwise start a new IAA cycle if one isn't already running */
  1099. } else if (ehci->rh_state == EHCI_RH_RUNNING &&
  1100. !ehci->iaa_in_progress) {
  1101. /* Make sure the unlinks are all visible to the hardware */
  1102. wmb();
  1103. ehci_writel(ehci, ehci->command | CMD_IAAD,
  1104. &ehci->regs->command);
  1105. ehci_readl(ehci, &ehci->regs->command);
  1106. ehci->iaa_in_progress = true;
  1107. ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
  1108. }
  1109. }
  1110. static void end_iaa_cycle(struct ehci_hcd *ehci)
  1111. {
  1112. if (ehci->has_synopsys_hc_bug)
  1113. ehci_writel(ehci, (u32) ehci->async->qh_dma,
  1114. &ehci->regs->async_next);
  1115. /* The current IAA cycle has ended */
  1116. ehci->iaa_in_progress = false;
  1117. end_unlink_async(ehci);
  1118. }
  1119. /* See if the async qh for the qtds being unlinked are now gone from the HC */
  1120. static void end_unlink_async(struct ehci_hcd *ehci)
  1121. {
  1122. struct ehci_qh *qh;
  1123. bool early_exit;
  1124. if (list_empty(&ehci->async_unlink))
  1125. return;
  1126. qh = list_first_entry(&ehci->async_unlink, struct ehci_qh,
  1127. unlink_node); /* QH whose IAA cycle just ended */
  1128. /*
  1129. * If async_unlinking is set then this routine is already running,
  1130. * either on the stack or on another CPU.
  1131. */
  1132. early_exit = ehci->async_unlinking;
  1133. /* If the controller isn't running, process all the waiting QHs */
  1134. if (ehci->rh_state < EHCI_RH_RUNNING)
  1135. list_splice_tail_init(&ehci->async_unlink, &ehci->async_idle);
  1136. /*
  1137. * Intel (?) bug: The HC can write back the overlay region even
  1138. * after the IAA interrupt occurs. In self-defense, always go
  1139. * through two IAA cycles for each QH.
  1140. */
  1141. else if (qh->qh_state == QH_STATE_UNLINK) {
  1142. /*
  1143. * Second IAA cycle has finished. Process only the first
  1144. * waiting QH (NVIDIA (?) bug).
  1145. */
  1146. list_move_tail(&qh->unlink_node, &ehci->async_idle);
  1147. }
  1148. /*
  1149. * AMD/ATI (?) bug: The HC can continue to use an active QH long
  1150. * after the IAA interrupt occurs. To prevent problems, QHs that
  1151. * may still be active will wait until 2 ms have passed with no
  1152. * change to the hw_current and hw_token fields (this delay occurs
  1153. * between the two IAA cycles).
  1154. *
  1155. * The EHCI spec (4.8.2) says that active QHs must not be removed
  1156. * from the async schedule and recommends waiting until the QH
  1157. * goes inactive. This is ridiculous because the QH will _never_
  1158. * become inactive if the endpoint NAKs indefinitely.
  1159. */
  1160. /* Some reasons for unlinking guarantee the QH can't be active */
  1161. else if (qh->unlink_reason & (QH_UNLINK_HALTED |
  1162. QH_UNLINK_SHORT_READ | QH_UNLINK_DUMMY_OVERLAY))
  1163. goto DelayDone;
  1164. /* The QH can't be active if the queue was and still is empty... */
  1165. else if ((qh->unlink_reason & QH_UNLINK_QUEUE_EMPTY) &&
  1166. list_empty(&qh->qtd_list))
  1167. goto DelayDone;
  1168. /* ... or if the QH has halted */
  1169. else if (qh->hw->hw_token & cpu_to_hc32(ehci, QTD_STS_HALT))
  1170. goto DelayDone;
  1171. /* Otherwise we have to wait until the QH stops changing */
  1172. else {
  1173. __hc32 qh_current, qh_token;
  1174. qh_current = qh->hw->hw_current;
  1175. qh_token = qh->hw->hw_token;
  1176. if (qh_current != ehci->old_current ||
  1177. qh_token != ehci->old_token) {
  1178. ehci->old_current = qh_current;
  1179. ehci->old_token = qh_token;
  1180. ehci_enable_event(ehci,
  1181. EHCI_HRTIMER_ACTIVE_UNLINK, true);
  1182. return;
  1183. }
  1184. DelayDone:
  1185. qh->qh_state = QH_STATE_UNLINK;
  1186. early_exit = true;
  1187. }
  1188. ehci->old_current = ~0; /* Prepare for next QH */
  1189. /* Start a new IAA cycle if any QHs are waiting for it */
  1190. if (!list_empty(&ehci->async_unlink))
  1191. start_iaa_cycle(ehci);
  1192. /*
  1193. * Don't allow nesting or concurrent calls,
  1194. * or wait for the second IAA cycle for the next QH.
  1195. */
  1196. if (early_exit)
  1197. return;
  1198. /* Process the idle QHs */
  1199. ehci->async_unlinking = true;
  1200. while (!list_empty(&ehci->async_idle)) {
  1201. qh = list_first_entry(&ehci->async_idle, struct ehci_qh,
  1202. unlink_node);
  1203. list_del(&qh->unlink_node);
  1204. qh->qh_state = QH_STATE_IDLE;
  1205. qh->qh_next.qh = NULL;
  1206. if (!list_empty(&qh->qtd_list))
  1207. qh_completions(ehci, qh);
  1208. if (!list_empty(&qh->qtd_list) &&
  1209. ehci->rh_state == EHCI_RH_RUNNING)
  1210. qh_link_async(ehci, qh);
  1211. disable_async(ehci);
  1212. }
  1213. ehci->async_unlinking = false;
  1214. }
  1215. static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
  1216. static void unlink_empty_async(struct ehci_hcd *ehci)
  1217. {
  1218. struct ehci_qh *qh;
  1219. struct ehci_qh *qh_to_unlink = NULL;
  1220. int count = 0;
  1221. /* Find the last async QH which has been empty for a timer cycle */
  1222. for (qh = ehci->async->qh_next.qh; qh; qh = qh->qh_next.qh) {
  1223. if (list_empty(&qh->qtd_list) &&
  1224. qh->qh_state == QH_STATE_LINKED) {
  1225. ++count;
  1226. if (qh->unlink_cycle != ehci->async_unlink_cycle)
  1227. qh_to_unlink = qh;
  1228. }
  1229. }
  1230. /* If nothing else is being unlinked, unlink the last empty QH */
  1231. if (list_empty(&ehci->async_unlink) && qh_to_unlink) {
  1232. qh_to_unlink->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
  1233. start_unlink_async(ehci, qh_to_unlink);
  1234. --count;
  1235. }
  1236. /* Other QHs will be handled later */
  1237. if (count > 0) {
  1238. ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
  1239. ++ehci->async_unlink_cycle;
  1240. }
  1241. }
  1242. #ifdef CONFIG_PM
  1243. /* The root hub is suspended; unlink all the async QHs */
  1244. static void unlink_empty_async_suspended(struct ehci_hcd *ehci)
  1245. {
  1246. struct ehci_qh *qh;
  1247. while (ehci->async->qh_next.qh) {
  1248. qh = ehci->async->qh_next.qh;
  1249. WARN_ON(!list_empty(&qh->qtd_list));
  1250. single_unlink_async(ehci, qh);
  1251. }
  1252. }
  1253. #endif
  1254. /* makes sure the async qh will become idle */
  1255. /* caller must own ehci->lock */
  1256. static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
  1257. {
  1258. /* If the QH isn't linked then there's nothing we can do. */
  1259. if (qh->qh_state != QH_STATE_LINKED)
  1260. return;
  1261. single_unlink_async(ehci, qh);
  1262. start_iaa_cycle(ehci);
  1263. }
  1264. /*-------------------------------------------------------------------------*/
  1265. static void scan_async (struct ehci_hcd *ehci)
  1266. {
  1267. struct ehci_qh *qh;
  1268. bool check_unlinks_later = false;
  1269. ehci->qh_scan_next = ehci->async->qh_next.qh;
  1270. while (ehci->qh_scan_next) {
  1271. qh = ehci->qh_scan_next;
  1272. ehci->qh_scan_next = qh->qh_next.qh;
  1273. /* clean any finished work for this qh */
  1274. if (!list_empty(&qh->qtd_list)) {
  1275. int temp;
  1276. /*
  1277. * Unlinks could happen here; completion reporting
  1278. * drops the lock. That's why ehci->qh_scan_next
  1279. * always holds the next qh to scan; if the next qh
  1280. * gets unlinked then ehci->qh_scan_next is adjusted
  1281. * in single_unlink_async().
  1282. */
  1283. temp = qh_completions(ehci, qh);
  1284. if (unlikely(temp)) {
  1285. start_unlink_async(ehci, qh);
  1286. } else if (list_empty(&qh->qtd_list)
  1287. && qh->qh_state == QH_STATE_LINKED) {
  1288. qh->unlink_cycle = ehci->async_unlink_cycle;
  1289. check_unlinks_later = true;
  1290. }
  1291. }
  1292. }
  1293. /*
  1294. * Unlink empty entries, reducing DMA usage as well
  1295. * as HCD schedule-scanning costs. Delay for any qh
  1296. * we just scanned, there's a not-unusual case that it
  1297. * doesn't stay idle for long.
  1298. */
  1299. if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING &&
  1300. !(ehci->enabled_hrtimer_events &
  1301. BIT(EHCI_HRTIMER_ASYNC_UNLINKS))) {
  1302. ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
  1303. ++ehci->async_unlink_cycle;
  1304. }
  1305. }