ehci-hub.c 37 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI Root Hub ... the nonsharable stuff
  22. *
  23. * Registers don't need cpu_to_le32, that happens transparently
  24. */
  25. /*-------------------------------------------------------------------------*/
  26. #include <linux/usb/otg.h>
  27. #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
  28. #ifdef CONFIG_PM
  29. static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
  30. static int persist_enabled_on_companion(struct usb_device *udev, void *unused)
  31. {
  32. return !udev->maxchild && udev->persist_enabled &&
  33. udev->bus->root_hub->speed < USB_SPEED_HIGH;
  34. }
  35. /* After a power loss, ports that were owned by the companion must be
  36. * reset so that the companion can still own them.
  37. */
  38. static void ehci_handover_companion_ports(struct ehci_hcd *ehci)
  39. {
  40. u32 __iomem *reg;
  41. u32 status;
  42. int port;
  43. __le32 buf;
  44. struct usb_hcd *hcd = ehci_to_hcd(ehci);
  45. if (!ehci->owned_ports)
  46. return;
  47. /*
  48. * USB 1.1 devices are mostly HIDs, which don't need to persist across
  49. * suspends. If we ensure that none of our companion's devices have
  50. * persist_enabled (by looking through all USB 1.1 buses in the system),
  51. * we can skip this and avoid slowing resume down. Devices without
  52. * persist will just get reenumerated shortly after resume anyway.
  53. */
  54. if (!usb_for_each_dev(NULL, persist_enabled_on_companion))
  55. return;
  56. /* Make sure the ports are powered */
  57. port = HCS_N_PORTS(ehci->hcs_params);
  58. while (port--) {
  59. if (test_bit(port, &ehci->owned_ports)) {
  60. reg = &ehci->regs->port_status[port];
  61. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  62. if (!(status & PORT_POWER))
  63. ehci_port_power(ehci, port, true);
  64. }
  65. }
  66. /* Give the connections some time to appear */
  67. msleep(20);
  68. spin_lock_irq(&ehci->lock);
  69. port = HCS_N_PORTS(ehci->hcs_params);
  70. while (port--) {
  71. if (test_bit(port, &ehci->owned_ports)) {
  72. reg = &ehci->regs->port_status[port];
  73. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  74. /* Port already owned by companion? */
  75. if (status & PORT_OWNER)
  76. clear_bit(port, &ehci->owned_ports);
  77. else if (test_bit(port, &ehci->companion_ports))
  78. ehci_writel(ehci, status & ~PORT_PE, reg);
  79. else {
  80. spin_unlock_irq(&ehci->lock);
  81. ehci_hub_control(hcd, SetPortFeature,
  82. USB_PORT_FEAT_RESET, port + 1,
  83. NULL, 0);
  84. spin_lock_irq(&ehci->lock);
  85. }
  86. }
  87. }
  88. spin_unlock_irq(&ehci->lock);
  89. if (!ehci->owned_ports)
  90. return;
  91. msleep(90); /* Wait for resets to complete */
  92. spin_lock_irq(&ehci->lock);
  93. port = HCS_N_PORTS(ehci->hcs_params);
  94. while (port--) {
  95. if (test_bit(port, &ehci->owned_ports)) {
  96. spin_unlock_irq(&ehci->lock);
  97. ehci_hub_control(hcd, GetPortStatus,
  98. 0, port + 1,
  99. (char *) &buf, sizeof(buf));
  100. spin_lock_irq(&ehci->lock);
  101. /* The companion should now own the port,
  102. * but if something went wrong the port must not
  103. * remain enabled.
  104. */
  105. reg = &ehci->regs->port_status[port];
  106. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  107. if (status & PORT_OWNER)
  108. ehci_writel(ehci, status | PORT_CSC, reg);
  109. else {
  110. ehci_dbg(ehci, "failed handover port %d: %x\n",
  111. port + 1, status);
  112. ehci_writel(ehci, status & ~PORT_PE, reg);
  113. }
  114. }
  115. }
  116. ehci->owned_ports = 0;
  117. spin_unlock_irq(&ehci->lock);
  118. }
  119. static int ehci_port_change(struct ehci_hcd *ehci)
  120. {
  121. int i = HCS_N_PORTS(ehci->hcs_params);
  122. /* First check if the controller indicates a change event */
  123. if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD)
  124. return 1;
  125. /*
  126. * Not all controllers appear to update this while going from D3 to D0,
  127. * so check the individual port status registers as well
  128. */
  129. while (i--)
  130. if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC)
  131. return 1;
  132. return 0;
  133. }
  134. void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
  135. bool suspending, bool do_wakeup)
  136. {
  137. int port;
  138. u32 temp;
  139. /* If remote wakeup is enabled for the root hub but disabled
  140. * for the controller, we must adjust all the port wakeup flags
  141. * when the controller is suspended or resumed. In all other
  142. * cases they don't need to be changed.
  143. */
  144. if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup)
  145. return;
  146. spin_lock_irq(&ehci->lock);
  147. /* clear phy low-power mode before changing wakeup flags */
  148. if (ehci->has_tdi_phy_lpm) {
  149. port = HCS_N_PORTS(ehci->hcs_params);
  150. while (port--) {
  151. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  152. temp = ehci_readl(ehci, hostpc_reg);
  153. ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg);
  154. }
  155. spin_unlock_irq(&ehci->lock);
  156. msleep(5);
  157. spin_lock_irq(&ehci->lock);
  158. }
  159. port = HCS_N_PORTS(ehci->hcs_params);
  160. while (port--) {
  161. u32 __iomem *reg = &ehci->regs->port_status[port];
  162. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  163. u32 t2 = t1 & ~PORT_WAKE_BITS;
  164. /* If we are suspending the controller, clear the flags.
  165. * If we are resuming the controller, set the wakeup flags.
  166. */
  167. if (!suspending) {
  168. if (t1 & PORT_CONNECT)
  169. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  170. else
  171. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  172. }
  173. ehci_writel(ehci, t2, reg);
  174. }
  175. /* enter phy low-power mode again */
  176. if (ehci->has_tdi_phy_lpm) {
  177. port = HCS_N_PORTS(ehci->hcs_params);
  178. while (port--) {
  179. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  180. temp = ehci_readl(ehci, hostpc_reg);
  181. ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg);
  182. }
  183. }
  184. /* Does the root hub have a port wakeup pending? */
  185. if (!suspending && ehci_port_change(ehci))
  186. usb_hcd_resume_root_hub(ehci_to_hcd(ehci));
  187. spin_unlock_irq(&ehci->lock);
  188. }
  189. EXPORT_SYMBOL_GPL(ehci_adjust_port_wakeup_flags);
  190. static int ehci_bus_suspend (struct usb_hcd *hcd)
  191. {
  192. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  193. int port;
  194. int mask;
  195. int changed;
  196. bool fs_idle_delay;
  197. ehci_dbg(ehci, "suspend root hub\n");
  198. if (time_before (jiffies, ehci->next_statechange))
  199. msleep(5);
  200. /* stop the schedules */
  201. ehci_quiesce(ehci);
  202. spin_lock_irq (&ehci->lock);
  203. if (ehci->rh_state < EHCI_RH_RUNNING)
  204. goto done;
  205. /* Once the controller is stopped, port resumes that are already
  206. * in progress won't complete. Hence if remote wakeup is enabled
  207. * for the root hub and any ports are in the middle of a resume or
  208. * remote wakeup, we must fail the suspend.
  209. */
  210. if (hcd->self.root_hub->do_remote_wakeup) {
  211. if (ehci->resuming_ports) {
  212. spin_unlock_irq(&ehci->lock);
  213. ehci_dbg(ehci, "suspend failed because a port is resuming\n");
  214. return -EBUSY;
  215. }
  216. }
  217. /* Unlike other USB host controller types, EHCI doesn't have
  218. * any notion of "global" or bus-wide suspend. The driver has
  219. * to manually suspend all the active unsuspended ports, and
  220. * then manually resume them in the bus_resume() routine.
  221. */
  222. ehci->bus_suspended = 0;
  223. ehci->owned_ports = 0;
  224. changed = 0;
  225. fs_idle_delay = false;
  226. port = HCS_N_PORTS(ehci->hcs_params);
  227. while (port--) {
  228. u32 __iomem *reg = &ehci->regs->port_status [port];
  229. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  230. u32 t2 = t1 & ~PORT_WAKE_BITS;
  231. /* keep track of which ports we suspend */
  232. if (t1 & PORT_OWNER)
  233. set_bit(port, &ehci->owned_ports);
  234. else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) {
  235. t2 |= PORT_SUSPEND;
  236. set_bit(port, &ehci->bus_suspended);
  237. }
  238. /* enable remote wakeup on all ports, if told to do so */
  239. if (hcd->self.root_hub->do_remote_wakeup) {
  240. /* only enable appropriate wake bits, otherwise the
  241. * hardware can not go phy low power mode. If a race
  242. * condition happens here(connection change during bits
  243. * set), the port change detection will finally fix it.
  244. */
  245. if (t1 & PORT_CONNECT)
  246. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  247. else
  248. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  249. }
  250. if (t1 != t2) {
  251. /*
  252. * On some controllers, Wake-On-Disconnect will
  253. * generate false wakeup signals until the bus
  254. * switches over to full-speed idle. For their
  255. * sake, add a delay if we need one.
  256. */
  257. if ((t2 & PORT_WKDISC_E) &&
  258. ehci_port_speed(ehci, t2) ==
  259. USB_PORT_STAT_HIGH_SPEED)
  260. fs_idle_delay = true;
  261. ehci_writel(ehci, t2, reg);
  262. changed = 1;
  263. }
  264. }
  265. spin_unlock_irq(&ehci->lock);
  266. if (changed && ehci_has_fsl_susp_errata(ehci))
  267. /*
  268. * Wait for at least 10 millisecondes to ensure the controller
  269. * enter the suspend status before initiating a port resume
  270. * using the Force Port Resume bit (Not-EHCI compatible).
  271. */
  272. usleep_range(10000, 20000);
  273. if ((changed && ehci->has_tdi_phy_lpm) || fs_idle_delay) {
  274. /*
  275. * Wait for HCD to enter low-power mode or for the bus
  276. * to switch to full-speed idle.
  277. */
  278. usleep_range(5000, 5500);
  279. }
  280. if (changed && ehci->has_tdi_phy_lpm) {
  281. spin_lock_irq(&ehci->lock);
  282. port = HCS_N_PORTS(ehci->hcs_params);
  283. while (port--) {
  284. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  285. u32 t3;
  286. t3 = ehci_readl(ehci, hostpc_reg);
  287. ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg);
  288. t3 = ehci_readl(ehci, hostpc_reg);
  289. ehci_dbg(ehci, "Port %d phy low-power mode %s\n",
  290. port, (t3 & HOSTPC_PHCD) ?
  291. "succeeded" : "failed");
  292. }
  293. spin_unlock_irq(&ehci->lock);
  294. }
  295. /* Apparently some devices need a >= 1-uframe delay here */
  296. if (ehci->bus_suspended)
  297. udelay(150);
  298. /* turn off now-idle HC */
  299. ehci_halt (ehci);
  300. spin_lock_irq(&ehci->lock);
  301. if (ehci->enabled_hrtimer_events & BIT(EHCI_HRTIMER_POLL_DEAD))
  302. ehci_handle_controller_death(ehci);
  303. if (ehci->rh_state != EHCI_RH_RUNNING)
  304. goto done;
  305. ehci->rh_state = EHCI_RH_SUSPENDED;
  306. unlink_empty_async_suspended(ehci);
  307. /* Any IAA cycle that started before the suspend is now invalid */
  308. end_iaa_cycle(ehci);
  309. ehci_handle_start_intr_unlinks(ehci);
  310. ehci_handle_intr_unlinks(ehci);
  311. end_free_itds(ehci);
  312. /* allow remote wakeup */
  313. mask = INTR_MASK;
  314. if (!hcd->self.root_hub->do_remote_wakeup)
  315. mask &= ~STS_PCD;
  316. ehci_writel(ehci, mask, &ehci->regs->intr_enable);
  317. ehci_readl(ehci, &ehci->regs->intr_enable);
  318. done:
  319. ehci->next_statechange = jiffies + msecs_to_jiffies(10);
  320. ehci->enabled_hrtimer_events = 0;
  321. ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
  322. spin_unlock_irq (&ehci->lock);
  323. hrtimer_cancel(&ehci->hrtimer);
  324. return 0;
  325. }
  326. /* caller has locked the root hub, and should reset/reinit on error */
  327. static int ehci_bus_resume (struct usb_hcd *hcd)
  328. {
  329. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  330. u32 temp;
  331. u32 power_okay;
  332. int i;
  333. unsigned long resume_needed = 0;
  334. if (time_before (jiffies, ehci->next_statechange))
  335. msleep(5);
  336. spin_lock_irq (&ehci->lock);
  337. if (!HCD_HW_ACCESSIBLE(hcd) || ehci->shutdown)
  338. goto shutdown;
  339. if (unlikely(ehci->debug)) {
  340. if (!dbgp_reset_prep(hcd))
  341. ehci->debug = NULL;
  342. else
  343. dbgp_external_startup(hcd);
  344. }
  345. /* Ideally and we've got a real resume here, and no port's power
  346. * was lost. (For PCI, that means Vaux was maintained.) But we
  347. * could instead be restoring a swsusp snapshot -- so that BIOS was
  348. * the last user of the controller, not reset/pm hardware keeping
  349. * state we gave to it.
  350. */
  351. power_okay = ehci_readl(ehci, &ehci->regs->intr_enable);
  352. ehci_dbg(ehci, "resume root hub%s\n",
  353. power_okay ? "" : " after power loss");
  354. /* at least some APM implementations will try to deliver
  355. * IRQs right away, so delay them until we're ready.
  356. */
  357. ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  358. /* re-init operational registers */
  359. ehci_writel(ehci, 0, &ehci->regs->segment);
  360. ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
  361. ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next);
  362. /* restore CMD_RUN, framelist size, and irq threshold */
  363. ehci->command |= CMD_RUN;
  364. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  365. ehci->rh_state = EHCI_RH_RUNNING;
  366. /*
  367. * According to Bugzilla #8190, the port status for some controllers
  368. * will be wrong without a delay. At their wrong status, the port
  369. * is enabled, but not suspended neither resumed.
  370. */
  371. i = HCS_N_PORTS(ehci->hcs_params);
  372. while (i--) {
  373. temp = ehci_readl(ehci, &ehci->regs->port_status[i]);
  374. if ((temp & PORT_PE) &&
  375. !(temp & (PORT_SUSPEND | PORT_RESUME))) {
  376. ehci_dbg(ehci, "Port status(0x%x) is wrong\n", temp);
  377. spin_unlock_irq(&ehci->lock);
  378. msleep(8);
  379. spin_lock_irq(&ehci->lock);
  380. break;
  381. }
  382. }
  383. if (ehci->shutdown)
  384. goto shutdown;
  385. /* clear phy low-power mode before resume */
  386. if (ehci->bus_suspended && ehci->has_tdi_phy_lpm) {
  387. i = HCS_N_PORTS(ehci->hcs_params);
  388. while (i--) {
  389. if (test_bit(i, &ehci->bus_suspended)) {
  390. u32 __iomem *hostpc_reg =
  391. &ehci->regs->hostpc[i];
  392. temp = ehci_readl(ehci, hostpc_reg);
  393. ehci_writel(ehci, temp & ~HOSTPC_PHCD,
  394. hostpc_reg);
  395. }
  396. }
  397. spin_unlock_irq(&ehci->lock);
  398. msleep(5);
  399. spin_lock_irq(&ehci->lock);
  400. if (ehci->shutdown)
  401. goto shutdown;
  402. }
  403. /* manually resume the ports we suspended during bus_suspend() */
  404. i = HCS_N_PORTS (ehci->hcs_params);
  405. while (i--) {
  406. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  407. temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
  408. if (test_bit(i, &ehci->bus_suspended) &&
  409. (temp & PORT_SUSPEND)) {
  410. temp |= PORT_RESUME;
  411. set_bit(i, &resume_needed);
  412. }
  413. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  414. }
  415. /*
  416. * msleep for USB_RESUME_TIMEOUT ms only if code is trying to resume
  417. * port
  418. */
  419. if (resume_needed) {
  420. spin_unlock_irq(&ehci->lock);
  421. msleep(USB_RESUME_TIMEOUT);
  422. spin_lock_irq(&ehci->lock);
  423. if (ehci->shutdown)
  424. goto shutdown;
  425. }
  426. i = HCS_N_PORTS (ehci->hcs_params);
  427. while (i--) {
  428. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  429. if (test_bit(i, &resume_needed)) {
  430. temp &= ~(PORT_RWC_BITS | PORT_SUSPEND | PORT_RESUME);
  431. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  432. }
  433. }
  434. ehci->next_statechange = jiffies + msecs_to_jiffies(5);
  435. spin_unlock_irq(&ehci->lock);
  436. ehci_handover_companion_ports(ehci);
  437. /* Now we can safely re-enable irqs */
  438. spin_lock_irq(&ehci->lock);
  439. if (ehci->shutdown)
  440. goto shutdown;
  441. ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
  442. (void) ehci_readl(ehci, &ehci->regs->intr_enable);
  443. spin_unlock_irq(&ehci->lock);
  444. return 0;
  445. shutdown:
  446. spin_unlock_irq(&ehci->lock);
  447. return -ESHUTDOWN;
  448. }
  449. #else
  450. #define ehci_bus_suspend NULL
  451. #define ehci_bus_resume NULL
  452. #endif /* CONFIG_PM */
  453. /*-------------------------------------------------------------------------*/
  454. /*
  455. * Sets the owner of a port
  456. */
  457. static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner)
  458. {
  459. u32 __iomem *status_reg;
  460. u32 port_status;
  461. int try;
  462. status_reg = &ehci->regs->port_status[portnum];
  463. /*
  464. * The controller won't set the OWNER bit if the port is
  465. * enabled, so this loop will sometimes require at least two
  466. * iterations: one to disable the port and one to set OWNER.
  467. */
  468. for (try = 4; try > 0; --try) {
  469. spin_lock_irq(&ehci->lock);
  470. port_status = ehci_readl(ehci, status_reg);
  471. if ((port_status & PORT_OWNER) == new_owner
  472. || (port_status & (PORT_OWNER | PORT_CONNECT))
  473. == 0)
  474. try = 0;
  475. else {
  476. port_status ^= PORT_OWNER;
  477. port_status &= ~(PORT_PE | PORT_RWC_BITS);
  478. ehci_writel(ehci, port_status, status_reg);
  479. }
  480. spin_unlock_irq(&ehci->lock);
  481. if (try > 1)
  482. msleep(5);
  483. }
  484. }
  485. /*-------------------------------------------------------------------------*/
  486. static int check_reset_complete (
  487. struct ehci_hcd *ehci,
  488. int index,
  489. u32 __iomem *status_reg,
  490. int port_status
  491. ) {
  492. if (!(port_status & PORT_CONNECT))
  493. return port_status;
  494. /* if reset finished and it's still not enabled -- handoff */
  495. if (!(port_status & PORT_PE)) {
  496. /* with integrated TT, there's nobody to hand it to! */
  497. if (ehci_is_TDI(ehci)) {
  498. ehci_dbg (ehci,
  499. "Failed to enable port %d on root hub TT\n",
  500. index+1);
  501. return port_status;
  502. }
  503. ehci_dbg (ehci, "port %d full speed --> companion\n",
  504. index + 1);
  505. // what happens if HCS_N_CC(params) == 0 ?
  506. port_status |= PORT_OWNER;
  507. port_status &= ~PORT_RWC_BITS;
  508. ehci_writel(ehci, port_status, status_reg);
  509. /* ensure 440EPX ohci controller state is operational */
  510. if (ehci->has_amcc_usb23)
  511. set_ohci_hcfs(ehci, 1);
  512. } else {
  513. ehci_dbg(ehci, "port %d reset complete, port enabled\n",
  514. index + 1);
  515. /* ensure 440EPx ohci controller state is suspended */
  516. if (ehci->has_amcc_usb23)
  517. set_ohci_hcfs(ehci, 0);
  518. }
  519. return port_status;
  520. }
  521. /*-------------------------------------------------------------------------*/
  522. /* build "status change" packet (one or two bytes) from HC registers */
  523. static int
  524. ehci_hub_status_data (struct usb_hcd *hcd, char *buf)
  525. {
  526. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  527. u32 temp, status;
  528. u32 mask;
  529. int ports, i, retval = 1;
  530. unsigned long flags;
  531. u32 ppcd = ~0;
  532. /* init status to no-changes */
  533. buf [0] = 0;
  534. ports = HCS_N_PORTS (ehci->hcs_params);
  535. if (ports > 7) {
  536. buf [1] = 0;
  537. retval++;
  538. }
  539. /* Inform the core about resumes-in-progress by returning
  540. * a non-zero value even if there are no status changes.
  541. */
  542. status = ehci->resuming_ports;
  543. /* Some boards (mostly VIA?) report bogus overcurrent indications,
  544. * causing massive log spam unless we completely ignore them. It
  545. * may be relevant that VIA VT8235 controllers, where PORT_POWER is
  546. * always set, seem to clear PORT_OCC and PORT_CSC when writing to
  547. * PORT_POWER; that's surprising, but maybe within-spec.
  548. */
  549. if (!ignore_oc)
  550. mask = PORT_CSC | PORT_PEC | PORT_OCC;
  551. else
  552. mask = PORT_CSC | PORT_PEC;
  553. // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND
  554. /* no hub change reports (bit 0) for now (power, ...) */
  555. /* port N changes (bit N)? */
  556. spin_lock_irqsave (&ehci->lock, flags);
  557. /* get per-port change detect bits */
  558. if (ehci->has_ppcd)
  559. ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16;
  560. for (i = 0; i < ports; i++) {
  561. /* leverage per-port change bits feature */
  562. if (ppcd & (1 << i))
  563. temp = ehci_readl(ehci, &ehci->regs->port_status[i]);
  564. else
  565. temp = 0;
  566. /*
  567. * Return status information even for ports with OWNER set.
  568. * Otherwise hub_wq wouldn't see the disconnect event when a
  569. * high-speed device is switched over to the companion
  570. * controller by the user.
  571. */
  572. if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend)
  573. || (ehci->reset_done[i] && time_after_eq(
  574. jiffies, ehci->reset_done[i]))) {
  575. if (i < 7)
  576. buf [0] |= 1 << (i + 1);
  577. else
  578. buf [1] |= 1 << (i - 7);
  579. status = STS_PCD;
  580. }
  581. }
  582. /* If a resume is in progress, make sure it can finish */
  583. if (ehci->resuming_ports)
  584. mod_timer(&hcd->rh_timer, jiffies + msecs_to_jiffies(25));
  585. spin_unlock_irqrestore (&ehci->lock, flags);
  586. return status ? retval : 0;
  587. }
  588. /*-------------------------------------------------------------------------*/
  589. static void
  590. ehci_hub_descriptor (
  591. struct ehci_hcd *ehci,
  592. struct usb_hub_descriptor *desc
  593. ) {
  594. int ports = HCS_N_PORTS (ehci->hcs_params);
  595. u16 temp;
  596. desc->bDescriptorType = USB_DT_HUB;
  597. desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */
  598. desc->bHubContrCurrent = 0;
  599. desc->bNbrPorts = ports;
  600. temp = 1 + (ports / 8);
  601. desc->bDescLength = 7 + 2 * temp;
  602. /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
  603. memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
  604. memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
  605. temp = HUB_CHAR_INDV_PORT_OCPM; /* per-port overcurrent reporting */
  606. if (HCS_PPC (ehci->hcs_params))
  607. temp |= HUB_CHAR_INDV_PORT_LPSM; /* per-port power control */
  608. else
  609. temp |= HUB_CHAR_NO_LPSM; /* no power switching */
  610. #if 0
  611. // re-enable when we support USB_PORT_FEAT_INDICATOR below.
  612. if (HCS_INDICATOR (ehci->hcs_params))
  613. temp |= HUB_CHAR_PORTIND; /* per-port indicators (LEDs) */
  614. #endif
  615. desc->wHubCharacteristics = cpu_to_le16(temp);
  616. }
  617. /*-------------------------------------------------------------------------*/
  618. #ifdef CONFIG_USB_HCD_TEST_MODE
  619. #define EHSET_TEST_SINGLE_STEP_SET_FEATURE 0x06
  620. static void usb_ehset_completion(struct urb *urb)
  621. {
  622. struct completion *done = urb->context;
  623. complete(done);
  624. }
  625. static int submit_single_step_set_feature(
  626. struct usb_hcd *hcd,
  627. struct urb *urb,
  628. int is_setup
  629. );
  630. /*
  631. * Allocate and initialize a control URB. This request will be used by the
  632. * EHSET SINGLE_STEP_SET_FEATURE test in which the DATA and STATUS stages
  633. * of the GetDescriptor request are sent 15 seconds after the SETUP stage.
  634. * Return NULL if failed.
  635. */
  636. static struct urb *request_single_step_set_feature_urb(
  637. struct usb_device *udev,
  638. void *dr,
  639. void *buf,
  640. struct completion *done
  641. ) {
  642. struct urb *urb;
  643. struct usb_hcd *hcd = bus_to_hcd(udev->bus);
  644. struct usb_host_endpoint *ep;
  645. urb = usb_alloc_urb(0, GFP_KERNEL);
  646. if (!urb)
  647. return NULL;
  648. urb->pipe = usb_rcvctrlpipe(udev, 0);
  649. ep = (usb_pipein(urb->pipe) ? udev->ep_in : udev->ep_out)
  650. [usb_pipeendpoint(urb->pipe)];
  651. if (!ep) {
  652. usb_free_urb(urb);
  653. return NULL;
  654. }
  655. urb->ep = ep;
  656. urb->dev = udev;
  657. urb->setup_packet = (void *)dr;
  658. urb->transfer_buffer = buf;
  659. urb->transfer_buffer_length = USB_DT_DEVICE_SIZE;
  660. urb->complete = usb_ehset_completion;
  661. urb->status = -EINPROGRESS;
  662. urb->actual_length = 0;
  663. urb->transfer_flags = URB_DIR_IN;
  664. usb_get_urb(urb);
  665. atomic_inc(&urb->use_count);
  666. atomic_inc(&urb->dev->urbnum);
  667. urb->setup_dma = dma_map_single(
  668. hcd->self.controller,
  669. urb->setup_packet,
  670. sizeof(struct usb_ctrlrequest),
  671. DMA_TO_DEVICE);
  672. urb->transfer_dma = dma_map_single(
  673. hcd->self.controller,
  674. urb->transfer_buffer,
  675. urb->transfer_buffer_length,
  676. DMA_FROM_DEVICE);
  677. urb->context = done;
  678. return urb;
  679. }
  680. static int ehset_single_step_set_feature(struct usb_hcd *hcd, int port)
  681. {
  682. int retval = -ENOMEM;
  683. struct usb_ctrlrequest *dr;
  684. struct urb *urb;
  685. struct usb_device *udev;
  686. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  687. struct usb_device_descriptor *buf;
  688. DECLARE_COMPLETION_ONSTACK(done);
  689. /* Obtain udev of the rhub's child port */
  690. udev = usb_hub_find_child(hcd->self.root_hub, port);
  691. if (!udev) {
  692. ehci_err(ehci, "No device attached to the RootHub\n");
  693. return -ENODEV;
  694. }
  695. buf = kmalloc(USB_DT_DEVICE_SIZE, GFP_KERNEL);
  696. if (!buf)
  697. return -ENOMEM;
  698. dr = kmalloc(sizeof(struct usb_ctrlrequest), GFP_KERNEL);
  699. if (!dr) {
  700. kfree(buf);
  701. return -ENOMEM;
  702. }
  703. /* Fill Setup packet for GetDescriptor */
  704. dr->bRequestType = USB_DIR_IN;
  705. dr->bRequest = USB_REQ_GET_DESCRIPTOR;
  706. dr->wValue = cpu_to_le16(USB_DT_DEVICE << 8);
  707. dr->wIndex = 0;
  708. dr->wLength = cpu_to_le16(USB_DT_DEVICE_SIZE);
  709. urb = request_single_step_set_feature_urb(udev, dr, buf, &done);
  710. if (!urb)
  711. goto cleanup;
  712. /* Submit just the SETUP stage */
  713. retval = submit_single_step_set_feature(hcd, urb, 1);
  714. if (retval)
  715. goto out1;
  716. if (!wait_for_completion_timeout(&done, msecs_to_jiffies(2000))) {
  717. usb_kill_urb(urb);
  718. retval = -ETIMEDOUT;
  719. ehci_err(ehci, "%s SETUP stage timed out on ep0\n", __func__);
  720. goto out1;
  721. }
  722. msleep(15 * 1000);
  723. /* Complete remaining DATA and STATUS stages using the same URB */
  724. urb->status = -EINPROGRESS;
  725. usb_get_urb(urb);
  726. atomic_inc(&urb->use_count);
  727. atomic_inc(&urb->dev->urbnum);
  728. retval = submit_single_step_set_feature(hcd, urb, 0);
  729. if (!retval && !wait_for_completion_timeout(&done,
  730. msecs_to_jiffies(2000))) {
  731. usb_kill_urb(urb);
  732. retval = -ETIMEDOUT;
  733. ehci_err(ehci, "%s IN stage timed out on ep0\n", __func__);
  734. }
  735. out1:
  736. usb_free_urb(urb);
  737. cleanup:
  738. kfree(dr);
  739. kfree(buf);
  740. return retval;
  741. }
  742. #endif /* CONFIG_USB_HCD_TEST_MODE */
  743. /*-------------------------------------------------------------------------*/
  744. int ehci_hub_control(
  745. struct usb_hcd *hcd,
  746. u16 typeReq,
  747. u16 wValue,
  748. u16 wIndex,
  749. char *buf,
  750. u16 wLength
  751. ) {
  752. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  753. int ports = HCS_N_PORTS (ehci->hcs_params);
  754. u32 __iomem *status_reg, *hostpc_reg;
  755. u32 temp, temp1, status;
  756. unsigned long flags;
  757. int retval = 0;
  758. unsigned selector;
  759. /*
  760. * Avoid underflow while calculating (wIndex & 0xff) - 1.
  761. * The compiler might deduce that wIndex can never be 0 and then
  762. * optimize away the tests for !wIndex below.
  763. */
  764. temp = wIndex & 0xff;
  765. temp -= (temp > 0);
  766. status_reg = &ehci->regs->port_status[temp];
  767. hostpc_reg = &ehci->regs->hostpc[temp];
  768. /*
  769. * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
  770. * HCS_INDICATOR may say we can change LEDs to off/amber/green.
  771. * (track current state ourselves) ... blink for diagnostics,
  772. * power, "this is the one", etc. EHCI spec supports this.
  773. */
  774. spin_lock_irqsave (&ehci->lock, flags);
  775. switch (typeReq) {
  776. case ClearHubFeature:
  777. switch (wValue) {
  778. case C_HUB_LOCAL_POWER:
  779. case C_HUB_OVER_CURRENT:
  780. /* no hub-wide feature/status flags */
  781. break;
  782. default:
  783. goto error;
  784. }
  785. break;
  786. case ClearPortFeature:
  787. if (!wIndex || wIndex > ports)
  788. goto error;
  789. wIndex--;
  790. temp = ehci_readl(ehci, status_reg);
  791. temp &= ~PORT_RWC_BITS;
  792. /*
  793. * Even if OWNER is set, so the port is owned by the
  794. * companion controller, hub_wq needs to be able to clear
  795. * the port-change status bits (especially
  796. * USB_PORT_STAT_C_CONNECTION).
  797. */
  798. switch (wValue) {
  799. case USB_PORT_FEAT_ENABLE:
  800. ehci_writel(ehci, temp & ~PORT_PE, status_reg);
  801. break;
  802. case USB_PORT_FEAT_C_ENABLE:
  803. ehci_writel(ehci, temp | PORT_PEC, status_reg);
  804. break;
  805. case USB_PORT_FEAT_SUSPEND:
  806. if (temp & PORT_RESET)
  807. goto error;
  808. if (ehci->no_selective_suspend)
  809. break;
  810. #ifdef CONFIG_USB_OTG
  811. if ((hcd->self.otg_port == (wIndex + 1))
  812. && hcd->self.b_hnp_enable) {
  813. otg_start_hnp(hcd->usb_phy->otg);
  814. break;
  815. }
  816. #endif
  817. if (!(temp & PORT_SUSPEND))
  818. break;
  819. if ((temp & PORT_PE) == 0)
  820. goto error;
  821. /* clear phy low-power mode before resume */
  822. if (ehci->has_tdi_phy_lpm) {
  823. temp1 = ehci_readl(ehci, hostpc_reg);
  824. ehci_writel(ehci, temp1 & ~HOSTPC_PHCD,
  825. hostpc_reg);
  826. spin_unlock_irqrestore(&ehci->lock, flags);
  827. msleep(5);/* wait to leave low-power mode */
  828. spin_lock_irqsave(&ehci->lock, flags);
  829. }
  830. /* resume signaling for 20 msec */
  831. temp &= ~PORT_WAKE_BITS;
  832. ehci_writel(ehci, temp | PORT_RESUME, status_reg);
  833. ehci->reset_done[wIndex] = jiffies
  834. + msecs_to_jiffies(USB_RESUME_TIMEOUT);
  835. set_bit(wIndex, &ehci->resuming_ports);
  836. usb_hcd_start_port_resume(&hcd->self, wIndex);
  837. break;
  838. case USB_PORT_FEAT_C_SUSPEND:
  839. clear_bit(wIndex, &ehci->port_c_suspend);
  840. break;
  841. case USB_PORT_FEAT_POWER:
  842. if (HCS_PPC(ehci->hcs_params)) {
  843. spin_unlock_irqrestore(&ehci->lock, flags);
  844. ehci_port_power(ehci, wIndex, false);
  845. spin_lock_irqsave(&ehci->lock, flags);
  846. }
  847. break;
  848. case USB_PORT_FEAT_C_CONNECTION:
  849. ehci_writel(ehci, temp | PORT_CSC, status_reg);
  850. break;
  851. case USB_PORT_FEAT_C_OVER_CURRENT:
  852. ehci_writel(ehci, temp | PORT_OCC, status_reg);
  853. break;
  854. case USB_PORT_FEAT_C_RESET:
  855. /* GetPortStatus clears reset */
  856. break;
  857. default:
  858. goto error;
  859. }
  860. ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
  861. break;
  862. case GetHubDescriptor:
  863. ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *)
  864. buf);
  865. break;
  866. case GetHubStatus:
  867. /* no hub-wide feature/status flags */
  868. memset (buf, 0, 4);
  869. //cpu_to_le32s ((u32 *) buf);
  870. break;
  871. case GetPortStatus:
  872. if (!wIndex || wIndex > ports)
  873. goto error;
  874. wIndex--;
  875. status = 0;
  876. temp = ehci_readl(ehci, status_reg);
  877. // wPortChange bits
  878. if (temp & PORT_CSC)
  879. status |= USB_PORT_STAT_C_CONNECTION << 16;
  880. if (temp & PORT_PEC)
  881. status |= USB_PORT_STAT_C_ENABLE << 16;
  882. if ((temp & PORT_OCC) && !ignore_oc){
  883. status |= USB_PORT_STAT_C_OVERCURRENT << 16;
  884. /*
  885. * Hubs should disable port power on over-current.
  886. * However, not all EHCI implementations do this
  887. * automatically, even if they _do_ support per-port
  888. * power switching; they're allowed to just limit the
  889. * current. hub_wq will turn the power back on.
  890. */
  891. if (((temp & PORT_OC) || (ehci->need_oc_pp_cycle))
  892. && HCS_PPC(ehci->hcs_params)) {
  893. spin_unlock_irqrestore(&ehci->lock, flags);
  894. ehci_port_power(ehci, wIndex, false);
  895. spin_lock_irqsave(&ehci->lock, flags);
  896. temp = ehci_readl(ehci, status_reg);
  897. }
  898. }
  899. /* no reset or resume pending */
  900. if (!ehci->reset_done[wIndex]) {
  901. /* Remote Wakeup received? */
  902. if (temp & PORT_RESUME) {
  903. /* resume signaling for 20 msec */
  904. ehci->reset_done[wIndex] = jiffies
  905. + msecs_to_jiffies(20);
  906. usb_hcd_start_port_resume(&hcd->self, wIndex);
  907. set_bit(wIndex, &ehci->resuming_ports);
  908. /* check the port again */
  909. mod_timer(&ehci_to_hcd(ehci)->rh_timer,
  910. ehci->reset_done[wIndex]);
  911. }
  912. /* reset or resume not yet complete */
  913. } else if (!time_after_eq(jiffies, ehci->reset_done[wIndex])) {
  914. ; /* wait until it is complete */
  915. /* resume completed */
  916. } else if (test_bit(wIndex, &ehci->resuming_ports)) {
  917. clear_bit(wIndex, &ehci->suspended_ports);
  918. set_bit(wIndex, &ehci->port_c_suspend);
  919. ehci->reset_done[wIndex] = 0;
  920. usb_hcd_end_port_resume(&hcd->self, wIndex);
  921. /* stop resume signaling */
  922. temp &= ~(PORT_RWC_BITS | PORT_SUSPEND | PORT_RESUME);
  923. ehci_writel(ehci, temp, status_reg);
  924. clear_bit(wIndex, &ehci->resuming_ports);
  925. retval = ehci_handshake(ehci, status_reg,
  926. PORT_RESUME, 0, 2000 /* 2msec */);
  927. if (retval != 0) {
  928. ehci_err(ehci, "port %d resume error %d\n",
  929. wIndex + 1, retval);
  930. goto error;
  931. }
  932. temp = ehci_readl(ehci, status_reg);
  933. /* whoever resets must GetPortStatus to complete it!! */
  934. } else {
  935. status |= USB_PORT_STAT_C_RESET << 16;
  936. ehci->reset_done [wIndex] = 0;
  937. /* force reset to complete */
  938. ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET),
  939. status_reg);
  940. /* REVISIT: some hardware needs 550+ usec to clear
  941. * this bit; seems too long to spin routinely...
  942. */
  943. retval = ehci_handshake(ehci, status_reg,
  944. PORT_RESET, 0, 1000);
  945. if (retval != 0) {
  946. ehci_err (ehci, "port %d reset error %d\n",
  947. wIndex + 1, retval);
  948. goto error;
  949. }
  950. /* see what we found out */
  951. temp = check_reset_complete (ehci, wIndex, status_reg,
  952. ehci_readl(ehci, status_reg));
  953. }
  954. /* transfer dedicated ports to the companion hc */
  955. if ((temp & PORT_CONNECT) &&
  956. test_bit(wIndex, &ehci->companion_ports)) {
  957. temp &= ~PORT_RWC_BITS;
  958. temp |= PORT_OWNER;
  959. ehci_writel(ehci, temp, status_reg);
  960. ehci_dbg(ehci, "port %d --> companion\n", wIndex + 1);
  961. temp = ehci_readl(ehci, status_reg);
  962. }
  963. /*
  964. * Even if OWNER is set, there's no harm letting hub_wq
  965. * see the wPortStatus values (they should all be 0 except
  966. * for PORT_POWER anyway).
  967. */
  968. if (temp & PORT_CONNECT) {
  969. status |= USB_PORT_STAT_CONNECTION;
  970. // status may be from integrated TT
  971. if (ehci->has_hostpc) {
  972. temp1 = ehci_readl(ehci, hostpc_reg);
  973. status |= ehci_port_speed(ehci, temp1);
  974. } else
  975. status |= ehci_port_speed(ehci, temp);
  976. }
  977. if (temp & PORT_PE)
  978. status |= USB_PORT_STAT_ENABLE;
  979. /* maybe the port was unsuspended without our knowledge */
  980. if (temp & (PORT_SUSPEND|PORT_RESUME)) {
  981. status |= USB_PORT_STAT_SUSPEND;
  982. } else if (test_bit(wIndex, &ehci->suspended_ports)) {
  983. clear_bit(wIndex, &ehci->suspended_ports);
  984. clear_bit(wIndex, &ehci->resuming_ports);
  985. ehci->reset_done[wIndex] = 0;
  986. if (temp & PORT_PE)
  987. set_bit(wIndex, &ehci->port_c_suspend);
  988. usb_hcd_end_port_resume(&hcd->self, wIndex);
  989. }
  990. if (temp & PORT_OC)
  991. status |= USB_PORT_STAT_OVERCURRENT;
  992. if (temp & PORT_RESET)
  993. status |= USB_PORT_STAT_RESET;
  994. if (temp & PORT_POWER)
  995. status |= USB_PORT_STAT_POWER;
  996. if (test_bit(wIndex, &ehci->port_c_suspend))
  997. status |= USB_PORT_STAT_C_SUSPEND << 16;
  998. if (status & ~0xffff) /* only if wPortChange is interesting */
  999. dbg_port(ehci, "GetStatus", wIndex + 1, temp);
  1000. put_unaligned_le32(status, buf);
  1001. break;
  1002. case SetHubFeature:
  1003. switch (wValue) {
  1004. case C_HUB_LOCAL_POWER:
  1005. case C_HUB_OVER_CURRENT:
  1006. /* no hub-wide feature/status flags */
  1007. break;
  1008. default:
  1009. goto error;
  1010. }
  1011. break;
  1012. case SetPortFeature:
  1013. selector = wIndex >> 8;
  1014. wIndex &= 0xff;
  1015. if (unlikely(ehci->debug)) {
  1016. /* If the debug port is active any port
  1017. * feature requests should get denied */
  1018. if (wIndex == HCS_DEBUG_PORT(ehci->hcs_params) &&
  1019. (readl(&ehci->debug->control) & DBGP_ENABLED)) {
  1020. retval = -ENODEV;
  1021. goto error_exit;
  1022. }
  1023. }
  1024. if (!wIndex || wIndex > ports)
  1025. goto error;
  1026. wIndex--;
  1027. temp = ehci_readl(ehci, status_reg);
  1028. if (temp & PORT_OWNER)
  1029. break;
  1030. temp &= ~PORT_RWC_BITS;
  1031. switch (wValue) {
  1032. case USB_PORT_FEAT_SUSPEND:
  1033. if (ehci->no_selective_suspend)
  1034. break;
  1035. if ((temp & PORT_PE) == 0
  1036. || (temp & PORT_RESET) != 0)
  1037. goto error;
  1038. /* After above check the port must be connected.
  1039. * Set appropriate bit thus could put phy into low power
  1040. * mode if we have tdi_phy_lpm feature
  1041. */
  1042. temp &= ~PORT_WKCONN_E;
  1043. temp |= PORT_WKDISC_E | PORT_WKOC_E;
  1044. ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
  1045. if (ehci->has_tdi_phy_lpm) {
  1046. spin_unlock_irqrestore(&ehci->lock, flags);
  1047. msleep(5);/* 5ms for HCD enter low pwr mode */
  1048. spin_lock_irqsave(&ehci->lock, flags);
  1049. temp1 = ehci_readl(ehci, hostpc_reg);
  1050. ehci_writel(ehci, temp1 | HOSTPC_PHCD,
  1051. hostpc_reg);
  1052. temp1 = ehci_readl(ehci, hostpc_reg);
  1053. ehci_dbg(ehci, "Port%d phy low pwr mode %s\n",
  1054. wIndex, (temp1 & HOSTPC_PHCD) ?
  1055. "succeeded" : "failed");
  1056. }
  1057. if (ehci_has_fsl_susp_errata(ehci)) {
  1058. /* 10ms for HCD enter suspend */
  1059. spin_unlock_irqrestore(&ehci->lock, flags);
  1060. usleep_range(10000, 20000);
  1061. spin_lock_irqsave(&ehci->lock, flags);
  1062. }
  1063. set_bit(wIndex, &ehci->suspended_ports);
  1064. break;
  1065. case USB_PORT_FEAT_POWER:
  1066. if (HCS_PPC(ehci->hcs_params)) {
  1067. spin_unlock_irqrestore(&ehci->lock, flags);
  1068. ehci_port_power(ehci, wIndex, true);
  1069. spin_lock_irqsave(&ehci->lock, flags);
  1070. }
  1071. break;
  1072. case USB_PORT_FEAT_RESET:
  1073. if (temp & (PORT_SUSPEND|PORT_RESUME))
  1074. goto error;
  1075. /* line status bits may report this as low speed,
  1076. * which can be fine if this root hub has a
  1077. * transaction translator built in.
  1078. */
  1079. if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
  1080. && !ehci_is_TDI(ehci)
  1081. && PORT_USB11 (temp)) {
  1082. ehci_dbg (ehci,
  1083. "port %d low speed --> companion\n",
  1084. wIndex + 1);
  1085. temp |= PORT_OWNER;
  1086. } else {
  1087. temp |= PORT_RESET;
  1088. temp &= ~PORT_PE;
  1089. /*
  1090. * caller must wait, then call GetPortStatus
  1091. * usb 2.0 spec says 50 ms resets on root
  1092. */
  1093. ehci->reset_done [wIndex] = jiffies
  1094. + msecs_to_jiffies (50);
  1095. /*
  1096. * Force full-speed connect for FSL high-speed
  1097. * erratum; disable HS Chirp by setting PFSC bit
  1098. */
  1099. if (ehci_has_fsl_hs_errata(ehci))
  1100. temp |= (1 << PORTSC_FSL_PFSC);
  1101. }
  1102. ehci_writel(ehci, temp, status_reg);
  1103. break;
  1104. /* For downstream facing ports (these): one hub port is put
  1105. * into test mode according to USB2 11.24.2.13, then the hub
  1106. * must be reset (which for root hub now means rmmod+modprobe,
  1107. * or else system reboot). See EHCI 2.3.9 and 4.14 for info
  1108. * about the EHCI-specific stuff.
  1109. */
  1110. case USB_PORT_FEAT_TEST:
  1111. #ifdef CONFIG_USB_HCD_TEST_MODE
  1112. if (selector == EHSET_TEST_SINGLE_STEP_SET_FEATURE) {
  1113. spin_unlock_irqrestore(&ehci->lock, flags);
  1114. retval = ehset_single_step_set_feature(hcd,
  1115. wIndex + 1);
  1116. spin_lock_irqsave(&ehci->lock, flags);
  1117. break;
  1118. }
  1119. #endif
  1120. if (!selector || selector > 5)
  1121. goto error;
  1122. spin_unlock_irqrestore(&ehci->lock, flags);
  1123. ehci_quiesce(ehci);
  1124. spin_lock_irqsave(&ehci->lock, flags);
  1125. /* Put all enabled ports into suspend */
  1126. while (ports--) {
  1127. u32 __iomem *sreg =
  1128. &ehci->regs->port_status[ports];
  1129. temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS;
  1130. if (temp & PORT_PE)
  1131. ehci_writel(ehci, temp | PORT_SUSPEND,
  1132. sreg);
  1133. }
  1134. spin_unlock_irqrestore(&ehci->lock, flags);
  1135. ehci_halt(ehci);
  1136. spin_lock_irqsave(&ehci->lock, flags);
  1137. temp = ehci_readl(ehci, status_reg);
  1138. temp |= selector << 16;
  1139. ehci_writel(ehci, temp, status_reg);
  1140. break;
  1141. default:
  1142. goto error;
  1143. }
  1144. ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
  1145. break;
  1146. default:
  1147. error:
  1148. /* "stall" on error */
  1149. retval = -EPIPE;
  1150. }
  1151. error_exit:
  1152. spin_unlock_irqrestore (&ehci->lock, flags);
  1153. return retval;
  1154. }
  1155. EXPORT_SYMBOL_GPL(ehci_hub_control);
  1156. static void ehci_relinquish_port(struct usb_hcd *hcd, int portnum)
  1157. {
  1158. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  1159. if (ehci_is_TDI(ehci))
  1160. return;
  1161. set_owner(ehci, --portnum, PORT_OWNER);
  1162. }
  1163. static int ehci_port_handed_over(struct usb_hcd *hcd, int portnum)
  1164. {
  1165. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  1166. u32 __iomem *reg;
  1167. if (ehci_is_TDI(ehci))
  1168. return 0;
  1169. reg = &ehci->regs->port_status[portnum - 1];
  1170. return ehci_readl(ehci, reg) & PORT_OWNER;
  1171. }
  1172. static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable)
  1173. {
  1174. struct usb_hcd *hcd = ehci_to_hcd(ehci);
  1175. u32 __iomem *status_reg = &ehci->regs->port_status[portnum];
  1176. u32 temp = ehci_readl(ehci, status_reg) & ~PORT_RWC_BITS;
  1177. if (enable)
  1178. ehci_writel(ehci, temp | PORT_POWER, status_reg);
  1179. else
  1180. ehci_writel(ehci, temp & ~PORT_POWER, status_reg);
  1181. if (hcd->driver->port_power)
  1182. hcd->driver->port_power(hcd, portnum, enable);
  1183. return 0;
  1184. }