fsl_qe_udc.c 62 KB

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  1. /*
  2. * driver/usb/gadget/fsl_qe_udc.c
  3. *
  4. * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
  5. *
  6. * Xie Xiaobo <X.Xie@freescale.com>
  7. * Li Yang <leoli@freescale.com>
  8. * Based on bareboard code from Shlomi Gridish.
  9. *
  10. * Description:
  11. * Freescle QE/CPM USB Pheripheral Controller Driver
  12. * The controller can be found on MPC8360, MPC8272, and etc.
  13. * MPC8360 Rev 1.1 may need QE mircocode update
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. */
  20. #undef USB_TRACE
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/ioport.h>
  24. #include <linux/types.h>
  25. #include <linux/errno.h>
  26. #include <linux/err.h>
  27. #include <linux/slab.h>
  28. #include <linux/list.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/io.h>
  31. #include <linux/moduleparam.h>
  32. #include <linux/of_address.h>
  33. #include <linux/of_irq.h>
  34. #include <linux/of_platform.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/usb/ch9.h>
  37. #include <linux/usb/gadget.h>
  38. #include <linux/usb/otg.h>
  39. #include <soc/fsl/qe/qe.h>
  40. #include <asm/cpm.h>
  41. #include <asm/dma.h>
  42. #include <asm/reg.h>
  43. #include "fsl_qe_udc.h"
  44. #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
  45. #define DRIVER_AUTHOR "Xie XiaoBo"
  46. #define DRIVER_VERSION "1.0"
  47. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  48. static const char driver_name[] = "fsl_qe_udc";
  49. static const char driver_desc[] = DRIVER_DESC;
  50. /*ep name is important in gadget, it should obey the convention of ep_match()*/
  51. static const char *const ep_name[] = {
  52. "ep0-control", /* everyone has ep0 */
  53. /* 3 configurable endpoints */
  54. "ep1",
  55. "ep2",
  56. "ep3",
  57. };
  58. static struct usb_endpoint_descriptor qe_ep0_desc = {
  59. .bLength = USB_DT_ENDPOINT_SIZE,
  60. .bDescriptorType = USB_DT_ENDPOINT,
  61. .bEndpointAddress = 0,
  62. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  63. .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
  64. };
  65. /********************************************************************
  66. * Internal Used Function Start
  67. ********************************************************************/
  68. /*-----------------------------------------------------------------
  69. * done() - retire a request; caller blocked irqs
  70. *--------------------------------------------------------------*/
  71. static void done(struct qe_ep *ep, struct qe_req *req, int status)
  72. {
  73. struct qe_udc *udc = ep->udc;
  74. unsigned char stopped = ep->stopped;
  75. /* the req->queue pointer is used by ep_queue() func, in which
  76. * the request will be added into a udc_ep->queue 'd tail
  77. * so here the req will be dropped from the ep->queue
  78. */
  79. list_del_init(&req->queue);
  80. /* req.status should be set as -EINPROGRESS in ep_queue() */
  81. if (req->req.status == -EINPROGRESS)
  82. req->req.status = status;
  83. else
  84. status = req->req.status;
  85. if (req->mapped) {
  86. dma_unmap_single(udc->gadget.dev.parent,
  87. req->req.dma, req->req.length,
  88. ep_is_in(ep)
  89. ? DMA_TO_DEVICE
  90. : DMA_FROM_DEVICE);
  91. req->req.dma = DMA_ADDR_INVALID;
  92. req->mapped = 0;
  93. } else
  94. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  95. req->req.dma, req->req.length,
  96. ep_is_in(ep)
  97. ? DMA_TO_DEVICE
  98. : DMA_FROM_DEVICE);
  99. if (status && (status != -ESHUTDOWN))
  100. dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
  101. ep->ep.name, &req->req, status,
  102. req->req.actual, req->req.length);
  103. /* don't modify queue heads during completion callback */
  104. ep->stopped = 1;
  105. spin_unlock(&udc->lock);
  106. usb_gadget_giveback_request(&ep->ep, &req->req);
  107. spin_lock(&udc->lock);
  108. ep->stopped = stopped;
  109. }
  110. /*-----------------------------------------------------------------
  111. * nuke(): delete all requests related to this ep
  112. *--------------------------------------------------------------*/
  113. static void nuke(struct qe_ep *ep, int status)
  114. {
  115. /* Whether this eq has request linked */
  116. while (!list_empty(&ep->queue)) {
  117. struct qe_req *req = NULL;
  118. req = list_entry(ep->queue.next, struct qe_req, queue);
  119. done(ep, req, status);
  120. }
  121. }
  122. /*---------------------------------------------------------------------------*
  123. * USB and Endpoint manipulate process, include parameter and register *
  124. *---------------------------------------------------------------------------*/
  125. /* @value: 1--set stall 0--clean stall */
  126. static int qe_eprx_stall_change(struct qe_ep *ep, int value)
  127. {
  128. u16 tem_usep;
  129. u8 epnum = ep->epnum;
  130. struct qe_udc *udc = ep->udc;
  131. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  132. tem_usep = tem_usep & ~USB_RHS_MASK;
  133. if (value == 1)
  134. tem_usep |= USB_RHS_STALL;
  135. else if (ep->dir == USB_DIR_IN)
  136. tem_usep |= USB_RHS_IGNORE_OUT;
  137. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  138. return 0;
  139. }
  140. static int qe_eptx_stall_change(struct qe_ep *ep, int value)
  141. {
  142. u16 tem_usep;
  143. u8 epnum = ep->epnum;
  144. struct qe_udc *udc = ep->udc;
  145. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  146. tem_usep = tem_usep & ~USB_THS_MASK;
  147. if (value == 1)
  148. tem_usep |= USB_THS_STALL;
  149. else if (ep->dir == USB_DIR_OUT)
  150. tem_usep |= USB_THS_IGNORE_IN;
  151. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  152. return 0;
  153. }
  154. static int qe_ep0_stall(struct qe_udc *udc)
  155. {
  156. qe_eptx_stall_change(&udc->eps[0], 1);
  157. qe_eprx_stall_change(&udc->eps[0], 1);
  158. udc->ep0_state = WAIT_FOR_SETUP;
  159. udc->ep0_dir = 0;
  160. return 0;
  161. }
  162. static int qe_eprx_nack(struct qe_ep *ep)
  163. {
  164. u8 epnum = ep->epnum;
  165. struct qe_udc *udc = ep->udc;
  166. if (ep->state == EP_STATE_IDLE) {
  167. /* Set the ep's nack */
  168. clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
  169. USB_RHS_MASK, USB_RHS_NACK);
  170. /* Mask Rx and Busy interrupts */
  171. clrbits16(&udc->usb_regs->usb_usbmr,
  172. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  173. ep->state = EP_STATE_NACK;
  174. }
  175. return 0;
  176. }
  177. static int qe_eprx_normal(struct qe_ep *ep)
  178. {
  179. struct qe_udc *udc = ep->udc;
  180. if (ep->state == EP_STATE_NACK) {
  181. clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
  182. USB_RTHS_MASK, USB_THS_IGNORE_IN);
  183. /* Unmask RX interrupts */
  184. out_be16(&udc->usb_regs->usb_usber,
  185. USB_E_BSY_MASK | USB_E_RXB_MASK);
  186. setbits16(&udc->usb_regs->usb_usbmr,
  187. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  188. ep->state = EP_STATE_IDLE;
  189. ep->has_data = 0;
  190. }
  191. return 0;
  192. }
  193. static int qe_ep_cmd_stoptx(struct qe_ep *ep)
  194. {
  195. if (ep->udc->soc_type == PORT_CPM)
  196. cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
  197. CPM_USB_STOP_TX_OPCODE);
  198. else
  199. qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
  200. ep->epnum, 0);
  201. return 0;
  202. }
  203. static int qe_ep_cmd_restarttx(struct qe_ep *ep)
  204. {
  205. if (ep->udc->soc_type == PORT_CPM)
  206. cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
  207. CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
  208. else
  209. qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
  210. ep->epnum, 0);
  211. return 0;
  212. }
  213. static int qe_ep_flushtxfifo(struct qe_ep *ep)
  214. {
  215. struct qe_udc *udc = ep->udc;
  216. int i;
  217. i = (int)ep->epnum;
  218. qe_ep_cmd_stoptx(ep);
  219. out_8(&udc->usb_regs->usb_uscom,
  220. USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  221. out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
  222. out_be32(&udc->ep_param[i]->tstate, 0);
  223. out_be16(&udc->ep_param[i]->tbcnt, 0);
  224. ep->c_txbd = ep->txbase;
  225. ep->n_txbd = ep->txbase;
  226. qe_ep_cmd_restarttx(ep);
  227. return 0;
  228. }
  229. static int qe_ep_filltxfifo(struct qe_ep *ep)
  230. {
  231. struct qe_udc *udc = ep->udc;
  232. out_8(&udc->usb_regs->usb_uscom,
  233. USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  234. return 0;
  235. }
  236. static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
  237. {
  238. struct qe_ep *ep;
  239. u32 bdring_len;
  240. struct qe_bd __iomem *bd;
  241. int i;
  242. ep = &udc->eps[pipe_num];
  243. if (ep->dir == USB_DIR_OUT)
  244. bdring_len = USB_BDRING_LEN_RX;
  245. else
  246. bdring_len = USB_BDRING_LEN;
  247. bd = ep->rxbase;
  248. for (i = 0; i < (bdring_len - 1); i++) {
  249. out_be32((u32 __iomem *)bd, R_E | R_I);
  250. bd++;
  251. }
  252. out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
  253. bd = ep->txbase;
  254. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  255. out_be32(&bd->buf, 0);
  256. out_be32((u32 __iomem *)bd, 0);
  257. bd++;
  258. }
  259. out_be32((u32 __iomem *)bd, T_W);
  260. return 0;
  261. }
  262. static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
  263. {
  264. struct qe_ep *ep;
  265. u16 tmpusep;
  266. ep = &udc->eps[pipe_num];
  267. tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
  268. tmpusep &= ~USB_RTHS_MASK;
  269. switch (ep->dir) {
  270. case USB_DIR_BOTH:
  271. qe_ep_flushtxfifo(ep);
  272. break;
  273. case USB_DIR_OUT:
  274. tmpusep |= USB_THS_IGNORE_IN;
  275. break;
  276. case USB_DIR_IN:
  277. qe_ep_flushtxfifo(ep);
  278. tmpusep |= USB_RHS_IGNORE_OUT;
  279. break;
  280. default:
  281. break;
  282. }
  283. out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
  284. qe_epbds_reset(udc, pipe_num);
  285. return 0;
  286. }
  287. static int qe_ep_toggledata01(struct qe_ep *ep)
  288. {
  289. ep->data01 ^= 0x1;
  290. return 0;
  291. }
  292. static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
  293. {
  294. struct qe_ep *ep = &udc->eps[pipe_num];
  295. unsigned long tmp_addr = 0;
  296. struct usb_ep_para __iomem *epparam;
  297. int i;
  298. struct qe_bd __iomem *bd;
  299. int bdring_len;
  300. if (ep->dir == USB_DIR_OUT)
  301. bdring_len = USB_BDRING_LEN_RX;
  302. else
  303. bdring_len = USB_BDRING_LEN;
  304. epparam = udc->ep_param[pipe_num];
  305. /* alloc multi-ram for BD rings and set the ep parameters */
  306. tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
  307. USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
  308. if (IS_ERR_VALUE(tmp_addr))
  309. return -ENOMEM;
  310. out_be16(&epparam->rbase, (u16)tmp_addr);
  311. out_be16(&epparam->tbase, (u16)(tmp_addr +
  312. (sizeof(struct qe_bd) * bdring_len)));
  313. out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
  314. out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
  315. ep->rxbase = cpm_muram_addr(tmp_addr);
  316. ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
  317. * bdring_len));
  318. ep->n_rxbd = ep->rxbase;
  319. ep->e_rxbd = ep->rxbase;
  320. ep->n_txbd = ep->txbase;
  321. ep->c_txbd = ep->txbase;
  322. ep->data01 = 0; /* data0 */
  323. /* Init TX and RX bds */
  324. bd = ep->rxbase;
  325. for (i = 0; i < bdring_len - 1; i++) {
  326. out_be32(&bd->buf, 0);
  327. out_be32((u32 __iomem *)bd, 0);
  328. bd++;
  329. }
  330. out_be32(&bd->buf, 0);
  331. out_be32((u32 __iomem *)bd, R_W);
  332. bd = ep->txbase;
  333. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  334. out_be32(&bd->buf, 0);
  335. out_be32((u32 __iomem *)bd, 0);
  336. bd++;
  337. }
  338. out_be32(&bd->buf, 0);
  339. out_be32((u32 __iomem *)bd, T_W);
  340. return 0;
  341. }
  342. static int qe_ep_rxbd_update(struct qe_ep *ep)
  343. {
  344. unsigned int size;
  345. int i;
  346. unsigned int tmp;
  347. struct qe_bd __iomem *bd;
  348. unsigned int bdring_len;
  349. if (ep->rxbase == NULL)
  350. return -EINVAL;
  351. bd = ep->rxbase;
  352. ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
  353. if (!ep->rxframe)
  354. return -ENOMEM;
  355. qe_frame_init(ep->rxframe);
  356. if (ep->dir == USB_DIR_OUT)
  357. bdring_len = USB_BDRING_LEN_RX;
  358. else
  359. bdring_len = USB_BDRING_LEN;
  360. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
  361. ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
  362. if (!ep->rxbuffer) {
  363. kfree(ep->rxframe);
  364. return -ENOMEM;
  365. }
  366. ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
  367. if (ep->rxbuf_d == DMA_ADDR_INVALID) {
  368. ep->rxbuf_d = dma_map_single(ep->udc->gadget.dev.parent,
  369. ep->rxbuffer,
  370. size,
  371. DMA_FROM_DEVICE);
  372. ep->rxbufmap = 1;
  373. } else {
  374. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  375. ep->rxbuf_d, size,
  376. DMA_FROM_DEVICE);
  377. ep->rxbufmap = 0;
  378. }
  379. size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
  380. tmp = ep->rxbuf_d;
  381. tmp = (u32)(((tmp >> 2) << 2) + 4);
  382. for (i = 0; i < bdring_len - 1; i++) {
  383. out_be32(&bd->buf, tmp);
  384. out_be32((u32 __iomem *)bd, (R_E | R_I));
  385. tmp = tmp + size;
  386. bd++;
  387. }
  388. out_be32(&bd->buf, tmp);
  389. out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
  390. return 0;
  391. }
  392. static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
  393. {
  394. struct qe_ep *ep = &udc->eps[pipe_num];
  395. struct usb_ep_para __iomem *epparam;
  396. u16 usep, logepnum;
  397. u16 tmp;
  398. u8 rtfcr = 0;
  399. epparam = udc->ep_param[pipe_num];
  400. usep = 0;
  401. logepnum = (ep->ep.desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
  402. usep |= (logepnum << USB_EPNUM_SHIFT);
  403. switch (ep->ep.desc->bmAttributes & 0x03) {
  404. case USB_ENDPOINT_XFER_BULK:
  405. usep |= USB_TRANS_BULK;
  406. break;
  407. case USB_ENDPOINT_XFER_ISOC:
  408. usep |= USB_TRANS_ISO;
  409. break;
  410. case USB_ENDPOINT_XFER_INT:
  411. usep |= USB_TRANS_INT;
  412. break;
  413. default:
  414. usep |= USB_TRANS_CTR;
  415. break;
  416. }
  417. switch (ep->dir) {
  418. case USB_DIR_OUT:
  419. usep |= USB_THS_IGNORE_IN;
  420. break;
  421. case USB_DIR_IN:
  422. usep |= USB_RHS_IGNORE_OUT;
  423. break;
  424. default:
  425. break;
  426. }
  427. out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
  428. rtfcr = 0x30;
  429. out_8(&epparam->rbmr, rtfcr);
  430. out_8(&epparam->tbmr, rtfcr);
  431. tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
  432. /* MRBLR must be divisble by 4 */
  433. tmp = (u16)(((tmp >> 2) << 2) + 4);
  434. out_be16(&epparam->mrblr, tmp);
  435. return 0;
  436. }
  437. static int qe_ep_init(struct qe_udc *udc,
  438. unsigned char pipe_num,
  439. const struct usb_endpoint_descriptor *desc)
  440. {
  441. struct qe_ep *ep = &udc->eps[pipe_num];
  442. unsigned long flags;
  443. int reval = 0;
  444. u16 max = 0;
  445. max = usb_endpoint_maxp(desc);
  446. /* check the max package size validate for this endpoint */
  447. /* Refer to USB2.0 spec table 9-13,
  448. */
  449. if (pipe_num != 0) {
  450. switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
  451. case USB_ENDPOINT_XFER_BULK:
  452. if (strstr(ep->ep.name, "-iso")
  453. || strstr(ep->ep.name, "-int"))
  454. goto en_done;
  455. switch (udc->gadget.speed) {
  456. case USB_SPEED_HIGH:
  457. if ((max == 128) || (max == 256) || (max == 512))
  458. break;
  459. default:
  460. switch (max) {
  461. case 4:
  462. case 8:
  463. case 16:
  464. case 32:
  465. case 64:
  466. break;
  467. default:
  468. case USB_SPEED_LOW:
  469. goto en_done;
  470. }
  471. }
  472. break;
  473. case USB_ENDPOINT_XFER_INT:
  474. if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
  475. goto en_done;
  476. switch (udc->gadget.speed) {
  477. case USB_SPEED_HIGH:
  478. if (max <= 1024)
  479. break;
  480. case USB_SPEED_FULL:
  481. if (max <= 64)
  482. break;
  483. default:
  484. if (max <= 8)
  485. break;
  486. goto en_done;
  487. }
  488. break;
  489. case USB_ENDPOINT_XFER_ISOC:
  490. if (strstr(ep->ep.name, "-bulk")
  491. || strstr(ep->ep.name, "-int"))
  492. goto en_done;
  493. switch (udc->gadget.speed) {
  494. case USB_SPEED_HIGH:
  495. if (max <= 1024)
  496. break;
  497. case USB_SPEED_FULL:
  498. if (max <= 1023)
  499. break;
  500. default:
  501. goto en_done;
  502. }
  503. break;
  504. case USB_ENDPOINT_XFER_CONTROL:
  505. if (strstr(ep->ep.name, "-iso")
  506. || strstr(ep->ep.name, "-int"))
  507. goto en_done;
  508. switch (udc->gadget.speed) {
  509. case USB_SPEED_HIGH:
  510. case USB_SPEED_FULL:
  511. switch (max) {
  512. case 1:
  513. case 2:
  514. case 4:
  515. case 8:
  516. case 16:
  517. case 32:
  518. case 64:
  519. break;
  520. default:
  521. goto en_done;
  522. }
  523. case USB_SPEED_LOW:
  524. switch (max) {
  525. case 1:
  526. case 2:
  527. case 4:
  528. case 8:
  529. break;
  530. default:
  531. goto en_done;
  532. }
  533. default:
  534. goto en_done;
  535. }
  536. break;
  537. default:
  538. goto en_done;
  539. }
  540. } /* if ep0*/
  541. spin_lock_irqsave(&udc->lock, flags);
  542. /* initialize ep structure */
  543. ep->ep.maxpacket = max;
  544. ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  545. ep->ep.desc = desc;
  546. ep->stopped = 0;
  547. ep->init = 1;
  548. if (pipe_num == 0) {
  549. ep->dir = USB_DIR_BOTH;
  550. udc->ep0_dir = USB_DIR_OUT;
  551. udc->ep0_state = WAIT_FOR_SETUP;
  552. } else {
  553. switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
  554. case USB_DIR_OUT:
  555. ep->dir = USB_DIR_OUT;
  556. break;
  557. case USB_DIR_IN:
  558. ep->dir = USB_DIR_IN;
  559. default:
  560. break;
  561. }
  562. }
  563. /* hardware special operation */
  564. qe_ep_bd_init(udc, pipe_num);
  565. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
  566. reval = qe_ep_rxbd_update(ep);
  567. if (reval)
  568. goto en_done1;
  569. }
  570. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
  571. ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
  572. if (!ep->txframe)
  573. goto en_done2;
  574. qe_frame_init(ep->txframe);
  575. }
  576. qe_ep_register_init(udc, pipe_num);
  577. /* Now HW will be NAKing transfers to that EP,
  578. * until a buffer is queued to it. */
  579. spin_unlock_irqrestore(&udc->lock, flags);
  580. return 0;
  581. en_done2:
  582. kfree(ep->rxbuffer);
  583. kfree(ep->rxframe);
  584. en_done1:
  585. spin_unlock_irqrestore(&udc->lock, flags);
  586. en_done:
  587. dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
  588. return -ENODEV;
  589. }
  590. static inline void qe_usb_enable(struct qe_udc *udc)
  591. {
  592. setbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
  593. }
  594. static inline void qe_usb_disable(struct qe_udc *udc)
  595. {
  596. clrbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
  597. }
  598. /*----------------------------------------------------------------------------*
  599. * USB and EP basic manipulate function end *
  600. *----------------------------------------------------------------------------*/
  601. /******************************************************************************
  602. UDC transmit and receive process
  603. ******************************************************************************/
  604. static void recycle_one_rxbd(struct qe_ep *ep)
  605. {
  606. u32 bdstatus;
  607. bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
  608. bdstatus = R_I | R_E | (bdstatus & R_W);
  609. out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
  610. if (bdstatus & R_W)
  611. ep->e_rxbd = ep->rxbase;
  612. else
  613. ep->e_rxbd++;
  614. }
  615. static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
  616. {
  617. u32 bdstatus;
  618. struct qe_bd __iomem *bd, *nextbd;
  619. unsigned char stop = 0;
  620. nextbd = ep->n_rxbd;
  621. bd = ep->e_rxbd;
  622. bdstatus = in_be32((u32 __iomem *)bd);
  623. while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
  624. bdstatus = R_E | R_I | (bdstatus & R_W);
  625. out_be32((u32 __iomem *)bd, bdstatus);
  626. if (bdstatus & R_W)
  627. bd = ep->rxbase;
  628. else
  629. bd++;
  630. bdstatus = in_be32((u32 __iomem *)bd);
  631. if (stopatnext && (bd == nextbd))
  632. stop = 1;
  633. }
  634. ep->e_rxbd = bd;
  635. }
  636. static void ep_recycle_rxbds(struct qe_ep *ep)
  637. {
  638. struct qe_bd __iomem *bd = ep->n_rxbd;
  639. u32 bdstatus;
  640. u8 epnum = ep->epnum;
  641. struct qe_udc *udc = ep->udc;
  642. bdstatus = in_be32((u32 __iomem *)bd);
  643. if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
  644. bd = ep->rxbase +
  645. ((in_be16(&udc->ep_param[epnum]->rbptr) -
  646. in_be16(&udc->ep_param[epnum]->rbase))
  647. >> 3);
  648. bdstatus = in_be32((u32 __iomem *)bd);
  649. if (bdstatus & R_W)
  650. bd = ep->rxbase;
  651. else
  652. bd++;
  653. ep->e_rxbd = bd;
  654. recycle_rxbds(ep, 0);
  655. ep->e_rxbd = ep->n_rxbd;
  656. } else
  657. recycle_rxbds(ep, 1);
  658. if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
  659. out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
  660. if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
  661. qe_eprx_normal(ep);
  662. ep->localnack = 0;
  663. }
  664. static void setup_received_handle(struct qe_udc *udc,
  665. struct usb_ctrlrequest *setup);
  666. static int qe_ep_rxframe_handle(struct qe_ep *ep);
  667. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
  668. /* when BD PID is setup, handle the packet */
  669. static int ep0_setup_handle(struct qe_udc *udc)
  670. {
  671. struct qe_ep *ep = &udc->eps[0];
  672. struct qe_frame *pframe;
  673. unsigned int fsize;
  674. u8 *cp;
  675. pframe = ep->rxframe;
  676. if ((frame_get_info(pframe) & PID_SETUP)
  677. && (udc->ep0_state == WAIT_FOR_SETUP)) {
  678. fsize = frame_get_length(pframe);
  679. if (unlikely(fsize != 8))
  680. return -EINVAL;
  681. cp = (u8 *)&udc->local_setup_buff;
  682. memcpy(cp, pframe->data, fsize);
  683. ep->data01 = 1;
  684. /* handle the usb command base on the usb_ctrlrequest */
  685. setup_received_handle(udc, &udc->local_setup_buff);
  686. return 0;
  687. }
  688. return -EINVAL;
  689. }
  690. static int qe_ep0_rx(struct qe_udc *udc)
  691. {
  692. struct qe_ep *ep = &udc->eps[0];
  693. struct qe_frame *pframe;
  694. struct qe_bd __iomem *bd;
  695. u32 bdstatus, length;
  696. u32 vaddr;
  697. pframe = ep->rxframe;
  698. if (ep->dir == USB_DIR_IN) {
  699. dev_err(udc->dev, "ep0 not a control endpoint\n");
  700. return -EINVAL;
  701. }
  702. bd = ep->n_rxbd;
  703. bdstatus = in_be32((u32 __iomem *)bd);
  704. length = bdstatus & BD_LENGTH_MASK;
  705. while (!(bdstatus & R_E) && length) {
  706. if ((bdstatus & R_F) && (bdstatus & R_L)
  707. && !(bdstatus & R_ERROR)) {
  708. if (length == USB_CRC_SIZE) {
  709. udc->ep0_state = WAIT_FOR_SETUP;
  710. dev_vdbg(udc->dev,
  711. "receive a ZLP in status phase\n");
  712. } else {
  713. qe_frame_clean(pframe);
  714. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  715. frame_set_data(pframe, (u8 *)vaddr);
  716. frame_set_length(pframe,
  717. (length - USB_CRC_SIZE));
  718. frame_set_status(pframe, FRAME_OK);
  719. switch (bdstatus & R_PID) {
  720. case R_PID_SETUP:
  721. frame_set_info(pframe, PID_SETUP);
  722. break;
  723. case R_PID_DATA1:
  724. frame_set_info(pframe, PID_DATA1);
  725. break;
  726. default:
  727. frame_set_info(pframe, PID_DATA0);
  728. break;
  729. }
  730. if ((bdstatus & R_PID) == R_PID_SETUP)
  731. ep0_setup_handle(udc);
  732. else
  733. qe_ep_rxframe_handle(ep);
  734. }
  735. } else {
  736. dev_err(udc->dev, "The receive frame with error!\n");
  737. }
  738. /* note: don't clear the rxbd's buffer address */
  739. recycle_one_rxbd(ep);
  740. /* Get next BD */
  741. if (bdstatus & R_W)
  742. bd = ep->rxbase;
  743. else
  744. bd++;
  745. bdstatus = in_be32((u32 __iomem *)bd);
  746. length = bdstatus & BD_LENGTH_MASK;
  747. }
  748. ep->n_rxbd = bd;
  749. return 0;
  750. }
  751. static int qe_ep_rxframe_handle(struct qe_ep *ep)
  752. {
  753. struct qe_frame *pframe;
  754. u8 framepid = 0;
  755. unsigned int fsize;
  756. u8 *cp;
  757. struct qe_req *req;
  758. pframe = ep->rxframe;
  759. if (frame_get_info(pframe) & PID_DATA1)
  760. framepid = 0x1;
  761. if (framepid != ep->data01) {
  762. dev_err(ep->udc->dev, "the data01 error!\n");
  763. return -EIO;
  764. }
  765. fsize = frame_get_length(pframe);
  766. if (list_empty(&ep->queue)) {
  767. dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
  768. } else {
  769. req = list_entry(ep->queue.next, struct qe_req, queue);
  770. cp = (u8 *)(req->req.buf) + req->req.actual;
  771. if (cp) {
  772. memcpy(cp, pframe->data, fsize);
  773. req->req.actual += fsize;
  774. if ((fsize < ep->ep.maxpacket) ||
  775. (req->req.actual >= req->req.length)) {
  776. if (ep->epnum == 0)
  777. ep0_req_complete(ep->udc, req);
  778. else
  779. done(ep, req, 0);
  780. if (list_empty(&ep->queue) && ep->epnum != 0)
  781. qe_eprx_nack(ep);
  782. }
  783. }
  784. }
  785. qe_ep_toggledata01(ep);
  786. return 0;
  787. }
  788. static void ep_rx_tasklet(unsigned long data)
  789. {
  790. struct qe_udc *udc = (struct qe_udc *)data;
  791. struct qe_ep *ep;
  792. struct qe_frame *pframe;
  793. struct qe_bd __iomem *bd;
  794. unsigned long flags;
  795. u32 bdstatus, length;
  796. u32 vaddr, i;
  797. spin_lock_irqsave(&udc->lock, flags);
  798. for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
  799. ep = &udc->eps[i];
  800. if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
  801. dev_dbg(udc->dev,
  802. "This is a transmit ep or disable tasklet!\n");
  803. continue;
  804. }
  805. pframe = ep->rxframe;
  806. bd = ep->n_rxbd;
  807. bdstatus = in_be32((u32 __iomem *)bd);
  808. length = bdstatus & BD_LENGTH_MASK;
  809. while (!(bdstatus & R_E) && length) {
  810. if (list_empty(&ep->queue)) {
  811. qe_eprx_nack(ep);
  812. dev_dbg(udc->dev,
  813. "The rxep have noreq %d\n",
  814. ep->has_data);
  815. break;
  816. }
  817. if ((bdstatus & R_F) && (bdstatus & R_L)
  818. && !(bdstatus & R_ERROR)) {
  819. qe_frame_clean(pframe);
  820. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  821. frame_set_data(pframe, (u8 *)vaddr);
  822. frame_set_length(pframe,
  823. (length - USB_CRC_SIZE));
  824. frame_set_status(pframe, FRAME_OK);
  825. switch (bdstatus & R_PID) {
  826. case R_PID_DATA1:
  827. frame_set_info(pframe, PID_DATA1);
  828. break;
  829. case R_PID_SETUP:
  830. frame_set_info(pframe, PID_SETUP);
  831. break;
  832. default:
  833. frame_set_info(pframe, PID_DATA0);
  834. break;
  835. }
  836. /* handle the rx frame */
  837. qe_ep_rxframe_handle(ep);
  838. } else {
  839. dev_err(udc->dev,
  840. "error in received frame\n");
  841. }
  842. /* note: don't clear the rxbd's buffer address */
  843. /*clear the length */
  844. out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
  845. ep->has_data--;
  846. if (!(ep->localnack))
  847. recycle_one_rxbd(ep);
  848. /* Get next BD */
  849. if (bdstatus & R_W)
  850. bd = ep->rxbase;
  851. else
  852. bd++;
  853. bdstatus = in_be32((u32 __iomem *)bd);
  854. length = bdstatus & BD_LENGTH_MASK;
  855. }
  856. ep->n_rxbd = bd;
  857. if (ep->localnack)
  858. ep_recycle_rxbds(ep);
  859. ep->enable_tasklet = 0;
  860. } /* for i=1 */
  861. spin_unlock_irqrestore(&udc->lock, flags);
  862. }
  863. static int qe_ep_rx(struct qe_ep *ep)
  864. {
  865. struct qe_udc *udc;
  866. struct qe_frame *pframe;
  867. struct qe_bd __iomem *bd;
  868. u16 swoffs, ucoffs, emptybds;
  869. udc = ep->udc;
  870. pframe = ep->rxframe;
  871. if (ep->dir == USB_DIR_IN) {
  872. dev_err(udc->dev, "transmit ep in rx function\n");
  873. return -EINVAL;
  874. }
  875. bd = ep->n_rxbd;
  876. swoffs = (u16)(bd - ep->rxbase);
  877. ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
  878. in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
  879. if (swoffs < ucoffs)
  880. emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
  881. else
  882. emptybds = swoffs - ucoffs;
  883. if (emptybds < MIN_EMPTY_BDS) {
  884. qe_eprx_nack(ep);
  885. ep->localnack = 1;
  886. dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
  887. }
  888. ep->has_data = USB_BDRING_LEN_RX - emptybds;
  889. if (list_empty(&ep->queue)) {
  890. qe_eprx_nack(ep);
  891. dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
  892. ep->has_data);
  893. return 0;
  894. }
  895. tasklet_schedule(&udc->rx_tasklet);
  896. ep->enable_tasklet = 1;
  897. return 0;
  898. }
  899. /* send data from a frame, no matter what tx_req */
  900. static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
  901. {
  902. struct qe_udc *udc = ep->udc;
  903. struct qe_bd __iomem *bd;
  904. u16 saveusbmr;
  905. u32 bdstatus, pidmask;
  906. u32 paddr;
  907. if (ep->dir == USB_DIR_OUT) {
  908. dev_err(udc->dev, "receive ep passed to tx function\n");
  909. return -EINVAL;
  910. }
  911. /* Disable the Tx interrupt */
  912. saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
  913. out_be16(&udc->usb_regs->usb_usbmr,
  914. saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
  915. bd = ep->n_txbd;
  916. bdstatus = in_be32((u32 __iomem *)bd);
  917. if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
  918. if (frame_get_length(frame) == 0) {
  919. frame_set_data(frame, udc->nullbuf);
  920. frame_set_length(frame, 2);
  921. frame->info |= (ZLP | NO_CRC);
  922. dev_vdbg(udc->dev, "the frame size = 0\n");
  923. }
  924. paddr = virt_to_phys((void *)frame->data);
  925. out_be32(&bd->buf, paddr);
  926. bdstatus = (bdstatus&T_W);
  927. if (!(frame_get_info(frame) & NO_CRC))
  928. bdstatus |= T_R | T_I | T_L | T_TC
  929. | frame_get_length(frame);
  930. else
  931. bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
  932. /* if the packet is a ZLP in status phase */
  933. if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
  934. ep->data01 = 0x1;
  935. if (ep->data01) {
  936. pidmask = T_PID_DATA1;
  937. frame->info |= PID_DATA1;
  938. } else {
  939. pidmask = T_PID_DATA0;
  940. frame->info |= PID_DATA0;
  941. }
  942. bdstatus |= T_CNF;
  943. bdstatus |= pidmask;
  944. out_be32((u32 __iomem *)bd, bdstatus);
  945. qe_ep_filltxfifo(ep);
  946. /* enable the TX interrupt */
  947. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  948. qe_ep_toggledata01(ep);
  949. if (bdstatus & T_W)
  950. ep->n_txbd = ep->txbase;
  951. else
  952. ep->n_txbd++;
  953. return 0;
  954. } else {
  955. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  956. dev_vdbg(udc->dev, "The tx bd is not ready!\n");
  957. return -EBUSY;
  958. }
  959. }
  960. /* when a bd was transmitted, the function can
  961. * handle the tx_req, not include ep0 */
  962. static int txcomplete(struct qe_ep *ep, unsigned char restart)
  963. {
  964. if (ep->tx_req != NULL) {
  965. struct qe_req *req = ep->tx_req;
  966. unsigned zlp = 0, last_len = 0;
  967. last_len = min_t(unsigned, req->req.length - ep->sent,
  968. ep->ep.maxpacket);
  969. if (!restart) {
  970. int asent = ep->last;
  971. ep->sent += asent;
  972. ep->last -= asent;
  973. } else {
  974. ep->last = 0;
  975. }
  976. /* zlp needed when req->re.zero is set */
  977. if (req->req.zero) {
  978. if (last_len == 0 ||
  979. (req->req.length % ep->ep.maxpacket) != 0)
  980. zlp = 0;
  981. else
  982. zlp = 1;
  983. } else
  984. zlp = 0;
  985. /* a request already were transmitted completely */
  986. if (((ep->tx_req->req.length - ep->sent) <= 0) && !zlp) {
  987. done(ep, ep->tx_req, 0);
  988. ep->tx_req = NULL;
  989. ep->last = 0;
  990. ep->sent = 0;
  991. }
  992. }
  993. /* we should gain a new tx_req fot this endpoint */
  994. if (ep->tx_req == NULL) {
  995. if (!list_empty(&ep->queue)) {
  996. ep->tx_req = list_entry(ep->queue.next, struct qe_req,
  997. queue);
  998. ep->last = 0;
  999. ep->sent = 0;
  1000. }
  1001. }
  1002. return 0;
  1003. }
  1004. /* give a frame and a tx_req, send some data */
  1005. static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
  1006. {
  1007. unsigned int size;
  1008. u8 *buf;
  1009. qe_frame_clean(frame);
  1010. size = min_t(u32, (ep->tx_req->req.length - ep->sent),
  1011. ep->ep.maxpacket);
  1012. buf = (u8 *)ep->tx_req->req.buf + ep->sent;
  1013. if (buf && size) {
  1014. ep->last = size;
  1015. ep->tx_req->req.actual += size;
  1016. frame_set_data(frame, buf);
  1017. frame_set_length(frame, size);
  1018. frame_set_status(frame, FRAME_OK);
  1019. frame_set_info(frame, 0);
  1020. return qe_ep_tx(ep, frame);
  1021. }
  1022. return -EIO;
  1023. }
  1024. /* give a frame struct,send a ZLP */
  1025. static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
  1026. {
  1027. struct qe_udc *udc = ep->udc;
  1028. if (frame == NULL)
  1029. return -ENODEV;
  1030. qe_frame_clean(frame);
  1031. frame_set_data(frame, (u8 *)udc->nullbuf);
  1032. frame_set_length(frame, 2);
  1033. frame_set_status(frame, FRAME_OK);
  1034. frame_set_info(frame, (ZLP | NO_CRC | infor));
  1035. return qe_ep_tx(ep, frame);
  1036. }
  1037. static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
  1038. {
  1039. struct qe_req *req = ep->tx_req;
  1040. int reval;
  1041. if (req == NULL)
  1042. return -ENODEV;
  1043. if ((req->req.length - ep->sent) > 0)
  1044. reval = qe_usb_senddata(ep, frame);
  1045. else
  1046. reval = sendnulldata(ep, frame, 0);
  1047. return reval;
  1048. }
  1049. /* if direction is DIR_IN, the status is Device->Host
  1050. * if direction is DIR_OUT, the status transaction is Device<-Host
  1051. * in status phase, udc create a request and gain status */
  1052. static int ep0_prime_status(struct qe_udc *udc, int direction)
  1053. {
  1054. struct qe_ep *ep = &udc->eps[0];
  1055. if (direction == USB_DIR_IN) {
  1056. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1057. udc->ep0_dir = USB_DIR_IN;
  1058. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1059. } else {
  1060. udc->ep0_dir = USB_DIR_OUT;
  1061. udc->ep0_state = WAIT_FOR_OUT_STATUS;
  1062. }
  1063. return 0;
  1064. }
  1065. /* a request complete in ep0, whether gadget request or udc request */
  1066. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
  1067. {
  1068. struct qe_ep *ep = &udc->eps[0];
  1069. /* because usb and ep's status already been set in ch9setaddress() */
  1070. switch (udc->ep0_state) {
  1071. case DATA_STATE_XMIT:
  1072. done(ep, req, 0);
  1073. /* receive status phase */
  1074. if (ep0_prime_status(udc, USB_DIR_OUT))
  1075. qe_ep0_stall(udc);
  1076. break;
  1077. case DATA_STATE_NEED_ZLP:
  1078. done(ep, req, 0);
  1079. udc->ep0_state = WAIT_FOR_SETUP;
  1080. break;
  1081. case DATA_STATE_RECV:
  1082. done(ep, req, 0);
  1083. /* send status phase */
  1084. if (ep0_prime_status(udc, USB_DIR_IN))
  1085. qe_ep0_stall(udc);
  1086. break;
  1087. case WAIT_FOR_OUT_STATUS:
  1088. done(ep, req, 0);
  1089. udc->ep0_state = WAIT_FOR_SETUP;
  1090. break;
  1091. case WAIT_FOR_SETUP:
  1092. dev_vdbg(udc->dev, "Unexpected interrupt\n");
  1093. break;
  1094. default:
  1095. qe_ep0_stall(udc);
  1096. break;
  1097. }
  1098. }
  1099. static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
  1100. {
  1101. struct qe_req *tx_req = NULL;
  1102. struct qe_frame *frame = ep->txframe;
  1103. if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
  1104. if (!restart)
  1105. ep->udc->ep0_state = WAIT_FOR_SETUP;
  1106. else
  1107. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1108. return 0;
  1109. }
  1110. tx_req = ep->tx_req;
  1111. if (tx_req != NULL) {
  1112. if (!restart) {
  1113. int asent = ep->last;
  1114. ep->sent += asent;
  1115. ep->last -= asent;
  1116. } else {
  1117. ep->last = 0;
  1118. }
  1119. /* a request already were transmitted completely */
  1120. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  1121. ep->tx_req->req.actual = (unsigned int)ep->sent;
  1122. ep0_req_complete(ep->udc, ep->tx_req);
  1123. ep->tx_req = NULL;
  1124. ep->last = 0;
  1125. ep->sent = 0;
  1126. }
  1127. } else {
  1128. dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
  1129. }
  1130. return 0;
  1131. }
  1132. static int ep0_txframe_handle(struct qe_ep *ep)
  1133. {
  1134. /* if have error, transmit again */
  1135. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1136. qe_ep_flushtxfifo(ep);
  1137. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1138. if (frame_get_info(ep->txframe) & PID_DATA0)
  1139. ep->data01 = 0;
  1140. else
  1141. ep->data01 = 1;
  1142. ep0_txcomplete(ep, 1);
  1143. } else
  1144. ep0_txcomplete(ep, 0);
  1145. frame_create_tx(ep, ep->txframe);
  1146. return 0;
  1147. }
  1148. static int qe_ep0_txconf(struct qe_ep *ep)
  1149. {
  1150. struct qe_bd __iomem *bd;
  1151. struct qe_frame *pframe;
  1152. u32 bdstatus;
  1153. bd = ep->c_txbd;
  1154. bdstatus = in_be32((u32 __iomem *)bd);
  1155. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1156. pframe = ep->txframe;
  1157. /* clear and recycle the BD */
  1158. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1159. out_be32(&bd->buf, 0);
  1160. if (bdstatus & T_W)
  1161. ep->c_txbd = ep->txbase;
  1162. else
  1163. ep->c_txbd++;
  1164. if (ep->c_txbd == ep->n_txbd) {
  1165. if (bdstatus & DEVICE_T_ERROR) {
  1166. frame_set_status(pframe, FRAME_ERROR);
  1167. if (bdstatus & T_TO)
  1168. pframe->status |= TX_ER_TIMEOUT;
  1169. if (bdstatus & T_UN)
  1170. pframe->status |= TX_ER_UNDERUN;
  1171. }
  1172. ep0_txframe_handle(ep);
  1173. }
  1174. bd = ep->c_txbd;
  1175. bdstatus = in_be32((u32 __iomem *)bd);
  1176. }
  1177. return 0;
  1178. }
  1179. static int ep_txframe_handle(struct qe_ep *ep)
  1180. {
  1181. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1182. qe_ep_flushtxfifo(ep);
  1183. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1184. if (frame_get_info(ep->txframe) & PID_DATA0)
  1185. ep->data01 = 0;
  1186. else
  1187. ep->data01 = 1;
  1188. txcomplete(ep, 1);
  1189. } else
  1190. txcomplete(ep, 0);
  1191. frame_create_tx(ep, ep->txframe); /* send the data */
  1192. return 0;
  1193. }
  1194. /* confirm the already trainsmited bd */
  1195. static int qe_ep_txconf(struct qe_ep *ep)
  1196. {
  1197. struct qe_bd __iomem *bd;
  1198. struct qe_frame *pframe = NULL;
  1199. u32 bdstatus;
  1200. unsigned char breakonrxinterrupt = 0;
  1201. bd = ep->c_txbd;
  1202. bdstatus = in_be32((u32 __iomem *)bd);
  1203. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1204. pframe = ep->txframe;
  1205. if (bdstatus & DEVICE_T_ERROR) {
  1206. frame_set_status(pframe, FRAME_ERROR);
  1207. if (bdstatus & T_TO)
  1208. pframe->status |= TX_ER_TIMEOUT;
  1209. if (bdstatus & T_UN)
  1210. pframe->status |= TX_ER_UNDERUN;
  1211. }
  1212. /* clear and recycle the BD */
  1213. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1214. out_be32(&bd->buf, 0);
  1215. if (bdstatus & T_W)
  1216. ep->c_txbd = ep->txbase;
  1217. else
  1218. ep->c_txbd++;
  1219. /* handle the tx frame */
  1220. ep_txframe_handle(ep);
  1221. bd = ep->c_txbd;
  1222. bdstatus = in_be32((u32 __iomem *)bd);
  1223. }
  1224. if (breakonrxinterrupt)
  1225. return -EIO;
  1226. else
  1227. return 0;
  1228. }
  1229. /* Add a request in queue, and try to transmit a packet */
  1230. static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
  1231. {
  1232. int reval = 0;
  1233. if (ep->tx_req == NULL) {
  1234. ep->sent = 0;
  1235. ep->last = 0;
  1236. txcomplete(ep, 0); /* can gain a new tx_req */
  1237. reval = frame_create_tx(ep, ep->txframe);
  1238. }
  1239. return reval;
  1240. }
  1241. /* Maybe this is a good ideal */
  1242. static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
  1243. {
  1244. struct qe_udc *udc = ep->udc;
  1245. struct qe_frame *pframe = NULL;
  1246. struct qe_bd __iomem *bd;
  1247. u32 bdstatus, length;
  1248. u32 vaddr, fsize;
  1249. u8 *cp;
  1250. u8 finish_req = 0;
  1251. u8 framepid;
  1252. if (list_empty(&ep->queue)) {
  1253. dev_vdbg(udc->dev, "the req already finish!\n");
  1254. return 0;
  1255. }
  1256. pframe = ep->rxframe;
  1257. bd = ep->n_rxbd;
  1258. bdstatus = in_be32((u32 __iomem *)bd);
  1259. length = bdstatus & BD_LENGTH_MASK;
  1260. while (!(bdstatus & R_E) && length) {
  1261. if (finish_req)
  1262. break;
  1263. if ((bdstatus & R_F) && (bdstatus & R_L)
  1264. && !(bdstatus & R_ERROR)) {
  1265. qe_frame_clean(pframe);
  1266. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  1267. frame_set_data(pframe, (u8 *)vaddr);
  1268. frame_set_length(pframe, (length - USB_CRC_SIZE));
  1269. frame_set_status(pframe, FRAME_OK);
  1270. switch (bdstatus & R_PID) {
  1271. case R_PID_DATA1:
  1272. frame_set_info(pframe, PID_DATA1); break;
  1273. default:
  1274. frame_set_info(pframe, PID_DATA0); break;
  1275. }
  1276. /* handle the rx frame */
  1277. if (frame_get_info(pframe) & PID_DATA1)
  1278. framepid = 0x1;
  1279. else
  1280. framepid = 0;
  1281. if (framepid != ep->data01) {
  1282. dev_vdbg(udc->dev, "the data01 error!\n");
  1283. } else {
  1284. fsize = frame_get_length(pframe);
  1285. cp = (u8 *)(req->req.buf) + req->req.actual;
  1286. if (cp) {
  1287. memcpy(cp, pframe->data, fsize);
  1288. req->req.actual += fsize;
  1289. if ((fsize < ep->ep.maxpacket)
  1290. || (req->req.actual >=
  1291. req->req.length)) {
  1292. finish_req = 1;
  1293. done(ep, req, 0);
  1294. if (list_empty(&ep->queue))
  1295. qe_eprx_nack(ep);
  1296. }
  1297. }
  1298. qe_ep_toggledata01(ep);
  1299. }
  1300. } else {
  1301. dev_err(udc->dev, "The receive frame with error!\n");
  1302. }
  1303. /* note: don't clear the rxbd's buffer address *
  1304. * only Clear the length */
  1305. out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
  1306. ep->has_data--;
  1307. /* Get next BD */
  1308. if (bdstatus & R_W)
  1309. bd = ep->rxbase;
  1310. else
  1311. bd++;
  1312. bdstatus = in_be32((u32 __iomem *)bd);
  1313. length = bdstatus & BD_LENGTH_MASK;
  1314. }
  1315. ep->n_rxbd = bd;
  1316. ep_recycle_rxbds(ep);
  1317. return 0;
  1318. }
  1319. /* only add the request in queue */
  1320. static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
  1321. {
  1322. if (ep->state == EP_STATE_NACK) {
  1323. if (ep->has_data <= 0) {
  1324. /* Enable rx and unmask rx interrupt */
  1325. qe_eprx_normal(ep);
  1326. } else {
  1327. /* Copy the exist BD data */
  1328. ep_req_rx(ep, req);
  1329. }
  1330. }
  1331. return 0;
  1332. }
  1333. /********************************************************************
  1334. Internal Used Function End
  1335. ********************************************************************/
  1336. /*-----------------------------------------------------------------------
  1337. Endpoint Management Functions For Gadget
  1338. -----------------------------------------------------------------------*/
  1339. static int qe_ep_enable(struct usb_ep *_ep,
  1340. const struct usb_endpoint_descriptor *desc)
  1341. {
  1342. struct qe_udc *udc;
  1343. struct qe_ep *ep;
  1344. int retval = 0;
  1345. unsigned char epnum;
  1346. ep = container_of(_ep, struct qe_ep, ep);
  1347. /* catch various bogus parameters */
  1348. if (!_ep || !desc || _ep->name == ep_name[0] ||
  1349. (desc->bDescriptorType != USB_DT_ENDPOINT))
  1350. return -EINVAL;
  1351. udc = ep->udc;
  1352. if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
  1353. return -ESHUTDOWN;
  1354. epnum = (u8)desc->bEndpointAddress & 0xF;
  1355. retval = qe_ep_init(udc, epnum, desc);
  1356. if (retval != 0) {
  1357. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1358. dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
  1359. return -EINVAL;
  1360. }
  1361. dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
  1362. return 0;
  1363. }
  1364. static int qe_ep_disable(struct usb_ep *_ep)
  1365. {
  1366. struct qe_udc *udc;
  1367. struct qe_ep *ep;
  1368. unsigned long flags;
  1369. unsigned int size;
  1370. ep = container_of(_ep, struct qe_ep, ep);
  1371. udc = ep->udc;
  1372. if (!_ep || !ep->ep.desc) {
  1373. dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
  1374. return -EINVAL;
  1375. }
  1376. spin_lock_irqsave(&udc->lock, flags);
  1377. /* Nuke all pending requests (does flush) */
  1378. nuke(ep, -ESHUTDOWN);
  1379. ep->ep.desc = NULL;
  1380. ep->stopped = 1;
  1381. ep->tx_req = NULL;
  1382. qe_ep_reset(udc, ep->epnum);
  1383. spin_unlock_irqrestore(&udc->lock, flags);
  1384. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1385. if (ep->dir == USB_DIR_OUT)
  1386. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1387. (USB_BDRING_LEN_RX + 1);
  1388. else
  1389. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1390. (USB_BDRING_LEN + 1);
  1391. if (ep->dir != USB_DIR_IN) {
  1392. kfree(ep->rxframe);
  1393. if (ep->rxbufmap) {
  1394. dma_unmap_single(udc->gadget.dev.parent,
  1395. ep->rxbuf_d, size,
  1396. DMA_FROM_DEVICE);
  1397. ep->rxbuf_d = DMA_ADDR_INVALID;
  1398. } else {
  1399. dma_sync_single_for_cpu(
  1400. udc->gadget.dev.parent,
  1401. ep->rxbuf_d, size,
  1402. DMA_FROM_DEVICE);
  1403. }
  1404. kfree(ep->rxbuffer);
  1405. }
  1406. if (ep->dir != USB_DIR_OUT)
  1407. kfree(ep->txframe);
  1408. dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
  1409. return 0;
  1410. }
  1411. static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  1412. {
  1413. struct qe_req *req;
  1414. req = kzalloc(sizeof(*req), gfp_flags);
  1415. if (!req)
  1416. return NULL;
  1417. req->req.dma = DMA_ADDR_INVALID;
  1418. INIT_LIST_HEAD(&req->queue);
  1419. return &req->req;
  1420. }
  1421. static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
  1422. {
  1423. struct qe_req *req;
  1424. req = container_of(_req, struct qe_req, req);
  1425. if (_req)
  1426. kfree(req);
  1427. }
  1428. static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
  1429. {
  1430. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1431. struct qe_req *req = container_of(_req, struct qe_req, req);
  1432. struct qe_udc *udc;
  1433. int reval;
  1434. udc = ep->udc;
  1435. /* catch various bogus parameters */
  1436. if (!_req || !req->req.complete || !req->req.buf
  1437. || !list_empty(&req->queue)) {
  1438. dev_dbg(udc->dev, "bad params\n");
  1439. return -EINVAL;
  1440. }
  1441. if (!_ep || (!ep->ep.desc && ep_index(ep))) {
  1442. dev_dbg(udc->dev, "bad ep\n");
  1443. return -EINVAL;
  1444. }
  1445. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
  1446. return -ESHUTDOWN;
  1447. req->ep = ep;
  1448. /* map virtual address to hardware */
  1449. if (req->req.dma == DMA_ADDR_INVALID) {
  1450. req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
  1451. req->req.buf,
  1452. req->req.length,
  1453. ep_is_in(ep)
  1454. ? DMA_TO_DEVICE :
  1455. DMA_FROM_DEVICE);
  1456. req->mapped = 1;
  1457. } else {
  1458. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  1459. req->req.dma, req->req.length,
  1460. ep_is_in(ep)
  1461. ? DMA_TO_DEVICE :
  1462. DMA_FROM_DEVICE);
  1463. req->mapped = 0;
  1464. }
  1465. req->req.status = -EINPROGRESS;
  1466. req->req.actual = 0;
  1467. list_add_tail(&req->queue, &ep->queue);
  1468. dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
  1469. ep->name, req->req.length);
  1470. /* push the request to device */
  1471. if (ep_is_in(ep))
  1472. reval = ep_req_send(ep, req);
  1473. /* EP0 */
  1474. if (ep_index(ep) == 0 && req->req.length > 0) {
  1475. if (ep_is_in(ep))
  1476. udc->ep0_state = DATA_STATE_XMIT;
  1477. else
  1478. udc->ep0_state = DATA_STATE_RECV;
  1479. }
  1480. if (ep->dir == USB_DIR_OUT)
  1481. reval = ep_req_receive(ep, req);
  1482. return 0;
  1483. }
  1484. /* queues (submits) an I/O request to an endpoint */
  1485. static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  1486. gfp_t gfp_flags)
  1487. {
  1488. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1489. struct qe_udc *udc = ep->udc;
  1490. unsigned long flags;
  1491. int ret;
  1492. spin_lock_irqsave(&udc->lock, flags);
  1493. ret = __qe_ep_queue(_ep, _req);
  1494. spin_unlock_irqrestore(&udc->lock, flags);
  1495. return ret;
  1496. }
  1497. /* dequeues (cancels, unlinks) an I/O request from an endpoint */
  1498. static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1499. {
  1500. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1501. struct qe_req *req;
  1502. unsigned long flags;
  1503. if (!_ep || !_req)
  1504. return -EINVAL;
  1505. spin_lock_irqsave(&ep->udc->lock, flags);
  1506. /* make sure it's actually queued on this endpoint */
  1507. list_for_each_entry(req, &ep->queue, queue) {
  1508. if (&req->req == _req)
  1509. break;
  1510. }
  1511. if (&req->req != _req) {
  1512. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1513. return -EINVAL;
  1514. }
  1515. done(ep, req, -ECONNRESET);
  1516. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1517. return 0;
  1518. }
  1519. /*-----------------------------------------------------------------
  1520. * modify the endpoint halt feature
  1521. * @ep: the non-isochronous endpoint being stalled
  1522. * @value: 1--set halt 0--clear halt
  1523. * Returns zero, or a negative error code.
  1524. *----------------------------------------------------------------*/
  1525. static int qe_ep_set_halt(struct usb_ep *_ep, int value)
  1526. {
  1527. struct qe_ep *ep;
  1528. unsigned long flags;
  1529. int status = -EOPNOTSUPP;
  1530. struct qe_udc *udc;
  1531. ep = container_of(_ep, struct qe_ep, ep);
  1532. if (!_ep || !ep->ep.desc) {
  1533. status = -EINVAL;
  1534. goto out;
  1535. }
  1536. udc = ep->udc;
  1537. /* Attempt to halt IN ep will fail if any transfer requests
  1538. * are still queue */
  1539. if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
  1540. status = -EAGAIN;
  1541. goto out;
  1542. }
  1543. status = 0;
  1544. spin_lock_irqsave(&ep->udc->lock, flags);
  1545. qe_eptx_stall_change(ep, value);
  1546. qe_eprx_stall_change(ep, value);
  1547. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1548. if (ep->epnum == 0) {
  1549. udc->ep0_state = WAIT_FOR_SETUP;
  1550. udc->ep0_dir = 0;
  1551. }
  1552. /* set data toggle to DATA0 on clear halt */
  1553. if (value == 0)
  1554. ep->data01 = 0;
  1555. out:
  1556. dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
  1557. value ? "set" : "clear", status);
  1558. return status;
  1559. }
  1560. static struct usb_ep_ops qe_ep_ops = {
  1561. .enable = qe_ep_enable,
  1562. .disable = qe_ep_disable,
  1563. .alloc_request = qe_alloc_request,
  1564. .free_request = qe_free_request,
  1565. .queue = qe_ep_queue,
  1566. .dequeue = qe_ep_dequeue,
  1567. .set_halt = qe_ep_set_halt,
  1568. };
  1569. /*------------------------------------------------------------------------
  1570. Gadget Driver Layer Operations
  1571. ------------------------------------------------------------------------*/
  1572. /* Get the current frame number */
  1573. static int qe_get_frame(struct usb_gadget *gadget)
  1574. {
  1575. struct qe_udc *udc = container_of(gadget, struct qe_udc, gadget);
  1576. u16 tmp;
  1577. tmp = in_be16(&udc->usb_param->frame_n);
  1578. if (tmp & 0x8000)
  1579. return tmp & 0x07ff;
  1580. return -EINVAL;
  1581. }
  1582. static int fsl_qe_start(struct usb_gadget *gadget,
  1583. struct usb_gadget_driver *driver);
  1584. static int fsl_qe_stop(struct usb_gadget *gadget);
  1585. /* defined in usb_gadget.h */
  1586. static const struct usb_gadget_ops qe_gadget_ops = {
  1587. .get_frame = qe_get_frame,
  1588. .udc_start = fsl_qe_start,
  1589. .udc_stop = fsl_qe_stop,
  1590. };
  1591. /*-------------------------------------------------------------------------
  1592. USB ep0 Setup process in BUS Enumeration
  1593. -------------------------------------------------------------------------*/
  1594. static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
  1595. {
  1596. struct qe_ep *ep = &udc->eps[pipe];
  1597. nuke(ep, -ECONNRESET);
  1598. ep->tx_req = NULL;
  1599. return 0;
  1600. }
  1601. static int reset_queues(struct qe_udc *udc)
  1602. {
  1603. u8 pipe;
  1604. for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
  1605. udc_reset_ep_queue(udc, pipe);
  1606. /* report disconnect; the driver is already quiesced */
  1607. spin_unlock(&udc->lock);
  1608. usb_gadget_udc_reset(&udc->gadget, udc->driver);
  1609. spin_lock(&udc->lock);
  1610. return 0;
  1611. }
  1612. static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
  1613. u16 length)
  1614. {
  1615. /* Save the new address to device struct */
  1616. udc->device_address = (u8) value;
  1617. /* Update usb state */
  1618. udc->usb_state = USB_STATE_ADDRESS;
  1619. /* Status phase , send a ZLP */
  1620. if (ep0_prime_status(udc, USB_DIR_IN))
  1621. qe_ep0_stall(udc);
  1622. }
  1623. static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
  1624. {
  1625. struct qe_req *req = container_of(_req, struct qe_req, req);
  1626. req->req.buf = NULL;
  1627. kfree(req);
  1628. }
  1629. static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
  1630. u16 index, u16 length)
  1631. {
  1632. u16 usb_status = 0;
  1633. struct qe_req *req;
  1634. struct qe_ep *ep;
  1635. int status = 0;
  1636. ep = &udc->eps[0];
  1637. if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  1638. /* Get device status */
  1639. usb_status = 1 << USB_DEVICE_SELF_POWERED;
  1640. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
  1641. /* Get interface status */
  1642. /* We don't have interface information in udc driver */
  1643. usb_status = 0;
  1644. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
  1645. /* Get endpoint status */
  1646. int pipe = index & USB_ENDPOINT_NUMBER_MASK;
  1647. struct qe_ep *target_ep = &udc->eps[pipe];
  1648. u16 usep;
  1649. /* stall if endpoint doesn't exist */
  1650. if (!target_ep->ep.desc)
  1651. goto stall;
  1652. usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
  1653. if (index & USB_DIR_IN) {
  1654. if (target_ep->dir != USB_DIR_IN)
  1655. goto stall;
  1656. if ((usep & USB_THS_MASK) == USB_THS_STALL)
  1657. usb_status = 1 << USB_ENDPOINT_HALT;
  1658. } else {
  1659. if (target_ep->dir != USB_DIR_OUT)
  1660. goto stall;
  1661. if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
  1662. usb_status = 1 << USB_ENDPOINT_HALT;
  1663. }
  1664. }
  1665. req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
  1666. struct qe_req, req);
  1667. req->req.length = 2;
  1668. req->req.buf = udc->statusbuf;
  1669. *(u16 *)req->req.buf = cpu_to_le16(usb_status);
  1670. req->req.status = -EINPROGRESS;
  1671. req->req.actual = 0;
  1672. req->req.complete = ownercomplete;
  1673. udc->ep0_dir = USB_DIR_IN;
  1674. /* data phase */
  1675. status = __qe_ep_queue(&ep->ep, &req->req);
  1676. if (status == 0)
  1677. return;
  1678. stall:
  1679. dev_err(udc->dev, "Can't respond to getstatus request \n");
  1680. qe_ep0_stall(udc);
  1681. }
  1682. /* only handle the setup request, suppose the device in normal status */
  1683. static void setup_received_handle(struct qe_udc *udc,
  1684. struct usb_ctrlrequest *setup)
  1685. {
  1686. /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
  1687. u16 wValue = le16_to_cpu(setup->wValue);
  1688. u16 wIndex = le16_to_cpu(setup->wIndex);
  1689. u16 wLength = le16_to_cpu(setup->wLength);
  1690. /* clear the previous request in the ep0 */
  1691. udc_reset_ep_queue(udc, 0);
  1692. if (setup->bRequestType & USB_DIR_IN)
  1693. udc->ep0_dir = USB_DIR_IN;
  1694. else
  1695. udc->ep0_dir = USB_DIR_OUT;
  1696. switch (setup->bRequest) {
  1697. case USB_REQ_GET_STATUS:
  1698. /* Data+Status phase form udc */
  1699. if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
  1700. != (USB_DIR_IN | USB_TYPE_STANDARD))
  1701. break;
  1702. ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
  1703. wLength);
  1704. return;
  1705. case USB_REQ_SET_ADDRESS:
  1706. /* Status phase from udc */
  1707. if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
  1708. USB_RECIP_DEVICE))
  1709. break;
  1710. ch9setaddress(udc, wValue, wIndex, wLength);
  1711. return;
  1712. case USB_REQ_CLEAR_FEATURE:
  1713. case USB_REQ_SET_FEATURE:
  1714. /* Requests with no data phase, status phase from udc */
  1715. if ((setup->bRequestType & USB_TYPE_MASK)
  1716. != USB_TYPE_STANDARD)
  1717. break;
  1718. if ((setup->bRequestType & USB_RECIP_MASK)
  1719. == USB_RECIP_ENDPOINT) {
  1720. int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
  1721. struct qe_ep *ep;
  1722. if (wValue != 0 || wLength != 0
  1723. || pipe >= USB_MAX_ENDPOINTS)
  1724. break;
  1725. ep = &udc->eps[pipe];
  1726. spin_unlock(&udc->lock);
  1727. qe_ep_set_halt(&ep->ep,
  1728. (setup->bRequest == USB_REQ_SET_FEATURE)
  1729. ? 1 : 0);
  1730. spin_lock(&udc->lock);
  1731. }
  1732. ep0_prime_status(udc, USB_DIR_IN);
  1733. return;
  1734. default:
  1735. break;
  1736. }
  1737. if (wLength) {
  1738. /* Data phase from gadget, status phase from udc */
  1739. if (setup->bRequestType & USB_DIR_IN) {
  1740. udc->ep0_state = DATA_STATE_XMIT;
  1741. udc->ep0_dir = USB_DIR_IN;
  1742. } else {
  1743. udc->ep0_state = DATA_STATE_RECV;
  1744. udc->ep0_dir = USB_DIR_OUT;
  1745. }
  1746. spin_unlock(&udc->lock);
  1747. if (udc->driver->setup(&udc->gadget,
  1748. &udc->local_setup_buff) < 0)
  1749. qe_ep0_stall(udc);
  1750. spin_lock(&udc->lock);
  1751. } else {
  1752. /* No data phase, IN status from gadget */
  1753. udc->ep0_dir = USB_DIR_IN;
  1754. spin_unlock(&udc->lock);
  1755. if (udc->driver->setup(&udc->gadget,
  1756. &udc->local_setup_buff) < 0)
  1757. qe_ep0_stall(udc);
  1758. spin_lock(&udc->lock);
  1759. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1760. }
  1761. }
  1762. /*-------------------------------------------------------------------------
  1763. USB Interrupt handlers
  1764. -------------------------------------------------------------------------*/
  1765. static void suspend_irq(struct qe_udc *udc)
  1766. {
  1767. udc->resume_state = udc->usb_state;
  1768. udc->usb_state = USB_STATE_SUSPENDED;
  1769. /* report suspend to the driver ,serial.c not support this*/
  1770. if (udc->driver->suspend)
  1771. udc->driver->suspend(&udc->gadget);
  1772. }
  1773. static void resume_irq(struct qe_udc *udc)
  1774. {
  1775. udc->usb_state = udc->resume_state;
  1776. udc->resume_state = 0;
  1777. /* report resume to the driver , serial.c not support this*/
  1778. if (udc->driver->resume)
  1779. udc->driver->resume(&udc->gadget);
  1780. }
  1781. static void idle_irq(struct qe_udc *udc)
  1782. {
  1783. u8 usbs;
  1784. usbs = in_8(&udc->usb_regs->usb_usbs);
  1785. if (usbs & USB_IDLE_STATUS_MASK) {
  1786. if ((udc->usb_state) != USB_STATE_SUSPENDED)
  1787. suspend_irq(udc);
  1788. } else {
  1789. if (udc->usb_state == USB_STATE_SUSPENDED)
  1790. resume_irq(udc);
  1791. }
  1792. }
  1793. static int reset_irq(struct qe_udc *udc)
  1794. {
  1795. unsigned char i;
  1796. if (udc->usb_state == USB_STATE_DEFAULT)
  1797. return 0;
  1798. qe_usb_disable(udc);
  1799. out_8(&udc->usb_regs->usb_usadr, 0);
  1800. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1801. if (udc->eps[i].init)
  1802. qe_ep_reset(udc, i);
  1803. }
  1804. reset_queues(udc);
  1805. udc->usb_state = USB_STATE_DEFAULT;
  1806. udc->ep0_state = WAIT_FOR_SETUP;
  1807. udc->ep0_dir = USB_DIR_OUT;
  1808. qe_usb_enable(udc);
  1809. return 0;
  1810. }
  1811. static int bsy_irq(struct qe_udc *udc)
  1812. {
  1813. return 0;
  1814. }
  1815. static int txe_irq(struct qe_udc *udc)
  1816. {
  1817. return 0;
  1818. }
  1819. /* ep0 tx interrupt also in here */
  1820. static int tx_irq(struct qe_udc *udc)
  1821. {
  1822. struct qe_ep *ep;
  1823. struct qe_bd __iomem *bd;
  1824. int i, res = 0;
  1825. if ((udc->usb_state == USB_STATE_ADDRESS)
  1826. && (in_8(&udc->usb_regs->usb_usadr) == 0))
  1827. out_8(&udc->usb_regs->usb_usadr, udc->device_address);
  1828. for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
  1829. ep = &udc->eps[i];
  1830. if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
  1831. bd = ep->c_txbd;
  1832. if (!(in_be32((u32 __iomem *)bd) & T_R)
  1833. && (in_be32(&bd->buf))) {
  1834. /* confirm the transmitted bd */
  1835. if (ep->epnum == 0)
  1836. res = qe_ep0_txconf(ep);
  1837. else
  1838. res = qe_ep_txconf(ep);
  1839. }
  1840. }
  1841. }
  1842. return res;
  1843. }
  1844. /* setup packect's rx is handle in the function too */
  1845. static void rx_irq(struct qe_udc *udc)
  1846. {
  1847. struct qe_ep *ep;
  1848. struct qe_bd __iomem *bd;
  1849. int i;
  1850. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1851. ep = &udc->eps[i];
  1852. if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
  1853. bd = ep->n_rxbd;
  1854. if (!(in_be32((u32 __iomem *)bd) & R_E)
  1855. && (in_be32(&bd->buf))) {
  1856. if (ep->epnum == 0) {
  1857. qe_ep0_rx(udc);
  1858. } else {
  1859. /*non-setup package receive*/
  1860. qe_ep_rx(ep);
  1861. }
  1862. }
  1863. }
  1864. }
  1865. }
  1866. static irqreturn_t qe_udc_irq(int irq, void *_udc)
  1867. {
  1868. struct qe_udc *udc = (struct qe_udc *)_udc;
  1869. u16 irq_src;
  1870. irqreturn_t status = IRQ_NONE;
  1871. unsigned long flags;
  1872. spin_lock_irqsave(&udc->lock, flags);
  1873. irq_src = in_be16(&udc->usb_regs->usb_usber) &
  1874. in_be16(&udc->usb_regs->usb_usbmr);
  1875. /* Clear notification bits */
  1876. out_be16(&udc->usb_regs->usb_usber, irq_src);
  1877. /* USB Interrupt */
  1878. if (irq_src & USB_E_IDLE_MASK) {
  1879. idle_irq(udc);
  1880. irq_src &= ~USB_E_IDLE_MASK;
  1881. status = IRQ_HANDLED;
  1882. }
  1883. if (irq_src & USB_E_TXB_MASK) {
  1884. tx_irq(udc);
  1885. irq_src &= ~USB_E_TXB_MASK;
  1886. status = IRQ_HANDLED;
  1887. }
  1888. if (irq_src & USB_E_RXB_MASK) {
  1889. rx_irq(udc);
  1890. irq_src &= ~USB_E_RXB_MASK;
  1891. status = IRQ_HANDLED;
  1892. }
  1893. if (irq_src & USB_E_RESET_MASK) {
  1894. reset_irq(udc);
  1895. irq_src &= ~USB_E_RESET_MASK;
  1896. status = IRQ_HANDLED;
  1897. }
  1898. if (irq_src & USB_E_BSY_MASK) {
  1899. bsy_irq(udc);
  1900. irq_src &= ~USB_E_BSY_MASK;
  1901. status = IRQ_HANDLED;
  1902. }
  1903. if (irq_src & USB_E_TXE_MASK) {
  1904. txe_irq(udc);
  1905. irq_src &= ~USB_E_TXE_MASK;
  1906. status = IRQ_HANDLED;
  1907. }
  1908. spin_unlock_irqrestore(&udc->lock, flags);
  1909. return status;
  1910. }
  1911. /*-------------------------------------------------------------------------
  1912. Gadget driver probe and unregister.
  1913. --------------------------------------------------------------------------*/
  1914. static int fsl_qe_start(struct usb_gadget *gadget,
  1915. struct usb_gadget_driver *driver)
  1916. {
  1917. struct qe_udc *udc;
  1918. unsigned long flags;
  1919. udc = container_of(gadget, struct qe_udc, gadget);
  1920. /* lock is needed but whether should use this lock or another */
  1921. spin_lock_irqsave(&udc->lock, flags);
  1922. driver->driver.bus = NULL;
  1923. /* hook up the driver */
  1924. udc->driver = driver;
  1925. udc->gadget.speed = driver->max_speed;
  1926. /* Enable IRQ reg and Set usbcmd reg EN bit */
  1927. qe_usb_enable(udc);
  1928. out_be16(&udc->usb_regs->usb_usber, 0xffff);
  1929. out_be16(&udc->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
  1930. udc->usb_state = USB_STATE_ATTACHED;
  1931. udc->ep0_state = WAIT_FOR_SETUP;
  1932. udc->ep0_dir = USB_DIR_OUT;
  1933. spin_unlock_irqrestore(&udc->lock, flags);
  1934. return 0;
  1935. }
  1936. static int fsl_qe_stop(struct usb_gadget *gadget)
  1937. {
  1938. struct qe_udc *udc;
  1939. struct qe_ep *loop_ep;
  1940. unsigned long flags;
  1941. udc = container_of(gadget, struct qe_udc, gadget);
  1942. /* stop usb controller, disable intr */
  1943. qe_usb_disable(udc);
  1944. /* in fact, no needed */
  1945. udc->usb_state = USB_STATE_ATTACHED;
  1946. udc->ep0_state = WAIT_FOR_SETUP;
  1947. udc->ep0_dir = 0;
  1948. /* stand operation */
  1949. spin_lock_irqsave(&udc->lock, flags);
  1950. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1951. nuke(&udc->eps[0], -ESHUTDOWN);
  1952. list_for_each_entry(loop_ep, &udc->gadget.ep_list, ep.ep_list)
  1953. nuke(loop_ep, -ESHUTDOWN);
  1954. spin_unlock_irqrestore(&udc->lock, flags);
  1955. udc->driver = NULL;
  1956. return 0;
  1957. }
  1958. /* udc structure's alloc and setup, include ep-param alloc */
  1959. static struct qe_udc *qe_udc_config(struct platform_device *ofdev)
  1960. {
  1961. struct qe_udc *udc;
  1962. struct device_node *np = ofdev->dev.of_node;
  1963. unsigned long tmp_addr = 0;
  1964. struct usb_device_para __iomem *usbpram;
  1965. unsigned int i;
  1966. u64 size;
  1967. u32 offset;
  1968. udc = kzalloc(sizeof(*udc), GFP_KERNEL);
  1969. if (!udc)
  1970. goto cleanup;
  1971. udc->dev = &ofdev->dev;
  1972. /* get default address of usb parameter in MURAM from device tree */
  1973. offset = *of_get_address(np, 1, &size, NULL);
  1974. udc->usb_param = cpm_muram_addr(offset);
  1975. memset_io(udc->usb_param, 0, size);
  1976. usbpram = udc->usb_param;
  1977. out_be16(&usbpram->frame_n, 0);
  1978. out_be32(&usbpram->rstate, 0);
  1979. tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
  1980. sizeof(struct usb_ep_para)),
  1981. USB_EP_PARA_ALIGNMENT);
  1982. if (IS_ERR_VALUE(tmp_addr))
  1983. goto cleanup;
  1984. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1985. out_be16(&usbpram->epptr[i], (u16)tmp_addr);
  1986. udc->ep_param[i] = cpm_muram_addr(tmp_addr);
  1987. tmp_addr += 32;
  1988. }
  1989. memset_io(udc->ep_param[0], 0,
  1990. USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
  1991. udc->resume_state = USB_STATE_NOTATTACHED;
  1992. udc->usb_state = USB_STATE_POWERED;
  1993. udc->ep0_dir = 0;
  1994. spin_lock_init(&udc->lock);
  1995. return udc;
  1996. cleanup:
  1997. kfree(udc);
  1998. return NULL;
  1999. }
  2000. /* USB Controller register init */
  2001. static int qe_udc_reg_init(struct qe_udc *udc)
  2002. {
  2003. struct usb_ctlr __iomem *qe_usbregs;
  2004. qe_usbregs = udc->usb_regs;
  2005. /* Spec says that we must enable the USB controller to change mode. */
  2006. out_8(&qe_usbregs->usb_usmod, 0x01);
  2007. /* Mode changed, now disable it, since muram isn't initialized yet. */
  2008. out_8(&qe_usbregs->usb_usmod, 0x00);
  2009. /* Initialize the rest. */
  2010. out_be16(&qe_usbregs->usb_usbmr, 0);
  2011. out_8(&qe_usbregs->usb_uscom, 0);
  2012. out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
  2013. return 0;
  2014. }
  2015. static int qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
  2016. {
  2017. struct qe_ep *ep = &udc->eps[pipe_num];
  2018. ep->udc = udc;
  2019. strcpy(ep->name, ep_name[pipe_num]);
  2020. ep->ep.name = ep_name[pipe_num];
  2021. if (pipe_num == 0) {
  2022. ep->ep.caps.type_control = true;
  2023. } else {
  2024. ep->ep.caps.type_iso = true;
  2025. ep->ep.caps.type_bulk = true;
  2026. ep->ep.caps.type_int = true;
  2027. }
  2028. ep->ep.caps.dir_in = true;
  2029. ep->ep.caps.dir_out = true;
  2030. ep->ep.ops = &qe_ep_ops;
  2031. ep->stopped = 1;
  2032. usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0);
  2033. ep->ep.desc = NULL;
  2034. ep->dir = 0xff;
  2035. ep->epnum = (u8)pipe_num;
  2036. ep->sent = 0;
  2037. ep->last = 0;
  2038. ep->init = 0;
  2039. ep->rxframe = NULL;
  2040. ep->txframe = NULL;
  2041. ep->tx_req = NULL;
  2042. ep->state = EP_STATE_IDLE;
  2043. ep->has_data = 0;
  2044. /* the queue lists any req for this ep */
  2045. INIT_LIST_HEAD(&ep->queue);
  2046. /* gagdet.ep_list used for ep_autoconfig so no ep0*/
  2047. if (pipe_num != 0)
  2048. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  2049. ep->gadget = &udc->gadget;
  2050. return 0;
  2051. }
  2052. /*-----------------------------------------------------------------------
  2053. * UDC device Driver operation functions *
  2054. *----------------------------------------------------------------------*/
  2055. static void qe_udc_release(struct device *dev)
  2056. {
  2057. struct qe_udc *udc = container_of(dev, struct qe_udc, gadget.dev);
  2058. int i;
  2059. complete(udc->done);
  2060. cpm_muram_free(cpm_muram_offset(udc->ep_param[0]));
  2061. for (i = 0; i < USB_MAX_ENDPOINTS; i++)
  2062. udc->ep_param[i] = NULL;
  2063. kfree(udc);
  2064. }
  2065. /* Driver probe functions */
  2066. static const struct of_device_id qe_udc_match[];
  2067. static int qe_udc_probe(struct platform_device *ofdev)
  2068. {
  2069. struct qe_udc *udc;
  2070. const struct of_device_id *match;
  2071. struct device_node *np = ofdev->dev.of_node;
  2072. struct qe_ep *ep;
  2073. unsigned int ret = 0;
  2074. unsigned int i;
  2075. const void *prop;
  2076. match = of_match_device(qe_udc_match, &ofdev->dev);
  2077. if (!match)
  2078. return -EINVAL;
  2079. prop = of_get_property(np, "mode", NULL);
  2080. if (!prop || strcmp(prop, "peripheral"))
  2081. return -ENODEV;
  2082. /* Initialize the udc structure including QH member and other member */
  2083. udc = qe_udc_config(ofdev);
  2084. if (!udc) {
  2085. dev_err(&ofdev->dev, "failed to initialize\n");
  2086. return -ENOMEM;
  2087. }
  2088. udc->soc_type = (unsigned long)match->data;
  2089. udc->usb_regs = of_iomap(np, 0);
  2090. if (!udc->usb_regs) {
  2091. ret = -ENOMEM;
  2092. goto err1;
  2093. }
  2094. /* initialize usb hw reg except for regs for EP,
  2095. * leave usbintr reg untouched*/
  2096. qe_udc_reg_init(udc);
  2097. /* here comes the stand operations for probe
  2098. * set the qe_udc->gadget.xxx */
  2099. udc->gadget.ops = &qe_gadget_ops;
  2100. /* gadget.ep0 is a pointer */
  2101. udc->gadget.ep0 = &udc->eps[0].ep;
  2102. INIT_LIST_HEAD(&udc->gadget.ep_list);
  2103. /* modify in register gadget process */
  2104. udc->gadget.speed = USB_SPEED_UNKNOWN;
  2105. /* name: Identifies the controller hardware type. */
  2106. udc->gadget.name = driver_name;
  2107. udc->gadget.dev.parent = &ofdev->dev;
  2108. /* initialize qe_ep struct */
  2109. for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
  2110. /* because the ep type isn't decide here so
  2111. * qe_ep_init() should be called in ep_enable() */
  2112. /* setup the qe_ep struct and link ep.ep.list
  2113. * into gadget.ep_list */
  2114. qe_ep_config(udc, (unsigned char)i);
  2115. }
  2116. /* ep0 initialization in here */
  2117. ret = qe_ep_init(udc, 0, &qe_ep0_desc);
  2118. if (ret)
  2119. goto err2;
  2120. /* create a buf for ZLP send, need to remain zeroed */
  2121. udc->nullbuf = devm_kzalloc(&ofdev->dev, 256, GFP_KERNEL);
  2122. if (udc->nullbuf == NULL) {
  2123. ret = -ENOMEM;
  2124. goto err3;
  2125. }
  2126. /* buffer for data of get_status request */
  2127. udc->statusbuf = devm_kzalloc(&ofdev->dev, 2, GFP_KERNEL);
  2128. if (udc->statusbuf == NULL) {
  2129. ret = -ENOMEM;
  2130. goto err3;
  2131. }
  2132. udc->nullp = virt_to_phys((void *)udc->nullbuf);
  2133. if (udc->nullp == DMA_ADDR_INVALID) {
  2134. udc->nullp = dma_map_single(
  2135. udc->gadget.dev.parent,
  2136. udc->nullbuf,
  2137. 256,
  2138. DMA_TO_DEVICE);
  2139. udc->nullmap = 1;
  2140. } else {
  2141. dma_sync_single_for_device(udc->gadget.dev.parent,
  2142. udc->nullp, 256,
  2143. DMA_TO_DEVICE);
  2144. }
  2145. tasklet_init(&udc->rx_tasklet, ep_rx_tasklet,
  2146. (unsigned long)udc);
  2147. /* request irq and disable DR */
  2148. udc->usb_irq = irq_of_parse_and_map(np, 0);
  2149. if (!udc->usb_irq) {
  2150. ret = -EINVAL;
  2151. goto err_noirq;
  2152. }
  2153. ret = request_irq(udc->usb_irq, qe_udc_irq, 0,
  2154. driver_name, udc);
  2155. if (ret) {
  2156. dev_err(udc->dev, "cannot request irq %d err %d\n",
  2157. udc->usb_irq, ret);
  2158. goto err4;
  2159. }
  2160. ret = usb_add_gadget_udc_release(&ofdev->dev, &udc->gadget,
  2161. qe_udc_release);
  2162. if (ret)
  2163. goto err5;
  2164. platform_set_drvdata(ofdev, udc);
  2165. dev_info(udc->dev,
  2166. "%s USB controller initialized as device\n",
  2167. (udc->soc_type == PORT_QE) ? "QE" : "CPM");
  2168. return 0;
  2169. err5:
  2170. free_irq(udc->usb_irq, udc);
  2171. err4:
  2172. irq_dispose_mapping(udc->usb_irq);
  2173. err_noirq:
  2174. if (udc->nullmap) {
  2175. dma_unmap_single(udc->gadget.dev.parent,
  2176. udc->nullp, 256,
  2177. DMA_TO_DEVICE);
  2178. udc->nullp = DMA_ADDR_INVALID;
  2179. } else {
  2180. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2181. udc->nullp, 256,
  2182. DMA_TO_DEVICE);
  2183. }
  2184. err3:
  2185. ep = &udc->eps[0];
  2186. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2187. kfree(ep->rxframe);
  2188. kfree(ep->rxbuffer);
  2189. kfree(ep->txframe);
  2190. err2:
  2191. iounmap(udc->usb_regs);
  2192. err1:
  2193. kfree(udc);
  2194. return ret;
  2195. }
  2196. #ifdef CONFIG_PM
  2197. static int qe_udc_suspend(struct platform_device *dev, pm_message_t state)
  2198. {
  2199. return -ENOTSUPP;
  2200. }
  2201. static int qe_udc_resume(struct platform_device *dev)
  2202. {
  2203. return -ENOTSUPP;
  2204. }
  2205. #endif
  2206. static int qe_udc_remove(struct platform_device *ofdev)
  2207. {
  2208. struct qe_udc *udc = platform_get_drvdata(ofdev);
  2209. struct qe_ep *ep;
  2210. unsigned int size;
  2211. DECLARE_COMPLETION_ONSTACK(done);
  2212. usb_del_gadget_udc(&udc->gadget);
  2213. udc->done = &done;
  2214. tasklet_disable(&udc->rx_tasklet);
  2215. if (udc->nullmap) {
  2216. dma_unmap_single(udc->gadget.dev.parent,
  2217. udc->nullp, 256,
  2218. DMA_TO_DEVICE);
  2219. udc->nullp = DMA_ADDR_INVALID;
  2220. } else {
  2221. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2222. udc->nullp, 256,
  2223. DMA_TO_DEVICE);
  2224. }
  2225. ep = &udc->eps[0];
  2226. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2227. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
  2228. kfree(ep->rxframe);
  2229. if (ep->rxbufmap) {
  2230. dma_unmap_single(udc->gadget.dev.parent,
  2231. ep->rxbuf_d, size,
  2232. DMA_FROM_DEVICE);
  2233. ep->rxbuf_d = DMA_ADDR_INVALID;
  2234. } else {
  2235. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2236. ep->rxbuf_d, size,
  2237. DMA_FROM_DEVICE);
  2238. }
  2239. kfree(ep->rxbuffer);
  2240. kfree(ep->txframe);
  2241. free_irq(udc->usb_irq, udc);
  2242. irq_dispose_mapping(udc->usb_irq);
  2243. tasklet_kill(&udc->rx_tasklet);
  2244. iounmap(udc->usb_regs);
  2245. /* wait for release() of gadget.dev to free udc */
  2246. wait_for_completion(&done);
  2247. return 0;
  2248. }
  2249. /*-------------------------------------------------------------------------*/
  2250. static const struct of_device_id qe_udc_match[] = {
  2251. {
  2252. .compatible = "fsl,mpc8323-qe-usb",
  2253. .data = (void *)PORT_QE,
  2254. },
  2255. {
  2256. .compatible = "fsl,mpc8360-qe-usb",
  2257. .data = (void *)PORT_QE,
  2258. },
  2259. {
  2260. .compatible = "fsl,mpc8272-cpm-usb",
  2261. .data = (void *)PORT_CPM,
  2262. },
  2263. {},
  2264. };
  2265. MODULE_DEVICE_TABLE(of, qe_udc_match);
  2266. static struct platform_driver udc_driver = {
  2267. .driver = {
  2268. .name = driver_name,
  2269. .of_match_table = qe_udc_match,
  2270. },
  2271. .probe = qe_udc_probe,
  2272. .remove = qe_udc_remove,
  2273. #ifdef CONFIG_PM
  2274. .suspend = qe_udc_suspend,
  2275. .resume = qe_udc_resume,
  2276. #endif
  2277. };
  2278. module_platform_driver(udc_driver);
  2279. MODULE_DESCRIPTION(DRIVER_DESC);
  2280. MODULE_AUTHOR(DRIVER_AUTHOR);
  2281. MODULE_LICENSE("GPL");