rtc-cmos.c 34 KB

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  1. /*
  2. * RTC class driver for "CMOS RTC": PCs, ACPI, etc
  3. *
  4. * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
  5. * Copyright (C) 2006 David Brownell (convert to new framework)
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  14. * That defined the register interface now provided by all PCs, some
  15. * non-PC systems, and incorporated into ACPI. Modern PC chipsets
  16. * integrate an MC146818 clone in their southbridge, and boards use
  17. * that instead of discrete clones like the DS12887 or M48T86. There
  18. * are also clones that connect using the LPC bus.
  19. *
  20. * That register API is also used directly by various other drivers
  21. * (notably for integrated NVRAM), infrastructure (x86 has code to
  22. * bypass the RTC framework, directly reading the RTC during boot
  23. * and updating minutes/seconds for systems using NTP synch) and
  24. * utilities (like userspace 'hwclock', if no /dev node exists).
  25. *
  26. * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  27. * interrupts disabled, holding the global rtc_lock, to exclude those
  28. * other drivers and utilities on correctly configured systems.
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/kernel.h>
  32. #include <linux/module.h>
  33. #include <linux/init.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/platform_device.h>
  37. #include <linux/log2.h>
  38. #include <linux/pm.h>
  39. #include <linux/of.h>
  40. #include <linux/of_platform.h>
  41. /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  42. #include <linux/mc146818rtc.h>
  43. struct cmos_rtc {
  44. struct rtc_device *rtc;
  45. struct device *dev;
  46. int irq;
  47. struct resource *iomem;
  48. time64_t alarm_expires;
  49. void (*wake_on)(struct device *);
  50. void (*wake_off)(struct device *);
  51. u8 enabled_wake;
  52. u8 suspend_ctrl;
  53. /* newer hardware extends the original register set */
  54. u8 day_alrm;
  55. u8 mon_alrm;
  56. u8 century;
  57. struct rtc_wkalrm saved_wkalrm;
  58. };
  59. /* both platform and pnp busses use negative numbers for invalid irqs */
  60. #define is_valid_irq(n) ((n) > 0)
  61. static const char driver_name[] = "rtc_cmos";
  62. /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  63. * always mask it against the irq enable bits in RTC_CONTROL. Bit values
  64. * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  65. */
  66. #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
  67. static inline int is_intr(u8 rtc_intr)
  68. {
  69. if (!(rtc_intr & RTC_IRQF))
  70. return 0;
  71. return rtc_intr & RTC_IRQMASK;
  72. }
  73. /*----------------------------------------------------------------*/
  74. /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
  75. * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
  76. * used in a broken "legacy replacement" mode. The breakage includes
  77. * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
  78. * other (better) use.
  79. *
  80. * When that broken mode is in use, platform glue provides a partial
  81. * emulation of hardware RTC IRQ facilities using HPET #1. We don't
  82. * want to use HPET for anything except those IRQs though...
  83. */
  84. #ifdef CONFIG_HPET_EMULATE_RTC
  85. #include <asm/hpet.h>
  86. #else
  87. static inline int is_hpet_enabled(void)
  88. {
  89. return 0;
  90. }
  91. static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
  92. {
  93. return 0;
  94. }
  95. static inline int hpet_set_rtc_irq_bit(unsigned long mask)
  96. {
  97. return 0;
  98. }
  99. static inline int
  100. hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
  101. {
  102. return 0;
  103. }
  104. static inline int hpet_set_periodic_freq(unsigned long freq)
  105. {
  106. return 0;
  107. }
  108. static inline int hpet_rtc_dropped_irq(void)
  109. {
  110. return 0;
  111. }
  112. static inline int hpet_rtc_timer_init(void)
  113. {
  114. return 0;
  115. }
  116. extern irq_handler_t hpet_rtc_interrupt;
  117. static inline int hpet_register_irq_handler(irq_handler_t handler)
  118. {
  119. return 0;
  120. }
  121. static inline int hpet_unregister_irq_handler(irq_handler_t handler)
  122. {
  123. return 0;
  124. }
  125. #endif
  126. /*----------------------------------------------------------------*/
  127. #ifdef RTC_PORT
  128. /* Most newer x86 systems have two register banks, the first used
  129. * for RTC and NVRAM and the second only for NVRAM. Caller must
  130. * own rtc_lock ... and we won't worry about access during NMI.
  131. */
  132. #define can_bank2 true
  133. static inline unsigned char cmos_read_bank2(unsigned char addr)
  134. {
  135. outb(addr, RTC_PORT(2));
  136. return inb(RTC_PORT(3));
  137. }
  138. static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
  139. {
  140. outb(addr, RTC_PORT(2));
  141. outb(val, RTC_PORT(3));
  142. }
  143. #else
  144. #define can_bank2 false
  145. static inline unsigned char cmos_read_bank2(unsigned char addr)
  146. {
  147. return 0;
  148. }
  149. static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
  150. {
  151. }
  152. #endif
  153. /*----------------------------------------------------------------*/
  154. static int cmos_read_time(struct device *dev, struct rtc_time *t)
  155. {
  156. /*
  157. * If pm_trace abused the RTC for storage, set the timespec to 0,
  158. * which tells the caller that this RTC value is unusable.
  159. */
  160. if (!pm_trace_rtc_valid())
  161. return -EIO;
  162. /* REVISIT: if the clock has a "century" register, use
  163. * that instead of the heuristic in mc146818_get_time().
  164. * That'll make Y3K compatility (year > 2070) easy!
  165. */
  166. mc146818_get_time(t);
  167. return 0;
  168. }
  169. static int cmos_set_time(struct device *dev, struct rtc_time *t)
  170. {
  171. /* REVISIT: set the "century" register if available
  172. *
  173. * NOTE: this ignores the issue whereby updating the seconds
  174. * takes effect exactly 500ms after we write the register.
  175. * (Also queueing and other delays before we get this far.)
  176. */
  177. return mc146818_set_time(t);
  178. }
  179. static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  180. {
  181. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  182. unsigned char rtc_control;
  183. if (!is_valid_irq(cmos->irq))
  184. return -EIO;
  185. /* Basic alarms only support hour, minute, and seconds fields.
  186. * Some also support day and month, for alarms up to a year in
  187. * the future.
  188. */
  189. spin_lock_irq(&rtc_lock);
  190. t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
  191. t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
  192. t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
  193. if (cmos->day_alrm) {
  194. /* ignore upper bits on readback per ACPI spec */
  195. t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
  196. if (!t->time.tm_mday)
  197. t->time.tm_mday = -1;
  198. if (cmos->mon_alrm) {
  199. t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
  200. if (!t->time.tm_mon)
  201. t->time.tm_mon = -1;
  202. }
  203. }
  204. rtc_control = CMOS_READ(RTC_CONTROL);
  205. spin_unlock_irq(&rtc_lock);
  206. if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  207. if (((unsigned)t->time.tm_sec) < 0x60)
  208. t->time.tm_sec = bcd2bin(t->time.tm_sec);
  209. else
  210. t->time.tm_sec = -1;
  211. if (((unsigned)t->time.tm_min) < 0x60)
  212. t->time.tm_min = bcd2bin(t->time.tm_min);
  213. else
  214. t->time.tm_min = -1;
  215. if (((unsigned)t->time.tm_hour) < 0x24)
  216. t->time.tm_hour = bcd2bin(t->time.tm_hour);
  217. else
  218. t->time.tm_hour = -1;
  219. if (cmos->day_alrm) {
  220. if (((unsigned)t->time.tm_mday) <= 0x31)
  221. t->time.tm_mday = bcd2bin(t->time.tm_mday);
  222. else
  223. t->time.tm_mday = -1;
  224. if (cmos->mon_alrm) {
  225. if (((unsigned)t->time.tm_mon) <= 0x12)
  226. t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
  227. else
  228. t->time.tm_mon = -1;
  229. }
  230. }
  231. }
  232. t->enabled = !!(rtc_control & RTC_AIE);
  233. t->pending = 0;
  234. return 0;
  235. }
  236. static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
  237. {
  238. unsigned char rtc_intr;
  239. /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
  240. * allegedly some older rtcs need that to handle irqs properly
  241. */
  242. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  243. if (is_hpet_enabled())
  244. return;
  245. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  246. if (is_intr(rtc_intr))
  247. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  248. }
  249. static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
  250. {
  251. unsigned char rtc_control;
  252. /* flush any pending IRQ status, notably for update irqs,
  253. * before we enable new IRQs
  254. */
  255. rtc_control = CMOS_READ(RTC_CONTROL);
  256. cmos_checkintr(cmos, rtc_control);
  257. rtc_control |= mask;
  258. CMOS_WRITE(rtc_control, RTC_CONTROL);
  259. hpet_set_rtc_irq_bit(mask);
  260. cmos_checkintr(cmos, rtc_control);
  261. }
  262. static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
  263. {
  264. unsigned char rtc_control;
  265. rtc_control = CMOS_READ(RTC_CONTROL);
  266. rtc_control &= ~mask;
  267. CMOS_WRITE(rtc_control, RTC_CONTROL);
  268. hpet_mask_rtc_irq_bit(mask);
  269. cmos_checkintr(cmos, rtc_control);
  270. }
  271. static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
  272. {
  273. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  274. struct rtc_time now;
  275. cmos_read_time(dev, &now);
  276. if (!cmos->day_alrm) {
  277. time64_t t_max_date;
  278. time64_t t_alrm;
  279. t_max_date = rtc_tm_to_time64(&now);
  280. t_max_date += 24 * 60 * 60 - 1;
  281. t_alrm = rtc_tm_to_time64(&t->time);
  282. if (t_alrm > t_max_date) {
  283. dev_err(dev,
  284. "Alarms can be up to one day in the future\n");
  285. return -EINVAL;
  286. }
  287. } else if (!cmos->mon_alrm) {
  288. struct rtc_time max_date = now;
  289. time64_t t_max_date;
  290. time64_t t_alrm;
  291. int max_mday;
  292. if (max_date.tm_mon == 11) {
  293. max_date.tm_mon = 0;
  294. max_date.tm_year += 1;
  295. } else {
  296. max_date.tm_mon += 1;
  297. }
  298. max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
  299. if (max_date.tm_mday > max_mday)
  300. max_date.tm_mday = max_mday;
  301. t_max_date = rtc_tm_to_time64(&max_date);
  302. t_max_date -= 1;
  303. t_alrm = rtc_tm_to_time64(&t->time);
  304. if (t_alrm > t_max_date) {
  305. dev_err(dev,
  306. "Alarms can be up to one month in the future\n");
  307. return -EINVAL;
  308. }
  309. } else {
  310. struct rtc_time max_date = now;
  311. time64_t t_max_date;
  312. time64_t t_alrm;
  313. int max_mday;
  314. max_date.tm_year += 1;
  315. max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
  316. if (max_date.tm_mday > max_mday)
  317. max_date.tm_mday = max_mday;
  318. t_max_date = rtc_tm_to_time64(&max_date);
  319. t_max_date -= 1;
  320. t_alrm = rtc_tm_to_time64(&t->time);
  321. if (t_alrm > t_max_date) {
  322. dev_err(dev,
  323. "Alarms can be up to one year in the future\n");
  324. return -EINVAL;
  325. }
  326. }
  327. return 0;
  328. }
  329. static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  330. {
  331. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  332. unsigned char mon, mday, hrs, min, sec, rtc_control;
  333. int ret;
  334. if (!is_valid_irq(cmos->irq))
  335. return -EIO;
  336. ret = cmos_validate_alarm(dev, t);
  337. if (ret < 0)
  338. return ret;
  339. mon = t->time.tm_mon + 1;
  340. mday = t->time.tm_mday;
  341. hrs = t->time.tm_hour;
  342. min = t->time.tm_min;
  343. sec = t->time.tm_sec;
  344. rtc_control = CMOS_READ(RTC_CONTROL);
  345. if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  346. /* Writing 0xff means "don't care" or "match all". */
  347. mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
  348. mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
  349. hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
  350. min = (min < 60) ? bin2bcd(min) : 0xff;
  351. sec = (sec < 60) ? bin2bcd(sec) : 0xff;
  352. }
  353. spin_lock_irq(&rtc_lock);
  354. /* next rtc irq must not be from previous alarm setting */
  355. cmos_irq_disable(cmos, RTC_AIE);
  356. /* update alarm */
  357. CMOS_WRITE(hrs, RTC_HOURS_ALARM);
  358. CMOS_WRITE(min, RTC_MINUTES_ALARM);
  359. CMOS_WRITE(sec, RTC_SECONDS_ALARM);
  360. /* the system may support an "enhanced" alarm */
  361. if (cmos->day_alrm) {
  362. CMOS_WRITE(mday, cmos->day_alrm);
  363. if (cmos->mon_alrm)
  364. CMOS_WRITE(mon, cmos->mon_alrm);
  365. }
  366. /* FIXME the HPET alarm glue currently ignores day_alrm
  367. * and mon_alrm ...
  368. */
  369. hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
  370. if (t->enabled)
  371. cmos_irq_enable(cmos, RTC_AIE);
  372. spin_unlock_irq(&rtc_lock);
  373. cmos->alarm_expires = rtc_tm_to_time64(&t->time);
  374. return 0;
  375. }
  376. static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
  377. {
  378. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  379. unsigned long flags;
  380. if (!is_valid_irq(cmos->irq))
  381. return -EINVAL;
  382. spin_lock_irqsave(&rtc_lock, flags);
  383. if (enabled)
  384. cmos_irq_enable(cmos, RTC_AIE);
  385. else
  386. cmos_irq_disable(cmos, RTC_AIE);
  387. spin_unlock_irqrestore(&rtc_lock, flags);
  388. return 0;
  389. }
  390. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  391. static int cmos_procfs(struct device *dev, struct seq_file *seq)
  392. {
  393. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  394. unsigned char rtc_control, valid;
  395. spin_lock_irq(&rtc_lock);
  396. rtc_control = CMOS_READ(RTC_CONTROL);
  397. valid = CMOS_READ(RTC_VALID);
  398. spin_unlock_irq(&rtc_lock);
  399. /* NOTE: at least ICH6 reports battery status using a different
  400. * (non-RTC) bit; and SQWE is ignored on many current systems.
  401. */
  402. seq_printf(seq,
  403. "periodic_IRQ\t: %s\n"
  404. "update_IRQ\t: %s\n"
  405. "HPET_emulated\t: %s\n"
  406. // "square_wave\t: %s\n"
  407. "BCD\t\t: %s\n"
  408. "DST_enable\t: %s\n"
  409. "periodic_freq\t: %d\n"
  410. "batt_status\t: %s\n",
  411. (rtc_control & RTC_PIE) ? "yes" : "no",
  412. (rtc_control & RTC_UIE) ? "yes" : "no",
  413. is_hpet_enabled() ? "yes" : "no",
  414. // (rtc_control & RTC_SQWE) ? "yes" : "no",
  415. (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
  416. (rtc_control & RTC_DST_EN) ? "yes" : "no",
  417. cmos->rtc->irq_freq,
  418. (valid & RTC_VRT) ? "okay" : "dead");
  419. return 0;
  420. }
  421. #else
  422. #define cmos_procfs NULL
  423. #endif
  424. static const struct rtc_class_ops cmos_rtc_ops = {
  425. .read_time = cmos_read_time,
  426. .set_time = cmos_set_time,
  427. .read_alarm = cmos_read_alarm,
  428. .set_alarm = cmos_set_alarm,
  429. .proc = cmos_procfs,
  430. .alarm_irq_enable = cmos_alarm_irq_enable,
  431. };
  432. /*----------------------------------------------------------------*/
  433. /*
  434. * All these chips have at least 64 bytes of address space, shared by
  435. * RTC registers and NVRAM. Most of those bytes of NVRAM are used
  436. * by boot firmware. Modern chips have 128 or 256 bytes.
  437. */
  438. #define NVRAM_OFFSET (RTC_REG_D + 1)
  439. static ssize_t
  440. cmos_nvram_read(struct file *filp, struct kobject *kobj,
  441. struct bin_attribute *attr,
  442. char *buf, loff_t off, size_t count)
  443. {
  444. int retval;
  445. off += NVRAM_OFFSET;
  446. spin_lock_irq(&rtc_lock);
  447. for (retval = 0; count; count--, off++, retval++) {
  448. if (off < 128)
  449. *buf++ = CMOS_READ(off);
  450. else if (can_bank2)
  451. *buf++ = cmos_read_bank2(off);
  452. else
  453. break;
  454. }
  455. spin_unlock_irq(&rtc_lock);
  456. return retval;
  457. }
  458. static ssize_t
  459. cmos_nvram_write(struct file *filp, struct kobject *kobj,
  460. struct bin_attribute *attr,
  461. char *buf, loff_t off, size_t count)
  462. {
  463. struct cmos_rtc *cmos;
  464. int retval;
  465. cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
  466. /* NOTE: on at least PCs and Ataris, the boot firmware uses a
  467. * checksum on part of the NVRAM data. That's currently ignored
  468. * here. If userspace is smart enough to know what fields of
  469. * NVRAM to update, updating checksums is also part of its job.
  470. */
  471. off += NVRAM_OFFSET;
  472. spin_lock_irq(&rtc_lock);
  473. for (retval = 0; count; count--, off++, retval++) {
  474. /* don't trash RTC registers */
  475. if (off == cmos->day_alrm
  476. || off == cmos->mon_alrm
  477. || off == cmos->century)
  478. buf++;
  479. else if (off < 128)
  480. CMOS_WRITE(*buf++, off);
  481. else if (can_bank2)
  482. cmos_write_bank2(*buf++, off);
  483. else
  484. break;
  485. }
  486. spin_unlock_irq(&rtc_lock);
  487. return retval;
  488. }
  489. static struct bin_attribute nvram = {
  490. .attr = {
  491. .name = "nvram",
  492. .mode = S_IRUGO | S_IWUSR,
  493. },
  494. .read = cmos_nvram_read,
  495. .write = cmos_nvram_write,
  496. /* size gets set up later */
  497. };
  498. /*----------------------------------------------------------------*/
  499. static struct cmos_rtc cmos_rtc;
  500. static irqreturn_t cmos_interrupt(int irq, void *p)
  501. {
  502. u8 irqstat;
  503. u8 rtc_control;
  504. spin_lock(&rtc_lock);
  505. /* When the HPET interrupt handler calls us, the interrupt
  506. * status is passed as arg1 instead of the irq number. But
  507. * always clear irq status, even when HPET is in the way.
  508. *
  509. * Note that HPET and RTC are almost certainly out of phase,
  510. * giving different IRQ status ...
  511. */
  512. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  513. rtc_control = CMOS_READ(RTC_CONTROL);
  514. if (is_hpet_enabled())
  515. irqstat = (unsigned long)irq & 0xF0;
  516. /* If we were suspended, RTC_CONTROL may not be accurate since the
  517. * bios may have cleared it.
  518. */
  519. if (!cmos_rtc.suspend_ctrl)
  520. irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  521. else
  522. irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
  523. /* All Linux RTC alarms should be treated as if they were oneshot.
  524. * Similar code may be needed in system wakeup paths, in case the
  525. * alarm woke the system.
  526. */
  527. if (irqstat & RTC_AIE) {
  528. cmos_rtc.suspend_ctrl &= ~RTC_AIE;
  529. rtc_control &= ~RTC_AIE;
  530. CMOS_WRITE(rtc_control, RTC_CONTROL);
  531. hpet_mask_rtc_irq_bit(RTC_AIE);
  532. CMOS_READ(RTC_INTR_FLAGS);
  533. }
  534. spin_unlock(&rtc_lock);
  535. if (is_intr(irqstat)) {
  536. rtc_update_irq(p, 1, irqstat);
  537. return IRQ_HANDLED;
  538. } else
  539. return IRQ_NONE;
  540. }
  541. #ifdef CONFIG_PNP
  542. #define INITSECTION
  543. #else
  544. #define INITSECTION __init
  545. #endif
  546. static int INITSECTION
  547. cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
  548. {
  549. struct cmos_rtc_board_info *info = dev_get_platdata(dev);
  550. int retval = 0;
  551. unsigned char rtc_control;
  552. unsigned address_space;
  553. u32 flags = 0;
  554. /* there can be only one ... */
  555. if (cmos_rtc.dev)
  556. return -EBUSY;
  557. if (!ports)
  558. return -ENODEV;
  559. /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
  560. *
  561. * REVISIT non-x86 systems may instead use memory space resources
  562. * (needing ioremap etc), not i/o space resources like this ...
  563. */
  564. if (RTC_IOMAPPED)
  565. ports = request_region(ports->start, resource_size(ports),
  566. driver_name);
  567. else
  568. ports = request_mem_region(ports->start, resource_size(ports),
  569. driver_name);
  570. if (!ports) {
  571. dev_dbg(dev, "i/o registers already in use\n");
  572. return -EBUSY;
  573. }
  574. cmos_rtc.irq = rtc_irq;
  575. cmos_rtc.iomem = ports;
  576. /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
  577. * driver did, but don't reject unknown configs. Old hardware
  578. * won't address 128 bytes. Newer chips have multiple banks,
  579. * though they may not be listed in one I/O resource.
  580. */
  581. #if defined(CONFIG_ATARI)
  582. address_space = 64;
  583. #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
  584. || defined(__sparc__) || defined(__mips__) \
  585. || defined(__powerpc__) || defined(CONFIG_MN10300)
  586. address_space = 128;
  587. #else
  588. #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
  589. address_space = 128;
  590. #endif
  591. if (can_bank2 && ports->end > (ports->start + 1))
  592. address_space = 256;
  593. /* For ACPI systems extension info comes from the FADT. On others,
  594. * board specific setup provides it as appropriate. Systems where
  595. * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
  596. * some almost-clones) can provide hooks to make that behave.
  597. *
  598. * Note that ACPI doesn't preclude putting these registers into
  599. * "extended" areas of the chip, including some that we won't yet
  600. * expect CMOS_READ and friends to handle.
  601. */
  602. if (info) {
  603. if (info->flags)
  604. flags = info->flags;
  605. if (info->address_space)
  606. address_space = info->address_space;
  607. if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
  608. cmos_rtc.day_alrm = info->rtc_day_alarm;
  609. if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
  610. cmos_rtc.mon_alrm = info->rtc_mon_alarm;
  611. if (info->rtc_century && info->rtc_century < 128)
  612. cmos_rtc.century = info->rtc_century;
  613. if (info->wake_on && info->wake_off) {
  614. cmos_rtc.wake_on = info->wake_on;
  615. cmos_rtc.wake_off = info->wake_off;
  616. }
  617. }
  618. cmos_rtc.dev = dev;
  619. dev_set_drvdata(dev, &cmos_rtc);
  620. cmos_rtc.rtc = rtc_device_register(driver_name, dev,
  621. &cmos_rtc_ops, THIS_MODULE);
  622. if (IS_ERR(cmos_rtc.rtc)) {
  623. retval = PTR_ERR(cmos_rtc.rtc);
  624. goto cleanup0;
  625. }
  626. rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
  627. spin_lock_irq(&rtc_lock);
  628. if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
  629. /* force periodic irq to CMOS reset default of 1024Hz;
  630. *
  631. * REVISIT it's been reported that at least one x86_64 ALI
  632. * mobo doesn't use 32KHz here ... for portability we might
  633. * need to do something about other clock frequencies.
  634. */
  635. cmos_rtc.rtc->irq_freq = 1024;
  636. hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
  637. CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
  638. }
  639. /* disable irqs */
  640. if (is_valid_irq(rtc_irq))
  641. cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
  642. rtc_control = CMOS_READ(RTC_CONTROL);
  643. spin_unlock_irq(&rtc_lock);
  644. if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
  645. dev_warn(dev, "only 24-hr supported\n");
  646. retval = -ENXIO;
  647. goto cleanup1;
  648. }
  649. hpet_rtc_timer_init();
  650. if (is_valid_irq(rtc_irq)) {
  651. irq_handler_t rtc_cmos_int_handler;
  652. if (is_hpet_enabled()) {
  653. rtc_cmos_int_handler = hpet_rtc_interrupt;
  654. retval = hpet_register_irq_handler(cmos_interrupt);
  655. if (retval) {
  656. hpet_mask_rtc_irq_bit(RTC_IRQMASK);
  657. dev_warn(dev, "hpet_register_irq_handler "
  658. " failed in rtc_init().");
  659. goto cleanup1;
  660. }
  661. } else
  662. rtc_cmos_int_handler = cmos_interrupt;
  663. retval = request_irq(rtc_irq, rtc_cmos_int_handler,
  664. IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev),
  665. cmos_rtc.rtc);
  666. if (retval < 0) {
  667. dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
  668. goto cleanup1;
  669. }
  670. }
  671. /* export at least the first block of NVRAM */
  672. nvram.size = address_space - NVRAM_OFFSET;
  673. retval = sysfs_create_bin_file(&dev->kobj, &nvram);
  674. if (retval < 0) {
  675. dev_dbg(dev, "can't create nvram file? %d\n", retval);
  676. goto cleanup2;
  677. }
  678. dev_info(dev, "%s%s, %zd bytes nvram%s\n",
  679. !is_valid_irq(rtc_irq) ? "no alarms" :
  680. cmos_rtc.mon_alrm ? "alarms up to one year" :
  681. cmos_rtc.day_alrm ? "alarms up to one month" :
  682. "alarms up to one day",
  683. cmos_rtc.century ? ", y3k" : "",
  684. nvram.size,
  685. is_hpet_enabled() ? ", hpet irqs" : "");
  686. return 0;
  687. cleanup2:
  688. if (is_valid_irq(rtc_irq))
  689. free_irq(rtc_irq, cmos_rtc.rtc);
  690. cleanup1:
  691. cmos_rtc.dev = NULL;
  692. rtc_device_unregister(cmos_rtc.rtc);
  693. cleanup0:
  694. if (RTC_IOMAPPED)
  695. release_region(ports->start, resource_size(ports));
  696. else
  697. release_mem_region(ports->start, resource_size(ports));
  698. return retval;
  699. }
  700. static void cmos_do_shutdown(int rtc_irq)
  701. {
  702. spin_lock_irq(&rtc_lock);
  703. if (is_valid_irq(rtc_irq))
  704. cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
  705. spin_unlock_irq(&rtc_lock);
  706. }
  707. static void cmos_do_remove(struct device *dev)
  708. {
  709. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  710. struct resource *ports;
  711. cmos_do_shutdown(cmos->irq);
  712. sysfs_remove_bin_file(&dev->kobj, &nvram);
  713. if (is_valid_irq(cmos->irq)) {
  714. free_irq(cmos->irq, cmos->rtc);
  715. hpet_unregister_irq_handler(cmos_interrupt);
  716. }
  717. rtc_device_unregister(cmos->rtc);
  718. cmos->rtc = NULL;
  719. ports = cmos->iomem;
  720. if (RTC_IOMAPPED)
  721. release_region(ports->start, resource_size(ports));
  722. else
  723. release_mem_region(ports->start, resource_size(ports));
  724. cmos->iomem = NULL;
  725. cmos->dev = NULL;
  726. }
  727. static int cmos_aie_poweroff(struct device *dev)
  728. {
  729. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  730. struct rtc_time now;
  731. time64_t t_now;
  732. int retval = 0;
  733. unsigned char rtc_control;
  734. if (!cmos->alarm_expires)
  735. return -EINVAL;
  736. spin_lock_irq(&rtc_lock);
  737. rtc_control = CMOS_READ(RTC_CONTROL);
  738. spin_unlock_irq(&rtc_lock);
  739. /* We only care about the situation where AIE is disabled. */
  740. if (rtc_control & RTC_AIE)
  741. return -EBUSY;
  742. cmos_read_time(dev, &now);
  743. t_now = rtc_tm_to_time64(&now);
  744. /*
  745. * When enabling "RTC wake-up" in BIOS setup, the machine reboots
  746. * automatically right after shutdown on some buggy boxes.
  747. * This automatic rebooting issue won't happen when the alarm
  748. * time is larger than now+1 seconds.
  749. *
  750. * If the alarm time is equal to now+1 seconds, the issue can be
  751. * prevented by cancelling the alarm.
  752. */
  753. if (cmos->alarm_expires == t_now + 1) {
  754. struct rtc_wkalrm alarm;
  755. /* Cancel the AIE timer by configuring the past time. */
  756. rtc_time64_to_tm(t_now - 1, &alarm.time);
  757. alarm.enabled = 0;
  758. retval = cmos_set_alarm(dev, &alarm);
  759. } else if (cmos->alarm_expires > t_now + 1) {
  760. retval = -EBUSY;
  761. }
  762. return retval;
  763. }
  764. static int cmos_suspend(struct device *dev)
  765. {
  766. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  767. unsigned char tmp;
  768. /* only the alarm might be a wakeup event source */
  769. spin_lock_irq(&rtc_lock);
  770. cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
  771. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  772. unsigned char mask;
  773. if (device_may_wakeup(dev))
  774. mask = RTC_IRQMASK & ~RTC_AIE;
  775. else
  776. mask = RTC_IRQMASK;
  777. tmp &= ~mask;
  778. CMOS_WRITE(tmp, RTC_CONTROL);
  779. hpet_mask_rtc_irq_bit(mask);
  780. cmos_checkintr(cmos, tmp);
  781. }
  782. spin_unlock_irq(&rtc_lock);
  783. if (tmp & RTC_AIE) {
  784. cmos->enabled_wake = 1;
  785. if (cmos->wake_on)
  786. cmos->wake_on(dev);
  787. else
  788. enable_irq_wake(cmos->irq);
  789. }
  790. cmos_read_alarm(dev, &cmos->saved_wkalrm);
  791. dev_dbg(dev, "suspend%s, ctrl %02x\n",
  792. (tmp & RTC_AIE) ? ", alarm may wake" : "",
  793. tmp);
  794. return 0;
  795. }
  796. /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
  797. * after a detour through G3 "mechanical off", although the ACPI spec
  798. * says wakeup should only work from G1/S4 "hibernate". To most users,
  799. * distinctions between S4 and S5 are pointless. So when the hardware
  800. * allows, don't draw that distinction.
  801. */
  802. static inline int cmos_poweroff(struct device *dev)
  803. {
  804. if (!IS_ENABLED(CONFIG_PM))
  805. return -ENOSYS;
  806. return cmos_suspend(dev);
  807. }
  808. static void cmos_check_wkalrm(struct device *dev)
  809. {
  810. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  811. struct rtc_wkalrm current_alarm;
  812. time64_t t_current_expires;
  813. time64_t t_saved_expires;
  814. cmos_read_alarm(dev, &current_alarm);
  815. t_current_expires = rtc_tm_to_time64(&current_alarm.time);
  816. t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
  817. if (t_current_expires != t_saved_expires ||
  818. cmos->saved_wkalrm.enabled != current_alarm.enabled) {
  819. cmos_set_alarm(dev, &cmos->saved_wkalrm);
  820. }
  821. }
  822. static void cmos_check_acpi_rtc_status(struct device *dev,
  823. unsigned char *rtc_control);
  824. static int __maybe_unused cmos_resume(struct device *dev)
  825. {
  826. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  827. unsigned char tmp;
  828. if (cmos->enabled_wake) {
  829. if (cmos->wake_off)
  830. cmos->wake_off(dev);
  831. else
  832. disable_irq_wake(cmos->irq);
  833. cmos->enabled_wake = 0;
  834. }
  835. /* The BIOS might have changed the alarm, restore it */
  836. cmos_check_wkalrm(dev);
  837. spin_lock_irq(&rtc_lock);
  838. tmp = cmos->suspend_ctrl;
  839. cmos->suspend_ctrl = 0;
  840. /* re-enable any irqs previously active */
  841. if (tmp & RTC_IRQMASK) {
  842. unsigned char mask;
  843. if (device_may_wakeup(dev))
  844. hpet_rtc_timer_init();
  845. do {
  846. CMOS_WRITE(tmp, RTC_CONTROL);
  847. hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
  848. mask = CMOS_READ(RTC_INTR_FLAGS);
  849. mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
  850. if (!is_hpet_enabled() || !is_intr(mask))
  851. break;
  852. /* force one-shot behavior if HPET blocked
  853. * the wake alarm's irq
  854. */
  855. rtc_update_irq(cmos->rtc, 1, mask);
  856. tmp &= ~RTC_AIE;
  857. hpet_mask_rtc_irq_bit(RTC_AIE);
  858. } while (mask & RTC_AIE);
  859. if (tmp & RTC_AIE)
  860. cmos_check_acpi_rtc_status(dev, &tmp);
  861. }
  862. spin_unlock_irq(&rtc_lock);
  863. dev_dbg(dev, "resume, ctrl %02x\n", tmp);
  864. return 0;
  865. }
  866. static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
  867. /*----------------------------------------------------------------*/
  868. /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
  869. * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
  870. * probably list them in similar PNPBIOS tables; so PNP is more common.
  871. *
  872. * We don't use legacy "poke at the hardware" probing. Ancient PCs that
  873. * predate even PNPBIOS should set up platform_bus devices.
  874. */
  875. #ifdef CONFIG_ACPI
  876. #include <linux/acpi.h>
  877. static u32 rtc_handler(void *context)
  878. {
  879. struct device *dev = context;
  880. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  881. unsigned char rtc_control = 0;
  882. unsigned char rtc_intr;
  883. unsigned long flags;
  884. spin_lock_irqsave(&rtc_lock, flags);
  885. if (cmos_rtc.suspend_ctrl)
  886. rtc_control = CMOS_READ(RTC_CONTROL);
  887. if (rtc_control & RTC_AIE) {
  888. cmos_rtc.suspend_ctrl &= ~RTC_AIE;
  889. CMOS_WRITE(rtc_control, RTC_CONTROL);
  890. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  891. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  892. }
  893. spin_unlock_irqrestore(&rtc_lock, flags);
  894. pm_wakeup_event(dev, 0);
  895. acpi_clear_event(ACPI_EVENT_RTC);
  896. acpi_disable_event(ACPI_EVENT_RTC, 0);
  897. return ACPI_INTERRUPT_HANDLED;
  898. }
  899. static inline void rtc_wake_setup(struct device *dev)
  900. {
  901. acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
  902. /*
  903. * After the RTC handler is installed, the Fixed_RTC event should
  904. * be disabled. Only when the RTC alarm is set will it be enabled.
  905. */
  906. acpi_clear_event(ACPI_EVENT_RTC);
  907. acpi_disable_event(ACPI_EVENT_RTC, 0);
  908. }
  909. static void rtc_wake_on(struct device *dev)
  910. {
  911. acpi_clear_event(ACPI_EVENT_RTC);
  912. acpi_enable_event(ACPI_EVENT_RTC, 0);
  913. }
  914. static void rtc_wake_off(struct device *dev)
  915. {
  916. acpi_disable_event(ACPI_EVENT_RTC, 0);
  917. }
  918. /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
  919. * its device node and pass extra config data. This helps its driver use
  920. * capabilities that the now-obsolete mc146818 didn't have, and informs it
  921. * that this board's RTC is wakeup-capable (per ACPI spec).
  922. */
  923. static struct cmos_rtc_board_info acpi_rtc_info;
  924. static void cmos_wake_setup(struct device *dev)
  925. {
  926. if (acpi_disabled)
  927. return;
  928. rtc_wake_setup(dev);
  929. acpi_rtc_info.wake_on = rtc_wake_on;
  930. acpi_rtc_info.wake_off = rtc_wake_off;
  931. /* workaround bug in some ACPI tables */
  932. if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
  933. dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
  934. acpi_gbl_FADT.month_alarm);
  935. acpi_gbl_FADT.month_alarm = 0;
  936. }
  937. acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
  938. acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
  939. acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
  940. /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
  941. if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
  942. dev_info(dev, "RTC can wake from S4\n");
  943. dev->platform_data = &acpi_rtc_info;
  944. /* RTC always wakes from S1/S2/S3, and often S4/STD */
  945. device_init_wakeup(dev, 1);
  946. }
  947. static void cmos_check_acpi_rtc_status(struct device *dev,
  948. unsigned char *rtc_control)
  949. {
  950. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  951. acpi_event_status rtc_status;
  952. acpi_status status;
  953. if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
  954. return;
  955. status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
  956. if (ACPI_FAILURE(status)) {
  957. dev_err(dev, "Could not get RTC status\n");
  958. } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
  959. unsigned char mask;
  960. *rtc_control &= ~RTC_AIE;
  961. CMOS_WRITE(*rtc_control, RTC_CONTROL);
  962. mask = CMOS_READ(RTC_INTR_FLAGS);
  963. rtc_update_irq(cmos->rtc, 1, mask);
  964. }
  965. }
  966. #else
  967. static void cmos_wake_setup(struct device *dev)
  968. {
  969. }
  970. static void cmos_check_acpi_rtc_status(struct device *dev,
  971. unsigned char *rtc_control)
  972. {
  973. }
  974. #endif
  975. #ifdef CONFIG_PNP
  976. #include <linux/pnp.h>
  977. static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
  978. {
  979. cmos_wake_setup(&pnp->dev);
  980. if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0))
  981. /* Some machines contain a PNP entry for the RTC, but
  982. * don't define the IRQ. It should always be safe to
  983. * hardcode it in these cases
  984. */
  985. return cmos_do_probe(&pnp->dev,
  986. pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
  987. else
  988. return cmos_do_probe(&pnp->dev,
  989. pnp_get_resource(pnp, IORESOURCE_IO, 0),
  990. pnp_irq(pnp, 0));
  991. }
  992. static void cmos_pnp_remove(struct pnp_dev *pnp)
  993. {
  994. cmos_do_remove(&pnp->dev);
  995. }
  996. static void cmos_pnp_shutdown(struct pnp_dev *pnp)
  997. {
  998. struct device *dev = &pnp->dev;
  999. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1000. if (system_state == SYSTEM_POWER_OFF) {
  1001. int retval = cmos_poweroff(dev);
  1002. if (cmos_aie_poweroff(dev) < 0 && !retval)
  1003. return;
  1004. }
  1005. cmos_do_shutdown(cmos->irq);
  1006. }
  1007. static const struct pnp_device_id rtc_ids[] = {
  1008. { .id = "PNP0b00", },
  1009. { .id = "PNP0b01", },
  1010. { .id = "PNP0b02", },
  1011. { },
  1012. };
  1013. MODULE_DEVICE_TABLE(pnp, rtc_ids);
  1014. static struct pnp_driver cmos_pnp_driver = {
  1015. .name = (char *) driver_name,
  1016. .id_table = rtc_ids,
  1017. .probe = cmos_pnp_probe,
  1018. .remove = cmos_pnp_remove,
  1019. .shutdown = cmos_pnp_shutdown,
  1020. /* flag ensures resume() gets called, and stops syslog spam */
  1021. .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
  1022. .driver = {
  1023. .pm = &cmos_pm_ops,
  1024. },
  1025. };
  1026. #endif /* CONFIG_PNP */
  1027. #ifdef CONFIG_OF
  1028. static const struct of_device_id of_cmos_match[] = {
  1029. {
  1030. .compatible = "motorola,mc146818",
  1031. },
  1032. { },
  1033. };
  1034. MODULE_DEVICE_TABLE(of, of_cmos_match);
  1035. static __init void cmos_of_init(struct platform_device *pdev)
  1036. {
  1037. struct device_node *node = pdev->dev.of_node;
  1038. struct rtc_time time;
  1039. int ret;
  1040. const __be32 *val;
  1041. if (!node)
  1042. return;
  1043. val = of_get_property(node, "ctrl-reg", NULL);
  1044. if (val)
  1045. CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
  1046. val = of_get_property(node, "freq-reg", NULL);
  1047. if (val)
  1048. CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
  1049. cmos_read_time(&pdev->dev, &time);
  1050. ret = rtc_valid_tm(&time);
  1051. if (ret) {
  1052. struct rtc_time def_time = {
  1053. .tm_year = 1,
  1054. .tm_mday = 1,
  1055. };
  1056. cmos_set_time(&pdev->dev, &def_time);
  1057. }
  1058. }
  1059. #else
  1060. static inline void cmos_of_init(struct platform_device *pdev) {}
  1061. #endif
  1062. /*----------------------------------------------------------------*/
  1063. /* Platform setup should have set up an RTC device, when PNP is
  1064. * unavailable ... this could happen even on (older) PCs.
  1065. */
  1066. static int __init cmos_platform_probe(struct platform_device *pdev)
  1067. {
  1068. struct resource *resource;
  1069. int irq;
  1070. cmos_of_init(pdev);
  1071. cmos_wake_setup(&pdev->dev);
  1072. if (RTC_IOMAPPED)
  1073. resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1074. else
  1075. resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1076. irq = platform_get_irq(pdev, 0);
  1077. if (irq < 0)
  1078. irq = -1;
  1079. return cmos_do_probe(&pdev->dev, resource, irq);
  1080. }
  1081. static int cmos_platform_remove(struct platform_device *pdev)
  1082. {
  1083. cmos_do_remove(&pdev->dev);
  1084. return 0;
  1085. }
  1086. static void cmos_platform_shutdown(struct platform_device *pdev)
  1087. {
  1088. struct device *dev = &pdev->dev;
  1089. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1090. if (system_state == SYSTEM_POWER_OFF) {
  1091. int retval = cmos_poweroff(dev);
  1092. if (cmos_aie_poweroff(dev) < 0 && !retval)
  1093. return;
  1094. }
  1095. cmos_do_shutdown(cmos->irq);
  1096. }
  1097. /* work with hotplug and coldplug */
  1098. MODULE_ALIAS("platform:rtc_cmos");
  1099. static struct platform_driver cmos_platform_driver = {
  1100. .remove = cmos_platform_remove,
  1101. .shutdown = cmos_platform_shutdown,
  1102. .driver = {
  1103. .name = driver_name,
  1104. .pm = &cmos_pm_ops,
  1105. .of_match_table = of_match_ptr(of_cmos_match),
  1106. }
  1107. };
  1108. #ifdef CONFIG_PNP
  1109. static bool pnp_driver_registered;
  1110. #endif
  1111. static bool platform_driver_registered;
  1112. static int __init cmos_init(void)
  1113. {
  1114. int retval = 0;
  1115. #ifdef CONFIG_PNP
  1116. retval = pnp_register_driver(&cmos_pnp_driver);
  1117. if (retval == 0)
  1118. pnp_driver_registered = true;
  1119. #endif
  1120. if (!cmos_rtc.dev) {
  1121. retval = platform_driver_probe(&cmos_platform_driver,
  1122. cmos_platform_probe);
  1123. if (retval == 0)
  1124. platform_driver_registered = true;
  1125. }
  1126. if (retval == 0)
  1127. return 0;
  1128. #ifdef CONFIG_PNP
  1129. if (pnp_driver_registered)
  1130. pnp_unregister_driver(&cmos_pnp_driver);
  1131. #endif
  1132. return retval;
  1133. }
  1134. module_init(cmos_init);
  1135. static void __exit cmos_exit(void)
  1136. {
  1137. #ifdef CONFIG_PNP
  1138. if (pnp_driver_registered)
  1139. pnp_unregister_driver(&cmos_pnp_driver);
  1140. #endif
  1141. if (platform_driver_registered)
  1142. platform_driver_unregister(&cmos_platform_driver);
  1143. }
  1144. module_exit(cmos_exit);
  1145. MODULE_AUTHOR("David Brownell");
  1146. MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
  1147. MODULE_LICENSE("GPL");