at91-sama5d2_shdwc.c 7.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282
  1. /*
  2. * Atmel SAMA5D2-Compatible Shutdown Controller (SHDWC) driver.
  3. * Found on some SoCs as the sama5d2 (obviously).
  4. *
  5. * Copyright (C) 2015 Atmel Corporation,
  6. * Nicolas Ferre <nicolas.ferre@atmel.com>
  7. *
  8. * Evolved from driver at91-poweroff.c.
  9. *
  10. * This file is licensed under the terms of the GNU General Public
  11. * License version 2. This program is licensed "as is" without any
  12. * warranty of any kind, whether express or implied.
  13. *
  14. * TODO:
  15. * - addition to status of other wake-up inputs [1 - 15]
  16. * - Analog Comparator wake-up alarm
  17. * - Serial RX wake-up alarm
  18. * - low power debouncer
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/io.h>
  22. #include <linux/module.h>
  23. #include <linux/of.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/printk.h>
  26. #define SLOW_CLOCK_FREQ 32768
  27. #define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
  28. #define AT91_SHDW_SHDW BIT(0) /* Shut Down command */
  29. #define AT91_SHDW_KEY (0xa5UL << 24) /* KEY Password */
  30. #define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
  31. #define AT91_SHDW_WKUPDBC_SHIFT 24
  32. #define AT91_SHDW_WKUPDBC_MASK GENMASK(31, 16)
  33. #define AT91_SHDW_WKUPDBC(x) (((x) << AT91_SHDW_WKUPDBC_SHIFT) \
  34. & AT91_SHDW_WKUPDBC_MASK)
  35. #define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
  36. #define AT91_SHDW_WKUPIS_SHIFT 16
  37. #define AT91_SHDW_WKUPIS_MASK GENMASK(31, 16)
  38. #define AT91_SHDW_WKUPIS(x) ((1 << (x)) << AT91_SHDW_WKUPIS_SHIFT \
  39. & AT91_SHDW_WKUPIS_MASK)
  40. #define AT91_SHDW_WUIR 0x0c /* Shutdown Wake-up Inputs Register */
  41. #define AT91_SHDW_WKUPEN_MASK GENMASK(15, 0)
  42. #define AT91_SHDW_WKUPEN(x) ((1 << (x)) & AT91_SHDW_WKUPEN_MASK)
  43. #define AT91_SHDW_WKUPT_SHIFT 16
  44. #define AT91_SHDW_WKUPT_MASK GENMASK(31, 16)
  45. #define AT91_SHDW_WKUPT(x) ((1 << (x)) << AT91_SHDW_WKUPT_SHIFT \
  46. & AT91_SHDW_WKUPT_MASK)
  47. #define SHDW_WK_PIN(reg, cfg) ((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
  48. #define SHDW_RTCWK(reg, cfg) (((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
  49. #define SHDW_RTCWKEN(cfg) (1 << ((cfg)->mr_rtcwk_shift))
  50. #define DBC_PERIOD_US(x) DIV_ROUND_UP_ULL((1000000 * (x)), \
  51. SLOW_CLOCK_FREQ)
  52. struct shdwc_config {
  53. u8 wkup_pin_input;
  54. u8 mr_rtcwk_shift;
  55. u8 sr_rtcwk_shift;
  56. };
  57. struct shdwc {
  58. struct shdwc_config *cfg;
  59. void __iomem *at91_shdwc_base;
  60. };
  61. /*
  62. * Hold configuration here, cannot be more than one instance of the driver
  63. * since pm_power_off itself is global.
  64. */
  65. static struct shdwc *at91_shdwc;
  66. static struct clk *sclk;
  67. static const unsigned long long sdwc_dbc_period[] = {
  68. 0, 3, 32, 512, 4096, 32768,
  69. };
  70. static void __init at91_wakeup_status(struct platform_device *pdev)
  71. {
  72. struct shdwc *shdw = platform_get_drvdata(pdev);
  73. u32 reg;
  74. char *reason = "unknown";
  75. reg = readl(shdw->at91_shdwc_base + AT91_SHDW_SR);
  76. dev_dbg(&pdev->dev, "%s: status = %#x\n", __func__, reg);
  77. /* Simple power-on, just bail out */
  78. if (!reg)
  79. return;
  80. if (SHDW_WK_PIN(reg, shdw->cfg))
  81. reason = "WKUP pin";
  82. else if (SHDW_RTCWK(reg, shdw->cfg))
  83. reason = "RTC";
  84. pr_info("AT91: Wake-Up source: %s\n", reason);
  85. }
  86. static void at91_poweroff(void)
  87. {
  88. writel(AT91_SHDW_KEY | AT91_SHDW_SHDW,
  89. at91_shdwc->at91_shdwc_base + AT91_SHDW_CR);
  90. }
  91. static u32 at91_shdwc_debouncer_value(struct platform_device *pdev,
  92. u32 in_period_us)
  93. {
  94. int i;
  95. int max_idx = ARRAY_SIZE(sdwc_dbc_period) - 1;
  96. unsigned long long period_us;
  97. unsigned long long max_period_us = DBC_PERIOD_US(sdwc_dbc_period[max_idx]);
  98. if (in_period_us > max_period_us) {
  99. dev_warn(&pdev->dev,
  100. "debouncer period %u too big, reduced to %llu us\n",
  101. in_period_us, max_period_us);
  102. return max_idx;
  103. }
  104. for (i = max_idx - 1; i > 0; i--) {
  105. period_us = DBC_PERIOD_US(sdwc_dbc_period[i]);
  106. dev_dbg(&pdev->dev, "%s: ref[%d] = %llu\n",
  107. __func__, i, period_us);
  108. if (in_period_us > period_us)
  109. break;
  110. }
  111. return i + 1;
  112. }
  113. static u32 at91_shdwc_get_wakeup_input(struct platform_device *pdev,
  114. struct device_node *np)
  115. {
  116. struct device_node *cnp;
  117. u32 wk_input_mask;
  118. u32 wuir = 0;
  119. u32 wk_input;
  120. for_each_child_of_node(np, cnp) {
  121. if (of_property_read_u32(cnp, "reg", &wk_input)) {
  122. dev_warn(&pdev->dev, "reg property is missing for %s\n",
  123. cnp->full_name);
  124. continue;
  125. }
  126. wk_input_mask = 1 << wk_input;
  127. if (!(wk_input_mask & AT91_SHDW_WKUPEN_MASK)) {
  128. dev_warn(&pdev->dev,
  129. "wake-up input %d out of bounds ignore\n",
  130. wk_input);
  131. continue;
  132. }
  133. wuir |= wk_input_mask;
  134. if (of_property_read_bool(cnp, "atmel,wakeup-active-high"))
  135. wuir |= AT91_SHDW_WKUPT(wk_input);
  136. dev_dbg(&pdev->dev, "%s: (child %d) wuir = %#x\n",
  137. __func__, wk_input, wuir);
  138. }
  139. return wuir;
  140. }
  141. static void at91_shdwc_dt_configure(struct platform_device *pdev)
  142. {
  143. struct shdwc *shdw = platform_get_drvdata(pdev);
  144. struct device_node *np = pdev->dev.of_node;
  145. u32 mode = 0, tmp, input;
  146. if (!np) {
  147. dev_err(&pdev->dev, "device node not found\n");
  148. return;
  149. }
  150. if (!of_property_read_u32(np, "debounce-delay-us", &tmp))
  151. mode |= AT91_SHDW_WKUPDBC(at91_shdwc_debouncer_value(pdev, tmp));
  152. if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
  153. mode |= SHDW_RTCWKEN(shdw->cfg);
  154. dev_dbg(&pdev->dev, "%s: mode = %#x\n", __func__, mode);
  155. writel(mode, shdw->at91_shdwc_base + AT91_SHDW_MR);
  156. input = at91_shdwc_get_wakeup_input(pdev, np);
  157. writel(input, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
  158. }
  159. static const struct shdwc_config sama5d2_shdwc_config = {
  160. .wkup_pin_input = 0,
  161. .mr_rtcwk_shift = 17,
  162. .sr_rtcwk_shift = 5,
  163. };
  164. static const struct of_device_id at91_shdwc_of_match[] = {
  165. {
  166. .compatible = "atmel,sama5d2-shdwc",
  167. .data = &sama5d2_shdwc_config,
  168. }, {
  169. /*sentinel*/
  170. }
  171. };
  172. MODULE_DEVICE_TABLE(of, at91_shdwc_of_match);
  173. static int __init at91_shdwc_probe(struct platform_device *pdev)
  174. {
  175. struct resource *res;
  176. const struct of_device_id *match;
  177. int ret;
  178. if (!pdev->dev.of_node)
  179. return -ENODEV;
  180. at91_shdwc = devm_kzalloc(&pdev->dev, sizeof(*at91_shdwc), GFP_KERNEL);
  181. if (!at91_shdwc)
  182. return -ENOMEM;
  183. platform_set_drvdata(pdev, at91_shdwc);
  184. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  185. at91_shdwc->at91_shdwc_base = devm_ioremap_resource(&pdev->dev, res);
  186. if (IS_ERR(at91_shdwc->at91_shdwc_base)) {
  187. dev_err(&pdev->dev, "Could not map reset controller address\n");
  188. return PTR_ERR(at91_shdwc->at91_shdwc_base);
  189. }
  190. match = of_match_node(at91_shdwc_of_match, pdev->dev.of_node);
  191. at91_shdwc->cfg = (struct shdwc_config *)(match->data);
  192. sclk = devm_clk_get(&pdev->dev, NULL);
  193. if (IS_ERR(sclk))
  194. return PTR_ERR(sclk);
  195. ret = clk_prepare_enable(sclk);
  196. if (ret) {
  197. dev_err(&pdev->dev, "Could not enable slow clock\n");
  198. return ret;
  199. }
  200. at91_wakeup_status(pdev);
  201. at91_shdwc_dt_configure(pdev);
  202. pm_power_off = at91_poweroff;
  203. return 0;
  204. }
  205. static int __exit at91_shdwc_remove(struct platform_device *pdev)
  206. {
  207. struct shdwc *shdw = platform_get_drvdata(pdev);
  208. if (pm_power_off == at91_poweroff)
  209. pm_power_off = NULL;
  210. /* Reset values to disable wake-up features */
  211. writel(0, shdw->at91_shdwc_base + AT91_SHDW_MR);
  212. writel(0, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
  213. clk_disable_unprepare(sclk);
  214. return 0;
  215. }
  216. static struct platform_driver at91_shdwc_driver = {
  217. .remove = __exit_p(at91_shdwc_remove),
  218. .driver = {
  219. .name = "at91-shdwc",
  220. .of_match_table = at91_shdwc_of_match,
  221. },
  222. };
  223. module_platform_driver_probe(at91_shdwc_driver, at91_shdwc_probe);
  224. MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
  225. MODULE_DESCRIPTION("Atmel shutdown controller driver");
  226. MODULE_LICENSE("GPL v2");