xusb.c 22 KB

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  1. /*
  2. * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. */
  13. #include <linux/delay.h>
  14. #include <linux/io.h>
  15. #include <linux/mailbox_client.h>
  16. #include <linux/module.h>
  17. #include <linux/of.h>
  18. #include <linux/of_device.h>
  19. #include <linux/phy/phy.h>
  20. #include <linux/phy/tegra/xusb.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/regulator/consumer.h>
  23. #include <linux/reset.h>
  24. #include <linux/slab.h>
  25. #include <linux/workqueue.h>
  26. #include <soc/tegra/fuse.h>
  27. #include "xusb.h"
  28. static struct phy *tegra_xusb_pad_of_xlate(struct device *dev,
  29. struct of_phandle_args *args)
  30. {
  31. struct tegra_xusb_pad *pad = dev_get_drvdata(dev);
  32. struct phy *phy = NULL;
  33. unsigned int i;
  34. if (args->args_count != 0)
  35. return ERR_PTR(-EINVAL);
  36. for (i = 0; i < pad->soc->num_lanes; i++) {
  37. if (!pad->lanes[i])
  38. continue;
  39. if (pad->lanes[i]->dev.of_node == args->np) {
  40. phy = pad->lanes[i];
  41. break;
  42. }
  43. }
  44. if (phy == NULL)
  45. phy = ERR_PTR(-ENODEV);
  46. return phy;
  47. }
  48. static const struct of_device_id tegra_xusb_padctl_of_match[] = {
  49. #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
  50. {
  51. .compatible = "nvidia,tegra124-xusb-padctl",
  52. .data = &tegra124_xusb_padctl_soc,
  53. },
  54. #endif
  55. #if defined(CONFIG_ARCH_TEGRA_210_SOC)
  56. {
  57. .compatible = "nvidia,tegra210-xusb-padctl",
  58. .data = &tegra210_xusb_padctl_soc,
  59. },
  60. #endif
  61. { }
  62. };
  63. MODULE_DEVICE_TABLE(of, tegra_xusb_padctl_of_match);
  64. static struct device_node *
  65. tegra_xusb_find_pad_node(struct tegra_xusb_padctl *padctl, const char *name)
  66. {
  67. /*
  68. * of_find_node_by_name() drops a reference, so make sure to grab one.
  69. */
  70. struct device_node *np = of_node_get(padctl->dev->of_node);
  71. np = of_find_node_by_name(np, "pads");
  72. if (np)
  73. np = of_find_node_by_name(np, name);
  74. return np;
  75. }
  76. static struct device_node *
  77. tegra_xusb_pad_find_phy_node(struct tegra_xusb_pad *pad, unsigned int index)
  78. {
  79. /*
  80. * of_find_node_by_name() drops a reference, so make sure to grab one.
  81. */
  82. struct device_node *np = of_node_get(pad->dev.of_node);
  83. np = of_find_node_by_name(np, "lanes");
  84. if (!np)
  85. return NULL;
  86. return of_find_node_by_name(np, pad->soc->lanes[index].name);
  87. }
  88. static int
  89. tegra_xusb_lane_lookup_function(struct tegra_xusb_lane *lane,
  90. const char *function)
  91. {
  92. unsigned int i;
  93. for (i = 0; i < lane->soc->num_funcs; i++)
  94. if (strcmp(function, lane->soc->funcs[i]) == 0)
  95. return i;
  96. return -EINVAL;
  97. }
  98. int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
  99. struct device_node *np)
  100. {
  101. struct device *dev = &lane->pad->dev;
  102. const char *function;
  103. int err;
  104. err = of_property_read_string(np, "nvidia,function", &function);
  105. if (err < 0)
  106. return err;
  107. err = tegra_xusb_lane_lookup_function(lane, function);
  108. if (err < 0) {
  109. dev_err(dev, "invalid function \"%s\" for lane \"%s\"\n",
  110. function, np->name);
  111. return err;
  112. }
  113. lane->function = err;
  114. return 0;
  115. }
  116. static void tegra_xusb_lane_destroy(struct phy *phy)
  117. {
  118. if (phy) {
  119. struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
  120. lane->pad->ops->remove(lane);
  121. phy_destroy(phy);
  122. }
  123. }
  124. static void tegra_xusb_pad_release(struct device *dev)
  125. {
  126. struct tegra_xusb_pad *pad = to_tegra_xusb_pad(dev);
  127. pad->soc->ops->remove(pad);
  128. }
  129. static struct device_type tegra_xusb_pad_type = {
  130. .release = tegra_xusb_pad_release,
  131. };
  132. int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
  133. struct tegra_xusb_padctl *padctl,
  134. struct device_node *np)
  135. {
  136. int err;
  137. device_initialize(&pad->dev);
  138. INIT_LIST_HEAD(&pad->list);
  139. pad->dev.parent = padctl->dev;
  140. pad->dev.type = &tegra_xusb_pad_type;
  141. pad->dev.of_node = np;
  142. pad->padctl = padctl;
  143. err = dev_set_name(&pad->dev, "%s", pad->soc->name);
  144. if (err < 0)
  145. goto unregister;
  146. err = device_add(&pad->dev);
  147. if (err < 0)
  148. goto unregister;
  149. return 0;
  150. unregister:
  151. device_unregister(&pad->dev);
  152. return err;
  153. }
  154. int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
  155. const struct phy_ops *ops)
  156. {
  157. struct device_node *children;
  158. struct phy *lane;
  159. unsigned int i;
  160. int err;
  161. children = of_find_node_by_name(pad->dev.of_node, "lanes");
  162. if (!children)
  163. return -ENODEV;
  164. pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane),
  165. GFP_KERNEL);
  166. if (!pad->lanes) {
  167. of_node_put(children);
  168. return -ENOMEM;
  169. }
  170. for (i = 0; i < pad->soc->num_lanes; i++) {
  171. struct device_node *np = tegra_xusb_pad_find_phy_node(pad, i);
  172. struct tegra_xusb_lane *lane;
  173. /* skip disabled lanes */
  174. if (!np || !of_device_is_available(np)) {
  175. of_node_put(np);
  176. continue;
  177. }
  178. pad->lanes[i] = phy_create(&pad->dev, np, ops);
  179. if (IS_ERR(pad->lanes[i])) {
  180. err = PTR_ERR(pad->lanes[i]);
  181. of_node_put(np);
  182. goto remove;
  183. }
  184. lane = pad->ops->probe(pad, np, i);
  185. if (IS_ERR(lane)) {
  186. phy_destroy(pad->lanes[i]);
  187. err = PTR_ERR(lane);
  188. goto remove;
  189. }
  190. list_add_tail(&lane->list, &pad->padctl->lanes);
  191. phy_set_drvdata(pad->lanes[i], lane);
  192. }
  193. pad->provider = of_phy_provider_register_full(&pad->dev, children,
  194. tegra_xusb_pad_of_xlate);
  195. if (IS_ERR(pad->provider)) {
  196. err = PTR_ERR(pad->provider);
  197. goto remove;
  198. }
  199. return 0;
  200. remove:
  201. while (i--)
  202. tegra_xusb_lane_destroy(pad->lanes[i]);
  203. of_node_put(children);
  204. return err;
  205. }
  206. void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad)
  207. {
  208. unsigned int i = pad->soc->num_lanes;
  209. of_phy_provider_unregister(pad->provider);
  210. while (i--)
  211. tegra_xusb_lane_destroy(pad->lanes[i]);
  212. device_unregister(&pad->dev);
  213. }
  214. static struct tegra_xusb_pad *
  215. tegra_xusb_pad_create(struct tegra_xusb_padctl *padctl,
  216. const struct tegra_xusb_pad_soc *soc)
  217. {
  218. struct tegra_xusb_pad *pad;
  219. struct device_node *np;
  220. int err;
  221. np = tegra_xusb_find_pad_node(padctl, soc->name);
  222. if (!np || !of_device_is_available(np))
  223. return NULL;
  224. pad = soc->ops->probe(padctl, soc, np);
  225. if (IS_ERR(pad)) {
  226. err = PTR_ERR(pad);
  227. dev_err(padctl->dev, "failed to create pad %s: %d\n",
  228. soc->name, err);
  229. return ERR_PTR(err);
  230. }
  231. /* XXX move this into ->probe() to avoid string comparison */
  232. if (strcmp(soc->name, "pcie") == 0)
  233. padctl->pcie = pad;
  234. if (strcmp(soc->name, "sata") == 0)
  235. padctl->sata = pad;
  236. if (strcmp(soc->name, "usb2") == 0)
  237. padctl->usb2 = pad;
  238. if (strcmp(soc->name, "ulpi") == 0)
  239. padctl->ulpi = pad;
  240. if (strcmp(soc->name, "hsic") == 0)
  241. padctl->hsic = pad;
  242. return pad;
  243. }
  244. static void __tegra_xusb_remove_pads(struct tegra_xusb_padctl *padctl)
  245. {
  246. struct tegra_xusb_pad *pad, *tmp;
  247. list_for_each_entry_safe_reverse(pad, tmp, &padctl->pads, list) {
  248. list_del(&pad->list);
  249. tegra_xusb_pad_unregister(pad);
  250. }
  251. }
  252. static void tegra_xusb_remove_pads(struct tegra_xusb_padctl *padctl)
  253. {
  254. mutex_lock(&padctl->lock);
  255. __tegra_xusb_remove_pads(padctl);
  256. mutex_unlock(&padctl->lock);
  257. }
  258. static void tegra_xusb_lane_program(struct tegra_xusb_lane *lane)
  259. {
  260. struct tegra_xusb_padctl *padctl = lane->pad->padctl;
  261. const struct tegra_xusb_lane_soc *soc = lane->soc;
  262. u32 value;
  263. /* choose function */
  264. value = padctl_readl(padctl, soc->offset);
  265. value &= ~(soc->mask << soc->shift);
  266. value |= lane->function << soc->shift;
  267. padctl_writel(padctl, value, soc->offset);
  268. }
  269. static void tegra_xusb_pad_program(struct tegra_xusb_pad *pad)
  270. {
  271. unsigned int i;
  272. for (i = 0; i < pad->soc->num_lanes; i++) {
  273. struct tegra_xusb_lane *lane;
  274. if (pad->lanes[i]) {
  275. lane = phy_get_drvdata(pad->lanes[i]);
  276. tegra_xusb_lane_program(lane);
  277. }
  278. }
  279. }
  280. static int tegra_xusb_setup_pads(struct tegra_xusb_padctl *padctl)
  281. {
  282. struct tegra_xusb_pad *pad;
  283. unsigned int i;
  284. mutex_lock(&padctl->lock);
  285. for (i = 0; i < padctl->soc->num_pads; i++) {
  286. const struct tegra_xusb_pad_soc *soc = padctl->soc->pads[i];
  287. int err;
  288. pad = tegra_xusb_pad_create(padctl, soc);
  289. if (IS_ERR(pad)) {
  290. err = PTR_ERR(pad);
  291. dev_err(padctl->dev, "failed to create pad %s: %d\n",
  292. soc->name, err);
  293. __tegra_xusb_remove_pads(padctl);
  294. mutex_unlock(&padctl->lock);
  295. return err;
  296. }
  297. if (!pad)
  298. continue;
  299. list_add_tail(&pad->list, &padctl->pads);
  300. }
  301. list_for_each_entry(pad, &padctl->pads, list)
  302. tegra_xusb_pad_program(pad);
  303. mutex_unlock(&padctl->lock);
  304. return 0;
  305. }
  306. static bool tegra_xusb_lane_check(struct tegra_xusb_lane *lane,
  307. const char *function)
  308. {
  309. const char *func = lane->soc->funcs[lane->function];
  310. return strcmp(function, func) == 0;
  311. }
  312. struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
  313. const char *type,
  314. unsigned int index)
  315. {
  316. struct tegra_xusb_lane *lane, *hit = ERR_PTR(-ENODEV);
  317. char *name;
  318. name = kasprintf(GFP_KERNEL, "%s-%u", type, index);
  319. if (!name)
  320. return ERR_PTR(-ENOMEM);
  321. list_for_each_entry(lane, &padctl->lanes, list) {
  322. if (strcmp(lane->soc->name, name) == 0) {
  323. hit = lane;
  324. break;
  325. }
  326. }
  327. kfree(name);
  328. return hit;
  329. }
  330. struct tegra_xusb_lane *
  331. tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
  332. const struct tegra_xusb_lane_map *map,
  333. const char *function)
  334. {
  335. struct tegra_xusb_lane *lane, *match = ERR_PTR(-ENODEV);
  336. for (map = map; map->type; map++) {
  337. if (port->index != map->port)
  338. continue;
  339. lane = tegra_xusb_find_lane(port->padctl, map->type,
  340. map->index);
  341. if (IS_ERR(lane))
  342. continue;
  343. if (!tegra_xusb_lane_check(lane, function))
  344. continue;
  345. if (!IS_ERR(match))
  346. dev_err(&port->dev, "conflicting match: %s-%u / %s\n",
  347. map->type, map->index, match->soc->name);
  348. else
  349. match = lane;
  350. }
  351. return match;
  352. }
  353. static struct device_node *
  354. tegra_xusb_find_port_node(struct tegra_xusb_padctl *padctl, const char *type,
  355. unsigned int index)
  356. {
  357. /*
  358. * of_find_node_by_name() drops a reference, so make sure to grab one.
  359. */
  360. struct device_node *np = of_node_get(padctl->dev->of_node);
  361. np = of_find_node_by_name(np, "ports");
  362. if (np) {
  363. char *name;
  364. name = kasprintf(GFP_KERNEL, "%s-%u", type, index);
  365. np = of_find_node_by_name(np, name);
  366. kfree(name);
  367. }
  368. return np;
  369. }
  370. struct tegra_xusb_port *
  371. tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
  372. unsigned int index)
  373. {
  374. struct tegra_xusb_port *port;
  375. struct device_node *np;
  376. np = tegra_xusb_find_port_node(padctl, type, index);
  377. if (!np)
  378. return NULL;
  379. list_for_each_entry(port, &padctl->ports, list) {
  380. if (np == port->dev.of_node) {
  381. of_node_put(np);
  382. return port;
  383. }
  384. }
  385. of_node_put(np);
  386. return NULL;
  387. }
  388. struct tegra_xusb_usb2_port *
  389. tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl, unsigned int index)
  390. {
  391. struct tegra_xusb_port *port;
  392. port = tegra_xusb_find_port(padctl, "usb2", index);
  393. if (port)
  394. return to_usb2_port(port);
  395. return NULL;
  396. }
  397. struct tegra_xusb_usb3_port *
  398. tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl, unsigned int index)
  399. {
  400. struct tegra_xusb_port *port;
  401. port = tegra_xusb_find_port(padctl, "usb3", index);
  402. if (port)
  403. return to_usb3_port(port);
  404. return NULL;
  405. }
  406. static void tegra_xusb_port_release(struct device *dev)
  407. {
  408. }
  409. static struct device_type tegra_xusb_port_type = {
  410. .release = tegra_xusb_port_release,
  411. };
  412. static int tegra_xusb_port_init(struct tegra_xusb_port *port,
  413. struct tegra_xusb_padctl *padctl,
  414. struct device_node *np,
  415. const char *name,
  416. unsigned int index)
  417. {
  418. int err;
  419. INIT_LIST_HEAD(&port->list);
  420. port->padctl = padctl;
  421. port->index = index;
  422. device_initialize(&port->dev);
  423. port->dev.type = &tegra_xusb_port_type;
  424. port->dev.of_node = of_node_get(np);
  425. port->dev.parent = padctl->dev;
  426. err = dev_set_name(&port->dev, "%s-%u", name, index);
  427. if (err < 0)
  428. goto unregister;
  429. err = device_add(&port->dev);
  430. if (err < 0)
  431. goto unregister;
  432. return 0;
  433. unregister:
  434. device_unregister(&port->dev);
  435. return err;
  436. }
  437. static void tegra_xusb_port_unregister(struct tegra_xusb_port *port)
  438. {
  439. device_unregister(&port->dev);
  440. }
  441. static int tegra_xusb_usb2_port_parse_dt(struct tegra_xusb_usb2_port *usb2)
  442. {
  443. struct tegra_xusb_port *port = &usb2->base;
  444. struct device_node *np = port->dev.of_node;
  445. usb2->internal = of_property_read_bool(np, "nvidia,internal");
  446. usb2->supply = devm_regulator_get(&port->dev, "vbus");
  447. return PTR_ERR_OR_ZERO(usb2->supply);
  448. }
  449. static int tegra_xusb_add_usb2_port(struct tegra_xusb_padctl *padctl,
  450. unsigned int index)
  451. {
  452. struct tegra_xusb_usb2_port *usb2;
  453. struct device_node *np;
  454. int err = 0;
  455. /*
  456. * USB2 ports don't require additional properties, but if the port is
  457. * marked as disabled there is no reason to register it.
  458. */
  459. np = tegra_xusb_find_port_node(padctl, "usb2", index);
  460. if (!np || !of_device_is_available(np))
  461. goto out;
  462. usb2 = devm_kzalloc(padctl->dev, sizeof(*usb2), GFP_KERNEL);
  463. if (!usb2) {
  464. err = -ENOMEM;
  465. goto out;
  466. }
  467. err = tegra_xusb_port_init(&usb2->base, padctl, np, "usb2", index);
  468. if (err < 0)
  469. goto out;
  470. usb2->base.ops = padctl->soc->ports.usb2.ops;
  471. usb2->base.lane = usb2->base.ops->map(&usb2->base);
  472. if (IS_ERR(usb2->base.lane)) {
  473. err = PTR_ERR(usb2->base.lane);
  474. goto out;
  475. }
  476. err = tegra_xusb_usb2_port_parse_dt(usb2);
  477. if (err < 0) {
  478. tegra_xusb_port_unregister(&usb2->base);
  479. goto out;
  480. }
  481. list_add_tail(&usb2->base.list, &padctl->ports);
  482. out:
  483. of_node_put(np);
  484. return err;
  485. }
  486. static int tegra_xusb_ulpi_port_parse_dt(struct tegra_xusb_ulpi_port *ulpi)
  487. {
  488. struct tegra_xusb_port *port = &ulpi->base;
  489. struct device_node *np = port->dev.of_node;
  490. ulpi->internal = of_property_read_bool(np, "nvidia,internal");
  491. return 0;
  492. }
  493. static int tegra_xusb_add_ulpi_port(struct tegra_xusb_padctl *padctl,
  494. unsigned int index)
  495. {
  496. struct tegra_xusb_ulpi_port *ulpi;
  497. struct device_node *np;
  498. int err = 0;
  499. np = tegra_xusb_find_port_node(padctl, "ulpi", index);
  500. if (!np || !of_device_is_available(np))
  501. goto out;
  502. ulpi = devm_kzalloc(padctl->dev, sizeof(*ulpi), GFP_KERNEL);
  503. if (!ulpi) {
  504. err = -ENOMEM;
  505. goto out;
  506. }
  507. err = tegra_xusb_port_init(&ulpi->base, padctl, np, "ulpi", index);
  508. if (err < 0)
  509. goto out;
  510. ulpi->base.ops = padctl->soc->ports.ulpi.ops;
  511. ulpi->base.lane = ulpi->base.ops->map(&ulpi->base);
  512. if (IS_ERR(ulpi->base.lane)) {
  513. err = PTR_ERR(ulpi->base.lane);
  514. goto out;
  515. }
  516. err = tegra_xusb_ulpi_port_parse_dt(ulpi);
  517. if (err < 0) {
  518. tegra_xusb_port_unregister(&ulpi->base);
  519. goto out;
  520. }
  521. list_add_tail(&ulpi->base.list, &padctl->ports);
  522. out:
  523. of_node_put(np);
  524. return err;
  525. }
  526. static int tegra_xusb_hsic_port_parse_dt(struct tegra_xusb_hsic_port *hsic)
  527. {
  528. /* XXX */
  529. return 0;
  530. }
  531. static int tegra_xusb_add_hsic_port(struct tegra_xusb_padctl *padctl,
  532. unsigned int index)
  533. {
  534. struct tegra_xusb_hsic_port *hsic;
  535. struct device_node *np;
  536. int err = 0;
  537. np = tegra_xusb_find_port_node(padctl, "hsic", index);
  538. if (!np || !of_device_is_available(np))
  539. goto out;
  540. hsic = devm_kzalloc(padctl->dev, sizeof(*hsic), GFP_KERNEL);
  541. if (!hsic) {
  542. err = -ENOMEM;
  543. goto out;
  544. }
  545. err = tegra_xusb_port_init(&hsic->base, padctl, np, "hsic", index);
  546. if (err < 0)
  547. goto out;
  548. hsic->base.ops = padctl->soc->ports.hsic.ops;
  549. hsic->base.lane = hsic->base.ops->map(&hsic->base);
  550. if (IS_ERR(hsic->base.lane)) {
  551. err = PTR_ERR(hsic->base.lane);
  552. goto out;
  553. }
  554. err = tegra_xusb_hsic_port_parse_dt(hsic);
  555. if (err < 0) {
  556. tegra_xusb_port_unregister(&hsic->base);
  557. goto out;
  558. }
  559. list_add_tail(&hsic->base.list, &padctl->ports);
  560. out:
  561. of_node_put(np);
  562. return err;
  563. }
  564. static int tegra_xusb_usb3_port_parse_dt(struct tegra_xusb_usb3_port *usb3)
  565. {
  566. struct tegra_xusb_port *port = &usb3->base;
  567. struct device_node *np = port->dev.of_node;
  568. u32 value;
  569. int err;
  570. err = of_property_read_u32(np, "nvidia,usb2-companion", &value);
  571. if (err < 0) {
  572. dev_err(&port->dev, "failed to read port: %d\n", err);
  573. return err;
  574. }
  575. usb3->port = value;
  576. usb3->internal = of_property_read_bool(np, "nvidia,internal");
  577. usb3->supply = devm_regulator_get(&port->dev, "vbus");
  578. return PTR_ERR_OR_ZERO(usb3->supply);
  579. }
  580. static int tegra_xusb_add_usb3_port(struct tegra_xusb_padctl *padctl,
  581. unsigned int index)
  582. {
  583. struct tegra_xusb_usb3_port *usb3;
  584. struct device_node *np;
  585. int err = 0;
  586. /*
  587. * If there is no supplemental configuration in the device tree the
  588. * port is unusable. But it is valid to configure only a single port,
  589. * hence return 0 instead of an error to allow ports to be optional.
  590. */
  591. np = tegra_xusb_find_port_node(padctl, "usb3", index);
  592. if (!np || !of_device_is_available(np))
  593. goto out;
  594. usb3 = devm_kzalloc(padctl->dev, sizeof(*usb3), GFP_KERNEL);
  595. if (!usb3) {
  596. err = -ENOMEM;
  597. goto out;
  598. }
  599. err = tegra_xusb_port_init(&usb3->base, padctl, np, "usb3", index);
  600. if (err < 0)
  601. goto out;
  602. usb3->base.ops = padctl->soc->ports.usb3.ops;
  603. usb3->base.lane = usb3->base.ops->map(&usb3->base);
  604. if (IS_ERR(usb3->base.lane)) {
  605. err = PTR_ERR(usb3->base.lane);
  606. goto out;
  607. }
  608. err = tegra_xusb_usb3_port_parse_dt(usb3);
  609. if (err < 0) {
  610. tegra_xusb_port_unregister(&usb3->base);
  611. goto out;
  612. }
  613. list_add_tail(&usb3->base.list, &padctl->ports);
  614. out:
  615. of_node_put(np);
  616. return err;
  617. }
  618. static void __tegra_xusb_remove_ports(struct tegra_xusb_padctl *padctl)
  619. {
  620. struct tegra_xusb_port *port, *tmp;
  621. list_for_each_entry_safe_reverse(port, tmp, &padctl->ports, list) {
  622. list_del(&port->list);
  623. tegra_xusb_port_unregister(port);
  624. }
  625. }
  626. static int tegra_xusb_setup_ports(struct tegra_xusb_padctl *padctl)
  627. {
  628. struct tegra_xusb_port *port;
  629. unsigned int i;
  630. int err = 0;
  631. mutex_lock(&padctl->lock);
  632. for (i = 0; i < padctl->soc->ports.usb2.count; i++) {
  633. err = tegra_xusb_add_usb2_port(padctl, i);
  634. if (err < 0)
  635. goto remove_ports;
  636. }
  637. for (i = 0; i < padctl->soc->ports.ulpi.count; i++) {
  638. err = tegra_xusb_add_ulpi_port(padctl, i);
  639. if (err < 0)
  640. goto remove_ports;
  641. }
  642. for (i = 0; i < padctl->soc->ports.hsic.count; i++) {
  643. err = tegra_xusb_add_hsic_port(padctl, i);
  644. if (err < 0)
  645. goto remove_ports;
  646. }
  647. for (i = 0; i < padctl->soc->ports.usb3.count; i++) {
  648. err = tegra_xusb_add_usb3_port(padctl, i);
  649. if (err < 0)
  650. goto remove_ports;
  651. }
  652. list_for_each_entry(port, &padctl->ports, list) {
  653. err = port->ops->enable(port);
  654. if (err < 0)
  655. dev_err(padctl->dev, "failed to enable port %s: %d\n",
  656. dev_name(&port->dev), err);
  657. }
  658. goto unlock;
  659. remove_ports:
  660. __tegra_xusb_remove_ports(padctl);
  661. unlock:
  662. mutex_unlock(&padctl->lock);
  663. return err;
  664. }
  665. static void tegra_xusb_remove_ports(struct tegra_xusb_padctl *padctl)
  666. {
  667. mutex_lock(&padctl->lock);
  668. __tegra_xusb_remove_ports(padctl);
  669. mutex_unlock(&padctl->lock);
  670. }
  671. static int tegra_xusb_padctl_probe(struct platform_device *pdev)
  672. {
  673. struct device_node *np = of_node_get(pdev->dev.of_node);
  674. const struct tegra_xusb_padctl_soc *soc;
  675. struct tegra_xusb_padctl *padctl;
  676. const struct of_device_id *match;
  677. struct resource *res;
  678. int err;
  679. /* for backwards compatibility with old device trees */
  680. np = of_find_node_by_name(np, "pads");
  681. if (!np) {
  682. dev_warn(&pdev->dev, "deprecated DT, using legacy driver\n");
  683. return tegra_xusb_padctl_legacy_probe(pdev);
  684. }
  685. of_node_put(np);
  686. match = of_match_node(tegra_xusb_padctl_of_match, pdev->dev.of_node);
  687. soc = match->data;
  688. padctl = soc->ops->probe(&pdev->dev, soc);
  689. if (IS_ERR(padctl))
  690. return PTR_ERR(padctl);
  691. platform_set_drvdata(pdev, padctl);
  692. INIT_LIST_HEAD(&padctl->ports);
  693. INIT_LIST_HEAD(&padctl->lanes);
  694. INIT_LIST_HEAD(&padctl->pads);
  695. mutex_init(&padctl->lock);
  696. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  697. padctl->regs = devm_ioremap_resource(&pdev->dev, res);
  698. if (IS_ERR(padctl->regs)) {
  699. err = PTR_ERR(padctl->regs);
  700. goto remove;
  701. }
  702. padctl->rst = devm_reset_control_get(&pdev->dev, NULL);
  703. if (IS_ERR(padctl->rst)) {
  704. err = PTR_ERR(padctl->rst);
  705. goto remove;
  706. }
  707. err = reset_control_deassert(padctl->rst);
  708. if (err < 0)
  709. goto remove;
  710. err = tegra_xusb_setup_pads(padctl);
  711. if (err < 0) {
  712. dev_err(&pdev->dev, "failed to setup pads: %d\n", err);
  713. goto reset;
  714. }
  715. err = tegra_xusb_setup_ports(padctl);
  716. if (err) {
  717. dev_err(&pdev->dev, "failed to setup XUSB ports: %d\n", err);
  718. goto remove_pads;
  719. }
  720. return 0;
  721. remove_pads:
  722. tegra_xusb_remove_pads(padctl);
  723. reset:
  724. reset_control_assert(padctl->rst);
  725. remove:
  726. soc->ops->remove(padctl);
  727. return err;
  728. }
  729. static int tegra_xusb_padctl_remove(struct platform_device *pdev)
  730. {
  731. struct tegra_xusb_padctl *padctl = platform_get_drvdata(pdev);
  732. int err;
  733. tegra_xusb_remove_ports(padctl);
  734. tegra_xusb_remove_pads(padctl);
  735. err = reset_control_assert(padctl->rst);
  736. if (err < 0)
  737. dev_err(&pdev->dev, "failed to assert reset: %d\n", err);
  738. padctl->soc->ops->remove(padctl);
  739. return err;
  740. }
  741. static struct platform_driver tegra_xusb_padctl_driver = {
  742. .driver = {
  743. .name = "tegra-xusb-padctl",
  744. .of_match_table = tegra_xusb_padctl_of_match,
  745. },
  746. .probe = tegra_xusb_padctl_probe,
  747. .remove = tegra_xusb_padctl_remove,
  748. };
  749. module_platform_driver(tegra_xusb_padctl_driver);
  750. struct tegra_xusb_padctl *tegra_xusb_padctl_get(struct device *dev)
  751. {
  752. struct tegra_xusb_padctl *padctl;
  753. struct platform_device *pdev;
  754. struct device_node *np;
  755. np = of_parse_phandle(dev->of_node, "nvidia,xusb-padctl", 0);
  756. if (!np)
  757. return ERR_PTR(-EINVAL);
  758. /*
  759. * This is slightly ugly. A better implementation would be to keep a
  760. * registry of pad controllers, but since there will almost certainly
  761. * only ever be one per SoC that would be a little overkill.
  762. */
  763. pdev = of_find_device_by_node(np);
  764. if (!pdev) {
  765. of_node_put(np);
  766. return ERR_PTR(-ENODEV);
  767. }
  768. of_node_put(np);
  769. padctl = platform_get_drvdata(pdev);
  770. if (!padctl) {
  771. put_device(&pdev->dev);
  772. return ERR_PTR(-EPROBE_DEFER);
  773. }
  774. return padctl;
  775. }
  776. EXPORT_SYMBOL_GPL(tegra_xusb_padctl_get);
  777. void tegra_xusb_padctl_put(struct tegra_xusb_padctl *padctl)
  778. {
  779. if (padctl)
  780. put_device(padctl->dev);
  781. }
  782. EXPORT_SYMBOL_GPL(tegra_xusb_padctl_put);
  783. int tegra_xusb_padctl_usb3_save_context(struct tegra_xusb_padctl *padctl,
  784. unsigned int port)
  785. {
  786. if (padctl->soc->ops->usb3_save_context)
  787. return padctl->soc->ops->usb3_save_context(padctl, port);
  788. return -ENOSYS;
  789. }
  790. EXPORT_SYMBOL_GPL(tegra_xusb_padctl_usb3_save_context);
  791. int tegra_xusb_padctl_hsic_set_idle(struct tegra_xusb_padctl *padctl,
  792. unsigned int port, bool idle)
  793. {
  794. if (padctl->soc->ops->hsic_set_idle)
  795. return padctl->soc->ops->hsic_set_idle(padctl, port, idle);
  796. return -ENOSYS;
  797. }
  798. EXPORT_SYMBOL_GPL(tegra_xusb_padctl_hsic_set_idle);
  799. int tegra_xusb_padctl_usb3_set_lfps_detect(struct tegra_xusb_padctl *padctl,
  800. unsigned int port, bool enable)
  801. {
  802. if (padctl->soc->ops->usb3_set_lfps_detect)
  803. return padctl->soc->ops->usb3_set_lfps_detect(padctl, port,
  804. enable);
  805. return -ENOSYS;
  806. }
  807. EXPORT_SYMBOL_GPL(tegra_xusb_padctl_usb3_set_lfps_detect);
  808. MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
  809. MODULE_DESCRIPTION("Tegra XUSB Pad Controller driver");
  810. MODULE_LICENSE("GPL v2");