portdrv_pci.c 9.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392
  1. /*
  2. * File: portdrv_pci.c
  3. * Purpose: PCI Express Port Bus Driver
  4. * Author: Tom Nguyen <tom.l.nguyen@intel.com>
  5. * Version: v1.0
  6. *
  7. * Copyright (C) 2004 Intel
  8. * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
  9. */
  10. #include <linux/pci.h>
  11. #include <linux/kernel.h>
  12. #include <linux/errno.h>
  13. #include <linux/pm.h>
  14. #include <linux/pm_runtime.h>
  15. #include <linux/init.h>
  16. #include <linux/pcieport_if.h>
  17. #include <linux/aer.h>
  18. #include <linux/dmi.h>
  19. #include <linux/pci-aspm.h>
  20. #include "../pci.h"
  21. #include "portdrv.h"
  22. #include "aer/aerdrv.h"
  23. /* If this switch is set, PCIe port native services should not be enabled. */
  24. bool pcie_ports_disabled;
  25. /*
  26. * If this switch is set, ACPI _OSC will be used to determine whether or not to
  27. * enable PCIe port native services.
  28. */
  29. bool pcie_ports_auto = true;
  30. static int __init pcie_port_setup(char *str)
  31. {
  32. if (!strncmp(str, "compat", 6)) {
  33. pcie_ports_disabled = true;
  34. } else if (!strncmp(str, "native", 6)) {
  35. pcie_ports_disabled = false;
  36. pcie_ports_auto = false;
  37. } else if (!strncmp(str, "auto", 4)) {
  38. pcie_ports_disabled = false;
  39. pcie_ports_auto = true;
  40. }
  41. return 1;
  42. }
  43. __setup("pcie_ports=", pcie_port_setup);
  44. /* global data */
  45. /**
  46. * pcie_clear_root_pme_status - Clear root port PME interrupt status.
  47. * @dev: PCIe root port or event collector.
  48. */
  49. void pcie_clear_root_pme_status(struct pci_dev *dev)
  50. {
  51. pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
  52. }
  53. static int pcie_portdrv_restore_config(struct pci_dev *dev)
  54. {
  55. int retval;
  56. retval = pci_enable_device(dev);
  57. if (retval)
  58. return retval;
  59. pci_set_master(dev);
  60. return 0;
  61. }
  62. #ifdef CONFIG_PM
  63. static int pcie_port_resume_noirq(struct device *dev)
  64. {
  65. struct pci_dev *pdev = to_pci_dev(dev);
  66. /*
  67. * Some BIOSes forget to clear Root PME Status bits after system wakeup
  68. * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
  69. * bits now just in case (shouldn't hurt).
  70. */
  71. if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
  72. pcie_clear_root_pme_status(pdev);
  73. return 0;
  74. }
  75. static int pcie_port_runtime_suspend(struct device *dev)
  76. {
  77. return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
  78. }
  79. static int pcie_port_runtime_resume(struct device *dev)
  80. {
  81. return 0;
  82. }
  83. static int pcie_port_runtime_idle(struct device *dev)
  84. {
  85. /*
  86. * Assume the PCI core has set bridge_d3 whenever it thinks the port
  87. * should be good to go to D3. Everything else, including moving
  88. * the port to D3, is handled by the PCI core.
  89. */
  90. return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
  91. }
  92. static const struct dev_pm_ops pcie_portdrv_pm_ops = {
  93. .suspend = pcie_port_device_suspend,
  94. .resume = pcie_port_device_resume,
  95. .freeze = pcie_port_device_suspend,
  96. .thaw = pcie_port_device_resume,
  97. .poweroff = pcie_port_device_suspend,
  98. .restore = pcie_port_device_resume,
  99. .resume_noirq = pcie_port_resume_noirq,
  100. .runtime_suspend = pcie_port_runtime_suspend,
  101. .runtime_resume = pcie_port_runtime_resume,
  102. .runtime_idle = pcie_port_runtime_idle,
  103. };
  104. #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
  105. #else /* !PM */
  106. #define PCIE_PORTDRV_PM_OPS NULL
  107. #endif /* !PM */
  108. /*
  109. * pcie_portdrv_probe - Probe PCI-Express port devices
  110. * @dev: PCI-Express port device being probed
  111. *
  112. * If detected invokes the pcie_port_device_register() method for
  113. * this port device.
  114. *
  115. */
  116. static int pcie_portdrv_probe(struct pci_dev *dev,
  117. const struct pci_device_id *id)
  118. {
  119. int status;
  120. if (!pci_is_pcie(dev) ||
  121. ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
  122. (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
  123. (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
  124. return -ENODEV;
  125. status = pcie_port_device_register(dev);
  126. if (status)
  127. return status;
  128. pci_save_state(dev);
  129. if (pci_bridge_d3_possible(dev)) {
  130. /*
  131. * Keep the port resumed 100ms to make sure things like
  132. * config space accesses from userspace (lspci) will not
  133. * cause the port to repeatedly suspend and resume.
  134. */
  135. pm_runtime_set_autosuspend_delay(&dev->dev, 100);
  136. pm_runtime_use_autosuspend(&dev->dev);
  137. pm_runtime_mark_last_busy(&dev->dev);
  138. pm_runtime_put_autosuspend(&dev->dev);
  139. pm_runtime_allow(&dev->dev);
  140. }
  141. return 0;
  142. }
  143. static void pcie_portdrv_remove(struct pci_dev *dev)
  144. {
  145. if (pci_bridge_d3_possible(dev)) {
  146. pm_runtime_forbid(&dev->dev);
  147. pm_runtime_get_noresume(&dev->dev);
  148. pm_runtime_dont_use_autosuspend(&dev->dev);
  149. }
  150. pcie_port_device_remove(dev);
  151. }
  152. static int error_detected_iter(struct device *device, void *data)
  153. {
  154. struct pcie_device *pcie_device;
  155. struct pcie_port_service_driver *driver;
  156. struct aer_broadcast_data *result_data;
  157. pci_ers_result_t status;
  158. result_data = (struct aer_broadcast_data *) data;
  159. if (device->bus == &pcie_port_bus_type && device->driver) {
  160. driver = to_service_driver(device->driver);
  161. if (!driver ||
  162. !driver->err_handler ||
  163. !driver->err_handler->error_detected)
  164. return 0;
  165. pcie_device = to_pcie_device(device);
  166. /* Forward error detected message to service drivers */
  167. status = driver->err_handler->error_detected(
  168. pcie_device->port,
  169. result_data->state);
  170. result_data->result =
  171. merge_result(result_data->result, status);
  172. }
  173. return 0;
  174. }
  175. static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
  176. enum pci_channel_state error)
  177. {
  178. struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
  179. /* get true return value from &data */
  180. device_for_each_child(&dev->dev, &data, error_detected_iter);
  181. return data.result;
  182. }
  183. static int mmio_enabled_iter(struct device *device, void *data)
  184. {
  185. struct pcie_device *pcie_device;
  186. struct pcie_port_service_driver *driver;
  187. pci_ers_result_t status, *result;
  188. result = (pci_ers_result_t *) data;
  189. if (device->bus == &pcie_port_bus_type && device->driver) {
  190. driver = to_service_driver(device->driver);
  191. if (driver &&
  192. driver->err_handler &&
  193. driver->err_handler->mmio_enabled) {
  194. pcie_device = to_pcie_device(device);
  195. /* Forward error message to service drivers */
  196. status = driver->err_handler->mmio_enabled(
  197. pcie_device->port);
  198. *result = merge_result(*result, status);
  199. }
  200. }
  201. return 0;
  202. }
  203. static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
  204. {
  205. pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
  206. /* get true return value from &status */
  207. device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
  208. return status;
  209. }
  210. static int slot_reset_iter(struct device *device, void *data)
  211. {
  212. struct pcie_device *pcie_device;
  213. struct pcie_port_service_driver *driver;
  214. pci_ers_result_t status, *result;
  215. result = (pci_ers_result_t *) data;
  216. if (device->bus == &pcie_port_bus_type && device->driver) {
  217. driver = to_service_driver(device->driver);
  218. if (driver &&
  219. driver->err_handler &&
  220. driver->err_handler->slot_reset) {
  221. pcie_device = to_pcie_device(device);
  222. /* Forward error message to service drivers */
  223. status = driver->err_handler->slot_reset(
  224. pcie_device->port);
  225. *result = merge_result(*result, status);
  226. }
  227. }
  228. return 0;
  229. }
  230. static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
  231. {
  232. pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
  233. /* If fatal, restore cfg space for possible link reset at upstream */
  234. if (dev->error_state == pci_channel_io_frozen) {
  235. dev->state_saved = true;
  236. pci_restore_state(dev);
  237. pcie_portdrv_restore_config(dev);
  238. pci_enable_pcie_error_reporting(dev);
  239. }
  240. /* get true return value from &status */
  241. device_for_each_child(&dev->dev, &status, slot_reset_iter);
  242. return status;
  243. }
  244. static int resume_iter(struct device *device, void *data)
  245. {
  246. struct pcie_device *pcie_device;
  247. struct pcie_port_service_driver *driver;
  248. if (device->bus == &pcie_port_bus_type && device->driver) {
  249. driver = to_service_driver(device->driver);
  250. if (driver &&
  251. driver->err_handler &&
  252. driver->err_handler->resume) {
  253. pcie_device = to_pcie_device(device);
  254. /* Forward error message to service drivers */
  255. driver->err_handler->resume(pcie_device->port);
  256. }
  257. }
  258. return 0;
  259. }
  260. static void pcie_portdrv_err_resume(struct pci_dev *dev)
  261. {
  262. device_for_each_child(&dev->dev, NULL, resume_iter);
  263. }
  264. /*
  265. * LINUX Device Driver Model
  266. */
  267. static const struct pci_device_id port_pci_ids[] = { {
  268. /* handle any PCI-Express port */
  269. PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
  270. }, { /* end: all zeroes */ }
  271. };
  272. static const struct pci_error_handlers pcie_portdrv_err_handler = {
  273. .error_detected = pcie_portdrv_error_detected,
  274. .mmio_enabled = pcie_portdrv_mmio_enabled,
  275. .slot_reset = pcie_portdrv_slot_reset,
  276. .resume = pcie_portdrv_err_resume,
  277. };
  278. static struct pci_driver pcie_portdriver = {
  279. .name = "pcieport",
  280. .id_table = &port_pci_ids[0],
  281. .probe = pcie_portdrv_probe,
  282. .remove = pcie_portdrv_remove,
  283. .err_handler = &pcie_portdrv_err_handler,
  284. .driver.pm = PCIE_PORTDRV_PM_OPS,
  285. };
  286. static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
  287. {
  288. pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
  289. d->ident);
  290. pcie_pme_disable_msi();
  291. return 0;
  292. }
  293. static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
  294. /*
  295. * Boxes that should not use MSI for PCIe PME signaling.
  296. */
  297. {
  298. .callback = dmi_pcie_pme_disable_msi,
  299. .ident = "MSI Wind U-100",
  300. .matches = {
  301. DMI_MATCH(DMI_SYS_VENDOR,
  302. "MICRO-STAR INTERNATIONAL CO., LTD"),
  303. DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
  304. },
  305. },
  306. {}
  307. };
  308. static int __init pcie_portdrv_init(void)
  309. {
  310. int retval;
  311. if (pcie_ports_disabled)
  312. return pci_register_driver(&pcie_portdriver);
  313. dmi_check_system(pcie_portdrv_dmi_table);
  314. retval = pcie_port_bus_register();
  315. if (retval) {
  316. printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
  317. goto out;
  318. }
  319. retval = pci_register_driver(&pcie_portdriver);
  320. if (retval)
  321. pcie_port_bus_unregister();
  322. out:
  323. return retval;
  324. }
  325. device_initcall(pcie_portdrv_init);