portdrv_core.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570
  1. /*
  2. * File: portdrv_core.c
  3. * Purpose: PCI Express Port Bus Driver's Core Functions
  4. *
  5. * Copyright (C) 2004 Intel
  6. * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
  7. */
  8. #include <linux/module.h>
  9. #include <linux/pci.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/pm.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/string.h>
  15. #include <linux/slab.h>
  16. #include <linux/pcieport_if.h>
  17. #include <linux/aer.h>
  18. #include "../pci.h"
  19. #include "portdrv.h"
  20. bool pciehp_msi_disabled;
  21. static int __init pciehp_setup(char *str)
  22. {
  23. if (!strncmp(str, "nomsi", 5))
  24. pciehp_msi_disabled = true;
  25. return 1;
  26. }
  27. __setup("pcie_hp=", pciehp_setup);
  28. /**
  29. * release_pcie_device - free PCI Express port service device structure
  30. * @dev: Port service device to release
  31. *
  32. * Invoked automatically when device is being removed in response to
  33. * device_unregister(dev). Release all resources being claimed.
  34. */
  35. static void release_pcie_device(struct device *dev)
  36. {
  37. kfree(to_pcie_device(dev));
  38. }
  39. /**
  40. * pcie_port_msix_add_entry - add entry to given array of MSI-X entries
  41. * @entries: Array of MSI-X entries
  42. * @new_entry: Index of the entry to add to the array
  43. * @nr_entries: Number of entries already in the array
  44. *
  45. * Return value: Position of the added entry in the array
  46. */
  47. static int pcie_port_msix_add_entry(
  48. struct msix_entry *entries, int new_entry, int nr_entries)
  49. {
  50. int j;
  51. for (j = 0; j < nr_entries; j++)
  52. if (entries[j].entry == new_entry)
  53. return j;
  54. entries[j].entry = new_entry;
  55. return j;
  56. }
  57. /**
  58. * pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port
  59. * @dev: PCI Express port to handle
  60. * @vectors: Array of interrupt vectors to populate
  61. * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  62. *
  63. * Return value: 0 on success, error code on failure
  64. */
  65. static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
  66. {
  67. struct msix_entry *msix_entries;
  68. int idx[PCIE_PORT_DEVICE_MAXSERVICES];
  69. int nr_entries, status, pos, i, nvec;
  70. u16 reg16;
  71. u32 reg32;
  72. nr_entries = pci_msix_vec_count(dev);
  73. if (nr_entries < 0)
  74. return nr_entries;
  75. BUG_ON(!nr_entries);
  76. if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES)
  77. nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES;
  78. msix_entries = kzalloc(sizeof(*msix_entries) * nr_entries, GFP_KERNEL);
  79. if (!msix_entries)
  80. return -ENOMEM;
  81. /*
  82. * Allocate as many entries as the port wants, so that we can check
  83. * which of them will be useful. Moreover, if nr_entries is correctly
  84. * equal to the number of entries this port actually uses, we'll happily
  85. * go through without any tricks.
  86. */
  87. for (i = 0; i < nr_entries; i++)
  88. msix_entries[i].entry = i;
  89. status = pci_enable_msix_exact(dev, msix_entries, nr_entries);
  90. if (status)
  91. goto Exit;
  92. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  93. idx[i] = -1;
  94. status = -EIO;
  95. nvec = 0;
  96. if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP)) {
  97. int entry;
  98. /*
  99. * The code below follows the PCI Express Base Specification 2.0
  100. * stating in Section 6.1.6 that "PME and Hot-Plug Event
  101. * interrupts (when both are implemented) always share the same
  102. * MSI or MSI-X vector, as indicated by the Interrupt Message
  103. * Number field in the PCI Express Capabilities register", where
  104. * according to Section 7.8.2 of the specification "For MSI-X,
  105. * the value in this field indicates which MSI-X Table entry is
  106. * used to generate the interrupt message."
  107. */
  108. pcie_capability_read_word(dev, PCI_EXP_FLAGS, &reg16);
  109. entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
  110. if (entry >= nr_entries)
  111. goto Error;
  112. i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
  113. if (i == nvec)
  114. nvec++;
  115. idx[PCIE_PORT_SERVICE_PME_SHIFT] = i;
  116. idx[PCIE_PORT_SERVICE_HP_SHIFT] = i;
  117. }
  118. if (mask & PCIE_PORT_SERVICE_AER) {
  119. int entry;
  120. /*
  121. * The code below follows Section 7.10.10 of the PCI Express
  122. * Base Specification 2.0 stating that bits 31-27 of the Root
  123. * Error Status Register contain a value indicating which of the
  124. * MSI/MSI-X vectors assigned to the port is going to be used
  125. * for AER, where "For MSI-X, the value in this register
  126. * indicates which MSI-X Table entry is used to generate the
  127. * interrupt message."
  128. */
  129. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  130. pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
  131. entry = reg32 >> 27;
  132. if (entry >= nr_entries)
  133. goto Error;
  134. i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
  135. if (i == nvec)
  136. nvec++;
  137. idx[PCIE_PORT_SERVICE_AER_SHIFT] = i;
  138. }
  139. /*
  140. * If nvec is equal to the allocated number of entries, we can just use
  141. * what we have. Otherwise, the port has some extra entries not for the
  142. * services we know and we need to work around that.
  143. */
  144. if (nvec == nr_entries) {
  145. status = 0;
  146. } else {
  147. /* Drop the temporary MSI-X setup */
  148. pci_disable_msix(dev);
  149. /* Now allocate the MSI-X vectors for real */
  150. status = pci_enable_msix_exact(dev, msix_entries, nvec);
  151. if (status)
  152. goto Exit;
  153. }
  154. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  155. vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1;
  156. Exit:
  157. kfree(msix_entries);
  158. return status;
  159. Error:
  160. pci_disable_msix(dev);
  161. goto Exit;
  162. }
  163. /**
  164. * init_service_irqs - initialize irqs for PCI Express port services
  165. * @dev: PCI Express port to handle
  166. * @irqs: Array of irqs to populate
  167. * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  168. *
  169. * Return value: Interrupt mode associated with the port
  170. */
  171. static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
  172. {
  173. int i, irq = -1;
  174. /*
  175. * If MSI cannot be used for PCIe PME or hotplug, we have to use
  176. * INTx or other interrupts, e.g. system shared interrupt.
  177. */
  178. if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) ||
  179. ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
  180. if (dev->irq)
  181. irq = dev->irq;
  182. goto no_msi;
  183. }
  184. /* Try to use MSI-X if supported */
  185. if (!pcie_port_enable_msix(dev, irqs, mask))
  186. return 0;
  187. /*
  188. * We're not going to use MSI-X, so try MSI and fall back to INTx.
  189. * If neither MSI/MSI-X nor INTx available, try other interrupt. On
  190. * some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
  191. */
  192. if (!pci_enable_msi(dev) || dev->irq)
  193. irq = dev->irq;
  194. no_msi:
  195. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  196. irqs[i] = irq;
  197. irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;
  198. if (irq < 0)
  199. return -ENODEV;
  200. return 0;
  201. }
  202. static void cleanup_service_irqs(struct pci_dev *dev)
  203. {
  204. if (dev->msix_enabled)
  205. pci_disable_msix(dev);
  206. else if (dev->msi_enabled)
  207. pci_disable_msi(dev);
  208. }
  209. /**
  210. * get_port_device_capability - discover capabilities of a PCI Express port
  211. * @dev: PCI Express port to examine
  212. *
  213. * The capabilities are read from the port's PCI Express configuration registers
  214. * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and
  215. * 7.9 - 7.11.
  216. *
  217. * Return value: Bitmask of discovered port capabilities
  218. */
  219. static int get_port_device_capability(struct pci_dev *dev)
  220. {
  221. int services = 0;
  222. int cap_mask = 0;
  223. if (pcie_ports_disabled)
  224. return 0;
  225. cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
  226. | PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_DPC;
  227. if (pci_aer_available())
  228. cap_mask |= PCIE_PORT_SERVICE_AER;
  229. if (pcie_ports_auto)
  230. pcie_port_platform_notify(dev, &cap_mask);
  231. /* Hot-Plug Capable */
  232. if ((cap_mask & PCIE_PORT_SERVICE_HP) && dev->is_hotplug_bridge) {
  233. services |= PCIE_PORT_SERVICE_HP;
  234. /*
  235. * Disable hot-plug interrupts in case they have been enabled
  236. * by the BIOS and the hot-plug service driver is not loaded.
  237. */
  238. pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
  239. PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
  240. }
  241. /* AER capable */
  242. if ((cap_mask & PCIE_PORT_SERVICE_AER)
  243. && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
  244. services |= PCIE_PORT_SERVICE_AER;
  245. /*
  246. * Disable AER on this port in case it's been enabled by the
  247. * BIOS (the AER service driver will enable it when necessary).
  248. */
  249. pci_disable_pcie_error_reporting(dev);
  250. }
  251. /* VC support */
  252. if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
  253. services |= PCIE_PORT_SERVICE_VC;
  254. /* Root ports are capable of generating PME too */
  255. if ((cap_mask & PCIE_PORT_SERVICE_PME)
  256. && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
  257. services |= PCIE_PORT_SERVICE_PME;
  258. /*
  259. * Disable PME interrupt on this port in case it's been enabled
  260. * by the BIOS (the PME service driver will enable it when
  261. * necessary).
  262. */
  263. pcie_pme_interrupt_enable(dev, false);
  264. }
  265. if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC))
  266. services |= PCIE_PORT_SERVICE_DPC;
  267. return services;
  268. }
  269. /**
  270. * pcie_device_init - allocate and initialize PCI Express port service device
  271. * @pdev: PCI Express port to associate the service device with
  272. * @service: Type of service to associate with the service device
  273. * @irq: Interrupt vector to associate with the service device
  274. */
  275. static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
  276. {
  277. int retval;
  278. struct pcie_device *pcie;
  279. struct device *device;
  280. pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
  281. if (!pcie)
  282. return -ENOMEM;
  283. pcie->port = pdev;
  284. pcie->irq = irq;
  285. pcie->service = service;
  286. /* Initialize generic device interface */
  287. device = &pcie->device;
  288. device->bus = &pcie_port_bus_type;
  289. device->release = release_pcie_device; /* callback to free pcie dev */
  290. dev_set_name(device, "%s:pcie%03x",
  291. pci_name(pdev),
  292. get_descriptor_id(pci_pcie_type(pdev), service));
  293. device->parent = &pdev->dev;
  294. device_enable_async_suspend(device);
  295. retval = device_register(device);
  296. if (retval) {
  297. put_device(device);
  298. return retval;
  299. }
  300. pm_runtime_no_callbacks(device);
  301. return 0;
  302. }
  303. /**
  304. * pcie_port_device_register - register PCI Express port
  305. * @dev: PCI Express port to register
  306. *
  307. * Allocate the port extension structure and register services associated with
  308. * the port.
  309. */
  310. int pcie_port_device_register(struct pci_dev *dev)
  311. {
  312. int status, capabilities, i, nr_service;
  313. int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
  314. /* Enable PCI Express port device */
  315. status = pci_enable_device(dev);
  316. if (status)
  317. return status;
  318. /* Get and check PCI Express port services */
  319. capabilities = get_port_device_capability(dev);
  320. if (!capabilities)
  321. return 0;
  322. pci_set_master(dev);
  323. /*
  324. * Initialize service irqs. Don't use service devices that
  325. * require interrupts if there is no way to generate them.
  326. * However, some drivers may have a polling mode (e.g. pciehp_poll_mode)
  327. * that can be used in the absence of irqs. Allow them to determine
  328. * if that is to be used.
  329. */
  330. status = init_service_irqs(dev, irqs, capabilities);
  331. if (status) {
  332. capabilities &= PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_HP;
  333. if (!capabilities)
  334. goto error_disable;
  335. }
  336. /* Allocate child services if any */
  337. status = -ENODEV;
  338. nr_service = 0;
  339. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
  340. int service = 1 << i;
  341. if (!(capabilities & service))
  342. continue;
  343. if (!pcie_device_init(dev, service, irqs[i]))
  344. nr_service++;
  345. }
  346. if (!nr_service)
  347. goto error_cleanup_irqs;
  348. return 0;
  349. error_cleanup_irqs:
  350. cleanup_service_irqs(dev);
  351. error_disable:
  352. pci_disable_device(dev);
  353. return status;
  354. }
  355. #ifdef CONFIG_PM
  356. static int suspend_iter(struct device *dev, void *data)
  357. {
  358. struct pcie_port_service_driver *service_driver;
  359. if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
  360. service_driver = to_service_driver(dev->driver);
  361. if (service_driver->suspend)
  362. service_driver->suspend(to_pcie_device(dev));
  363. }
  364. return 0;
  365. }
  366. /**
  367. * pcie_port_device_suspend - suspend port services associated with a PCIe port
  368. * @dev: PCI Express port to handle
  369. */
  370. int pcie_port_device_suspend(struct device *dev)
  371. {
  372. return device_for_each_child(dev, NULL, suspend_iter);
  373. }
  374. static int resume_iter(struct device *dev, void *data)
  375. {
  376. struct pcie_port_service_driver *service_driver;
  377. if ((dev->bus == &pcie_port_bus_type) &&
  378. (dev->driver)) {
  379. service_driver = to_service_driver(dev->driver);
  380. if (service_driver->resume)
  381. service_driver->resume(to_pcie_device(dev));
  382. }
  383. return 0;
  384. }
  385. /**
  386. * pcie_port_device_resume - resume port services associated with a PCIe port
  387. * @dev: PCI Express port to handle
  388. */
  389. int pcie_port_device_resume(struct device *dev)
  390. {
  391. return device_for_each_child(dev, NULL, resume_iter);
  392. }
  393. #endif /* PM */
  394. static int remove_iter(struct device *dev, void *data)
  395. {
  396. if (dev->bus == &pcie_port_bus_type)
  397. device_unregister(dev);
  398. return 0;
  399. }
  400. /**
  401. * pcie_port_device_remove - unregister PCI Express port service devices
  402. * @dev: PCI Express port the service devices to unregister are associated with
  403. *
  404. * Remove PCI Express port service devices associated with given port and
  405. * disable MSI-X or MSI for the port.
  406. */
  407. void pcie_port_device_remove(struct pci_dev *dev)
  408. {
  409. device_for_each_child(&dev->dev, NULL, remove_iter);
  410. cleanup_service_irqs(dev);
  411. pci_disable_device(dev);
  412. }
  413. /**
  414. * pcie_port_probe_service - probe driver for given PCI Express port service
  415. * @dev: PCI Express port service device to probe against
  416. *
  417. * If PCI Express port service driver is registered with
  418. * pcie_port_service_register(), this function will be called by the driver core
  419. * whenever match is found between the driver and a port service device.
  420. */
  421. static int pcie_port_probe_service(struct device *dev)
  422. {
  423. struct pcie_device *pciedev;
  424. struct pcie_port_service_driver *driver;
  425. int status;
  426. if (!dev || !dev->driver)
  427. return -ENODEV;
  428. driver = to_service_driver(dev->driver);
  429. if (!driver || !driver->probe)
  430. return -ENODEV;
  431. pciedev = to_pcie_device(dev);
  432. status = driver->probe(pciedev);
  433. if (status)
  434. return status;
  435. get_device(dev);
  436. return 0;
  437. }
  438. /**
  439. * pcie_port_remove_service - detach driver from given PCI Express port service
  440. * @dev: PCI Express port service device to handle
  441. *
  442. * If PCI Express port service driver is registered with
  443. * pcie_port_service_register(), this function will be called by the driver core
  444. * when device_unregister() is called for the port service device associated
  445. * with the driver.
  446. */
  447. static int pcie_port_remove_service(struct device *dev)
  448. {
  449. struct pcie_device *pciedev;
  450. struct pcie_port_service_driver *driver;
  451. if (!dev || !dev->driver)
  452. return 0;
  453. pciedev = to_pcie_device(dev);
  454. driver = to_service_driver(dev->driver);
  455. if (driver && driver->remove) {
  456. driver->remove(pciedev);
  457. put_device(dev);
  458. }
  459. return 0;
  460. }
  461. /**
  462. * pcie_port_shutdown_service - shut down given PCI Express port service
  463. * @dev: PCI Express port service device to handle
  464. *
  465. * If PCI Express port service driver is registered with
  466. * pcie_port_service_register(), this function will be called by the driver core
  467. * when device_shutdown() is called for the port service device associated
  468. * with the driver.
  469. */
  470. static void pcie_port_shutdown_service(struct device *dev) {}
  471. /**
  472. * pcie_port_service_register - register PCI Express port service driver
  473. * @new: PCI Express port service driver to register
  474. */
  475. int pcie_port_service_register(struct pcie_port_service_driver *new)
  476. {
  477. if (pcie_ports_disabled)
  478. return -ENODEV;
  479. new->driver.name = new->name;
  480. new->driver.bus = &pcie_port_bus_type;
  481. new->driver.probe = pcie_port_probe_service;
  482. new->driver.remove = pcie_port_remove_service;
  483. new->driver.shutdown = pcie_port_shutdown_service;
  484. return driver_register(&new->driver);
  485. }
  486. EXPORT_SYMBOL(pcie_port_service_register);
  487. /**
  488. * pcie_port_service_unregister - unregister PCI Express port service driver
  489. * @drv: PCI Express port service driver to unregister
  490. */
  491. void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
  492. {
  493. driver_unregister(&drv->driver);
  494. }
  495. EXPORT_SYMBOL(pcie_port_service_unregister);