rdma.c 52 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080
  1. /*
  2. * NVMe over Fabrics RDMA host code.
  3. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/slab.h>
  18. #include <linux/err.h>
  19. #include <linux/string.h>
  20. #include <linux/atomic.h>
  21. #include <linux/blk-mq.h>
  22. #include <linux/types.h>
  23. #include <linux/list.h>
  24. #include <linux/mutex.h>
  25. #include <linux/scatterlist.h>
  26. #include <linux/nvme.h>
  27. #include <asm/unaligned.h>
  28. #include <rdma/ib_verbs.h>
  29. #include <rdma/rdma_cm.h>
  30. #include <linux/nvme-rdma.h>
  31. #include "nvme.h"
  32. #include "fabrics.h"
  33. #define NVME_RDMA_CONNECT_TIMEOUT_MS 1000 /* 1 second */
  34. #define NVME_RDMA_MAX_SEGMENT_SIZE 0xffffff /* 24-bit SGL field */
  35. #define NVME_RDMA_MAX_SEGMENTS 256
  36. #define NVME_RDMA_MAX_INLINE_SEGMENTS 1
  37. static const char *const nvme_rdma_cm_status_strs[] = {
  38. [NVME_RDMA_CM_INVALID_LEN] = "invalid length",
  39. [NVME_RDMA_CM_INVALID_RECFMT] = "invalid record format",
  40. [NVME_RDMA_CM_INVALID_QID] = "invalid queue ID",
  41. [NVME_RDMA_CM_INVALID_HSQSIZE] = "invalid host SQ size",
  42. [NVME_RDMA_CM_INVALID_HRQSIZE] = "invalid host RQ size",
  43. [NVME_RDMA_CM_NO_RSC] = "resource not found",
  44. [NVME_RDMA_CM_INVALID_IRD] = "invalid IRD",
  45. [NVME_RDMA_CM_INVALID_ORD] = "Invalid ORD",
  46. };
  47. static const char *nvme_rdma_cm_msg(enum nvme_rdma_cm_status status)
  48. {
  49. size_t index = status;
  50. if (index < ARRAY_SIZE(nvme_rdma_cm_status_strs) &&
  51. nvme_rdma_cm_status_strs[index])
  52. return nvme_rdma_cm_status_strs[index];
  53. else
  54. return "unrecognized reason";
  55. };
  56. /*
  57. * We handle AEN commands ourselves and don't even let the
  58. * block layer know about them.
  59. */
  60. #define NVME_RDMA_NR_AEN_COMMANDS 1
  61. #define NVME_RDMA_AQ_BLKMQ_DEPTH \
  62. (NVMF_AQ_DEPTH - NVME_RDMA_NR_AEN_COMMANDS)
  63. struct nvme_rdma_device {
  64. struct ib_device *dev;
  65. struct ib_pd *pd;
  66. struct kref ref;
  67. struct list_head entry;
  68. };
  69. struct nvme_rdma_qe {
  70. struct ib_cqe cqe;
  71. void *data;
  72. u64 dma;
  73. };
  74. struct nvme_rdma_queue;
  75. struct nvme_rdma_request {
  76. struct nvme_request req;
  77. struct ib_mr *mr;
  78. struct nvme_rdma_qe sqe;
  79. struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
  80. u32 num_sge;
  81. int nents;
  82. bool inline_data;
  83. struct ib_reg_wr reg_wr;
  84. struct ib_cqe reg_cqe;
  85. struct nvme_rdma_queue *queue;
  86. struct sg_table sg_table;
  87. struct scatterlist first_sgl[];
  88. };
  89. enum nvme_rdma_queue_flags {
  90. NVME_RDMA_Q_CONNECTED = (1 << 0),
  91. NVME_RDMA_IB_QUEUE_ALLOCATED = (1 << 1),
  92. NVME_RDMA_Q_DELETING = (1 << 2),
  93. NVME_RDMA_Q_LIVE = (1 << 3),
  94. };
  95. struct nvme_rdma_queue {
  96. struct nvme_rdma_qe *rsp_ring;
  97. u8 sig_count;
  98. int queue_size;
  99. size_t cmnd_capsule_len;
  100. struct nvme_rdma_ctrl *ctrl;
  101. struct nvme_rdma_device *device;
  102. struct ib_cq *ib_cq;
  103. struct ib_qp *qp;
  104. unsigned long flags;
  105. struct rdma_cm_id *cm_id;
  106. int cm_error;
  107. struct completion cm_done;
  108. };
  109. struct nvme_rdma_ctrl {
  110. /* read and written in the hot path */
  111. spinlock_t lock;
  112. /* read only in the hot path */
  113. struct nvme_rdma_queue *queues;
  114. u32 queue_count;
  115. /* other member variables */
  116. struct blk_mq_tag_set tag_set;
  117. struct work_struct delete_work;
  118. struct work_struct reset_work;
  119. struct work_struct err_work;
  120. struct nvme_rdma_qe async_event_sqe;
  121. int reconnect_delay;
  122. struct delayed_work reconnect_work;
  123. struct list_head list;
  124. struct blk_mq_tag_set admin_tag_set;
  125. struct nvme_rdma_device *device;
  126. u64 cap;
  127. u32 max_fr_pages;
  128. union {
  129. struct sockaddr addr;
  130. struct sockaddr_in addr_in;
  131. };
  132. struct nvme_ctrl ctrl;
  133. };
  134. static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
  135. {
  136. return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
  137. }
  138. static LIST_HEAD(device_list);
  139. static DEFINE_MUTEX(device_list_mutex);
  140. static LIST_HEAD(nvme_rdma_ctrl_list);
  141. static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
  142. static struct workqueue_struct *nvme_rdma_wq;
  143. /*
  144. * Disabling this option makes small I/O goes faster, but is fundamentally
  145. * unsafe. With it turned off we will have to register a global rkey that
  146. * allows read and write access to all physical memory.
  147. */
  148. static bool register_always = true;
  149. module_param(register_always, bool, 0444);
  150. MODULE_PARM_DESC(register_always,
  151. "Use memory registration even for contiguous memory regions");
  152. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  153. struct rdma_cm_event *event);
  154. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
  155. /* XXX: really should move to a generic header sooner or later.. */
  156. static inline void put_unaligned_le24(u32 val, u8 *p)
  157. {
  158. *p++ = val;
  159. *p++ = val >> 8;
  160. *p++ = val >> 16;
  161. }
  162. static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
  163. {
  164. return queue - queue->ctrl->queues;
  165. }
  166. static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
  167. {
  168. return queue->cmnd_capsule_len - sizeof(struct nvme_command);
  169. }
  170. static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  171. size_t capsule_size, enum dma_data_direction dir)
  172. {
  173. ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
  174. kfree(qe->data);
  175. }
  176. static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  177. size_t capsule_size, enum dma_data_direction dir)
  178. {
  179. qe->data = kzalloc(capsule_size, GFP_KERNEL);
  180. if (!qe->data)
  181. return -ENOMEM;
  182. qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
  183. if (ib_dma_mapping_error(ibdev, qe->dma)) {
  184. kfree(qe->data);
  185. return -ENOMEM;
  186. }
  187. return 0;
  188. }
  189. static void nvme_rdma_free_ring(struct ib_device *ibdev,
  190. struct nvme_rdma_qe *ring, size_t ib_queue_size,
  191. size_t capsule_size, enum dma_data_direction dir)
  192. {
  193. int i;
  194. for (i = 0; i < ib_queue_size; i++)
  195. nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
  196. kfree(ring);
  197. }
  198. static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
  199. size_t ib_queue_size, size_t capsule_size,
  200. enum dma_data_direction dir)
  201. {
  202. struct nvme_rdma_qe *ring;
  203. int i;
  204. ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
  205. if (!ring)
  206. return NULL;
  207. for (i = 0; i < ib_queue_size; i++) {
  208. if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
  209. goto out_free_ring;
  210. }
  211. return ring;
  212. out_free_ring:
  213. nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
  214. return NULL;
  215. }
  216. static void nvme_rdma_qp_event(struct ib_event *event, void *context)
  217. {
  218. pr_debug("QP event %s (%d)\n",
  219. ib_event_msg(event->event), event->event);
  220. }
  221. static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
  222. {
  223. wait_for_completion_interruptible_timeout(&queue->cm_done,
  224. msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
  225. return queue->cm_error;
  226. }
  227. static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
  228. {
  229. struct nvme_rdma_device *dev = queue->device;
  230. struct ib_qp_init_attr init_attr;
  231. int ret;
  232. memset(&init_attr, 0, sizeof(init_attr));
  233. init_attr.event_handler = nvme_rdma_qp_event;
  234. /* +1 for drain */
  235. init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
  236. /* +1 for drain */
  237. init_attr.cap.max_recv_wr = queue->queue_size + 1;
  238. init_attr.cap.max_recv_sge = 1;
  239. init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS;
  240. init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
  241. init_attr.qp_type = IB_QPT_RC;
  242. init_attr.send_cq = queue->ib_cq;
  243. init_attr.recv_cq = queue->ib_cq;
  244. ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
  245. queue->qp = queue->cm_id->qp;
  246. return ret;
  247. }
  248. static int nvme_rdma_reinit_request(void *data, struct request *rq)
  249. {
  250. struct nvme_rdma_ctrl *ctrl = data;
  251. struct nvme_rdma_device *dev = ctrl->device;
  252. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  253. int ret = 0;
  254. if (!req->mr->need_inval)
  255. goto out;
  256. ib_dereg_mr(req->mr);
  257. req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG,
  258. ctrl->max_fr_pages);
  259. if (IS_ERR(req->mr)) {
  260. ret = PTR_ERR(req->mr);
  261. req->mr = NULL;
  262. goto out;
  263. }
  264. req->mr->need_inval = false;
  265. out:
  266. return ret;
  267. }
  268. static void __nvme_rdma_exit_request(struct nvme_rdma_ctrl *ctrl,
  269. struct request *rq, unsigned int queue_idx)
  270. {
  271. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  272. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  273. struct nvme_rdma_device *dev = queue->device;
  274. if (req->mr)
  275. ib_dereg_mr(req->mr);
  276. nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
  277. DMA_TO_DEVICE);
  278. }
  279. static void nvme_rdma_exit_request(void *data, struct request *rq,
  280. unsigned int hctx_idx, unsigned int rq_idx)
  281. {
  282. return __nvme_rdma_exit_request(data, rq, hctx_idx + 1);
  283. }
  284. static void nvme_rdma_exit_admin_request(void *data, struct request *rq,
  285. unsigned int hctx_idx, unsigned int rq_idx)
  286. {
  287. return __nvme_rdma_exit_request(data, rq, 0);
  288. }
  289. static int __nvme_rdma_init_request(struct nvme_rdma_ctrl *ctrl,
  290. struct request *rq, unsigned int queue_idx)
  291. {
  292. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  293. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  294. struct nvme_rdma_device *dev = queue->device;
  295. struct ib_device *ibdev = dev->dev;
  296. int ret;
  297. BUG_ON(queue_idx >= ctrl->queue_count);
  298. ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command),
  299. DMA_TO_DEVICE);
  300. if (ret)
  301. return ret;
  302. req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG,
  303. ctrl->max_fr_pages);
  304. if (IS_ERR(req->mr)) {
  305. ret = PTR_ERR(req->mr);
  306. goto out_free_qe;
  307. }
  308. req->queue = queue;
  309. return 0;
  310. out_free_qe:
  311. nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
  312. DMA_TO_DEVICE);
  313. return -ENOMEM;
  314. }
  315. static int nvme_rdma_init_request(void *data, struct request *rq,
  316. unsigned int hctx_idx, unsigned int rq_idx,
  317. unsigned int numa_node)
  318. {
  319. return __nvme_rdma_init_request(data, rq, hctx_idx + 1);
  320. }
  321. static int nvme_rdma_init_admin_request(void *data, struct request *rq,
  322. unsigned int hctx_idx, unsigned int rq_idx,
  323. unsigned int numa_node)
  324. {
  325. return __nvme_rdma_init_request(data, rq, 0);
  326. }
  327. static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  328. unsigned int hctx_idx)
  329. {
  330. struct nvme_rdma_ctrl *ctrl = data;
  331. struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
  332. BUG_ON(hctx_idx >= ctrl->queue_count);
  333. hctx->driver_data = queue;
  334. return 0;
  335. }
  336. static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  337. unsigned int hctx_idx)
  338. {
  339. struct nvme_rdma_ctrl *ctrl = data;
  340. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  341. BUG_ON(hctx_idx != 0);
  342. hctx->driver_data = queue;
  343. return 0;
  344. }
  345. static void nvme_rdma_free_dev(struct kref *ref)
  346. {
  347. struct nvme_rdma_device *ndev =
  348. container_of(ref, struct nvme_rdma_device, ref);
  349. mutex_lock(&device_list_mutex);
  350. list_del(&ndev->entry);
  351. mutex_unlock(&device_list_mutex);
  352. ib_dealloc_pd(ndev->pd);
  353. kfree(ndev);
  354. }
  355. static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
  356. {
  357. kref_put(&dev->ref, nvme_rdma_free_dev);
  358. }
  359. static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
  360. {
  361. return kref_get_unless_zero(&dev->ref);
  362. }
  363. static struct nvme_rdma_device *
  364. nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
  365. {
  366. struct nvme_rdma_device *ndev;
  367. mutex_lock(&device_list_mutex);
  368. list_for_each_entry(ndev, &device_list, entry) {
  369. if (ndev->dev->node_guid == cm_id->device->node_guid &&
  370. nvme_rdma_dev_get(ndev))
  371. goto out_unlock;
  372. }
  373. ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
  374. if (!ndev)
  375. goto out_err;
  376. ndev->dev = cm_id->device;
  377. kref_init(&ndev->ref);
  378. ndev->pd = ib_alloc_pd(ndev->dev,
  379. register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
  380. if (IS_ERR(ndev->pd))
  381. goto out_free_dev;
  382. if (!(ndev->dev->attrs.device_cap_flags &
  383. IB_DEVICE_MEM_MGT_EXTENSIONS)) {
  384. dev_err(&ndev->dev->dev,
  385. "Memory registrations not supported.\n");
  386. goto out_free_pd;
  387. }
  388. list_add(&ndev->entry, &device_list);
  389. out_unlock:
  390. mutex_unlock(&device_list_mutex);
  391. return ndev;
  392. out_free_pd:
  393. ib_dealloc_pd(ndev->pd);
  394. out_free_dev:
  395. kfree(ndev);
  396. out_err:
  397. mutex_unlock(&device_list_mutex);
  398. return NULL;
  399. }
  400. static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
  401. {
  402. struct nvme_rdma_device *dev;
  403. struct ib_device *ibdev;
  404. if (!test_and_clear_bit(NVME_RDMA_IB_QUEUE_ALLOCATED, &queue->flags))
  405. return;
  406. dev = queue->device;
  407. ibdev = dev->dev;
  408. rdma_destroy_qp(queue->cm_id);
  409. ib_free_cq(queue->ib_cq);
  410. nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
  411. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  412. nvme_rdma_dev_put(dev);
  413. }
  414. static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue,
  415. struct nvme_rdma_device *dev)
  416. {
  417. struct ib_device *ibdev = dev->dev;
  418. const int send_wr_factor = 3; /* MR, SEND, INV */
  419. const int cq_factor = send_wr_factor + 1; /* + RECV */
  420. int comp_vector, idx = nvme_rdma_queue_idx(queue);
  421. int ret;
  422. queue->device = dev;
  423. /*
  424. * The admin queue is barely used once the controller is live, so don't
  425. * bother to spread it out.
  426. */
  427. if (idx == 0)
  428. comp_vector = 0;
  429. else
  430. comp_vector = idx % ibdev->num_comp_vectors;
  431. /* +1 for ib_stop_cq */
  432. queue->ib_cq = ib_alloc_cq(dev->dev, queue,
  433. cq_factor * queue->queue_size + 1, comp_vector,
  434. IB_POLL_SOFTIRQ);
  435. if (IS_ERR(queue->ib_cq)) {
  436. ret = PTR_ERR(queue->ib_cq);
  437. goto out;
  438. }
  439. ret = nvme_rdma_create_qp(queue, send_wr_factor);
  440. if (ret)
  441. goto out_destroy_ib_cq;
  442. queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
  443. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  444. if (!queue->rsp_ring) {
  445. ret = -ENOMEM;
  446. goto out_destroy_qp;
  447. }
  448. set_bit(NVME_RDMA_IB_QUEUE_ALLOCATED, &queue->flags);
  449. return 0;
  450. out_destroy_qp:
  451. ib_destroy_qp(queue->qp);
  452. out_destroy_ib_cq:
  453. ib_free_cq(queue->ib_cq);
  454. out:
  455. return ret;
  456. }
  457. static int nvme_rdma_init_queue(struct nvme_rdma_ctrl *ctrl,
  458. int idx, size_t queue_size)
  459. {
  460. struct nvme_rdma_queue *queue;
  461. int ret;
  462. queue = &ctrl->queues[idx];
  463. queue->ctrl = ctrl;
  464. init_completion(&queue->cm_done);
  465. if (idx > 0)
  466. queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
  467. else
  468. queue->cmnd_capsule_len = sizeof(struct nvme_command);
  469. queue->queue_size = queue_size;
  470. queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
  471. RDMA_PS_TCP, IB_QPT_RC);
  472. if (IS_ERR(queue->cm_id)) {
  473. dev_info(ctrl->ctrl.device,
  474. "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
  475. return PTR_ERR(queue->cm_id);
  476. }
  477. queue->cm_error = -ETIMEDOUT;
  478. ret = rdma_resolve_addr(queue->cm_id, NULL, &ctrl->addr,
  479. NVME_RDMA_CONNECT_TIMEOUT_MS);
  480. if (ret) {
  481. dev_info(ctrl->ctrl.device,
  482. "rdma_resolve_addr failed (%d).\n", ret);
  483. goto out_destroy_cm_id;
  484. }
  485. ret = nvme_rdma_wait_for_cm(queue);
  486. if (ret) {
  487. dev_info(ctrl->ctrl.device,
  488. "rdma_resolve_addr wait failed (%d).\n", ret);
  489. goto out_destroy_cm_id;
  490. }
  491. clear_bit(NVME_RDMA_Q_DELETING, &queue->flags);
  492. set_bit(NVME_RDMA_Q_CONNECTED, &queue->flags);
  493. return 0;
  494. out_destroy_cm_id:
  495. nvme_rdma_destroy_queue_ib(queue);
  496. rdma_destroy_id(queue->cm_id);
  497. return ret;
  498. }
  499. static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
  500. {
  501. rdma_disconnect(queue->cm_id);
  502. ib_drain_qp(queue->qp);
  503. }
  504. static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
  505. {
  506. nvme_rdma_destroy_queue_ib(queue);
  507. rdma_destroy_id(queue->cm_id);
  508. }
  509. static void nvme_rdma_stop_and_free_queue(struct nvme_rdma_queue *queue)
  510. {
  511. if (test_and_set_bit(NVME_RDMA_Q_DELETING, &queue->flags))
  512. return;
  513. nvme_rdma_stop_queue(queue);
  514. nvme_rdma_free_queue(queue);
  515. }
  516. static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
  517. {
  518. int i;
  519. for (i = 1; i < ctrl->queue_count; i++)
  520. nvme_rdma_stop_and_free_queue(&ctrl->queues[i]);
  521. }
  522. static int nvme_rdma_connect_io_queues(struct nvme_rdma_ctrl *ctrl)
  523. {
  524. int i, ret = 0;
  525. for (i = 1; i < ctrl->queue_count; i++) {
  526. ret = nvmf_connect_io_queue(&ctrl->ctrl, i);
  527. if (ret) {
  528. dev_info(ctrl->ctrl.device,
  529. "failed to connect i/o queue: %d\n", ret);
  530. goto out_free_queues;
  531. }
  532. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags);
  533. }
  534. return 0;
  535. out_free_queues:
  536. nvme_rdma_free_io_queues(ctrl);
  537. return ret;
  538. }
  539. static int nvme_rdma_init_io_queues(struct nvme_rdma_ctrl *ctrl)
  540. {
  541. int i, ret;
  542. for (i = 1; i < ctrl->queue_count; i++) {
  543. ret = nvme_rdma_init_queue(ctrl, i,
  544. ctrl->ctrl.opts->queue_size);
  545. if (ret) {
  546. dev_info(ctrl->ctrl.device,
  547. "failed to initialize i/o queue: %d\n", ret);
  548. goto out_free_queues;
  549. }
  550. }
  551. return 0;
  552. out_free_queues:
  553. for (i--; i >= 1; i--)
  554. nvme_rdma_stop_and_free_queue(&ctrl->queues[i]);
  555. return ret;
  556. }
  557. static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl)
  558. {
  559. nvme_rdma_free_qe(ctrl->queues[0].device->dev, &ctrl->async_event_sqe,
  560. sizeof(struct nvme_command), DMA_TO_DEVICE);
  561. nvme_rdma_stop_and_free_queue(&ctrl->queues[0]);
  562. blk_cleanup_queue(ctrl->ctrl.admin_q);
  563. blk_mq_free_tag_set(&ctrl->admin_tag_set);
  564. nvme_rdma_dev_put(ctrl->device);
  565. }
  566. static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
  567. {
  568. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  569. if (list_empty(&ctrl->list))
  570. goto free_ctrl;
  571. mutex_lock(&nvme_rdma_ctrl_mutex);
  572. list_del(&ctrl->list);
  573. mutex_unlock(&nvme_rdma_ctrl_mutex);
  574. kfree(ctrl->queues);
  575. nvmf_free_options(nctrl->opts);
  576. free_ctrl:
  577. kfree(ctrl);
  578. }
  579. static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
  580. {
  581. struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
  582. struct nvme_rdma_ctrl, reconnect_work);
  583. bool changed;
  584. int ret;
  585. if (ctrl->queue_count > 1) {
  586. nvme_rdma_free_io_queues(ctrl);
  587. ret = blk_mq_reinit_tagset(&ctrl->tag_set);
  588. if (ret)
  589. goto requeue;
  590. }
  591. nvme_rdma_stop_and_free_queue(&ctrl->queues[0]);
  592. ret = blk_mq_reinit_tagset(&ctrl->admin_tag_set);
  593. if (ret)
  594. goto requeue;
  595. ret = nvme_rdma_init_queue(ctrl, 0, NVMF_AQ_DEPTH);
  596. if (ret)
  597. goto requeue;
  598. blk_mq_start_stopped_hw_queues(ctrl->ctrl.admin_q, true);
  599. ret = nvmf_connect_admin_queue(&ctrl->ctrl);
  600. if (ret)
  601. goto stop_admin_q;
  602. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags);
  603. ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);
  604. if (ret)
  605. goto stop_admin_q;
  606. nvme_start_keep_alive(&ctrl->ctrl);
  607. if (ctrl->queue_count > 1) {
  608. ret = nvme_rdma_init_io_queues(ctrl);
  609. if (ret)
  610. goto stop_admin_q;
  611. ret = nvme_rdma_connect_io_queues(ctrl);
  612. if (ret)
  613. goto stop_admin_q;
  614. }
  615. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  616. WARN_ON_ONCE(!changed);
  617. if (ctrl->queue_count > 1) {
  618. nvme_start_queues(&ctrl->ctrl);
  619. nvme_queue_scan(&ctrl->ctrl);
  620. nvme_queue_async_events(&ctrl->ctrl);
  621. }
  622. dev_info(ctrl->ctrl.device, "Successfully reconnected\n");
  623. return;
  624. stop_admin_q:
  625. blk_mq_stop_hw_queues(ctrl->ctrl.admin_q);
  626. requeue:
  627. /* Make sure we are not resetting/deleting */
  628. if (ctrl->ctrl.state == NVME_CTRL_RECONNECTING) {
  629. dev_info(ctrl->ctrl.device,
  630. "Failed reconnect attempt, requeueing...\n");
  631. queue_delayed_work(nvme_rdma_wq, &ctrl->reconnect_work,
  632. ctrl->reconnect_delay * HZ);
  633. }
  634. }
  635. static void nvme_rdma_error_recovery_work(struct work_struct *work)
  636. {
  637. struct nvme_rdma_ctrl *ctrl = container_of(work,
  638. struct nvme_rdma_ctrl, err_work);
  639. int i;
  640. nvme_stop_keep_alive(&ctrl->ctrl);
  641. for (i = 0; i < ctrl->queue_count; i++) {
  642. clear_bit(NVME_RDMA_Q_CONNECTED, &ctrl->queues[i].flags);
  643. clear_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags);
  644. }
  645. if (ctrl->queue_count > 1)
  646. nvme_stop_queues(&ctrl->ctrl);
  647. blk_mq_stop_hw_queues(ctrl->ctrl.admin_q);
  648. /* We must take care of fastfail/requeue all our inflight requests */
  649. if (ctrl->queue_count > 1)
  650. blk_mq_tagset_busy_iter(&ctrl->tag_set,
  651. nvme_cancel_request, &ctrl->ctrl);
  652. blk_mq_tagset_busy_iter(&ctrl->admin_tag_set,
  653. nvme_cancel_request, &ctrl->ctrl);
  654. dev_info(ctrl->ctrl.device, "reconnecting in %d seconds\n",
  655. ctrl->reconnect_delay);
  656. queue_delayed_work(nvme_rdma_wq, &ctrl->reconnect_work,
  657. ctrl->reconnect_delay * HZ);
  658. }
  659. static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
  660. {
  661. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING))
  662. return;
  663. queue_work(nvme_rdma_wq, &ctrl->err_work);
  664. }
  665. static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
  666. const char *op)
  667. {
  668. struct nvme_rdma_queue *queue = cq->cq_context;
  669. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  670. if (ctrl->ctrl.state == NVME_CTRL_LIVE)
  671. dev_info(ctrl->ctrl.device,
  672. "%s for CQE 0x%p failed with status %s (%d)\n",
  673. op, wc->wr_cqe,
  674. ib_wc_status_msg(wc->status), wc->status);
  675. nvme_rdma_error_recovery(ctrl);
  676. }
  677. static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
  678. {
  679. if (unlikely(wc->status != IB_WC_SUCCESS))
  680. nvme_rdma_wr_error(cq, wc, "MEMREG");
  681. }
  682. static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
  683. {
  684. if (unlikely(wc->status != IB_WC_SUCCESS))
  685. nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
  686. }
  687. static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
  688. struct nvme_rdma_request *req)
  689. {
  690. struct ib_send_wr *bad_wr;
  691. struct ib_send_wr wr = {
  692. .opcode = IB_WR_LOCAL_INV,
  693. .next = NULL,
  694. .num_sge = 0,
  695. .send_flags = 0,
  696. .ex.invalidate_rkey = req->mr->rkey,
  697. };
  698. req->reg_cqe.done = nvme_rdma_inv_rkey_done;
  699. wr.wr_cqe = &req->reg_cqe;
  700. return ib_post_send(queue->qp, &wr, &bad_wr);
  701. }
  702. static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
  703. struct request *rq)
  704. {
  705. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  706. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  707. struct nvme_rdma_device *dev = queue->device;
  708. struct ib_device *ibdev = dev->dev;
  709. int res;
  710. if (!blk_rq_bytes(rq))
  711. return;
  712. if (req->mr->need_inval) {
  713. res = nvme_rdma_inv_rkey(queue, req);
  714. if (res < 0) {
  715. dev_err(ctrl->ctrl.device,
  716. "Queueing INV WR for rkey %#x failed (%d)\n",
  717. req->mr->rkey, res);
  718. nvme_rdma_error_recovery(queue->ctrl);
  719. }
  720. }
  721. ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
  722. req->nents, rq_data_dir(rq) ==
  723. WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  724. nvme_cleanup_cmd(rq);
  725. sg_free_table_chained(&req->sg_table, true);
  726. }
  727. static int nvme_rdma_set_sg_null(struct nvme_command *c)
  728. {
  729. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  730. sg->addr = 0;
  731. put_unaligned_le24(0, sg->length);
  732. put_unaligned_le32(0, sg->key);
  733. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  734. return 0;
  735. }
  736. static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
  737. struct nvme_rdma_request *req, struct nvme_command *c)
  738. {
  739. struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
  740. req->sge[1].addr = sg_dma_address(req->sg_table.sgl);
  741. req->sge[1].length = sg_dma_len(req->sg_table.sgl);
  742. req->sge[1].lkey = queue->device->pd->local_dma_lkey;
  743. sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
  744. sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl));
  745. sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
  746. req->inline_data = true;
  747. req->num_sge++;
  748. return 0;
  749. }
  750. static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
  751. struct nvme_rdma_request *req, struct nvme_command *c)
  752. {
  753. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  754. sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
  755. put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
  756. put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
  757. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  758. return 0;
  759. }
  760. static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
  761. struct nvme_rdma_request *req, struct nvme_command *c,
  762. int count)
  763. {
  764. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  765. int nr;
  766. nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, PAGE_SIZE);
  767. if (nr < count) {
  768. if (nr < 0)
  769. return nr;
  770. return -EINVAL;
  771. }
  772. ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
  773. req->reg_cqe.done = nvme_rdma_memreg_done;
  774. memset(&req->reg_wr, 0, sizeof(req->reg_wr));
  775. req->reg_wr.wr.opcode = IB_WR_REG_MR;
  776. req->reg_wr.wr.wr_cqe = &req->reg_cqe;
  777. req->reg_wr.wr.num_sge = 0;
  778. req->reg_wr.mr = req->mr;
  779. req->reg_wr.key = req->mr->rkey;
  780. req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
  781. IB_ACCESS_REMOTE_READ |
  782. IB_ACCESS_REMOTE_WRITE;
  783. req->mr->need_inval = true;
  784. sg->addr = cpu_to_le64(req->mr->iova);
  785. put_unaligned_le24(req->mr->length, sg->length);
  786. put_unaligned_le32(req->mr->rkey, sg->key);
  787. sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
  788. NVME_SGL_FMT_INVALIDATE;
  789. return 0;
  790. }
  791. static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
  792. struct request *rq, struct nvme_command *c)
  793. {
  794. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  795. struct nvme_rdma_device *dev = queue->device;
  796. struct ib_device *ibdev = dev->dev;
  797. int count, ret;
  798. req->num_sge = 1;
  799. req->inline_data = false;
  800. req->mr->need_inval = false;
  801. c->common.flags |= NVME_CMD_SGL_METABUF;
  802. if (!blk_rq_bytes(rq))
  803. return nvme_rdma_set_sg_null(c);
  804. req->sg_table.sgl = req->first_sgl;
  805. ret = sg_alloc_table_chained(&req->sg_table,
  806. blk_rq_nr_phys_segments(rq), req->sg_table.sgl);
  807. if (ret)
  808. return -ENOMEM;
  809. req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
  810. count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents,
  811. rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  812. if (unlikely(count <= 0)) {
  813. sg_free_table_chained(&req->sg_table, true);
  814. return -EIO;
  815. }
  816. if (count == 1) {
  817. if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
  818. blk_rq_payload_bytes(rq) <=
  819. nvme_rdma_inline_data_size(queue))
  820. return nvme_rdma_map_sg_inline(queue, req, c);
  821. if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY)
  822. return nvme_rdma_map_sg_single(queue, req, c);
  823. }
  824. return nvme_rdma_map_sg_fr(queue, req, c, count);
  825. }
  826. static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
  827. {
  828. if (unlikely(wc->status != IB_WC_SUCCESS))
  829. nvme_rdma_wr_error(cq, wc, "SEND");
  830. }
  831. static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
  832. struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
  833. struct ib_send_wr *first, bool flush)
  834. {
  835. struct ib_send_wr wr, *bad_wr;
  836. int ret;
  837. sge->addr = qe->dma;
  838. sge->length = sizeof(struct nvme_command),
  839. sge->lkey = queue->device->pd->local_dma_lkey;
  840. qe->cqe.done = nvme_rdma_send_done;
  841. wr.next = NULL;
  842. wr.wr_cqe = &qe->cqe;
  843. wr.sg_list = sge;
  844. wr.num_sge = num_sge;
  845. wr.opcode = IB_WR_SEND;
  846. wr.send_flags = 0;
  847. /*
  848. * Unsignalled send completions are another giant desaster in the
  849. * IB Verbs spec: If we don't regularly post signalled sends
  850. * the send queue will fill up and only a QP reset will rescue us.
  851. * Would have been way to obvious to handle this in hardware or
  852. * at least the RDMA stack..
  853. *
  854. * This messy and racy code sniplet is copy and pasted from the iSER
  855. * initiator, and the magic '32' comes from there as well.
  856. *
  857. * Always signal the flushes. The magic request used for the flush
  858. * sequencer is not allocated in our driver's tagset and it's
  859. * triggered to be freed by blk_cleanup_queue(). So we need to
  860. * always mark it as signaled to ensure that the "wr_cqe", which is
  861. * embeded in request's payload, is not freed when __ib_process_cq()
  862. * calls wr_cqe->done().
  863. */
  864. if ((++queue->sig_count % 32) == 0 || flush)
  865. wr.send_flags |= IB_SEND_SIGNALED;
  866. if (first)
  867. first->next = &wr;
  868. else
  869. first = &wr;
  870. ret = ib_post_send(queue->qp, first, &bad_wr);
  871. if (ret) {
  872. dev_err(queue->ctrl->ctrl.device,
  873. "%s failed with error code %d\n", __func__, ret);
  874. }
  875. return ret;
  876. }
  877. static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
  878. struct nvme_rdma_qe *qe)
  879. {
  880. struct ib_recv_wr wr, *bad_wr;
  881. struct ib_sge list;
  882. int ret;
  883. list.addr = qe->dma;
  884. list.length = sizeof(struct nvme_completion);
  885. list.lkey = queue->device->pd->local_dma_lkey;
  886. qe->cqe.done = nvme_rdma_recv_done;
  887. wr.next = NULL;
  888. wr.wr_cqe = &qe->cqe;
  889. wr.sg_list = &list;
  890. wr.num_sge = 1;
  891. ret = ib_post_recv(queue->qp, &wr, &bad_wr);
  892. if (ret) {
  893. dev_err(queue->ctrl->ctrl.device,
  894. "%s failed with error code %d\n", __func__, ret);
  895. }
  896. return ret;
  897. }
  898. static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
  899. {
  900. u32 queue_idx = nvme_rdma_queue_idx(queue);
  901. if (queue_idx == 0)
  902. return queue->ctrl->admin_tag_set.tags[queue_idx];
  903. return queue->ctrl->tag_set.tags[queue_idx - 1];
  904. }
  905. static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg, int aer_idx)
  906. {
  907. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
  908. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  909. struct ib_device *dev = queue->device->dev;
  910. struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
  911. struct nvme_command *cmd = sqe->data;
  912. struct ib_sge sge;
  913. int ret;
  914. if (WARN_ON_ONCE(aer_idx != 0))
  915. return;
  916. ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
  917. memset(cmd, 0, sizeof(*cmd));
  918. cmd->common.opcode = nvme_admin_async_event;
  919. cmd->common.command_id = NVME_RDMA_AQ_BLKMQ_DEPTH;
  920. cmd->common.flags |= NVME_CMD_SGL_METABUF;
  921. nvme_rdma_set_sg_null(cmd);
  922. ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
  923. DMA_TO_DEVICE);
  924. ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL, false);
  925. WARN_ON_ONCE(ret);
  926. }
  927. static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
  928. struct nvme_completion *cqe, struct ib_wc *wc, int tag)
  929. {
  930. struct request *rq;
  931. struct nvme_rdma_request *req;
  932. int ret = 0;
  933. rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
  934. if (!rq) {
  935. dev_err(queue->ctrl->ctrl.device,
  936. "tag 0x%x on QP %#x not found\n",
  937. cqe->command_id, queue->qp->qp_num);
  938. nvme_rdma_error_recovery(queue->ctrl);
  939. return ret;
  940. }
  941. req = blk_mq_rq_to_pdu(rq);
  942. if (rq->tag == tag)
  943. ret = 1;
  944. if ((wc->wc_flags & IB_WC_WITH_INVALIDATE) &&
  945. wc->ex.invalidate_rkey == req->mr->rkey)
  946. req->mr->need_inval = false;
  947. req->req.result = cqe->result;
  948. blk_mq_complete_request(rq, le16_to_cpu(cqe->status) >> 1);
  949. return ret;
  950. }
  951. static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag)
  952. {
  953. struct nvme_rdma_qe *qe =
  954. container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
  955. struct nvme_rdma_queue *queue = cq->cq_context;
  956. struct ib_device *ibdev = queue->device->dev;
  957. struct nvme_completion *cqe = qe->data;
  958. const size_t len = sizeof(struct nvme_completion);
  959. int ret = 0;
  960. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  961. nvme_rdma_wr_error(cq, wc, "RECV");
  962. return 0;
  963. }
  964. ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  965. /*
  966. * AEN requests are special as they don't time out and can
  967. * survive any kind of queue freeze and often don't respond to
  968. * aborts. We don't even bother to allocate a struct request
  969. * for them but rather special case them here.
  970. */
  971. if (unlikely(nvme_rdma_queue_idx(queue) == 0 &&
  972. cqe->command_id >= NVME_RDMA_AQ_BLKMQ_DEPTH))
  973. nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
  974. &cqe->result);
  975. else
  976. ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag);
  977. ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  978. nvme_rdma_post_recv(queue, qe);
  979. return ret;
  980. }
  981. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
  982. {
  983. __nvme_rdma_recv_done(cq, wc, -1);
  984. }
  985. static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
  986. {
  987. int ret, i;
  988. for (i = 0; i < queue->queue_size; i++) {
  989. ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
  990. if (ret)
  991. goto out_destroy_queue_ib;
  992. }
  993. return 0;
  994. out_destroy_queue_ib:
  995. nvme_rdma_destroy_queue_ib(queue);
  996. return ret;
  997. }
  998. static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
  999. struct rdma_cm_event *ev)
  1000. {
  1001. struct rdma_cm_id *cm_id = queue->cm_id;
  1002. int status = ev->status;
  1003. const char *rej_msg;
  1004. const struct nvme_rdma_cm_rej *rej_data;
  1005. u8 rej_data_len;
  1006. rej_msg = rdma_reject_msg(cm_id, status);
  1007. rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
  1008. if (rej_data && rej_data_len >= sizeof(u16)) {
  1009. u16 sts = le16_to_cpu(rej_data->sts);
  1010. dev_err(queue->ctrl->ctrl.device,
  1011. "Connect rejected: status %d (%s) nvme status %d (%s).\n",
  1012. status, rej_msg, sts, nvme_rdma_cm_msg(sts));
  1013. } else {
  1014. dev_err(queue->ctrl->ctrl.device,
  1015. "Connect rejected: status %d (%s).\n", status, rej_msg);
  1016. }
  1017. return -ECONNRESET;
  1018. }
  1019. static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
  1020. {
  1021. struct nvme_rdma_device *dev;
  1022. int ret;
  1023. dev = nvme_rdma_find_get_device(queue->cm_id);
  1024. if (!dev) {
  1025. dev_err(queue->cm_id->device->dma_device,
  1026. "no client data found!\n");
  1027. return -ECONNREFUSED;
  1028. }
  1029. ret = nvme_rdma_create_queue_ib(queue, dev);
  1030. if (ret) {
  1031. nvme_rdma_dev_put(dev);
  1032. goto out;
  1033. }
  1034. ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
  1035. if (ret) {
  1036. dev_err(queue->ctrl->ctrl.device,
  1037. "rdma_resolve_route failed (%d).\n",
  1038. queue->cm_error);
  1039. goto out_destroy_queue;
  1040. }
  1041. return 0;
  1042. out_destroy_queue:
  1043. nvme_rdma_destroy_queue_ib(queue);
  1044. out:
  1045. return ret;
  1046. }
  1047. static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
  1048. {
  1049. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  1050. struct rdma_conn_param param = { };
  1051. struct nvme_rdma_cm_req priv = { };
  1052. int ret;
  1053. param.qp_num = queue->qp->qp_num;
  1054. param.flow_control = 1;
  1055. param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
  1056. /* maximum retry count */
  1057. param.retry_count = 7;
  1058. param.rnr_retry_count = 7;
  1059. param.private_data = &priv;
  1060. param.private_data_len = sizeof(priv);
  1061. priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  1062. priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
  1063. /*
  1064. * set the admin queue depth to the minimum size
  1065. * specified by the Fabrics standard.
  1066. */
  1067. if (priv.qid == 0) {
  1068. priv.hrqsize = cpu_to_le16(NVMF_AQ_DEPTH);
  1069. priv.hsqsize = cpu_to_le16(NVMF_AQ_DEPTH - 1);
  1070. } else {
  1071. /*
  1072. * current interpretation of the fabrics spec
  1073. * is at minimum you make hrqsize sqsize+1, or a
  1074. * 1's based representation of sqsize.
  1075. */
  1076. priv.hrqsize = cpu_to_le16(queue->queue_size);
  1077. priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
  1078. }
  1079. ret = rdma_connect(queue->cm_id, &param);
  1080. if (ret) {
  1081. dev_err(ctrl->ctrl.device,
  1082. "rdma_connect failed (%d).\n", ret);
  1083. goto out_destroy_queue_ib;
  1084. }
  1085. return 0;
  1086. out_destroy_queue_ib:
  1087. nvme_rdma_destroy_queue_ib(queue);
  1088. return ret;
  1089. }
  1090. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  1091. struct rdma_cm_event *ev)
  1092. {
  1093. struct nvme_rdma_queue *queue = cm_id->context;
  1094. int cm_error = 0;
  1095. dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
  1096. rdma_event_msg(ev->event), ev->event,
  1097. ev->status, cm_id);
  1098. switch (ev->event) {
  1099. case RDMA_CM_EVENT_ADDR_RESOLVED:
  1100. cm_error = nvme_rdma_addr_resolved(queue);
  1101. break;
  1102. case RDMA_CM_EVENT_ROUTE_RESOLVED:
  1103. cm_error = nvme_rdma_route_resolved(queue);
  1104. break;
  1105. case RDMA_CM_EVENT_ESTABLISHED:
  1106. queue->cm_error = nvme_rdma_conn_established(queue);
  1107. /* complete cm_done regardless of success/failure */
  1108. complete(&queue->cm_done);
  1109. return 0;
  1110. case RDMA_CM_EVENT_REJECTED:
  1111. cm_error = nvme_rdma_conn_rejected(queue, ev);
  1112. break;
  1113. case RDMA_CM_EVENT_ADDR_ERROR:
  1114. case RDMA_CM_EVENT_ROUTE_ERROR:
  1115. case RDMA_CM_EVENT_CONNECT_ERROR:
  1116. case RDMA_CM_EVENT_UNREACHABLE:
  1117. dev_dbg(queue->ctrl->ctrl.device,
  1118. "CM error event %d\n", ev->event);
  1119. cm_error = -ECONNRESET;
  1120. break;
  1121. case RDMA_CM_EVENT_DISCONNECTED:
  1122. case RDMA_CM_EVENT_ADDR_CHANGE:
  1123. case RDMA_CM_EVENT_TIMEWAIT_EXIT:
  1124. dev_dbg(queue->ctrl->ctrl.device,
  1125. "disconnect received - connection closed\n");
  1126. nvme_rdma_error_recovery(queue->ctrl);
  1127. break;
  1128. case RDMA_CM_EVENT_DEVICE_REMOVAL:
  1129. /* device removal is handled via the ib_client API */
  1130. break;
  1131. default:
  1132. dev_err(queue->ctrl->ctrl.device,
  1133. "Unexpected RDMA CM event (%d)\n", ev->event);
  1134. nvme_rdma_error_recovery(queue->ctrl);
  1135. break;
  1136. }
  1137. if (cm_error) {
  1138. queue->cm_error = cm_error;
  1139. complete(&queue->cm_done);
  1140. }
  1141. return 0;
  1142. }
  1143. static enum blk_eh_timer_return
  1144. nvme_rdma_timeout(struct request *rq, bool reserved)
  1145. {
  1146. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1147. /* queue error recovery */
  1148. nvme_rdma_error_recovery(req->queue->ctrl);
  1149. /* fail with DNR on cmd timeout */
  1150. rq->errors = NVME_SC_ABORT_REQ | NVME_SC_DNR;
  1151. return BLK_EH_HANDLED;
  1152. }
  1153. /*
  1154. * We cannot accept any other command until the Connect command has completed.
  1155. */
  1156. static inline bool nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue,
  1157. struct request *rq)
  1158. {
  1159. if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) {
  1160. struct nvme_command *cmd = nvme_req(rq)->cmd;
  1161. if (rq->cmd_type != REQ_TYPE_DRV_PRIV ||
  1162. cmd->common.opcode != nvme_fabrics_command ||
  1163. cmd->fabrics.fctype != nvme_fabrics_type_connect)
  1164. return false;
  1165. }
  1166. return true;
  1167. }
  1168. static int nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
  1169. const struct blk_mq_queue_data *bd)
  1170. {
  1171. struct nvme_ns *ns = hctx->queue->queuedata;
  1172. struct nvme_rdma_queue *queue = hctx->driver_data;
  1173. struct request *rq = bd->rq;
  1174. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1175. struct nvme_rdma_qe *sqe = &req->sqe;
  1176. struct nvme_command *c = sqe->data;
  1177. bool flush = false;
  1178. struct ib_device *dev;
  1179. int ret;
  1180. WARN_ON_ONCE(rq->tag < 0);
  1181. if (!nvme_rdma_queue_is_ready(queue, rq))
  1182. return BLK_MQ_RQ_QUEUE_BUSY;
  1183. dev = queue->device->dev;
  1184. ib_dma_sync_single_for_cpu(dev, sqe->dma,
  1185. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1186. ret = nvme_setup_cmd(ns, rq, c);
  1187. if (ret != BLK_MQ_RQ_QUEUE_OK)
  1188. return ret;
  1189. blk_mq_start_request(rq);
  1190. ret = nvme_rdma_map_data(queue, rq, c);
  1191. if (ret < 0) {
  1192. dev_err(queue->ctrl->ctrl.device,
  1193. "Failed to map data (%d)\n", ret);
  1194. nvme_cleanup_cmd(rq);
  1195. goto err;
  1196. }
  1197. ib_dma_sync_single_for_device(dev, sqe->dma,
  1198. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1199. if (rq->cmd_type == REQ_TYPE_FS && req_op(rq) == REQ_OP_FLUSH)
  1200. flush = true;
  1201. ret = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
  1202. req->mr->need_inval ? &req->reg_wr.wr : NULL, flush);
  1203. if (ret) {
  1204. nvme_rdma_unmap_data(queue, rq);
  1205. goto err;
  1206. }
  1207. return BLK_MQ_RQ_QUEUE_OK;
  1208. err:
  1209. return (ret == -ENOMEM || ret == -EAGAIN) ?
  1210. BLK_MQ_RQ_QUEUE_BUSY : BLK_MQ_RQ_QUEUE_ERROR;
  1211. }
  1212. static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
  1213. {
  1214. struct nvme_rdma_queue *queue = hctx->driver_data;
  1215. struct ib_cq *cq = queue->ib_cq;
  1216. struct ib_wc wc;
  1217. int found = 0;
  1218. ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
  1219. while (ib_poll_cq(cq, 1, &wc) > 0) {
  1220. struct ib_cqe *cqe = wc.wr_cqe;
  1221. if (cqe) {
  1222. if (cqe->done == nvme_rdma_recv_done)
  1223. found |= __nvme_rdma_recv_done(cq, &wc, tag);
  1224. else
  1225. cqe->done(cq, &wc);
  1226. }
  1227. }
  1228. return found;
  1229. }
  1230. static void nvme_rdma_complete_rq(struct request *rq)
  1231. {
  1232. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1233. struct nvme_rdma_queue *queue = req->queue;
  1234. int error = 0;
  1235. nvme_rdma_unmap_data(queue, rq);
  1236. if (unlikely(rq->errors)) {
  1237. if (nvme_req_needs_retry(rq, rq->errors)) {
  1238. nvme_requeue_req(rq);
  1239. return;
  1240. }
  1241. if (rq->cmd_type == REQ_TYPE_DRV_PRIV)
  1242. error = rq->errors;
  1243. else
  1244. error = nvme_error_status(rq->errors);
  1245. }
  1246. blk_mq_end_request(rq, error);
  1247. }
  1248. static struct blk_mq_ops nvme_rdma_mq_ops = {
  1249. .queue_rq = nvme_rdma_queue_rq,
  1250. .complete = nvme_rdma_complete_rq,
  1251. .init_request = nvme_rdma_init_request,
  1252. .exit_request = nvme_rdma_exit_request,
  1253. .reinit_request = nvme_rdma_reinit_request,
  1254. .init_hctx = nvme_rdma_init_hctx,
  1255. .poll = nvme_rdma_poll,
  1256. .timeout = nvme_rdma_timeout,
  1257. };
  1258. static struct blk_mq_ops nvme_rdma_admin_mq_ops = {
  1259. .queue_rq = nvme_rdma_queue_rq,
  1260. .complete = nvme_rdma_complete_rq,
  1261. .init_request = nvme_rdma_init_admin_request,
  1262. .exit_request = nvme_rdma_exit_admin_request,
  1263. .reinit_request = nvme_rdma_reinit_request,
  1264. .init_hctx = nvme_rdma_init_admin_hctx,
  1265. .timeout = nvme_rdma_timeout,
  1266. };
  1267. static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl)
  1268. {
  1269. int error;
  1270. error = nvme_rdma_init_queue(ctrl, 0, NVMF_AQ_DEPTH);
  1271. if (error)
  1272. return error;
  1273. ctrl->device = ctrl->queues[0].device;
  1274. /*
  1275. * We need a reference on the device as long as the tag_set is alive,
  1276. * as the MRs in the request structures need a valid ib_device.
  1277. */
  1278. error = -EINVAL;
  1279. if (!nvme_rdma_dev_get(ctrl->device))
  1280. goto out_free_queue;
  1281. ctrl->max_fr_pages = min_t(u32, NVME_RDMA_MAX_SEGMENTS,
  1282. ctrl->device->dev->attrs.max_fast_reg_page_list_len);
  1283. memset(&ctrl->admin_tag_set, 0, sizeof(ctrl->admin_tag_set));
  1284. ctrl->admin_tag_set.ops = &nvme_rdma_admin_mq_ops;
  1285. ctrl->admin_tag_set.queue_depth = NVME_RDMA_AQ_BLKMQ_DEPTH;
  1286. ctrl->admin_tag_set.reserved_tags = 2; /* connect + keep-alive */
  1287. ctrl->admin_tag_set.numa_node = NUMA_NO_NODE;
  1288. ctrl->admin_tag_set.cmd_size = sizeof(struct nvme_rdma_request) +
  1289. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  1290. ctrl->admin_tag_set.driver_data = ctrl;
  1291. ctrl->admin_tag_set.nr_hw_queues = 1;
  1292. ctrl->admin_tag_set.timeout = ADMIN_TIMEOUT;
  1293. error = blk_mq_alloc_tag_set(&ctrl->admin_tag_set);
  1294. if (error)
  1295. goto out_put_dev;
  1296. ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
  1297. if (IS_ERR(ctrl->ctrl.admin_q)) {
  1298. error = PTR_ERR(ctrl->ctrl.admin_q);
  1299. goto out_free_tagset;
  1300. }
  1301. error = nvmf_connect_admin_queue(&ctrl->ctrl);
  1302. if (error)
  1303. goto out_cleanup_queue;
  1304. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags);
  1305. error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->cap);
  1306. if (error) {
  1307. dev_err(ctrl->ctrl.device,
  1308. "prop_get NVME_REG_CAP failed\n");
  1309. goto out_cleanup_queue;
  1310. }
  1311. ctrl->ctrl.sqsize =
  1312. min_t(int, NVME_CAP_MQES(ctrl->cap) + 1, ctrl->ctrl.sqsize);
  1313. error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);
  1314. if (error)
  1315. goto out_cleanup_queue;
  1316. ctrl->ctrl.max_hw_sectors =
  1317. (ctrl->max_fr_pages - 1) << (PAGE_SHIFT - 9);
  1318. error = nvme_init_identify(&ctrl->ctrl);
  1319. if (error)
  1320. goto out_cleanup_queue;
  1321. error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev,
  1322. &ctrl->async_event_sqe, sizeof(struct nvme_command),
  1323. DMA_TO_DEVICE);
  1324. if (error)
  1325. goto out_cleanup_queue;
  1326. nvme_start_keep_alive(&ctrl->ctrl);
  1327. return 0;
  1328. out_cleanup_queue:
  1329. blk_cleanup_queue(ctrl->ctrl.admin_q);
  1330. out_free_tagset:
  1331. /* disconnect and drain the queue before freeing the tagset */
  1332. nvme_rdma_stop_queue(&ctrl->queues[0]);
  1333. blk_mq_free_tag_set(&ctrl->admin_tag_set);
  1334. out_put_dev:
  1335. nvme_rdma_dev_put(ctrl->device);
  1336. out_free_queue:
  1337. nvme_rdma_free_queue(&ctrl->queues[0]);
  1338. return error;
  1339. }
  1340. static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl)
  1341. {
  1342. nvme_stop_keep_alive(&ctrl->ctrl);
  1343. cancel_work_sync(&ctrl->err_work);
  1344. cancel_delayed_work_sync(&ctrl->reconnect_work);
  1345. if (ctrl->queue_count > 1) {
  1346. nvme_stop_queues(&ctrl->ctrl);
  1347. blk_mq_tagset_busy_iter(&ctrl->tag_set,
  1348. nvme_cancel_request, &ctrl->ctrl);
  1349. nvme_rdma_free_io_queues(ctrl);
  1350. }
  1351. if (test_bit(NVME_RDMA_Q_CONNECTED, &ctrl->queues[0].flags))
  1352. nvme_shutdown_ctrl(&ctrl->ctrl);
  1353. blk_mq_stop_hw_queues(ctrl->ctrl.admin_q);
  1354. blk_mq_tagset_busy_iter(&ctrl->admin_tag_set,
  1355. nvme_cancel_request, &ctrl->ctrl);
  1356. nvme_rdma_destroy_admin_queue(ctrl);
  1357. }
  1358. static void __nvme_rdma_remove_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
  1359. {
  1360. nvme_uninit_ctrl(&ctrl->ctrl);
  1361. if (shutdown)
  1362. nvme_rdma_shutdown_ctrl(ctrl);
  1363. if (ctrl->ctrl.tagset) {
  1364. blk_cleanup_queue(ctrl->ctrl.connect_q);
  1365. blk_mq_free_tag_set(&ctrl->tag_set);
  1366. nvme_rdma_dev_put(ctrl->device);
  1367. }
  1368. nvme_put_ctrl(&ctrl->ctrl);
  1369. }
  1370. static void nvme_rdma_del_ctrl_work(struct work_struct *work)
  1371. {
  1372. struct nvme_rdma_ctrl *ctrl = container_of(work,
  1373. struct nvme_rdma_ctrl, delete_work);
  1374. __nvme_rdma_remove_ctrl(ctrl, true);
  1375. }
  1376. static int __nvme_rdma_del_ctrl(struct nvme_rdma_ctrl *ctrl)
  1377. {
  1378. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_DELETING))
  1379. return -EBUSY;
  1380. if (!queue_work(nvme_rdma_wq, &ctrl->delete_work))
  1381. return -EBUSY;
  1382. return 0;
  1383. }
  1384. static int nvme_rdma_del_ctrl(struct nvme_ctrl *nctrl)
  1385. {
  1386. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  1387. int ret = 0;
  1388. /*
  1389. * Keep a reference until all work is flushed since
  1390. * __nvme_rdma_del_ctrl can free the ctrl mem
  1391. */
  1392. if (!kref_get_unless_zero(&ctrl->ctrl.kref))
  1393. return -EBUSY;
  1394. ret = __nvme_rdma_del_ctrl(ctrl);
  1395. if (!ret)
  1396. flush_work(&ctrl->delete_work);
  1397. nvme_put_ctrl(&ctrl->ctrl);
  1398. return ret;
  1399. }
  1400. static void nvme_rdma_remove_ctrl_work(struct work_struct *work)
  1401. {
  1402. struct nvme_rdma_ctrl *ctrl = container_of(work,
  1403. struct nvme_rdma_ctrl, delete_work);
  1404. __nvme_rdma_remove_ctrl(ctrl, false);
  1405. }
  1406. static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
  1407. {
  1408. struct nvme_rdma_ctrl *ctrl = container_of(work,
  1409. struct nvme_rdma_ctrl, reset_work);
  1410. int ret;
  1411. bool changed;
  1412. nvme_rdma_shutdown_ctrl(ctrl);
  1413. ret = nvme_rdma_configure_admin_queue(ctrl);
  1414. if (ret) {
  1415. /* ctrl is already shutdown, just remove the ctrl */
  1416. INIT_WORK(&ctrl->delete_work, nvme_rdma_remove_ctrl_work);
  1417. goto del_dead_ctrl;
  1418. }
  1419. if (ctrl->queue_count > 1) {
  1420. ret = blk_mq_reinit_tagset(&ctrl->tag_set);
  1421. if (ret)
  1422. goto del_dead_ctrl;
  1423. ret = nvme_rdma_init_io_queues(ctrl);
  1424. if (ret)
  1425. goto del_dead_ctrl;
  1426. ret = nvme_rdma_connect_io_queues(ctrl);
  1427. if (ret)
  1428. goto del_dead_ctrl;
  1429. }
  1430. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  1431. WARN_ON_ONCE(!changed);
  1432. if (ctrl->queue_count > 1) {
  1433. nvme_start_queues(&ctrl->ctrl);
  1434. nvme_queue_scan(&ctrl->ctrl);
  1435. nvme_queue_async_events(&ctrl->ctrl);
  1436. }
  1437. return;
  1438. del_dead_ctrl:
  1439. /* Deleting this dead controller... */
  1440. dev_warn(ctrl->ctrl.device, "Removing after reset failure\n");
  1441. WARN_ON(!queue_work(nvme_rdma_wq, &ctrl->delete_work));
  1442. }
  1443. static int nvme_rdma_reset_ctrl(struct nvme_ctrl *nctrl)
  1444. {
  1445. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  1446. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
  1447. return -EBUSY;
  1448. if (!queue_work(nvme_rdma_wq, &ctrl->reset_work))
  1449. return -EBUSY;
  1450. flush_work(&ctrl->reset_work);
  1451. return 0;
  1452. }
  1453. static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
  1454. .name = "rdma",
  1455. .module = THIS_MODULE,
  1456. .is_fabrics = true,
  1457. .reg_read32 = nvmf_reg_read32,
  1458. .reg_read64 = nvmf_reg_read64,
  1459. .reg_write32 = nvmf_reg_write32,
  1460. .reset_ctrl = nvme_rdma_reset_ctrl,
  1461. .free_ctrl = nvme_rdma_free_ctrl,
  1462. .submit_async_event = nvme_rdma_submit_async_event,
  1463. .delete_ctrl = nvme_rdma_del_ctrl,
  1464. .get_subsysnqn = nvmf_get_subsysnqn,
  1465. .get_address = nvmf_get_address,
  1466. };
  1467. static int nvme_rdma_create_io_queues(struct nvme_rdma_ctrl *ctrl)
  1468. {
  1469. struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
  1470. int ret;
  1471. ret = nvme_set_queue_count(&ctrl->ctrl, &opts->nr_io_queues);
  1472. if (ret)
  1473. return ret;
  1474. ctrl->queue_count = opts->nr_io_queues + 1;
  1475. if (ctrl->queue_count < 2)
  1476. return 0;
  1477. dev_info(ctrl->ctrl.device,
  1478. "creating %d I/O queues.\n", opts->nr_io_queues);
  1479. ret = nvme_rdma_init_io_queues(ctrl);
  1480. if (ret)
  1481. return ret;
  1482. /*
  1483. * We need a reference on the device as long as the tag_set is alive,
  1484. * as the MRs in the request structures need a valid ib_device.
  1485. */
  1486. ret = -EINVAL;
  1487. if (!nvme_rdma_dev_get(ctrl->device))
  1488. goto out_free_io_queues;
  1489. memset(&ctrl->tag_set, 0, sizeof(ctrl->tag_set));
  1490. ctrl->tag_set.ops = &nvme_rdma_mq_ops;
  1491. ctrl->tag_set.queue_depth = ctrl->ctrl.opts->queue_size;
  1492. ctrl->tag_set.reserved_tags = 1; /* fabric connect */
  1493. ctrl->tag_set.numa_node = NUMA_NO_NODE;
  1494. ctrl->tag_set.flags = BLK_MQ_F_SHOULD_MERGE;
  1495. ctrl->tag_set.cmd_size = sizeof(struct nvme_rdma_request) +
  1496. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  1497. ctrl->tag_set.driver_data = ctrl;
  1498. ctrl->tag_set.nr_hw_queues = ctrl->queue_count - 1;
  1499. ctrl->tag_set.timeout = NVME_IO_TIMEOUT;
  1500. ret = blk_mq_alloc_tag_set(&ctrl->tag_set);
  1501. if (ret)
  1502. goto out_put_dev;
  1503. ctrl->ctrl.tagset = &ctrl->tag_set;
  1504. ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
  1505. if (IS_ERR(ctrl->ctrl.connect_q)) {
  1506. ret = PTR_ERR(ctrl->ctrl.connect_q);
  1507. goto out_free_tag_set;
  1508. }
  1509. ret = nvme_rdma_connect_io_queues(ctrl);
  1510. if (ret)
  1511. goto out_cleanup_connect_q;
  1512. return 0;
  1513. out_cleanup_connect_q:
  1514. blk_cleanup_queue(ctrl->ctrl.connect_q);
  1515. out_free_tag_set:
  1516. blk_mq_free_tag_set(&ctrl->tag_set);
  1517. out_put_dev:
  1518. nvme_rdma_dev_put(ctrl->device);
  1519. out_free_io_queues:
  1520. nvme_rdma_free_io_queues(ctrl);
  1521. return ret;
  1522. }
  1523. static int nvme_rdma_parse_ipaddr(struct sockaddr_in *in_addr, char *p)
  1524. {
  1525. u8 *addr = (u8 *)&in_addr->sin_addr.s_addr;
  1526. size_t buflen = strlen(p);
  1527. /* XXX: handle IPv6 addresses */
  1528. if (buflen > INET_ADDRSTRLEN)
  1529. return -EINVAL;
  1530. if (in4_pton(p, buflen, addr, '\0', NULL) == 0)
  1531. return -EINVAL;
  1532. in_addr->sin_family = AF_INET;
  1533. return 0;
  1534. }
  1535. static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
  1536. struct nvmf_ctrl_options *opts)
  1537. {
  1538. struct nvme_rdma_ctrl *ctrl;
  1539. int ret;
  1540. bool changed;
  1541. ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
  1542. if (!ctrl)
  1543. return ERR_PTR(-ENOMEM);
  1544. ctrl->ctrl.opts = opts;
  1545. INIT_LIST_HEAD(&ctrl->list);
  1546. ret = nvme_rdma_parse_ipaddr(&ctrl->addr_in, opts->traddr);
  1547. if (ret) {
  1548. pr_err("malformed IP address passed: %s\n", opts->traddr);
  1549. goto out_free_ctrl;
  1550. }
  1551. if (opts->mask & NVMF_OPT_TRSVCID) {
  1552. u16 port;
  1553. ret = kstrtou16(opts->trsvcid, 0, &port);
  1554. if (ret)
  1555. goto out_free_ctrl;
  1556. ctrl->addr_in.sin_port = cpu_to_be16(port);
  1557. } else {
  1558. ctrl->addr_in.sin_port = cpu_to_be16(NVME_RDMA_IP_PORT);
  1559. }
  1560. ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
  1561. 0 /* no quirks, we're perfect! */);
  1562. if (ret)
  1563. goto out_free_ctrl;
  1564. ctrl->reconnect_delay = opts->reconnect_delay;
  1565. INIT_DELAYED_WORK(&ctrl->reconnect_work,
  1566. nvme_rdma_reconnect_ctrl_work);
  1567. INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
  1568. INIT_WORK(&ctrl->delete_work, nvme_rdma_del_ctrl_work);
  1569. INIT_WORK(&ctrl->reset_work, nvme_rdma_reset_ctrl_work);
  1570. spin_lock_init(&ctrl->lock);
  1571. ctrl->queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */
  1572. ctrl->ctrl.sqsize = opts->queue_size - 1;
  1573. ctrl->ctrl.kato = opts->kato;
  1574. ret = -ENOMEM;
  1575. ctrl->queues = kcalloc(ctrl->queue_count, sizeof(*ctrl->queues),
  1576. GFP_KERNEL);
  1577. if (!ctrl->queues)
  1578. goto out_uninit_ctrl;
  1579. ret = nvme_rdma_configure_admin_queue(ctrl);
  1580. if (ret)
  1581. goto out_kfree_queues;
  1582. /* sanity check icdoff */
  1583. if (ctrl->ctrl.icdoff) {
  1584. dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
  1585. goto out_remove_admin_queue;
  1586. }
  1587. /* sanity check keyed sgls */
  1588. if (!(ctrl->ctrl.sgls & (1 << 20))) {
  1589. dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n");
  1590. goto out_remove_admin_queue;
  1591. }
  1592. if (opts->queue_size > ctrl->ctrl.maxcmd) {
  1593. /* warn if maxcmd is lower than queue_size */
  1594. dev_warn(ctrl->ctrl.device,
  1595. "queue_size %zu > ctrl maxcmd %u, clamping down\n",
  1596. opts->queue_size, ctrl->ctrl.maxcmd);
  1597. opts->queue_size = ctrl->ctrl.maxcmd;
  1598. }
  1599. if (opts->queue_size > ctrl->ctrl.sqsize + 1) {
  1600. /* warn if sqsize is lower than queue_size */
  1601. dev_warn(ctrl->ctrl.device,
  1602. "queue_size %zu > ctrl sqsize %u, clamping down\n",
  1603. opts->queue_size, ctrl->ctrl.sqsize + 1);
  1604. opts->queue_size = ctrl->ctrl.sqsize + 1;
  1605. }
  1606. if (opts->nr_io_queues) {
  1607. ret = nvme_rdma_create_io_queues(ctrl);
  1608. if (ret)
  1609. goto out_remove_admin_queue;
  1610. }
  1611. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  1612. WARN_ON_ONCE(!changed);
  1613. dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISp\n",
  1614. ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
  1615. kref_get(&ctrl->ctrl.kref);
  1616. mutex_lock(&nvme_rdma_ctrl_mutex);
  1617. list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
  1618. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1619. if (opts->nr_io_queues) {
  1620. nvme_queue_scan(&ctrl->ctrl);
  1621. nvme_queue_async_events(&ctrl->ctrl);
  1622. }
  1623. return &ctrl->ctrl;
  1624. out_remove_admin_queue:
  1625. nvme_stop_keep_alive(&ctrl->ctrl);
  1626. nvme_rdma_destroy_admin_queue(ctrl);
  1627. out_kfree_queues:
  1628. kfree(ctrl->queues);
  1629. out_uninit_ctrl:
  1630. nvme_uninit_ctrl(&ctrl->ctrl);
  1631. nvme_put_ctrl(&ctrl->ctrl);
  1632. if (ret > 0)
  1633. ret = -EIO;
  1634. return ERR_PTR(ret);
  1635. out_free_ctrl:
  1636. kfree(ctrl);
  1637. return ERR_PTR(ret);
  1638. }
  1639. static struct nvmf_transport_ops nvme_rdma_transport = {
  1640. .name = "rdma",
  1641. .required_opts = NVMF_OPT_TRADDR,
  1642. .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY,
  1643. .create_ctrl = nvme_rdma_create_ctrl,
  1644. };
  1645. static void nvme_rdma_add_one(struct ib_device *ib_device)
  1646. {
  1647. }
  1648. static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
  1649. {
  1650. struct nvme_rdma_ctrl *ctrl;
  1651. /* Delete all controllers using this device */
  1652. mutex_lock(&nvme_rdma_ctrl_mutex);
  1653. list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
  1654. if (ctrl->device->dev != ib_device)
  1655. continue;
  1656. dev_info(ctrl->ctrl.device,
  1657. "Removing ctrl: NQN \"%s\", addr %pISp\n",
  1658. ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
  1659. __nvme_rdma_del_ctrl(ctrl);
  1660. }
  1661. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1662. flush_workqueue(nvme_rdma_wq);
  1663. }
  1664. static struct ib_client nvme_rdma_ib_client = {
  1665. .name = "nvme_rdma",
  1666. .add = nvme_rdma_add_one,
  1667. .remove = nvme_rdma_remove_one
  1668. };
  1669. static int __init nvme_rdma_init_module(void)
  1670. {
  1671. int ret;
  1672. nvme_rdma_wq = create_workqueue("nvme_rdma_wq");
  1673. if (!nvme_rdma_wq)
  1674. return -ENOMEM;
  1675. ret = ib_register_client(&nvme_rdma_ib_client);
  1676. if (ret) {
  1677. destroy_workqueue(nvme_rdma_wq);
  1678. return ret;
  1679. }
  1680. nvmf_register_transport(&nvme_rdma_transport);
  1681. return 0;
  1682. }
  1683. static void __exit nvme_rdma_cleanup_module(void)
  1684. {
  1685. nvmf_unregister_transport(&nvme_rdma_transport);
  1686. ib_unregister_client(&nvme_rdma_ib_client);
  1687. destroy_workqueue(nvme_rdma_wq);
  1688. }
  1689. module_init(nvme_rdma_init_module);
  1690. module_exit(nvme_rdma_cleanup_module);
  1691. MODULE_LICENSE("GPL v2");