region_devs.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985
  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/scatterlist.h>
  14. #include <linux/highmem.h>
  15. #include <linux/sched.h>
  16. #include <linux/slab.h>
  17. #include <linux/hash.h>
  18. #include <linux/pmem.h>
  19. #include <linux/sort.h>
  20. #include <linux/io.h>
  21. #include <linux/nd.h>
  22. #include "nd-core.h"
  23. #include "nd.h"
  24. /*
  25. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  26. * irrelevant.
  27. */
  28. #include <linux/io-64-nonatomic-hi-lo.h>
  29. static DEFINE_IDA(region_ida);
  30. static DEFINE_PER_CPU(int, flush_idx);
  31. static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
  32. struct nd_region_data *ndrd)
  33. {
  34. int i, j;
  35. dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
  36. nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
  37. for (i = 0; i < (1 << ndrd->hints_shift); i++) {
  38. struct resource *res = &nvdimm->flush_wpq[i];
  39. unsigned long pfn = PHYS_PFN(res->start);
  40. void __iomem *flush_page;
  41. /* check if flush hints share a page */
  42. for (j = 0; j < i; j++) {
  43. struct resource *res_j = &nvdimm->flush_wpq[j];
  44. unsigned long pfn_j = PHYS_PFN(res_j->start);
  45. if (pfn == pfn_j)
  46. break;
  47. }
  48. if (j < i)
  49. flush_page = (void __iomem *) ((unsigned long)
  50. ndrd_get_flush_wpq(ndrd, dimm, j)
  51. & PAGE_MASK);
  52. else
  53. flush_page = devm_nvdimm_ioremap(dev,
  54. PFN_PHYS(pfn), PAGE_SIZE);
  55. if (!flush_page)
  56. return -ENXIO;
  57. ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
  58. + (res->start & ~PAGE_MASK));
  59. }
  60. return 0;
  61. }
  62. int nd_region_activate(struct nd_region *nd_region)
  63. {
  64. int i, j, num_flush = 0;
  65. struct nd_region_data *ndrd;
  66. struct device *dev = &nd_region->dev;
  67. size_t flush_data_size = sizeof(void *);
  68. nvdimm_bus_lock(&nd_region->dev);
  69. for (i = 0; i < nd_region->ndr_mappings; i++) {
  70. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  71. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  72. /* at least one null hint slot per-dimm for the "no-hint" case */
  73. flush_data_size += sizeof(void *);
  74. num_flush = min_not_zero(num_flush, nvdimm->num_flush);
  75. if (!nvdimm->num_flush)
  76. continue;
  77. flush_data_size += nvdimm->num_flush * sizeof(void *);
  78. }
  79. nvdimm_bus_unlock(&nd_region->dev);
  80. ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
  81. if (!ndrd)
  82. return -ENOMEM;
  83. dev_set_drvdata(dev, ndrd);
  84. if (!num_flush)
  85. return 0;
  86. ndrd->hints_shift = ilog2(num_flush);
  87. for (i = 0; i < nd_region->ndr_mappings; i++) {
  88. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  89. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  90. int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
  91. if (rc)
  92. return rc;
  93. }
  94. /*
  95. * Clear out entries that are duplicates. This should prevent the
  96. * extra flushings.
  97. */
  98. for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
  99. /* ignore if NULL already */
  100. if (!ndrd_get_flush_wpq(ndrd, i, 0))
  101. continue;
  102. for (j = i + 1; j < nd_region->ndr_mappings; j++)
  103. if (ndrd_get_flush_wpq(ndrd, i, 0) ==
  104. ndrd_get_flush_wpq(ndrd, j, 0))
  105. ndrd_set_flush_wpq(ndrd, j, 0, NULL);
  106. }
  107. return 0;
  108. }
  109. static void nd_region_release(struct device *dev)
  110. {
  111. struct nd_region *nd_region = to_nd_region(dev);
  112. u16 i;
  113. for (i = 0; i < nd_region->ndr_mappings; i++) {
  114. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  115. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  116. put_device(&nvdimm->dev);
  117. }
  118. free_percpu(nd_region->lane);
  119. ida_simple_remove(&region_ida, nd_region->id);
  120. if (is_nd_blk(dev))
  121. kfree(to_nd_blk_region(dev));
  122. else
  123. kfree(nd_region);
  124. }
  125. static struct device_type nd_blk_device_type = {
  126. .name = "nd_blk",
  127. .release = nd_region_release,
  128. };
  129. static struct device_type nd_pmem_device_type = {
  130. .name = "nd_pmem",
  131. .release = nd_region_release,
  132. };
  133. static struct device_type nd_volatile_device_type = {
  134. .name = "nd_volatile",
  135. .release = nd_region_release,
  136. };
  137. bool is_nd_pmem(struct device *dev)
  138. {
  139. return dev ? dev->type == &nd_pmem_device_type : false;
  140. }
  141. bool is_nd_blk(struct device *dev)
  142. {
  143. return dev ? dev->type == &nd_blk_device_type : false;
  144. }
  145. struct nd_region *to_nd_region(struct device *dev)
  146. {
  147. struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
  148. WARN_ON(dev->type->release != nd_region_release);
  149. return nd_region;
  150. }
  151. EXPORT_SYMBOL_GPL(to_nd_region);
  152. struct nd_blk_region *to_nd_blk_region(struct device *dev)
  153. {
  154. struct nd_region *nd_region = to_nd_region(dev);
  155. WARN_ON(!is_nd_blk(dev));
  156. return container_of(nd_region, struct nd_blk_region, nd_region);
  157. }
  158. EXPORT_SYMBOL_GPL(to_nd_blk_region);
  159. void *nd_region_provider_data(struct nd_region *nd_region)
  160. {
  161. return nd_region->provider_data;
  162. }
  163. EXPORT_SYMBOL_GPL(nd_region_provider_data);
  164. void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
  165. {
  166. return ndbr->blk_provider_data;
  167. }
  168. EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
  169. void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
  170. {
  171. ndbr->blk_provider_data = data;
  172. }
  173. EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
  174. /**
  175. * nd_region_to_nstype() - region to an integer namespace type
  176. * @nd_region: region-device to interrogate
  177. *
  178. * This is the 'nstype' attribute of a region as well, an input to the
  179. * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
  180. * namespace devices with namespace drivers.
  181. */
  182. int nd_region_to_nstype(struct nd_region *nd_region)
  183. {
  184. if (is_nd_pmem(&nd_region->dev)) {
  185. u16 i, alias;
  186. for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
  187. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  188. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  189. if (nvdimm->flags & NDD_ALIASING)
  190. alias++;
  191. }
  192. if (alias)
  193. return ND_DEVICE_NAMESPACE_PMEM;
  194. else
  195. return ND_DEVICE_NAMESPACE_IO;
  196. } else if (is_nd_blk(&nd_region->dev)) {
  197. return ND_DEVICE_NAMESPACE_BLK;
  198. }
  199. return 0;
  200. }
  201. EXPORT_SYMBOL(nd_region_to_nstype);
  202. static ssize_t size_show(struct device *dev,
  203. struct device_attribute *attr, char *buf)
  204. {
  205. struct nd_region *nd_region = to_nd_region(dev);
  206. unsigned long long size = 0;
  207. if (is_nd_pmem(dev)) {
  208. size = nd_region->ndr_size;
  209. } else if (nd_region->ndr_mappings == 1) {
  210. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  211. size = nd_mapping->size;
  212. }
  213. return sprintf(buf, "%llu\n", size);
  214. }
  215. static DEVICE_ATTR_RO(size);
  216. static ssize_t mappings_show(struct device *dev,
  217. struct device_attribute *attr, char *buf)
  218. {
  219. struct nd_region *nd_region = to_nd_region(dev);
  220. return sprintf(buf, "%d\n", nd_region->ndr_mappings);
  221. }
  222. static DEVICE_ATTR_RO(mappings);
  223. static ssize_t nstype_show(struct device *dev,
  224. struct device_attribute *attr, char *buf)
  225. {
  226. struct nd_region *nd_region = to_nd_region(dev);
  227. return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
  228. }
  229. static DEVICE_ATTR_RO(nstype);
  230. static ssize_t set_cookie_show(struct device *dev,
  231. struct device_attribute *attr, char *buf)
  232. {
  233. struct nd_region *nd_region = to_nd_region(dev);
  234. struct nd_interleave_set *nd_set = nd_region->nd_set;
  235. if (is_nd_pmem(dev) && nd_set)
  236. /* pass, should be precluded by region_visible */;
  237. else
  238. return -ENXIO;
  239. return sprintf(buf, "%#llx\n", nd_set->cookie);
  240. }
  241. static DEVICE_ATTR_RO(set_cookie);
  242. resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
  243. {
  244. resource_size_t blk_max_overlap = 0, available, overlap;
  245. int i;
  246. WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
  247. retry:
  248. available = 0;
  249. overlap = blk_max_overlap;
  250. for (i = 0; i < nd_region->ndr_mappings; i++) {
  251. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  252. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  253. /* if a dimm is disabled the available capacity is zero */
  254. if (!ndd)
  255. return 0;
  256. if (is_nd_pmem(&nd_region->dev)) {
  257. available += nd_pmem_available_dpa(nd_region,
  258. nd_mapping, &overlap);
  259. if (overlap > blk_max_overlap) {
  260. blk_max_overlap = overlap;
  261. goto retry;
  262. }
  263. } else if (is_nd_blk(&nd_region->dev))
  264. available += nd_blk_available_dpa(nd_region);
  265. }
  266. return available;
  267. }
  268. static ssize_t available_size_show(struct device *dev,
  269. struct device_attribute *attr, char *buf)
  270. {
  271. struct nd_region *nd_region = to_nd_region(dev);
  272. unsigned long long available = 0;
  273. /*
  274. * Flush in-flight updates and grab a snapshot of the available
  275. * size. Of course, this value is potentially invalidated the
  276. * memory nvdimm_bus_lock() is dropped, but that's userspace's
  277. * problem to not race itself.
  278. */
  279. nvdimm_bus_lock(dev);
  280. wait_nvdimm_bus_probe_idle(dev);
  281. available = nd_region_available_dpa(nd_region);
  282. nvdimm_bus_unlock(dev);
  283. return sprintf(buf, "%llu\n", available);
  284. }
  285. static DEVICE_ATTR_RO(available_size);
  286. static ssize_t init_namespaces_show(struct device *dev,
  287. struct device_attribute *attr, char *buf)
  288. {
  289. struct nd_region_data *ndrd = dev_get_drvdata(dev);
  290. ssize_t rc;
  291. nvdimm_bus_lock(dev);
  292. if (ndrd)
  293. rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
  294. else
  295. rc = -ENXIO;
  296. nvdimm_bus_unlock(dev);
  297. return rc;
  298. }
  299. static DEVICE_ATTR_RO(init_namespaces);
  300. static ssize_t namespace_seed_show(struct device *dev,
  301. struct device_attribute *attr, char *buf)
  302. {
  303. struct nd_region *nd_region = to_nd_region(dev);
  304. ssize_t rc;
  305. nvdimm_bus_lock(dev);
  306. if (nd_region->ns_seed)
  307. rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
  308. else
  309. rc = sprintf(buf, "\n");
  310. nvdimm_bus_unlock(dev);
  311. return rc;
  312. }
  313. static DEVICE_ATTR_RO(namespace_seed);
  314. static ssize_t btt_seed_show(struct device *dev,
  315. struct device_attribute *attr, char *buf)
  316. {
  317. struct nd_region *nd_region = to_nd_region(dev);
  318. ssize_t rc;
  319. nvdimm_bus_lock(dev);
  320. if (nd_region->btt_seed)
  321. rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
  322. else
  323. rc = sprintf(buf, "\n");
  324. nvdimm_bus_unlock(dev);
  325. return rc;
  326. }
  327. static DEVICE_ATTR_RO(btt_seed);
  328. static ssize_t pfn_seed_show(struct device *dev,
  329. struct device_attribute *attr, char *buf)
  330. {
  331. struct nd_region *nd_region = to_nd_region(dev);
  332. ssize_t rc;
  333. nvdimm_bus_lock(dev);
  334. if (nd_region->pfn_seed)
  335. rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
  336. else
  337. rc = sprintf(buf, "\n");
  338. nvdimm_bus_unlock(dev);
  339. return rc;
  340. }
  341. static DEVICE_ATTR_RO(pfn_seed);
  342. static ssize_t dax_seed_show(struct device *dev,
  343. struct device_attribute *attr, char *buf)
  344. {
  345. struct nd_region *nd_region = to_nd_region(dev);
  346. ssize_t rc;
  347. nvdimm_bus_lock(dev);
  348. if (nd_region->dax_seed)
  349. rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
  350. else
  351. rc = sprintf(buf, "\n");
  352. nvdimm_bus_unlock(dev);
  353. return rc;
  354. }
  355. static DEVICE_ATTR_RO(dax_seed);
  356. static ssize_t read_only_show(struct device *dev,
  357. struct device_attribute *attr, char *buf)
  358. {
  359. struct nd_region *nd_region = to_nd_region(dev);
  360. return sprintf(buf, "%d\n", nd_region->ro);
  361. }
  362. static ssize_t read_only_store(struct device *dev,
  363. struct device_attribute *attr, const char *buf, size_t len)
  364. {
  365. bool ro;
  366. int rc = strtobool(buf, &ro);
  367. struct nd_region *nd_region = to_nd_region(dev);
  368. if (rc)
  369. return rc;
  370. nd_region->ro = ro;
  371. return len;
  372. }
  373. static DEVICE_ATTR_RW(read_only);
  374. static struct attribute *nd_region_attributes[] = {
  375. &dev_attr_size.attr,
  376. &dev_attr_nstype.attr,
  377. &dev_attr_mappings.attr,
  378. &dev_attr_btt_seed.attr,
  379. &dev_attr_pfn_seed.attr,
  380. &dev_attr_dax_seed.attr,
  381. &dev_attr_read_only.attr,
  382. &dev_attr_set_cookie.attr,
  383. &dev_attr_available_size.attr,
  384. &dev_attr_namespace_seed.attr,
  385. &dev_attr_init_namespaces.attr,
  386. NULL,
  387. };
  388. static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
  389. {
  390. struct device *dev = container_of(kobj, typeof(*dev), kobj);
  391. struct nd_region *nd_region = to_nd_region(dev);
  392. struct nd_interleave_set *nd_set = nd_region->nd_set;
  393. int type = nd_region_to_nstype(nd_region);
  394. if (!is_nd_pmem(dev) && a == &dev_attr_pfn_seed.attr)
  395. return 0;
  396. if (!is_nd_pmem(dev) && a == &dev_attr_dax_seed.attr)
  397. return 0;
  398. if (a != &dev_attr_set_cookie.attr
  399. && a != &dev_attr_available_size.attr)
  400. return a->mode;
  401. if ((type == ND_DEVICE_NAMESPACE_PMEM
  402. || type == ND_DEVICE_NAMESPACE_BLK)
  403. && a == &dev_attr_available_size.attr)
  404. return a->mode;
  405. else if (is_nd_pmem(dev) && nd_set)
  406. return a->mode;
  407. return 0;
  408. }
  409. struct attribute_group nd_region_attribute_group = {
  410. .attrs = nd_region_attributes,
  411. .is_visible = region_visible,
  412. };
  413. EXPORT_SYMBOL_GPL(nd_region_attribute_group);
  414. u64 nd_region_interleave_set_cookie(struct nd_region *nd_region)
  415. {
  416. struct nd_interleave_set *nd_set = nd_region->nd_set;
  417. if (nd_set)
  418. return nd_set->cookie;
  419. return 0;
  420. }
  421. void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
  422. {
  423. struct nd_label_ent *label_ent, *e;
  424. lockdep_assert_held(&nd_mapping->lock);
  425. list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
  426. list_del(&label_ent->list);
  427. kfree(label_ent);
  428. }
  429. }
  430. /*
  431. * Upon successful probe/remove, take/release a reference on the
  432. * associated interleave set (if present), and plant new btt + namespace
  433. * seeds. Also, on the removal of a BLK region, notify the provider to
  434. * disable the region.
  435. */
  436. static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus,
  437. struct device *dev, bool probe)
  438. {
  439. struct nd_region *nd_region;
  440. if (!probe && (is_nd_pmem(dev) || is_nd_blk(dev))) {
  441. int i;
  442. nd_region = to_nd_region(dev);
  443. for (i = 0; i < nd_region->ndr_mappings; i++) {
  444. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  445. struct nvdimm_drvdata *ndd = nd_mapping->ndd;
  446. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  447. mutex_lock(&nd_mapping->lock);
  448. nd_mapping_free_labels(nd_mapping);
  449. mutex_unlock(&nd_mapping->lock);
  450. put_ndd(ndd);
  451. nd_mapping->ndd = NULL;
  452. if (ndd)
  453. atomic_dec(&nvdimm->busy);
  454. }
  455. if (is_nd_pmem(dev))
  456. return;
  457. }
  458. if (dev->parent && (is_nd_blk(dev->parent) || is_nd_pmem(dev->parent))
  459. && probe) {
  460. nd_region = to_nd_region(dev->parent);
  461. nvdimm_bus_lock(dev);
  462. if (nd_region->ns_seed == dev)
  463. nd_region_create_ns_seed(nd_region);
  464. nvdimm_bus_unlock(dev);
  465. }
  466. if (is_nd_btt(dev) && probe) {
  467. struct nd_btt *nd_btt = to_nd_btt(dev);
  468. nd_region = to_nd_region(dev->parent);
  469. nvdimm_bus_lock(dev);
  470. if (nd_region->btt_seed == dev)
  471. nd_region_create_btt_seed(nd_region);
  472. if (nd_region->ns_seed == &nd_btt->ndns->dev)
  473. nd_region_create_ns_seed(nd_region);
  474. nvdimm_bus_unlock(dev);
  475. }
  476. if (is_nd_pfn(dev) && probe) {
  477. struct nd_pfn *nd_pfn = to_nd_pfn(dev);
  478. nd_region = to_nd_region(dev->parent);
  479. nvdimm_bus_lock(dev);
  480. if (nd_region->pfn_seed == dev)
  481. nd_region_create_pfn_seed(nd_region);
  482. if (nd_region->ns_seed == &nd_pfn->ndns->dev)
  483. nd_region_create_ns_seed(nd_region);
  484. nvdimm_bus_unlock(dev);
  485. }
  486. if (is_nd_dax(dev) && probe) {
  487. struct nd_dax *nd_dax = to_nd_dax(dev);
  488. nd_region = to_nd_region(dev->parent);
  489. nvdimm_bus_lock(dev);
  490. if (nd_region->dax_seed == dev)
  491. nd_region_create_dax_seed(nd_region);
  492. if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
  493. nd_region_create_ns_seed(nd_region);
  494. nvdimm_bus_unlock(dev);
  495. }
  496. }
  497. void nd_region_probe_success(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  498. {
  499. nd_region_notify_driver_action(nvdimm_bus, dev, true);
  500. }
  501. void nd_region_disable(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  502. {
  503. nd_region_notify_driver_action(nvdimm_bus, dev, false);
  504. }
  505. static ssize_t mappingN(struct device *dev, char *buf, int n)
  506. {
  507. struct nd_region *nd_region = to_nd_region(dev);
  508. struct nd_mapping *nd_mapping;
  509. struct nvdimm *nvdimm;
  510. if (n >= nd_region->ndr_mappings)
  511. return -ENXIO;
  512. nd_mapping = &nd_region->mapping[n];
  513. nvdimm = nd_mapping->nvdimm;
  514. return sprintf(buf, "%s,%llu,%llu\n", dev_name(&nvdimm->dev),
  515. nd_mapping->start, nd_mapping->size);
  516. }
  517. #define REGION_MAPPING(idx) \
  518. static ssize_t mapping##idx##_show(struct device *dev, \
  519. struct device_attribute *attr, char *buf) \
  520. { \
  521. return mappingN(dev, buf, idx); \
  522. } \
  523. static DEVICE_ATTR_RO(mapping##idx)
  524. /*
  525. * 32 should be enough for a while, even in the presence of socket
  526. * interleave a 32-way interleave set is a degenerate case.
  527. */
  528. REGION_MAPPING(0);
  529. REGION_MAPPING(1);
  530. REGION_MAPPING(2);
  531. REGION_MAPPING(3);
  532. REGION_MAPPING(4);
  533. REGION_MAPPING(5);
  534. REGION_MAPPING(6);
  535. REGION_MAPPING(7);
  536. REGION_MAPPING(8);
  537. REGION_MAPPING(9);
  538. REGION_MAPPING(10);
  539. REGION_MAPPING(11);
  540. REGION_MAPPING(12);
  541. REGION_MAPPING(13);
  542. REGION_MAPPING(14);
  543. REGION_MAPPING(15);
  544. REGION_MAPPING(16);
  545. REGION_MAPPING(17);
  546. REGION_MAPPING(18);
  547. REGION_MAPPING(19);
  548. REGION_MAPPING(20);
  549. REGION_MAPPING(21);
  550. REGION_MAPPING(22);
  551. REGION_MAPPING(23);
  552. REGION_MAPPING(24);
  553. REGION_MAPPING(25);
  554. REGION_MAPPING(26);
  555. REGION_MAPPING(27);
  556. REGION_MAPPING(28);
  557. REGION_MAPPING(29);
  558. REGION_MAPPING(30);
  559. REGION_MAPPING(31);
  560. static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
  561. {
  562. struct device *dev = container_of(kobj, struct device, kobj);
  563. struct nd_region *nd_region = to_nd_region(dev);
  564. if (n < nd_region->ndr_mappings)
  565. return a->mode;
  566. return 0;
  567. }
  568. static struct attribute *mapping_attributes[] = {
  569. &dev_attr_mapping0.attr,
  570. &dev_attr_mapping1.attr,
  571. &dev_attr_mapping2.attr,
  572. &dev_attr_mapping3.attr,
  573. &dev_attr_mapping4.attr,
  574. &dev_attr_mapping5.attr,
  575. &dev_attr_mapping6.attr,
  576. &dev_attr_mapping7.attr,
  577. &dev_attr_mapping8.attr,
  578. &dev_attr_mapping9.attr,
  579. &dev_attr_mapping10.attr,
  580. &dev_attr_mapping11.attr,
  581. &dev_attr_mapping12.attr,
  582. &dev_attr_mapping13.attr,
  583. &dev_attr_mapping14.attr,
  584. &dev_attr_mapping15.attr,
  585. &dev_attr_mapping16.attr,
  586. &dev_attr_mapping17.attr,
  587. &dev_attr_mapping18.attr,
  588. &dev_attr_mapping19.attr,
  589. &dev_attr_mapping20.attr,
  590. &dev_attr_mapping21.attr,
  591. &dev_attr_mapping22.attr,
  592. &dev_attr_mapping23.attr,
  593. &dev_attr_mapping24.attr,
  594. &dev_attr_mapping25.attr,
  595. &dev_attr_mapping26.attr,
  596. &dev_attr_mapping27.attr,
  597. &dev_attr_mapping28.attr,
  598. &dev_attr_mapping29.attr,
  599. &dev_attr_mapping30.attr,
  600. &dev_attr_mapping31.attr,
  601. NULL,
  602. };
  603. struct attribute_group nd_mapping_attribute_group = {
  604. .is_visible = mapping_visible,
  605. .attrs = mapping_attributes,
  606. };
  607. EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
  608. int nd_blk_region_init(struct nd_region *nd_region)
  609. {
  610. struct device *dev = &nd_region->dev;
  611. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
  612. if (!is_nd_blk(dev))
  613. return 0;
  614. if (nd_region->ndr_mappings < 1) {
  615. dev_err(dev, "invalid BLK region\n");
  616. return -ENXIO;
  617. }
  618. return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
  619. }
  620. /**
  621. * nd_region_acquire_lane - allocate and lock a lane
  622. * @nd_region: region id and number of lanes possible
  623. *
  624. * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
  625. * We optimize for the common case where there are 256 lanes, one
  626. * per-cpu. For larger systems we need to lock to share lanes. For now
  627. * this implementation assumes the cost of maintaining an allocator for
  628. * free lanes is on the order of the lock hold time, so it implements a
  629. * static lane = cpu % num_lanes mapping.
  630. *
  631. * In the case of a BTT instance on top of a BLK namespace a lane may be
  632. * acquired recursively. We lock on the first instance.
  633. *
  634. * In the case of a BTT instance on top of PMEM, we only acquire a lane
  635. * for the BTT metadata updates.
  636. */
  637. unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
  638. {
  639. unsigned int cpu, lane;
  640. cpu = get_cpu();
  641. if (nd_region->num_lanes < nr_cpu_ids) {
  642. struct nd_percpu_lane *ndl_lock, *ndl_count;
  643. lane = cpu % nd_region->num_lanes;
  644. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  645. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  646. if (ndl_count->count++ == 0)
  647. spin_lock(&ndl_lock->lock);
  648. } else
  649. lane = cpu;
  650. return lane;
  651. }
  652. EXPORT_SYMBOL(nd_region_acquire_lane);
  653. void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
  654. {
  655. if (nd_region->num_lanes < nr_cpu_ids) {
  656. unsigned int cpu = get_cpu();
  657. struct nd_percpu_lane *ndl_lock, *ndl_count;
  658. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  659. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  660. if (--ndl_count->count == 0)
  661. spin_unlock(&ndl_lock->lock);
  662. put_cpu();
  663. }
  664. put_cpu();
  665. }
  666. EXPORT_SYMBOL(nd_region_release_lane);
  667. static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
  668. struct nd_region_desc *ndr_desc, struct device_type *dev_type,
  669. const char *caller)
  670. {
  671. struct nd_region *nd_region;
  672. struct device *dev;
  673. void *region_buf;
  674. unsigned int i;
  675. int ro = 0;
  676. for (i = 0; i < ndr_desc->num_mappings; i++) {
  677. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  678. struct nvdimm *nvdimm = mapping->nvdimm;
  679. if ((mapping->start | mapping->size) % SZ_4K) {
  680. dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not 4K aligned\n",
  681. caller, dev_name(&nvdimm->dev), i);
  682. return NULL;
  683. }
  684. if (nvdimm->flags & NDD_UNARMED)
  685. ro = 1;
  686. }
  687. if (dev_type == &nd_blk_device_type) {
  688. struct nd_blk_region_desc *ndbr_desc;
  689. struct nd_blk_region *ndbr;
  690. ndbr_desc = to_blk_region_desc(ndr_desc);
  691. ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
  692. * ndr_desc->num_mappings,
  693. GFP_KERNEL);
  694. if (ndbr) {
  695. nd_region = &ndbr->nd_region;
  696. ndbr->enable = ndbr_desc->enable;
  697. ndbr->do_io = ndbr_desc->do_io;
  698. }
  699. region_buf = ndbr;
  700. } else {
  701. nd_region = kzalloc(sizeof(struct nd_region)
  702. + sizeof(struct nd_mapping)
  703. * ndr_desc->num_mappings,
  704. GFP_KERNEL);
  705. region_buf = nd_region;
  706. }
  707. if (!region_buf)
  708. return NULL;
  709. nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
  710. if (nd_region->id < 0)
  711. goto err_id;
  712. nd_region->lane = alloc_percpu(struct nd_percpu_lane);
  713. if (!nd_region->lane)
  714. goto err_percpu;
  715. for (i = 0; i < nr_cpu_ids; i++) {
  716. struct nd_percpu_lane *ndl;
  717. ndl = per_cpu_ptr(nd_region->lane, i);
  718. spin_lock_init(&ndl->lock);
  719. ndl->count = 0;
  720. }
  721. for (i = 0; i < ndr_desc->num_mappings; i++) {
  722. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  723. struct nvdimm *nvdimm = mapping->nvdimm;
  724. nd_region->mapping[i].nvdimm = nvdimm;
  725. nd_region->mapping[i].start = mapping->start;
  726. nd_region->mapping[i].size = mapping->size;
  727. INIT_LIST_HEAD(&nd_region->mapping[i].labels);
  728. mutex_init(&nd_region->mapping[i].lock);
  729. get_device(&nvdimm->dev);
  730. }
  731. nd_region->ndr_mappings = ndr_desc->num_mappings;
  732. nd_region->provider_data = ndr_desc->provider_data;
  733. nd_region->nd_set = ndr_desc->nd_set;
  734. nd_region->num_lanes = ndr_desc->num_lanes;
  735. nd_region->flags = ndr_desc->flags;
  736. nd_region->ro = ro;
  737. nd_region->numa_node = ndr_desc->numa_node;
  738. ida_init(&nd_region->ns_ida);
  739. ida_init(&nd_region->btt_ida);
  740. ida_init(&nd_region->pfn_ida);
  741. ida_init(&nd_region->dax_ida);
  742. dev = &nd_region->dev;
  743. dev_set_name(dev, "region%d", nd_region->id);
  744. dev->parent = &nvdimm_bus->dev;
  745. dev->type = dev_type;
  746. dev->groups = ndr_desc->attr_groups;
  747. nd_region->ndr_size = resource_size(ndr_desc->res);
  748. nd_region->ndr_start = ndr_desc->res->start;
  749. nd_device_register(dev);
  750. return nd_region;
  751. err_percpu:
  752. ida_simple_remove(&region_ida, nd_region->id);
  753. err_id:
  754. kfree(region_buf);
  755. return NULL;
  756. }
  757. struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
  758. struct nd_region_desc *ndr_desc)
  759. {
  760. ndr_desc->num_lanes = ND_MAX_LANES;
  761. return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
  762. __func__);
  763. }
  764. EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
  765. struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
  766. struct nd_region_desc *ndr_desc)
  767. {
  768. if (ndr_desc->num_mappings > 1)
  769. return NULL;
  770. ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
  771. return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
  772. __func__);
  773. }
  774. EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
  775. struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
  776. struct nd_region_desc *ndr_desc)
  777. {
  778. ndr_desc->num_lanes = ND_MAX_LANES;
  779. return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
  780. __func__);
  781. }
  782. EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
  783. /**
  784. * nvdimm_flush - flush any posted write queues between the cpu and pmem media
  785. * @nd_region: blk or interleaved pmem region
  786. */
  787. void nvdimm_flush(struct nd_region *nd_region)
  788. {
  789. struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
  790. int i, idx;
  791. /*
  792. * Try to encourage some diversity in flush hint addresses
  793. * across cpus assuming a limited number of flush hints.
  794. */
  795. idx = this_cpu_read(flush_idx);
  796. idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
  797. /*
  798. * The first wmb() is needed to 'sfence' all previous writes
  799. * such that they are architecturally visible for the platform
  800. * buffer flush. Note that we've already arranged for pmem
  801. * writes to avoid the cache via arch_memcpy_to_pmem(). The
  802. * final wmb() ensures ordering for the NVDIMM flush write.
  803. */
  804. wmb();
  805. for (i = 0; i < nd_region->ndr_mappings; i++)
  806. if (ndrd_get_flush_wpq(ndrd, i, 0))
  807. writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
  808. wmb();
  809. }
  810. EXPORT_SYMBOL_GPL(nvdimm_flush);
  811. /**
  812. * nvdimm_has_flush - determine write flushing requirements
  813. * @nd_region: blk or interleaved pmem region
  814. *
  815. * Returns 1 if writes require flushing
  816. * Returns 0 if writes do not require flushing
  817. * Returns -ENXIO if flushing capability can not be determined
  818. */
  819. int nvdimm_has_flush(struct nd_region *nd_region)
  820. {
  821. struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
  822. int i;
  823. /* no nvdimm == flushing capability unknown */
  824. if (nd_region->ndr_mappings == 0)
  825. return -ENXIO;
  826. for (i = 0; i < nd_region->ndr_mappings; i++)
  827. /* flush hints present, flushing required */
  828. if (ndrd_get_flush_wpq(ndrd, i, 0))
  829. return 1;
  830. /*
  831. * The platform defines dimm devices without hints, assume
  832. * platform persistence mechanism like ADR
  833. */
  834. return 0;
  835. }
  836. EXPORT_SYMBOL_GPL(nvdimm_has_flush);
  837. void __exit nd_region_devs_exit(void)
  838. {
  839. ida_destroy(&region_ida);
  840. }