rx.c 9.3 KB

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  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 2009 Nokia Corporation
  5. *
  6. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. */
  23. #include <linux/gfp.h>
  24. #include <linux/sched.h>
  25. #include "wlcore.h"
  26. #include "debug.h"
  27. #include "acx.h"
  28. #include "rx.h"
  29. #include "tx.h"
  30. #include "io.h"
  31. #include "hw_ops.h"
  32. /*
  33. * TODO: this is here just for now, it must be removed when the data
  34. * operations are in place.
  35. */
  36. #include "../wl12xx/reg.h"
  37. static u32 wlcore_rx_get_buf_size(struct wl1271 *wl,
  38. u32 rx_pkt_desc)
  39. {
  40. if (wl->quirks & WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN)
  41. return (rx_pkt_desc & ALIGNED_RX_BUF_SIZE_MASK) >>
  42. ALIGNED_RX_BUF_SIZE_SHIFT;
  43. return (rx_pkt_desc & RX_BUF_SIZE_MASK) >> RX_BUF_SIZE_SHIFT_DIV;
  44. }
  45. static u32 wlcore_rx_get_align_buf_size(struct wl1271 *wl, u32 pkt_len)
  46. {
  47. if (wl->quirks & WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN)
  48. return ALIGN(pkt_len, WL12XX_BUS_BLOCK_SIZE);
  49. return pkt_len;
  50. }
  51. static void wl1271_rx_status(struct wl1271 *wl,
  52. struct wl1271_rx_descriptor *desc,
  53. struct ieee80211_rx_status *status,
  54. u8 beacon)
  55. {
  56. memset(status, 0, sizeof(struct ieee80211_rx_status));
  57. if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG)
  58. status->band = NL80211_BAND_2GHZ;
  59. else
  60. status->band = NL80211_BAND_5GHZ;
  61. status->rate_idx = wlcore_rate_to_idx(wl, desc->rate, status->band);
  62. /* 11n support */
  63. if (desc->rate <= wl->hw_min_ht_rate)
  64. status->flag |= RX_FLAG_HT;
  65. /*
  66. * Read the signal level and antenna diversity indication.
  67. * The msb in the signal level is always set as it is a
  68. * negative number.
  69. * The antenna indication is the msb of the rssi.
  70. */
  71. status->signal = ((desc->rssi & RSSI_LEVEL_BITMASK) | BIT(7));
  72. status->antenna = ((desc->rssi & ANT_DIVERSITY_BITMASK) >> 7);
  73. /*
  74. * FIXME: In wl1251, the SNR should be divided by two. In wl1271 we
  75. * need to divide by two for now, but TI has been discussing about
  76. * changing it. This needs to be rechecked.
  77. */
  78. wl->noise = desc->rssi - (desc->snr >> 1);
  79. status->freq = ieee80211_channel_to_frequency(desc->channel,
  80. status->band);
  81. if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) {
  82. u8 desc_err_code = desc->status & WL1271_RX_DESC_STATUS_MASK;
  83. status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED |
  84. RX_FLAG_DECRYPTED;
  85. if (unlikely(desc_err_code & WL1271_RX_DESC_MIC_FAIL)) {
  86. status->flag |= RX_FLAG_MMIC_ERROR;
  87. wl1271_warning("Michael MIC error. Desc: 0x%x",
  88. desc_err_code);
  89. }
  90. }
  91. if (beacon)
  92. wlcore_set_pending_regdomain_ch(wl, (u16)desc->channel,
  93. status->band);
  94. }
  95. static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,
  96. enum wl_rx_buf_align rx_align, u8 *hlid)
  97. {
  98. struct wl1271_rx_descriptor *desc;
  99. struct sk_buff *skb;
  100. struct ieee80211_hdr *hdr;
  101. u8 *buf;
  102. u8 beacon = 0;
  103. u8 is_data = 0;
  104. u8 reserved = 0, offset_to_data = 0;
  105. u16 seq_num;
  106. u32 pkt_data_len;
  107. /*
  108. * In PLT mode we seem to get frames and mac80211 warns about them,
  109. * workaround this by not retrieving them at all.
  110. */
  111. if (unlikely(wl->plt))
  112. return -EINVAL;
  113. pkt_data_len = wlcore_hw_get_rx_packet_len(wl, data, length);
  114. if (!pkt_data_len) {
  115. wl1271_error("Invalid packet arrived from HW. length %d",
  116. length);
  117. return -EINVAL;
  118. }
  119. if (rx_align == WLCORE_RX_BUF_UNALIGNED)
  120. reserved = RX_BUF_ALIGN;
  121. else if (rx_align == WLCORE_RX_BUF_PADDED)
  122. offset_to_data = RX_BUF_ALIGN;
  123. /* the data read starts with the descriptor */
  124. desc = (struct wl1271_rx_descriptor *) data;
  125. if (desc->packet_class == WL12XX_RX_CLASS_LOGGER) {
  126. size_t len = length - sizeof(*desc);
  127. wl12xx_copy_fwlog(wl, data + sizeof(*desc), len);
  128. return 0;
  129. }
  130. /* discard corrupted packets */
  131. if (desc->status & WL1271_RX_DESC_DECRYPT_FAIL) {
  132. hdr = (void *)(data + sizeof(*desc) + offset_to_data);
  133. wl1271_warning("corrupted packet in RX: status: 0x%x len: %d",
  134. desc->status & WL1271_RX_DESC_STATUS_MASK,
  135. pkt_data_len);
  136. wl1271_dump((DEBUG_RX|DEBUG_CMD), "PKT: ", data + sizeof(*desc),
  137. min(pkt_data_len,
  138. ieee80211_hdrlen(hdr->frame_control)));
  139. return -EINVAL;
  140. }
  141. /* skb length not including rx descriptor */
  142. skb = __dev_alloc_skb(pkt_data_len + reserved, GFP_KERNEL);
  143. if (!skb) {
  144. wl1271_error("Couldn't allocate RX frame");
  145. return -ENOMEM;
  146. }
  147. /* reserve the unaligned payload(if any) */
  148. skb_reserve(skb, reserved);
  149. buf = skb_put(skb, pkt_data_len);
  150. /*
  151. * Copy packets from aggregation buffer to the skbs without rx
  152. * descriptor and with packet payload aligned care. In case of unaligned
  153. * packets copy the packets in offset of 2 bytes guarantee IP header
  154. * payload aligned to 4 bytes.
  155. */
  156. memcpy(buf, data + sizeof(*desc), pkt_data_len);
  157. if (rx_align == WLCORE_RX_BUF_PADDED)
  158. skb_pull(skb, RX_BUF_ALIGN);
  159. *hlid = desc->hlid;
  160. hdr = (struct ieee80211_hdr *)skb->data;
  161. if (ieee80211_is_beacon(hdr->frame_control))
  162. beacon = 1;
  163. if (ieee80211_is_data_present(hdr->frame_control))
  164. is_data = 1;
  165. wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon);
  166. wlcore_hw_set_rx_csum(wl, desc, skb);
  167. seq_num = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  168. wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s seq %d hlid %d", skb,
  169. skb->len - desc->pad_len,
  170. beacon ? "beacon" : "",
  171. seq_num, *hlid);
  172. skb_queue_tail(&wl->deferred_rx_queue, skb);
  173. queue_work(wl->freezable_wq, &wl->netstack_work);
  174. return is_data;
  175. }
  176. int wlcore_rx(struct wl1271 *wl, struct wl_fw_status *status)
  177. {
  178. unsigned long active_hlids[BITS_TO_LONGS(WLCORE_MAX_LINKS)] = {0};
  179. u32 buf_size;
  180. u32 fw_rx_counter = status->fw_rx_counter % wl->num_rx_desc;
  181. u32 drv_rx_counter = wl->rx_counter % wl->num_rx_desc;
  182. u32 rx_counter;
  183. u32 pkt_len, align_pkt_len;
  184. u32 pkt_offset, des;
  185. u8 hlid;
  186. enum wl_rx_buf_align rx_align;
  187. int ret = 0;
  188. /* update rates per link */
  189. hlid = status->counters.hlid;
  190. if (hlid < WLCORE_MAX_LINKS)
  191. wl->links[hlid].fw_rate_mbps =
  192. status->counters.tx_last_rate_mbps;
  193. while (drv_rx_counter != fw_rx_counter) {
  194. buf_size = 0;
  195. rx_counter = drv_rx_counter;
  196. while (rx_counter != fw_rx_counter) {
  197. des = le32_to_cpu(status->rx_pkt_descs[rx_counter]);
  198. pkt_len = wlcore_rx_get_buf_size(wl, des);
  199. align_pkt_len = wlcore_rx_get_align_buf_size(wl,
  200. pkt_len);
  201. if (buf_size + align_pkt_len > wl->aggr_buf_size)
  202. break;
  203. buf_size += align_pkt_len;
  204. rx_counter++;
  205. rx_counter %= wl->num_rx_desc;
  206. }
  207. if (buf_size == 0) {
  208. wl1271_warning("received empty data");
  209. break;
  210. }
  211. /* Read all available packets at once */
  212. des = le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]);
  213. ret = wlcore_hw_prepare_read(wl, des, buf_size);
  214. if (ret < 0)
  215. goto out;
  216. ret = wlcore_read_data(wl, REG_SLV_MEM_DATA, wl->aggr_buf,
  217. buf_size, true);
  218. if (ret < 0)
  219. goto out;
  220. /* Split data into separate packets */
  221. pkt_offset = 0;
  222. while (pkt_offset < buf_size) {
  223. des = le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]);
  224. pkt_len = wlcore_rx_get_buf_size(wl, des);
  225. rx_align = wlcore_hw_get_rx_buf_align(wl, des);
  226. /*
  227. * the handle data call can only fail in memory-outage
  228. * conditions, in that case the received frame will just
  229. * be dropped.
  230. */
  231. if (wl1271_rx_handle_data(wl,
  232. wl->aggr_buf + pkt_offset,
  233. pkt_len, rx_align,
  234. &hlid) == 1) {
  235. if (hlid < wl->num_links)
  236. __set_bit(hlid, active_hlids);
  237. else
  238. WARN(1,
  239. "hlid (%d) exceeded MAX_LINKS\n",
  240. hlid);
  241. }
  242. wl->rx_counter++;
  243. drv_rx_counter++;
  244. drv_rx_counter %= wl->num_rx_desc;
  245. pkt_offset += wlcore_rx_get_align_buf_size(wl, pkt_len);
  246. }
  247. }
  248. /*
  249. * Write the driver's packet counter to the FW. This is only required
  250. * for older hardware revisions
  251. */
  252. if (wl->quirks & WLCORE_QUIRK_END_OF_TRANSACTION) {
  253. ret = wlcore_write32(wl, WL12XX_REG_RX_DRIVER_COUNTER,
  254. wl->rx_counter);
  255. if (ret < 0)
  256. goto out;
  257. }
  258. wl12xx_rearm_rx_streaming(wl, active_hlids);
  259. out:
  260. return ret;
  261. }
  262. #ifdef CONFIG_PM
  263. int wl1271_rx_filter_enable(struct wl1271 *wl,
  264. int index, bool enable,
  265. struct wl12xx_rx_filter *filter)
  266. {
  267. int ret;
  268. if (!!test_bit(index, wl->rx_filter_enabled) == enable) {
  269. wl1271_warning("Request to enable an already "
  270. "enabled rx filter %d", index);
  271. return 0;
  272. }
  273. ret = wl1271_acx_set_rx_filter(wl, index, enable, filter);
  274. if (ret) {
  275. wl1271_error("Failed to %s rx data filter %d (err=%d)",
  276. enable ? "enable" : "disable", index, ret);
  277. return ret;
  278. }
  279. if (enable)
  280. __set_bit(index, wl->rx_filter_enabled);
  281. else
  282. __clear_bit(index, wl->rx_filter_enabled);
  283. return 0;
  284. }
  285. int wl1271_rx_filter_clear_all(struct wl1271 *wl)
  286. {
  287. int i, ret = 0;
  288. for (i = 0; i < WL1271_MAX_RX_FILTERS; i++) {
  289. if (!test_bit(i, wl->rx_filter_enabled))
  290. continue;
  291. ret = wl1271_rx_filter_enable(wl, i, 0, NULL);
  292. if (ret)
  293. goto out;
  294. }
  295. out:
  296. return ret;
  297. }
  298. #endif /* CONFIG_PM */