trx.c 28 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../stats.h"
  29. #include "reg.h"
  30. #include "def.h"
  31. #include "phy.h"
  32. #include "trx.h"
  33. #include "led.h"
  34. #include "dm.h"
  35. #include "phy.h"
  36. #include "fw.h"
  37. static u8 _rtl8821ae_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
  38. {
  39. __le16 fc = rtl_get_fc(skb);
  40. if (unlikely(ieee80211_is_beacon(fc)))
  41. return QSLT_BEACON;
  42. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  43. return QSLT_MGNT;
  44. return skb->priority;
  45. }
  46. static u16 odm_cfo(s8 value)
  47. {
  48. int ret_val;
  49. if (value < 0) {
  50. ret_val = 0 - value;
  51. ret_val = (ret_val << 1) + (ret_val >> 1);
  52. /* set bit12 as 1 for negative cfo */
  53. ret_val = ret_val | BIT(12);
  54. } else {
  55. ret_val = value;
  56. ret_val = (ret_val << 1) + (ret_val >> 1);
  57. }
  58. return ret_val;
  59. }
  60. static u8 _rtl8821ae_evm_dbm_jaguar(s8 value)
  61. {
  62. s8 ret_val = value;
  63. /* -33dB~0dB to 33dB ~ 0dB*/
  64. if (ret_val == -128)
  65. ret_val = 127;
  66. else if (ret_val < 0)
  67. ret_val = 0 - ret_val;
  68. ret_val = ret_val >> 1;
  69. return ret_val;
  70. }
  71. static void query_rxphystatus(struct ieee80211_hw *hw,
  72. struct rtl_stats *pstatus, u8 *pdesc,
  73. struct rx_fwinfo_8821ae *p_drvinfo,
  74. bool bpacket_match_bssid,
  75. bool bpacket_toself, bool packet_beacon)
  76. {
  77. struct rtl_priv *rtlpriv = rtl_priv(hw);
  78. struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
  79. struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
  80. struct rtl_phy *rtlphy = &rtlpriv->phy;
  81. s8 rx_pwr_all = 0, rx_pwr[4];
  82. u8 rf_rx_num = 0, evm, evmdbm, pwdb_all;
  83. u8 i, max_spatial_stream;
  84. u32 rssi, total_rssi = 0;
  85. bool is_cck = pstatus->is_cck;
  86. u8 lan_idx, vga_idx;
  87. /* Record it for next packet processing */
  88. pstatus->packet_matchbssid = bpacket_match_bssid;
  89. pstatus->packet_toself = bpacket_toself;
  90. pstatus->packet_beacon = packet_beacon;
  91. pstatus->rx_mimo_signalquality[0] = -1;
  92. pstatus->rx_mimo_signalquality[1] = -1;
  93. if (is_cck) {
  94. u8 cck_highpwr;
  95. u8 cck_agc_rpt;
  96. cck_agc_rpt = p_phystrpt->cfosho[0];
  97. /* (1)Hardware does not provide RSSI for CCK
  98. * (2)PWDB, Average PWDB cacluated by
  99. * hardware (for rate adaptive)
  100. */
  101. cck_highpwr = (u8)rtlphy->cck_high_power;
  102. lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
  103. vga_idx = (cck_agc_rpt & 0x1f);
  104. if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8812AE) {
  105. switch (lan_idx) {
  106. case 7:
  107. if (vga_idx <= 27)
  108. /*VGA_idx = 27~2*/
  109. rx_pwr_all = -100 + 2*(27-vga_idx);
  110. else
  111. rx_pwr_all = -100;
  112. break;
  113. case 6:
  114. /*VGA_idx = 2~0*/
  115. rx_pwr_all = -48 + 2*(2-vga_idx);
  116. break;
  117. case 5:
  118. /*VGA_idx = 7~5*/
  119. rx_pwr_all = -42 + 2*(7-vga_idx);
  120. break;
  121. case 4:
  122. /*VGA_idx = 7~4*/
  123. rx_pwr_all = -36 + 2*(7-vga_idx);
  124. break;
  125. case 3:
  126. /*VGA_idx = 7~0*/
  127. rx_pwr_all = -24 + 2*(7-vga_idx);
  128. break;
  129. case 2:
  130. if (cck_highpwr)
  131. /*VGA_idx = 5~0*/
  132. rx_pwr_all = -12 + 2*(5-vga_idx);
  133. else
  134. rx_pwr_all = -6 + 2*(5-vga_idx);
  135. break;
  136. case 1:
  137. rx_pwr_all = 8-2*vga_idx;
  138. break;
  139. case 0:
  140. rx_pwr_all = 14-2*vga_idx;
  141. break;
  142. default:
  143. break;
  144. }
  145. rx_pwr_all += 6;
  146. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  147. if (!cck_highpwr) {
  148. if (pwdb_all >= 80)
  149. pwdb_all =
  150. ((pwdb_all - 80)<<1) +
  151. ((pwdb_all - 80)>>1) + 80;
  152. else if ((pwdb_all <= 78) && (pwdb_all >= 20))
  153. pwdb_all += 3;
  154. if (pwdb_all > 100)
  155. pwdb_all = 100;
  156. }
  157. } else { /* 8821 */
  158. s8 pout = -6;
  159. switch (lan_idx) {
  160. case 5:
  161. rx_pwr_all = pout - 32 - (2*vga_idx);
  162. break;
  163. case 4:
  164. rx_pwr_all = pout - 24 - (2*vga_idx);
  165. break;
  166. case 2:
  167. rx_pwr_all = pout - 11 - (2*vga_idx);
  168. break;
  169. case 1:
  170. rx_pwr_all = pout + 5 - (2*vga_idx);
  171. break;
  172. case 0:
  173. rx_pwr_all = pout + 21 - (2*vga_idx);
  174. break;
  175. }
  176. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  177. }
  178. pstatus->rx_pwdb_all = pwdb_all;
  179. pstatus->recvsignalpower = rx_pwr_all;
  180. /* (3) Get Signal Quality (EVM) */
  181. if (bpacket_match_bssid) {
  182. u8 sq;
  183. if (pstatus->rx_pwdb_all > 40) {
  184. sq = 100;
  185. } else {
  186. sq = p_phystrpt->pwdb_all;
  187. if (sq > 64)
  188. sq = 0;
  189. else if (sq < 20)
  190. sq = 100;
  191. else
  192. sq = ((64 - sq) * 100) / 44;
  193. }
  194. pstatus->signalquality = sq;
  195. pstatus->rx_mimo_signalquality[0] = sq;
  196. pstatus->rx_mimo_signalquality[1] = -1;
  197. }
  198. } else {
  199. /* (1)Get RSSI for HT rate */
  200. for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
  201. /* we will judge RF RX path now. */
  202. if (rtlpriv->dm.rfpath_rxenable[i])
  203. rf_rx_num++;
  204. rx_pwr[i] = (p_phystrpt->gain_trsw[i] & 0x7f) - 110;
  205. /* Translate DBM to percentage. */
  206. rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
  207. total_rssi += rssi;
  208. /* Get Rx snr value in DB */
  209. pstatus->rx_snr[i] = p_phystrpt->rxsnr[i] / 2;
  210. rtlpriv->stats.rx_snr_db[i] = p_phystrpt->rxsnr[i] / 2;
  211. pstatus->cfo_short[i] = odm_cfo(p_phystrpt->cfosho[i]);
  212. pstatus->cfo_tail[i] = odm_cfo(p_phystrpt->cfotail[i]);
  213. /* Record Signal Strength for next packet */
  214. pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
  215. }
  216. /* (2)PWDB, Average PWDB cacluated by
  217. * hardware (for rate adaptive)
  218. */
  219. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  220. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  221. pstatus->rx_pwdb_all = pwdb_all;
  222. pstatus->rxpower = rx_pwr_all;
  223. pstatus->recvsignalpower = rx_pwr_all;
  224. /* (3)EVM of HT rate */
  225. if ((pstatus->is_ht && pstatus->rate >= DESC_RATEMCS8 &&
  226. pstatus->rate <= DESC_RATEMCS15) ||
  227. (pstatus->is_vht &&
  228. pstatus->rate >= DESC_RATEVHT2SS_MCS0 &&
  229. pstatus->rate <= DESC_RATEVHT2SS_MCS9))
  230. max_spatial_stream = 2;
  231. else
  232. max_spatial_stream = 1;
  233. for (i = 0; i < max_spatial_stream; i++) {
  234. evm = rtl_evm_db_to_percentage(p_phystrpt->rxevm[i]);
  235. evmdbm = _rtl8821ae_evm_dbm_jaguar(p_phystrpt->rxevm[i]);
  236. if (bpacket_match_bssid) {
  237. /* Fill value in RFD, Get the first
  238. * spatial stream only
  239. */
  240. if (i == 0)
  241. pstatus->signalquality = evm;
  242. pstatus->rx_mimo_signalquality[i] = evm;
  243. pstatus->rx_mimo_evm_dbm[i] = evmdbm;
  244. }
  245. }
  246. if (bpacket_match_bssid) {
  247. for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
  248. rtl_priv(hw)->dm.cfo_tail[i] =
  249. (s8)p_phystrpt->cfotail[i];
  250. rtl_priv(hw)->dm.packet_count++;
  251. }
  252. }
  253. /* UI BSS List signal strength(in percentage),
  254. * make it good looking, from 0~100.
  255. */
  256. if (is_cck)
  257. pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  258. pwdb_all));
  259. else if (rf_rx_num != 0)
  260. pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  261. total_rssi /= rf_rx_num));
  262. /*HW antenna diversity*/
  263. rtldm->fat_table.antsel_rx_keep_0 = p_phystrpt->antidx_anta;
  264. rtldm->fat_table.antsel_rx_keep_1 = p_phystrpt->antidx_antb;
  265. }
  266. static void translate_rx_signal_stuff(struct ieee80211_hw *hw,
  267. struct sk_buff *skb,
  268. struct rtl_stats *pstatus, u8 *pdesc,
  269. struct rx_fwinfo_8821ae *p_drvinfo)
  270. {
  271. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  272. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  273. struct ieee80211_hdr *hdr;
  274. u8 *tmp_buf;
  275. u8 *praddr;
  276. u8 *psaddr;
  277. __le16 fc;
  278. u16 type;
  279. bool packet_matchbssid, packet_toself, packet_beacon;
  280. tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
  281. hdr = (struct ieee80211_hdr *)tmp_buf;
  282. fc = hdr->frame_control;
  283. type = WLAN_FC_GET_TYPE(hdr->frame_control);
  284. praddr = hdr->addr1;
  285. psaddr = ieee80211_get_SA(hdr);
  286. ether_addr_copy(pstatus->psaddr, psaddr);
  287. packet_matchbssid = (!ieee80211_is_ctl(fc) &&
  288. (ether_addr_equal(mac->bssid,
  289. ieee80211_has_tods(fc) ?
  290. hdr->addr1 :
  291. ieee80211_has_fromds(fc) ?
  292. hdr->addr2 : hdr->addr3)) &&
  293. (!pstatus->hwerror) &&
  294. (!pstatus->crc) && (!pstatus->icv));
  295. packet_toself = packet_matchbssid &&
  296. (ether_addr_equal(praddr, rtlefuse->dev_addr));
  297. if (ieee80211_is_beacon(hdr->frame_control))
  298. packet_beacon = true;
  299. else
  300. packet_beacon = false;
  301. if (packet_beacon && packet_matchbssid)
  302. rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
  303. if (packet_matchbssid &&
  304. ieee80211_is_data_qos(hdr->frame_control) &&
  305. !is_multicast_ether_addr(ieee80211_get_DA(hdr))) {
  306. struct ieee80211_qos_hdr *hdr_qos =
  307. (struct ieee80211_qos_hdr *)tmp_buf;
  308. u16 tid = le16_to_cpu(hdr_qos->qos_ctrl) & 0xf;
  309. if (tid != 0 && tid != 3)
  310. rtl_priv(hw)->dm.dbginfo.num_non_be_pkt++;
  311. }
  312. query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
  313. packet_matchbssid, packet_toself,
  314. packet_beacon);
  315. /*_rtl8821ae_smart_antenna(hw, pstatus); */
  316. rtl_process_phyinfo(hw, tmp_buf, pstatus);
  317. }
  318. static void _rtl8821ae_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
  319. u8 *virtualaddress)
  320. {
  321. u32 dwtmp = 0;
  322. memset(virtualaddress, 0, 8);
  323. SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
  324. if (ptcb_desc->empkt_num == 1) {
  325. dwtmp = ptcb_desc->empkt_len[0];
  326. } else {
  327. dwtmp = ptcb_desc->empkt_len[0];
  328. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
  329. dwtmp += ptcb_desc->empkt_len[1];
  330. }
  331. SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
  332. if (ptcb_desc->empkt_num <= 3) {
  333. dwtmp = ptcb_desc->empkt_len[2];
  334. } else {
  335. dwtmp = ptcb_desc->empkt_len[2];
  336. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
  337. dwtmp += ptcb_desc->empkt_len[3];
  338. }
  339. SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
  340. if (ptcb_desc->empkt_num <= 5) {
  341. dwtmp = ptcb_desc->empkt_len[4];
  342. } else {
  343. dwtmp = ptcb_desc->empkt_len[4];
  344. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
  345. dwtmp += ptcb_desc->empkt_len[5];
  346. }
  347. SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
  348. SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
  349. if (ptcb_desc->empkt_num <= 7) {
  350. dwtmp = ptcb_desc->empkt_len[6];
  351. } else {
  352. dwtmp = ptcb_desc->empkt_len[6];
  353. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
  354. dwtmp += ptcb_desc->empkt_len[7];
  355. }
  356. SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
  357. if (ptcb_desc->empkt_num <= 9) {
  358. dwtmp = ptcb_desc->empkt_len[8];
  359. } else {
  360. dwtmp = ptcb_desc->empkt_len[8];
  361. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
  362. dwtmp += ptcb_desc->empkt_len[9];
  363. }
  364. SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
  365. }
  366. static bool rtl8821ae_get_rxdesc_is_ht(struct ieee80211_hw *hw, u8 *pdesc)
  367. {
  368. struct rtl_priv *rtlpriv = rtl_priv(hw);
  369. u8 rx_rate = 0;
  370. rx_rate = GET_RX_DESC_RXMCS(pdesc);
  371. RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate);
  372. if ((rx_rate >= DESC_RATEMCS0) && (rx_rate <= DESC_RATEMCS15))
  373. return true;
  374. return false;
  375. }
  376. static bool rtl8821ae_get_rxdesc_is_vht(struct ieee80211_hw *hw, u8 *pdesc)
  377. {
  378. struct rtl_priv *rtlpriv = rtl_priv(hw);
  379. u8 rx_rate = 0;
  380. rx_rate = GET_RX_DESC_RXMCS(pdesc);
  381. RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate);
  382. if (rx_rate >= DESC_RATEVHT1SS_MCS0)
  383. return true;
  384. return false;
  385. }
  386. static u8 rtl8821ae_get_rx_vht_nss(struct ieee80211_hw *hw, u8 *pdesc)
  387. {
  388. u8 rx_rate = 0;
  389. u8 vht_nss = 0;
  390. rx_rate = GET_RX_DESC_RXMCS(pdesc);
  391. if ((rx_rate >= DESC_RATEVHT1SS_MCS0) &&
  392. (rx_rate <= DESC_RATEVHT1SS_MCS9))
  393. vht_nss = 1;
  394. else if ((rx_rate >= DESC_RATEVHT2SS_MCS0) &&
  395. (rx_rate <= DESC_RATEVHT2SS_MCS9))
  396. vht_nss = 2;
  397. return vht_nss;
  398. }
  399. bool rtl8821ae_rx_query_desc(struct ieee80211_hw *hw,
  400. struct rtl_stats *status,
  401. struct ieee80211_rx_status *rx_status,
  402. u8 *pdesc, struct sk_buff *skb)
  403. {
  404. struct rtl_priv *rtlpriv = rtl_priv(hw);
  405. struct rx_fwinfo_8821ae *p_drvinfo;
  406. struct ieee80211_hdr *hdr;
  407. u32 phystatus = GET_RX_DESC_PHYST(pdesc);
  408. status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
  409. status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
  410. RX_DRV_INFO_SIZE_UNIT;
  411. status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
  412. status->icv = (u16)GET_RX_DESC_ICV(pdesc);
  413. status->crc = (u16)GET_RX_DESC_CRC32(pdesc);
  414. status->hwerror = (status->crc | status->icv);
  415. status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
  416. status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
  417. status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc);
  418. status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
  419. status->isfirst_ampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
  420. status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
  421. status->rx_packet_bw = GET_RX_DESC_BW(pdesc);
  422. status->macid = GET_RX_DESC_MACID(pdesc);
  423. status->is_short_gi = !(bool)GET_RX_DESC_SPLCP(pdesc);
  424. status->is_ht = rtl8821ae_get_rxdesc_is_ht(hw, pdesc);
  425. status->is_vht = rtl8821ae_get_rxdesc_is_vht(hw, pdesc);
  426. status->vht_nss = rtl8821ae_get_rx_vht_nss(hw, pdesc);
  427. status->is_cck = RTL8821AE_RX_HAL_IS_CCK_RATE(status->rate);
  428. RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
  429. "rx_packet_bw=%s,is_ht %d, is_vht %d, vht_nss=%d,is_short_gi %d.\n",
  430. (status->rx_packet_bw == 2) ? "80M" :
  431. (status->rx_packet_bw == 1) ? "40M" : "20M",
  432. status->is_ht, status->is_vht, status->vht_nss,
  433. status->is_short_gi);
  434. if (GET_RX_STATUS_DESC_RPT_SEL(pdesc))
  435. status->packet_report_type = C2H_PACKET;
  436. else
  437. status->packet_report_type = NORMAL_RX;
  438. if (GET_RX_STATUS_DESC_PATTERN_MATCH(pdesc))
  439. status->wake_match = BIT(2);
  440. else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
  441. status->wake_match = BIT(1);
  442. else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
  443. status->wake_match = BIT(0);
  444. else
  445. status->wake_match = 0;
  446. if (status->wake_match)
  447. RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
  448. "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
  449. status->wake_match);
  450. rx_status->freq = hw->conf.chandef.chan->center_freq;
  451. rx_status->band = hw->conf.chandef.chan->band;
  452. hdr = (struct ieee80211_hdr *)(skb->data +
  453. status->rx_drvinfo_size + status->rx_bufshift);
  454. if (status->crc)
  455. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  456. if (status->rx_packet_bw == HT_CHANNEL_WIDTH_20_40)
  457. rx_status->flag |= RX_FLAG_40MHZ;
  458. else if (status->rx_packet_bw == HT_CHANNEL_WIDTH_80)
  459. rx_status->vht_flag |= RX_VHT_FLAG_80MHZ;
  460. if (status->is_ht)
  461. rx_status->flag |= RX_FLAG_HT;
  462. if (status->is_vht)
  463. rx_status->flag |= RX_FLAG_VHT;
  464. if (status->is_short_gi)
  465. rx_status->flag |= RX_FLAG_SHORT_GI;
  466. rx_status->vht_nss = status->vht_nss;
  467. rx_status->flag |= RX_FLAG_MACTIME_START;
  468. /* hw will set status->decrypted true, if it finds the
  469. * frame is open data frame or mgmt frame.
  470. * So hw will not decryption robust managment frame
  471. * for IEEE80211w but still set status->decrypted
  472. * true, so here we should set it back to undecrypted
  473. * for IEEE80211w frame, and mac80211 sw will help
  474. * to decrypt it
  475. */
  476. if (status->decrypted) {
  477. if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
  478. (ieee80211_has_protected(hdr->frame_control)))
  479. rx_status->flag |= RX_FLAG_DECRYPTED;
  480. else
  481. rx_status->flag &= ~RX_FLAG_DECRYPTED;
  482. }
  483. /* rate_idx: index of data rate into band's
  484. * supported rates or MCS index if HT rates
  485. * are use (RX_FLAG_HT)
  486. */
  487. rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
  488. status->is_vht,
  489. status->rate);
  490. rx_status->mactime = status->timestamp_low;
  491. if (phystatus) {
  492. p_drvinfo = (struct rx_fwinfo_8821ae *)(skb->data +
  493. status->rx_bufshift);
  494. translate_rx_signal_stuff(hw, skb, status, pdesc, p_drvinfo);
  495. }
  496. rx_status->signal = status->recvsignalpower + 10;
  497. if (status->packet_report_type == TX_REPORT2) {
  498. status->macid_valid_entry[0] =
  499. GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
  500. status->macid_valid_entry[1] =
  501. GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
  502. }
  503. return true;
  504. }
  505. static u8 rtl8821ae_bw_mapping(struct ieee80211_hw *hw,
  506. struct rtl_tcb_desc *ptcb_desc)
  507. {
  508. struct rtl_priv *rtlpriv = rtl_priv(hw);
  509. struct rtl_phy *rtlphy = &rtlpriv->phy;
  510. u8 bw_setting_of_desc = 0;
  511. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  512. "rtl8821ae_bw_mapping, current_chan_bw %d, packet_bw %d\n",
  513. rtlphy->current_chan_bw, ptcb_desc->packet_bw);
  514. if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
  515. if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80)
  516. bw_setting_of_desc = 2;
  517. else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40)
  518. bw_setting_of_desc = 1;
  519. else
  520. bw_setting_of_desc = 0;
  521. } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
  522. if ((ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) ||
  523. (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80))
  524. bw_setting_of_desc = 1;
  525. else
  526. bw_setting_of_desc = 0;
  527. } else {
  528. bw_setting_of_desc = 0;
  529. }
  530. return bw_setting_of_desc;
  531. }
  532. static u8 rtl8821ae_sc_mapping(struct ieee80211_hw *hw,
  533. struct rtl_tcb_desc *ptcb_desc)
  534. {
  535. struct rtl_priv *rtlpriv = rtl_priv(hw);
  536. struct rtl_phy *rtlphy = &rtlpriv->phy;
  537. struct rtl_mac *mac = rtl_mac(rtlpriv);
  538. u8 sc_setting_of_desc = 0;
  539. if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
  540. if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80) {
  541. sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
  542. } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
  543. if (mac->cur_80_prime_sc ==
  544. HAL_PRIME_CHNL_OFFSET_LOWER)
  545. sc_setting_of_desc =
  546. VHT_DATA_SC_40_LOWER_OF_80MHZ;
  547. else if (mac->cur_80_prime_sc ==
  548. HAL_PRIME_CHNL_OFFSET_UPPER)
  549. sc_setting_of_desc =
  550. VHT_DATA_SC_40_UPPER_OF_80MHZ;
  551. else
  552. RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD,
  553. "rtl8821ae_sc_mapping: Not Correct Primary40MHz Setting\n");
  554. } else {
  555. if ((mac->cur_40_prime_sc ==
  556. HAL_PRIME_CHNL_OFFSET_LOWER) &&
  557. (mac->cur_80_prime_sc ==
  558. HAL_PRIME_CHNL_OFFSET_LOWER))
  559. sc_setting_of_desc =
  560. VHT_DATA_SC_20_LOWEST_OF_80MHZ;
  561. else if ((mac->cur_40_prime_sc ==
  562. HAL_PRIME_CHNL_OFFSET_UPPER) &&
  563. (mac->cur_80_prime_sc ==
  564. HAL_PRIME_CHNL_OFFSET_LOWER))
  565. sc_setting_of_desc =
  566. VHT_DATA_SC_20_LOWER_OF_80MHZ;
  567. else if ((mac->cur_40_prime_sc ==
  568. HAL_PRIME_CHNL_OFFSET_LOWER) &&
  569. (mac->cur_80_prime_sc ==
  570. HAL_PRIME_CHNL_OFFSET_UPPER))
  571. sc_setting_of_desc =
  572. VHT_DATA_SC_20_UPPER_OF_80MHZ;
  573. else if ((mac->cur_40_prime_sc ==
  574. HAL_PRIME_CHNL_OFFSET_UPPER) &&
  575. (mac->cur_80_prime_sc ==
  576. HAL_PRIME_CHNL_OFFSET_UPPER))
  577. sc_setting_of_desc =
  578. VHT_DATA_SC_20_UPPERST_OF_80MHZ;
  579. else
  580. RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD,
  581. "rtl8821ae_sc_mapping: Not Correct Primary40MHz Setting\n");
  582. }
  583. } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
  584. if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
  585. sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
  586. } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20) {
  587. if (mac->cur_40_prime_sc ==
  588. HAL_PRIME_CHNL_OFFSET_UPPER) {
  589. sc_setting_of_desc =
  590. VHT_DATA_SC_20_UPPER_OF_80MHZ;
  591. } else if (mac->cur_40_prime_sc ==
  592. HAL_PRIME_CHNL_OFFSET_LOWER){
  593. sc_setting_of_desc =
  594. VHT_DATA_SC_20_LOWER_OF_80MHZ;
  595. } else {
  596. sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
  597. }
  598. }
  599. } else {
  600. sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
  601. }
  602. return sc_setting_of_desc;
  603. }
  604. void rtl8821ae_tx_fill_desc(struct ieee80211_hw *hw,
  605. struct ieee80211_hdr *hdr, u8 *pdesc_tx, u8 *txbd,
  606. struct ieee80211_tx_info *info,
  607. struct ieee80211_sta *sta,
  608. struct sk_buff *skb,
  609. u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
  610. {
  611. struct rtl_priv *rtlpriv = rtl_priv(hw);
  612. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  613. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  614. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  615. u8 *pdesc = (u8 *)pdesc_tx;
  616. u16 seq_number;
  617. __le16 fc = hdr->frame_control;
  618. unsigned int buf_len = 0;
  619. unsigned int skb_len = skb->len;
  620. u8 fw_qsel = _rtl8821ae_map_hwqueue_to_fwqueue(skb, hw_queue);
  621. bool firstseg = ((hdr->seq_ctrl &
  622. cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
  623. bool lastseg = ((hdr->frame_control &
  624. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
  625. dma_addr_t mapping;
  626. u8 short_gi = 0;
  627. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  628. rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
  629. /* reserve 8 byte for AMPDU early mode */
  630. if (rtlhal->earlymode_enable) {
  631. skb_push(skb, EM_HDR_LEN);
  632. memset(skb->data, 0, EM_HDR_LEN);
  633. }
  634. buf_len = skb->len;
  635. mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
  636. PCI_DMA_TODEVICE);
  637. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  638. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  639. "DMA mapping error\n");
  640. return;
  641. }
  642. CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8821ae));
  643. if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
  644. firstseg = true;
  645. lastseg = true;
  646. }
  647. if (firstseg) {
  648. if (rtlhal->earlymode_enable) {
  649. SET_TX_DESC_PKT_OFFSET(pdesc, 1);
  650. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
  651. EM_HDR_LEN);
  652. if (ptcb_desc->empkt_num) {
  653. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  654. "Insert 8 byte.pTcb->EMPktNum:%d\n",
  655. ptcb_desc->empkt_num);
  656. _rtl8821ae_insert_emcontent(ptcb_desc,
  657. (u8 *)(skb->data));
  658. }
  659. } else {
  660. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  661. }
  662. /* ptcb_desc->use_driver_rate = true; */
  663. SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
  664. if (ptcb_desc->hw_rate > DESC_RATEMCS0)
  665. short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
  666. else
  667. short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
  668. SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi);
  669. if (info->flags & IEEE80211_TX_CTL_AMPDU) {
  670. SET_TX_DESC_AGG_ENABLE(pdesc, 1);
  671. SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x1f);
  672. }
  673. SET_TX_DESC_SEQ(pdesc, seq_number);
  674. SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
  675. !ptcb_desc->cts_enable) ? 1 : 0));
  676. SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
  677. SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
  678. SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
  679. SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
  680. SET_TX_DESC_RTS_SHORT(pdesc,
  681. ((ptcb_desc->rts_rate <= DESC_RATE54M) ?
  682. (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
  683. (ptcb_desc->rts_use_shortgi ? 1 : 0)));
  684. if (ptcb_desc->tx_enable_sw_calc_duration)
  685. SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
  686. SET_TX_DESC_DATA_BW(pdesc,
  687. rtl8821ae_bw_mapping(hw, ptcb_desc));
  688. SET_TX_DESC_TX_SUB_CARRIER(pdesc,
  689. rtl8821ae_sc_mapping(hw, ptcb_desc));
  690. SET_TX_DESC_LINIP(pdesc, 0);
  691. SET_TX_DESC_PKT_SIZE(pdesc, (u16)skb_len);
  692. if (sta) {
  693. u8 ampdu_density = sta->ht_cap.ampdu_density;
  694. SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
  695. }
  696. if (info->control.hw_key) {
  697. struct ieee80211_key_conf *keyconf =
  698. info->control.hw_key;
  699. switch (keyconf->cipher) {
  700. case WLAN_CIPHER_SUITE_WEP40:
  701. case WLAN_CIPHER_SUITE_WEP104:
  702. case WLAN_CIPHER_SUITE_TKIP:
  703. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  704. break;
  705. case WLAN_CIPHER_SUITE_CCMP:
  706. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  707. break;
  708. default:
  709. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  710. break;
  711. }
  712. }
  713. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  714. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  715. SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
  716. SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
  717. 1 : 0);
  718. SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
  719. if (ieee80211_is_data_qos(fc)) {
  720. if (mac->rdg_en) {
  721. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  722. "Enable RDG function.\n");
  723. SET_TX_DESC_RDG_ENABLE(pdesc, 1);
  724. SET_TX_DESC_HTC(pdesc, 1);
  725. }
  726. }
  727. }
  728. SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
  729. SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
  730. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)buf_len);
  731. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  732. /* if (rtlpriv->dm.useramask) { */
  733. if (1) {
  734. SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
  735. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  736. } else {
  737. SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
  738. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  739. }
  740. if (!ieee80211_is_data_qos(fc)) {
  741. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  742. SET_TX_DESC_HWSEQ_SEL(pdesc, 0);
  743. }
  744. SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
  745. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
  746. is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
  747. SET_TX_DESC_BMC(pdesc, 1);
  748. }
  749. rtl8821ae_dm_set_tx_ant_by_tx_info(hw, pdesc, ptcb_desc->mac_id);
  750. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
  751. }
  752. void rtl8821ae_tx_fill_cmddesc(struct ieee80211_hw *hw,
  753. u8 *pdesc, bool firstseg,
  754. bool lastseg, struct sk_buff *skb)
  755. {
  756. struct rtl_priv *rtlpriv = rtl_priv(hw);
  757. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  758. u8 fw_queue = QSLT_BEACON;
  759. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  760. skb->data, skb->len,
  761. PCI_DMA_TODEVICE);
  762. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  763. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  764. "DMA mapping error\n");
  765. return;
  766. }
  767. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
  768. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  769. SET_TX_DESC_LAST_SEG(pdesc, 1);
  770. SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
  771. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  772. SET_TX_DESC_USE_RATE(pdesc, 1);
  773. SET_TX_DESC_TX_RATE(pdesc, DESC_RATE1M);
  774. SET_TX_DESC_DISABLE_FB(pdesc, 1);
  775. SET_TX_DESC_DATA_BW(pdesc, 0);
  776. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  777. SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
  778. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
  779. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  780. SET_TX_DESC_MACID(pdesc, 0);
  781. SET_TX_DESC_OWN(pdesc, 1);
  782. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  783. "H2C Tx Cmd Content\n",
  784. pdesc, TX_DESC_SIZE);
  785. }
  786. void rtl8821ae_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
  787. bool istx, u8 desc_name, u8 *val)
  788. {
  789. if (istx) {
  790. switch (desc_name) {
  791. case HW_DESC_OWN:
  792. SET_TX_DESC_OWN(pdesc, 1);
  793. break;
  794. case HW_DESC_TX_NEXTDESC_ADDR:
  795. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
  796. break;
  797. default:
  798. RT_ASSERT(false,
  799. "ERR txdesc :%d not process\n", desc_name);
  800. break;
  801. }
  802. } else {
  803. switch (desc_name) {
  804. case HW_DESC_RXOWN:
  805. SET_RX_DESC_OWN(pdesc, 1);
  806. break;
  807. case HW_DESC_RXBUFF_ADDR:
  808. SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val);
  809. break;
  810. case HW_DESC_RXPKT_LEN:
  811. SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val);
  812. break;
  813. case HW_DESC_RXERO:
  814. SET_RX_DESC_EOR(pdesc, 1);
  815. break;
  816. default:
  817. RT_ASSERT(false,
  818. "ERR rxdesc :%d not process\n", desc_name);
  819. break;
  820. }
  821. }
  822. }
  823. u32 rtl8821ae_get_desc(u8 *pdesc, bool istx, u8 desc_name)
  824. {
  825. u32 ret = 0;
  826. if (istx) {
  827. switch (desc_name) {
  828. case HW_DESC_OWN:
  829. ret = GET_TX_DESC_OWN(pdesc);
  830. break;
  831. case HW_DESC_TXBUFF_ADDR:
  832. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
  833. break;
  834. default:
  835. RT_ASSERT(false,
  836. "ERR txdesc :%d not process\n", desc_name);
  837. break;
  838. }
  839. } else {
  840. switch (desc_name) {
  841. case HW_DESC_OWN:
  842. ret = GET_RX_DESC_OWN(pdesc);
  843. break;
  844. case HW_DESC_RXPKT_LEN:
  845. ret = GET_RX_DESC_PKT_LEN(pdesc);
  846. break;
  847. case HW_DESC_RXBUFF_ADDR:
  848. ret = GET_RX_DESC_BUFF_ADDR(pdesc);
  849. break;
  850. default:
  851. RT_ASSERT(false,
  852. "ERR rxdesc :%d not process\n", desc_name);
  853. break;
  854. }
  855. }
  856. return ret;
  857. }
  858. bool rtl8821ae_is_tx_desc_closed(struct ieee80211_hw *hw,
  859. u8 hw_queue, u16 index)
  860. {
  861. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  862. struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
  863. u8 *entry = (u8 *)(&ring->desc[ring->idx]);
  864. u8 own = (u8)rtl8821ae_get_desc(entry, true, HW_DESC_OWN);
  865. /**
  866. *beacon packet will only use the first
  867. *descriptor defautly,and the own may not
  868. *be cleared by the hardware
  869. */
  870. if (own)
  871. return false;
  872. return true;
  873. }
  874. void rtl8821ae_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
  875. {
  876. struct rtl_priv *rtlpriv = rtl_priv(hw);
  877. if (hw_queue == BEACON_QUEUE) {
  878. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
  879. } else {
  880. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
  881. BIT(0) << (hw_queue));
  882. }
  883. }
  884. u32 rtl8821ae_rx_command_packet(struct ieee80211_hw *hw,
  885. const struct rtl_stats *status,
  886. struct sk_buff *skb)
  887. {
  888. u32 result = 0;
  889. struct rtl_priv *rtlpriv = rtl_priv(hw);
  890. switch (status->packet_report_type) {
  891. case NORMAL_RX:
  892. result = 0;
  893. break;
  894. case C2H_PACKET:
  895. rtl8821ae_c2h_packet_handler(hw, skb->data, (u8)skb->len);
  896. result = 1;
  897. RT_TRACE(rtlpriv, COMP_RECV, DBG_LOUD,
  898. "skb->len=%d\n\n", skb->len);
  899. break;
  900. default:
  901. RT_TRACE(rtlpriv, COMP_RECV, DBG_LOUD,
  902. "No this packet type!!\n");
  903. break;
  904. }
  905. return result;
  906. }