htt_rx.c 70 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include "mac.h"
  24. #include <linux/log2.h>
  25. #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
  26. #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
  27. /* when under memory pressure rx ring refill may fail and needs a retry */
  28. #define HTT_RX_RING_REFILL_RETRY_MS 50
  29. #define HTT_RX_RING_REFILL_RESCHED_MS 5
  30. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  31. static struct sk_buff *
  32. ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
  33. {
  34. struct ath10k_skb_rxcb *rxcb;
  35. hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
  36. if (rxcb->paddr == paddr)
  37. return ATH10K_RXCB_SKB(rxcb);
  38. WARN_ON_ONCE(1);
  39. return NULL;
  40. }
  41. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  42. {
  43. struct sk_buff *skb;
  44. struct ath10k_skb_rxcb *rxcb;
  45. struct hlist_node *n;
  46. int i;
  47. if (htt->rx_ring.in_ord_rx) {
  48. hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
  49. skb = ATH10K_RXCB_SKB(rxcb);
  50. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  51. skb->len + skb_tailroom(skb),
  52. DMA_FROM_DEVICE);
  53. hash_del(&rxcb->hlist);
  54. dev_kfree_skb_any(skb);
  55. }
  56. } else {
  57. for (i = 0; i < htt->rx_ring.size; i++) {
  58. skb = htt->rx_ring.netbufs_ring[i];
  59. if (!skb)
  60. continue;
  61. rxcb = ATH10K_SKB_RXCB(skb);
  62. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  63. skb->len + skb_tailroom(skb),
  64. DMA_FROM_DEVICE);
  65. dev_kfree_skb_any(skb);
  66. }
  67. }
  68. htt->rx_ring.fill_cnt = 0;
  69. hash_init(htt->rx_ring.skb_table);
  70. memset(htt->rx_ring.netbufs_ring, 0,
  71. htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
  72. }
  73. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  74. {
  75. struct htt_rx_desc *rx_desc;
  76. struct ath10k_skb_rxcb *rxcb;
  77. struct sk_buff *skb;
  78. dma_addr_t paddr;
  79. int ret = 0, idx;
  80. /* The Full Rx Reorder firmware has no way of telling the host
  81. * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
  82. * To keep things simple make sure ring is always half empty. This
  83. * guarantees there'll be no replenishment overruns possible.
  84. */
  85. BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
  86. idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  87. while (num > 0) {
  88. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  89. if (!skb) {
  90. ret = -ENOMEM;
  91. goto fail;
  92. }
  93. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  94. skb_pull(skb,
  95. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  96. skb->data);
  97. /* Clear rx_desc attention word before posting to Rx ring */
  98. rx_desc = (struct htt_rx_desc *)skb->data;
  99. rx_desc->attention.flags = __cpu_to_le32(0);
  100. paddr = dma_map_single(htt->ar->dev, skb->data,
  101. skb->len + skb_tailroom(skb),
  102. DMA_FROM_DEVICE);
  103. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  104. dev_kfree_skb_any(skb);
  105. ret = -ENOMEM;
  106. goto fail;
  107. }
  108. rxcb = ATH10K_SKB_RXCB(skb);
  109. rxcb->paddr = paddr;
  110. htt->rx_ring.netbufs_ring[idx] = skb;
  111. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  112. htt->rx_ring.fill_cnt++;
  113. if (htt->rx_ring.in_ord_rx) {
  114. hash_add(htt->rx_ring.skb_table,
  115. &ATH10K_SKB_RXCB(skb)->hlist,
  116. (u32)paddr);
  117. }
  118. num--;
  119. idx++;
  120. idx &= htt->rx_ring.size_mask;
  121. }
  122. fail:
  123. /*
  124. * Make sure the rx buffer is updated before available buffer
  125. * index to avoid any potential rx ring corruption.
  126. */
  127. mb();
  128. *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
  129. return ret;
  130. }
  131. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  132. {
  133. lockdep_assert_held(&htt->rx_ring.lock);
  134. return __ath10k_htt_rx_ring_fill_n(htt, num);
  135. }
  136. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  137. {
  138. int ret, num_deficit, num_to_fill;
  139. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  140. * reason is RX may take up significant amount of CPU cycles and starve
  141. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  142. * with ath10k wlan interface. This ended up with very poor performance
  143. * once CPU the host system was overwhelmed with RX on ath10k.
  144. *
  145. * By limiting the number of refills the replenishing occurs
  146. * progressively. This in turns makes use of the fact tasklets are
  147. * processed in FIFO order. This means actual RX processing can starve
  148. * out refilling. If there's not enough buffers on RX ring FW will not
  149. * report RX until it is refilled with enough buffers. This
  150. * automatically balances load wrt to CPU power.
  151. *
  152. * This probably comes at a cost of lower maximum throughput but
  153. * improves the average and stability. */
  154. spin_lock_bh(&htt->rx_ring.lock);
  155. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  156. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  157. num_deficit -= num_to_fill;
  158. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  159. if (ret == -ENOMEM) {
  160. /*
  161. * Failed to fill it to the desired level -
  162. * we'll start a timer and try again next time.
  163. * As long as enough buffers are left in the ring for
  164. * another A-MPDU rx, no special recovery is needed.
  165. */
  166. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  167. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  168. } else if (num_deficit > 0) {
  169. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  170. msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS));
  171. }
  172. spin_unlock_bh(&htt->rx_ring.lock);
  173. }
  174. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  175. {
  176. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  177. ath10k_htt_rx_msdu_buff_replenish(htt);
  178. }
  179. int ath10k_htt_rx_ring_refill(struct ath10k *ar)
  180. {
  181. struct ath10k_htt *htt = &ar->htt;
  182. int ret;
  183. spin_lock_bh(&htt->rx_ring.lock);
  184. ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
  185. htt->rx_ring.fill_cnt));
  186. spin_unlock_bh(&htt->rx_ring.lock);
  187. if (ret)
  188. ath10k_htt_rx_ring_free(htt);
  189. return ret;
  190. }
  191. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  192. {
  193. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  194. skb_queue_purge(&htt->rx_compl_q);
  195. skb_queue_purge(&htt->rx_in_ord_compl_q);
  196. skb_queue_purge(&htt->tx_fetch_ind_q);
  197. ath10k_htt_rx_ring_free(htt);
  198. dma_free_coherent(htt->ar->dev,
  199. (htt->rx_ring.size *
  200. sizeof(htt->rx_ring.paddrs_ring)),
  201. htt->rx_ring.paddrs_ring,
  202. htt->rx_ring.base_paddr);
  203. dma_free_coherent(htt->ar->dev,
  204. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  205. htt->rx_ring.alloc_idx.vaddr,
  206. htt->rx_ring.alloc_idx.paddr);
  207. kfree(htt->rx_ring.netbufs_ring);
  208. }
  209. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  210. {
  211. struct ath10k *ar = htt->ar;
  212. int idx;
  213. struct sk_buff *msdu;
  214. lockdep_assert_held(&htt->rx_ring.lock);
  215. if (htt->rx_ring.fill_cnt == 0) {
  216. ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
  217. return NULL;
  218. }
  219. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  220. msdu = htt->rx_ring.netbufs_ring[idx];
  221. htt->rx_ring.netbufs_ring[idx] = NULL;
  222. htt->rx_ring.paddrs_ring[idx] = 0;
  223. idx++;
  224. idx &= htt->rx_ring.size_mask;
  225. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  226. htt->rx_ring.fill_cnt--;
  227. dma_unmap_single(htt->ar->dev,
  228. ATH10K_SKB_RXCB(msdu)->paddr,
  229. msdu->len + skb_tailroom(msdu),
  230. DMA_FROM_DEVICE);
  231. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  232. msdu->data, msdu->len + skb_tailroom(msdu));
  233. return msdu;
  234. }
  235. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  236. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  237. struct sk_buff_head *amsdu)
  238. {
  239. struct ath10k *ar = htt->ar;
  240. int msdu_len, msdu_chaining = 0;
  241. struct sk_buff *msdu;
  242. struct htt_rx_desc *rx_desc;
  243. lockdep_assert_held(&htt->rx_ring.lock);
  244. for (;;) {
  245. int last_msdu, msdu_len_invalid, msdu_chained;
  246. msdu = ath10k_htt_rx_netbuf_pop(htt);
  247. if (!msdu) {
  248. __skb_queue_purge(amsdu);
  249. return -ENOENT;
  250. }
  251. __skb_queue_tail(amsdu, msdu);
  252. rx_desc = (struct htt_rx_desc *)msdu->data;
  253. /* FIXME: we must report msdu payload since this is what caller
  254. * expects now */
  255. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  256. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  257. /*
  258. * Sanity check - confirm the HW is finished filling in the
  259. * rx data.
  260. * If the HW and SW are working correctly, then it's guaranteed
  261. * that the HW's MAC DMA is done before this point in the SW.
  262. * To prevent the case that we handle a stale Rx descriptor,
  263. * just assert for now until we have a way to recover.
  264. */
  265. if (!(__le32_to_cpu(rx_desc->attention.flags)
  266. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  267. __skb_queue_purge(amsdu);
  268. return -EIO;
  269. }
  270. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  271. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  272. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  273. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
  274. RX_MSDU_START_INFO0_MSDU_LENGTH);
  275. msdu_chained = rx_desc->frag_info.ring2_more_count;
  276. if (msdu_len_invalid)
  277. msdu_len = 0;
  278. skb_trim(msdu, 0);
  279. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  280. msdu_len -= msdu->len;
  281. /* Note: Chained buffers do not contain rx descriptor */
  282. while (msdu_chained--) {
  283. msdu = ath10k_htt_rx_netbuf_pop(htt);
  284. if (!msdu) {
  285. __skb_queue_purge(amsdu);
  286. return -ENOENT;
  287. }
  288. __skb_queue_tail(amsdu, msdu);
  289. skb_trim(msdu, 0);
  290. skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
  291. msdu_len -= msdu->len;
  292. msdu_chaining = 1;
  293. }
  294. last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
  295. RX_MSDU_END_INFO0_LAST_MSDU;
  296. trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
  297. sizeof(*rx_desc) - sizeof(u32));
  298. if (last_msdu)
  299. break;
  300. }
  301. if (skb_queue_empty(amsdu))
  302. msdu_chaining = -1;
  303. /*
  304. * Don't refill the ring yet.
  305. *
  306. * First, the elements popped here are still in use - it is not
  307. * safe to overwrite them until the matching call to
  308. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  309. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  310. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  311. * (something like 3 buffers). Consequently, we'll rely on the txrx
  312. * SW to tell us when it is done pulling all the PPDU's rx buffers
  313. * out of the rx ring, and then refill it just once.
  314. */
  315. return msdu_chaining;
  316. }
  317. static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
  318. u32 paddr)
  319. {
  320. struct ath10k *ar = htt->ar;
  321. struct ath10k_skb_rxcb *rxcb;
  322. struct sk_buff *msdu;
  323. lockdep_assert_held(&htt->rx_ring.lock);
  324. msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
  325. if (!msdu)
  326. return NULL;
  327. rxcb = ATH10K_SKB_RXCB(msdu);
  328. hash_del(&rxcb->hlist);
  329. htt->rx_ring.fill_cnt--;
  330. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  331. msdu->len + skb_tailroom(msdu),
  332. DMA_FROM_DEVICE);
  333. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  334. msdu->data, msdu->len + skb_tailroom(msdu));
  335. return msdu;
  336. }
  337. static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
  338. struct htt_rx_in_ord_ind *ev,
  339. struct sk_buff_head *list)
  340. {
  341. struct ath10k *ar = htt->ar;
  342. struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
  343. struct htt_rx_desc *rxd;
  344. struct sk_buff *msdu;
  345. int msdu_count;
  346. bool is_offload;
  347. u32 paddr;
  348. lockdep_assert_held(&htt->rx_ring.lock);
  349. msdu_count = __le16_to_cpu(ev->msdu_count);
  350. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  351. while (msdu_count--) {
  352. paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
  353. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  354. if (!msdu) {
  355. __skb_queue_purge(list);
  356. return -ENOENT;
  357. }
  358. __skb_queue_tail(list, msdu);
  359. if (!is_offload) {
  360. rxd = (void *)msdu->data;
  361. trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
  362. skb_put(msdu, sizeof(*rxd));
  363. skb_pull(msdu, sizeof(*rxd));
  364. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  365. if (!(__le32_to_cpu(rxd->attention.flags) &
  366. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  367. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  368. return -EIO;
  369. }
  370. }
  371. msdu_desc++;
  372. }
  373. return 0;
  374. }
  375. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  376. {
  377. struct ath10k *ar = htt->ar;
  378. dma_addr_t paddr;
  379. void *vaddr;
  380. size_t size;
  381. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  382. htt->rx_confused = false;
  383. /* XXX: The fill level could be changed during runtime in response to
  384. * the host processing latency. Is this really worth it?
  385. */
  386. htt->rx_ring.size = HTT_RX_RING_SIZE;
  387. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  388. htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
  389. if (!is_power_of_2(htt->rx_ring.size)) {
  390. ath10k_warn(ar, "htt rx ring size is not power of 2\n");
  391. return -EINVAL;
  392. }
  393. htt->rx_ring.netbufs_ring =
  394. kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  395. GFP_KERNEL);
  396. if (!htt->rx_ring.netbufs_ring)
  397. goto err_netbuf;
  398. size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
  399. vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
  400. if (!vaddr)
  401. goto err_dma_ring;
  402. htt->rx_ring.paddrs_ring = vaddr;
  403. htt->rx_ring.base_paddr = paddr;
  404. vaddr = dma_alloc_coherent(htt->ar->dev,
  405. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  406. &paddr, GFP_KERNEL);
  407. if (!vaddr)
  408. goto err_dma_idx;
  409. htt->rx_ring.alloc_idx.vaddr = vaddr;
  410. htt->rx_ring.alloc_idx.paddr = paddr;
  411. htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
  412. *htt->rx_ring.alloc_idx.vaddr = 0;
  413. /* Initialize the Rx refill retry timer */
  414. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  415. spin_lock_init(&htt->rx_ring.lock);
  416. htt->rx_ring.fill_cnt = 0;
  417. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  418. hash_init(htt->rx_ring.skb_table);
  419. skb_queue_head_init(&htt->rx_compl_q);
  420. skb_queue_head_init(&htt->rx_in_ord_compl_q);
  421. skb_queue_head_init(&htt->tx_fetch_ind_q);
  422. atomic_set(&htt->num_mpdus_ready, 0);
  423. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  424. htt->rx_ring.size, htt->rx_ring.fill_level);
  425. return 0;
  426. err_dma_idx:
  427. dma_free_coherent(htt->ar->dev,
  428. (htt->rx_ring.size *
  429. sizeof(htt->rx_ring.paddrs_ring)),
  430. htt->rx_ring.paddrs_ring,
  431. htt->rx_ring.base_paddr);
  432. err_dma_ring:
  433. kfree(htt->rx_ring.netbufs_ring);
  434. err_netbuf:
  435. return -ENOMEM;
  436. }
  437. static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
  438. enum htt_rx_mpdu_encrypt_type type)
  439. {
  440. switch (type) {
  441. case HTT_RX_MPDU_ENCRYPT_NONE:
  442. return 0;
  443. case HTT_RX_MPDU_ENCRYPT_WEP40:
  444. case HTT_RX_MPDU_ENCRYPT_WEP104:
  445. return IEEE80211_WEP_IV_LEN;
  446. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  447. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  448. return IEEE80211_TKIP_IV_LEN;
  449. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  450. return IEEE80211_CCMP_HDR_LEN;
  451. case HTT_RX_MPDU_ENCRYPT_WEP128:
  452. case HTT_RX_MPDU_ENCRYPT_WAPI:
  453. break;
  454. }
  455. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  456. return 0;
  457. }
  458. #define MICHAEL_MIC_LEN 8
  459. static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
  460. enum htt_rx_mpdu_encrypt_type type)
  461. {
  462. switch (type) {
  463. case HTT_RX_MPDU_ENCRYPT_NONE:
  464. return 0;
  465. case HTT_RX_MPDU_ENCRYPT_WEP40:
  466. case HTT_RX_MPDU_ENCRYPT_WEP104:
  467. return IEEE80211_WEP_ICV_LEN;
  468. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  469. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  470. return IEEE80211_TKIP_ICV_LEN;
  471. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  472. return IEEE80211_CCMP_MIC_LEN;
  473. case HTT_RX_MPDU_ENCRYPT_WEP128:
  474. case HTT_RX_MPDU_ENCRYPT_WAPI:
  475. break;
  476. }
  477. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  478. return 0;
  479. }
  480. struct amsdu_subframe_hdr {
  481. u8 dst[ETH_ALEN];
  482. u8 src[ETH_ALEN];
  483. __be16 len;
  484. } __packed;
  485. #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
  486. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  487. struct ieee80211_rx_status *status,
  488. struct htt_rx_desc *rxd)
  489. {
  490. struct ieee80211_supported_band *sband;
  491. u8 cck, rate, bw, sgi, mcs, nss;
  492. u8 preamble = 0;
  493. u8 group_id;
  494. u32 info1, info2, info3;
  495. info1 = __le32_to_cpu(rxd->ppdu_start.info1);
  496. info2 = __le32_to_cpu(rxd->ppdu_start.info2);
  497. info3 = __le32_to_cpu(rxd->ppdu_start.info3);
  498. preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
  499. switch (preamble) {
  500. case HTT_RX_LEGACY:
  501. /* To get legacy rate index band is required. Since band can't
  502. * be undefined check if freq is non-zero.
  503. */
  504. if (!status->freq)
  505. return;
  506. cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
  507. rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
  508. rate &= ~RX_PPDU_START_RATE_FLAG;
  509. sband = &ar->mac.sbands[status->band];
  510. status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
  511. break;
  512. case HTT_RX_HT:
  513. case HTT_RX_HT_WITH_TXBF:
  514. /* HT-SIG - Table 20-11 in info2 and info3 */
  515. mcs = info2 & 0x1F;
  516. nss = mcs >> 3;
  517. bw = (info2 >> 7) & 1;
  518. sgi = (info3 >> 7) & 1;
  519. status->rate_idx = mcs;
  520. status->flag |= RX_FLAG_HT;
  521. if (sgi)
  522. status->flag |= RX_FLAG_SHORT_GI;
  523. if (bw)
  524. status->flag |= RX_FLAG_40MHZ;
  525. break;
  526. case HTT_RX_VHT:
  527. case HTT_RX_VHT_WITH_TXBF:
  528. /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
  529. TODO check this */
  530. bw = info2 & 3;
  531. sgi = info3 & 1;
  532. group_id = (info2 >> 4) & 0x3F;
  533. if (GROUP_ID_IS_SU_MIMO(group_id)) {
  534. mcs = (info3 >> 4) & 0x0F;
  535. nss = ((info2 >> 10) & 0x07) + 1;
  536. } else {
  537. /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
  538. * so it's impossible to decode MCS. Also since
  539. * firmware consumes Group Id Management frames host
  540. * has no knowledge regarding group/user position
  541. * mapping so it's impossible to pick the correct Nsts
  542. * from VHT-SIG-A1.
  543. *
  544. * Bandwidth and SGI are valid so report the rateinfo
  545. * on best-effort basis.
  546. */
  547. mcs = 0;
  548. nss = 1;
  549. }
  550. if (mcs > 0x09) {
  551. ath10k_warn(ar, "invalid MCS received %u\n", mcs);
  552. ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
  553. __le32_to_cpu(rxd->attention.flags),
  554. __le32_to_cpu(rxd->mpdu_start.info0),
  555. __le32_to_cpu(rxd->mpdu_start.info1),
  556. __le32_to_cpu(rxd->msdu_start.common.info0),
  557. __le32_to_cpu(rxd->msdu_start.common.info1),
  558. rxd->ppdu_start.info0,
  559. __le32_to_cpu(rxd->ppdu_start.info1),
  560. __le32_to_cpu(rxd->ppdu_start.info2),
  561. __le32_to_cpu(rxd->ppdu_start.info3),
  562. __le32_to_cpu(rxd->ppdu_start.info4));
  563. ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
  564. __le32_to_cpu(rxd->msdu_end.common.info0),
  565. __le32_to_cpu(rxd->mpdu_end.info0));
  566. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
  567. "rx desc msdu payload: ",
  568. rxd->msdu_payload, 50);
  569. }
  570. status->rate_idx = mcs;
  571. status->vht_nss = nss;
  572. if (sgi)
  573. status->flag |= RX_FLAG_SHORT_GI;
  574. switch (bw) {
  575. /* 20MHZ */
  576. case 0:
  577. break;
  578. /* 40MHZ */
  579. case 1:
  580. status->flag |= RX_FLAG_40MHZ;
  581. break;
  582. /* 80MHZ */
  583. case 2:
  584. status->vht_flag |= RX_VHT_FLAG_80MHZ;
  585. }
  586. status->flag |= RX_FLAG_VHT;
  587. break;
  588. default:
  589. break;
  590. }
  591. }
  592. static struct ieee80211_channel *
  593. ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
  594. {
  595. struct ath10k_peer *peer;
  596. struct ath10k_vif *arvif;
  597. struct cfg80211_chan_def def;
  598. u16 peer_id;
  599. lockdep_assert_held(&ar->data_lock);
  600. if (!rxd)
  601. return NULL;
  602. if (rxd->attention.flags &
  603. __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
  604. return NULL;
  605. if (!(rxd->msdu_end.common.info0 &
  606. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
  607. return NULL;
  608. peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  609. RX_MPDU_START_INFO0_PEER_IDX);
  610. peer = ath10k_peer_find_by_id(ar, peer_id);
  611. if (!peer)
  612. return NULL;
  613. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  614. if (WARN_ON_ONCE(!arvif))
  615. return NULL;
  616. if (ath10k_mac_vif_chan(arvif->vif, &def))
  617. return NULL;
  618. return def.chan;
  619. }
  620. static struct ieee80211_channel *
  621. ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
  622. {
  623. struct ath10k_vif *arvif;
  624. struct cfg80211_chan_def def;
  625. lockdep_assert_held(&ar->data_lock);
  626. list_for_each_entry(arvif, &ar->arvifs, list) {
  627. if (arvif->vdev_id == vdev_id &&
  628. ath10k_mac_vif_chan(arvif->vif, &def) == 0)
  629. return def.chan;
  630. }
  631. return NULL;
  632. }
  633. static void
  634. ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
  635. struct ieee80211_chanctx_conf *conf,
  636. void *data)
  637. {
  638. struct cfg80211_chan_def *def = data;
  639. *def = conf->def;
  640. }
  641. static struct ieee80211_channel *
  642. ath10k_htt_rx_h_any_channel(struct ath10k *ar)
  643. {
  644. struct cfg80211_chan_def def = {};
  645. ieee80211_iter_chan_contexts_atomic(ar->hw,
  646. ath10k_htt_rx_h_any_chan_iter,
  647. &def);
  648. return def.chan;
  649. }
  650. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  651. struct ieee80211_rx_status *status,
  652. struct htt_rx_desc *rxd,
  653. u32 vdev_id)
  654. {
  655. struct ieee80211_channel *ch;
  656. spin_lock_bh(&ar->data_lock);
  657. ch = ar->scan_channel;
  658. if (!ch)
  659. ch = ar->rx_channel;
  660. if (!ch)
  661. ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
  662. if (!ch)
  663. ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
  664. if (!ch)
  665. ch = ath10k_htt_rx_h_any_channel(ar);
  666. if (!ch)
  667. ch = ar->tgt_oper_chan;
  668. spin_unlock_bh(&ar->data_lock);
  669. if (!ch)
  670. return false;
  671. status->band = ch->band;
  672. status->freq = ch->center_freq;
  673. return true;
  674. }
  675. static void ath10k_htt_rx_h_signal(struct ath10k *ar,
  676. struct ieee80211_rx_status *status,
  677. struct htt_rx_desc *rxd)
  678. {
  679. /* FIXME: Get real NF */
  680. status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  681. rxd->ppdu_start.rssi_comb;
  682. status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
  683. }
  684. static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
  685. struct ieee80211_rx_status *status,
  686. struct htt_rx_desc *rxd)
  687. {
  688. /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
  689. * means all prior MSDUs in a PPDU are reported to mac80211 without the
  690. * TSF. Is it worth holding frames until end of PPDU is known?
  691. *
  692. * FIXME: Can we get/compute 64bit TSF?
  693. */
  694. status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
  695. status->flag |= RX_FLAG_MACTIME_END;
  696. }
  697. static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
  698. struct sk_buff_head *amsdu,
  699. struct ieee80211_rx_status *status,
  700. u32 vdev_id)
  701. {
  702. struct sk_buff *first;
  703. struct htt_rx_desc *rxd;
  704. bool is_first_ppdu;
  705. bool is_last_ppdu;
  706. if (skb_queue_empty(amsdu))
  707. return;
  708. first = skb_peek(amsdu);
  709. rxd = (void *)first->data - sizeof(*rxd);
  710. is_first_ppdu = !!(rxd->attention.flags &
  711. __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
  712. is_last_ppdu = !!(rxd->attention.flags &
  713. __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
  714. if (is_first_ppdu) {
  715. /* New PPDU starts so clear out the old per-PPDU status. */
  716. status->freq = 0;
  717. status->rate_idx = 0;
  718. status->vht_nss = 0;
  719. status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
  720. status->flag &= ~(RX_FLAG_HT |
  721. RX_FLAG_VHT |
  722. RX_FLAG_SHORT_GI |
  723. RX_FLAG_40MHZ |
  724. RX_FLAG_MACTIME_END);
  725. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  726. ath10k_htt_rx_h_signal(ar, status, rxd);
  727. ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
  728. ath10k_htt_rx_h_rates(ar, status, rxd);
  729. }
  730. if (is_last_ppdu)
  731. ath10k_htt_rx_h_mactime(ar, status, rxd);
  732. }
  733. static const char * const tid_to_ac[] = {
  734. "BE",
  735. "BK",
  736. "BK",
  737. "BE",
  738. "VI",
  739. "VI",
  740. "VO",
  741. "VO",
  742. };
  743. static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
  744. {
  745. u8 *qc;
  746. int tid;
  747. if (!ieee80211_is_data_qos(hdr->frame_control))
  748. return "";
  749. qc = ieee80211_get_qos_ctl(hdr);
  750. tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
  751. if (tid < 8)
  752. snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
  753. else
  754. snprintf(out, size, "tid %d", tid);
  755. return out;
  756. }
  757. static void ath10k_process_rx(struct ath10k *ar,
  758. struct ieee80211_rx_status *rx_status,
  759. struct sk_buff *skb)
  760. {
  761. struct ieee80211_rx_status *status;
  762. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  763. char tid[32];
  764. status = IEEE80211_SKB_RXCB(skb);
  765. *status = *rx_status;
  766. ath10k_dbg(ar, ATH10K_DBG_DATA,
  767. "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%llx fcs-err %i mic-err %i amsdu-more %i\n",
  768. skb,
  769. skb->len,
  770. ieee80211_get_SA(hdr),
  771. ath10k_get_tid(hdr, tid, sizeof(tid)),
  772. is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
  773. "mcast" : "ucast",
  774. (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
  775. (status->flag & (RX_FLAG_HT | RX_FLAG_VHT)) == 0 ?
  776. "legacy" : "",
  777. status->flag & RX_FLAG_HT ? "ht" : "",
  778. status->flag & RX_FLAG_VHT ? "vht" : "",
  779. status->flag & RX_FLAG_40MHZ ? "40" : "",
  780. status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
  781. status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
  782. status->rate_idx,
  783. status->vht_nss,
  784. status->freq,
  785. status->band, status->flag,
  786. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  787. !!(status->flag & RX_FLAG_MMIC_ERROR),
  788. !!(status->flag & RX_FLAG_AMSDU_MORE));
  789. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  790. skb->data, skb->len);
  791. trace_ath10k_rx_hdr(ar, skb->data, skb->len);
  792. trace_ath10k_rx_payload(ar, skb->data, skb->len);
  793. ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
  794. }
  795. static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
  796. struct ieee80211_hdr *hdr)
  797. {
  798. int len = ieee80211_hdrlen(hdr->frame_control);
  799. if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
  800. ar->running_fw->fw_file.fw_features))
  801. len = round_up(len, 4);
  802. return len;
  803. }
  804. static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
  805. struct sk_buff *msdu,
  806. struct ieee80211_rx_status *status,
  807. enum htt_rx_mpdu_encrypt_type enctype,
  808. bool is_decrypted)
  809. {
  810. struct ieee80211_hdr *hdr;
  811. struct htt_rx_desc *rxd;
  812. size_t hdr_len;
  813. size_t crypto_len;
  814. bool is_first;
  815. bool is_last;
  816. rxd = (void *)msdu->data - sizeof(*rxd);
  817. is_first = !!(rxd->msdu_end.common.info0 &
  818. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  819. is_last = !!(rxd->msdu_end.common.info0 &
  820. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  821. /* Delivered decapped frame:
  822. * [802.11 header]
  823. * [crypto param] <-- can be trimmed if !fcs_err &&
  824. * !decrypt_err && !peer_idx_invalid
  825. * [amsdu header] <-- only if A-MSDU
  826. * [rfc1042/llc]
  827. * [payload]
  828. * [FCS] <-- at end, needs to be trimmed
  829. */
  830. /* This probably shouldn't happen but warn just in case */
  831. if (unlikely(WARN_ON_ONCE(!is_first)))
  832. return;
  833. /* This probably shouldn't happen but warn just in case */
  834. if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
  835. return;
  836. skb_trim(msdu, msdu->len - FCS_LEN);
  837. /* In most cases this will be true for sniffed frames. It makes sense
  838. * to deliver them as-is without stripping the crypto param. This is
  839. * necessary for software based decryption.
  840. *
  841. * If there's no error then the frame is decrypted. At least that is
  842. * the case for frames that come in via fragmented rx indication.
  843. */
  844. if (!is_decrypted)
  845. return;
  846. /* The payload is decrypted so strip crypto params. Start from tail
  847. * since hdr is used to compute some stuff.
  848. */
  849. hdr = (void *)msdu->data;
  850. /* Tail */
  851. if (status->flag & RX_FLAG_IV_STRIPPED)
  852. skb_trim(msdu, msdu->len -
  853. ath10k_htt_rx_crypto_tail_len(ar, enctype));
  854. /* MMIC */
  855. if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
  856. !ieee80211_has_morefrags(hdr->frame_control) &&
  857. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  858. skb_trim(msdu, msdu->len - 8);
  859. /* Head */
  860. if (status->flag & RX_FLAG_IV_STRIPPED) {
  861. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  862. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  863. memmove((void *)msdu->data + crypto_len,
  864. (void *)msdu->data, hdr_len);
  865. skb_pull(msdu, crypto_len);
  866. }
  867. }
  868. static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
  869. struct sk_buff *msdu,
  870. struct ieee80211_rx_status *status,
  871. const u8 first_hdr[64])
  872. {
  873. struct ieee80211_hdr *hdr;
  874. struct htt_rx_desc *rxd;
  875. size_t hdr_len;
  876. u8 da[ETH_ALEN];
  877. u8 sa[ETH_ALEN];
  878. int l3_pad_bytes;
  879. /* Delivered decapped frame:
  880. * [nwifi 802.11 header] <-- replaced with 802.11 hdr
  881. * [rfc1042/llc]
  882. *
  883. * Note: The nwifi header doesn't have QoS Control and is
  884. * (always?) a 3addr frame.
  885. *
  886. * Note2: There's no A-MSDU subframe header. Even if it's part
  887. * of an A-MSDU.
  888. */
  889. /* pull decapped header and copy SA & DA */
  890. rxd = (void *)msdu->data - sizeof(*rxd);
  891. l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  892. skb_put(msdu, l3_pad_bytes);
  893. hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes);
  894. hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
  895. ether_addr_copy(da, ieee80211_get_DA(hdr));
  896. ether_addr_copy(sa, ieee80211_get_SA(hdr));
  897. skb_pull(msdu, hdr_len);
  898. /* push original 802.11 header */
  899. hdr = (struct ieee80211_hdr *)first_hdr;
  900. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  901. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  902. /* original 802.11 header has a different DA and in
  903. * case of 4addr it may also have different SA
  904. */
  905. hdr = (struct ieee80211_hdr *)msdu->data;
  906. ether_addr_copy(ieee80211_get_DA(hdr), da);
  907. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  908. }
  909. static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
  910. struct sk_buff *msdu,
  911. enum htt_rx_mpdu_encrypt_type enctype)
  912. {
  913. struct ieee80211_hdr *hdr;
  914. struct htt_rx_desc *rxd;
  915. size_t hdr_len, crypto_len;
  916. void *rfc1042;
  917. bool is_first, is_last, is_amsdu;
  918. int bytes_aligned = ar->hw_params.decap_align_bytes;
  919. rxd = (void *)msdu->data - sizeof(*rxd);
  920. hdr = (void *)rxd->rx_hdr_status;
  921. is_first = !!(rxd->msdu_end.common.info0 &
  922. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  923. is_last = !!(rxd->msdu_end.common.info0 &
  924. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  925. is_amsdu = !(is_first && is_last);
  926. rfc1042 = hdr;
  927. if (is_first) {
  928. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  929. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  930. rfc1042 += round_up(hdr_len, bytes_aligned) +
  931. round_up(crypto_len, bytes_aligned);
  932. }
  933. if (is_amsdu)
  934. rfc1042 += sizeof(struct amsdu_subframe_hdr);
  935. return rfc1042;
  936. }
  937. static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
  938. struct sk_buff *msdu,
  939. struct ieee80211_rx_status *status,
  940. const u8 first_hdr[64],
  941. enum htt_rx_mpdu_encrypt_type enctype)
  942. {
  943. struct ieee80211_hdr *hdr;
  944. struct ethhdr *eth;
  945. size_t hdr_len;
  946. void *rfc1042;
  947. u8 da[ETH_ALEN];
  948. u8 sa[ETH_ALEN];
  949. int l3_pad_bytes;
  950. struct htt_rx_desc *rxd;
  951. /* Delivered decapped frame:
  952. * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
  953. * [payload]
  954. */
  955. rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
  956. if (WARN_ON_ONCE(!rfc1042))
  957. return;
  958. rxd = (void *)msdu->data - sizeof(*rxd);
  959. l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  960. skb_put(msdu, l3_pad_bytes);
  961. skb_pull(msdu, l3_pad_bytes);
  962. /* pull decapped header and copy SA & DA */
  963. eth = (struct ethhdr *)msdu->data;
  964. ether_addr_copy(da, eth->h_dest);
  965. ether_addr_copy(sa, eth->h_source);
  966. skb_pull(msdu, sizeof(struct ethhdr));
  967. /* push rfc1042/llc/snap */
  968. memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
  969. sizeof(struct rfc1042_hdr));
  970. /* push original 802.11 header */
  971. hdr = (struct ieee80211_hdr *)first_hdr;
  972. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  973. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  974. /* original 802.11 header has a different DA and in
  975. * case of 4addr it may also have different SA
  976. */
  977. hdr = (struct ieee80211_hdr *)msdu->data;
  978. ether_addr_copy(ieee80211_get_DA(hdr), da);
  979. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  980. }
  981. static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
  982. struct sk_buff *msdu,
  983. struct ieee80211_rx_status *status,
  984. const u8 first_hdr[64])
  985. {
  986. struct ieee80211_hdr *hdr;
  987. size_t hdr_len;
  988. int l3_pad_bytes;
  989. struct htt_rx_desc *rxd;
  990. /* Delivered decapped frame:
  991. * [amsdu header] <-- replaced with 802.11 hdr
  992. * [rfc1042/llc]
  993. * [payload]
  994. */
  995. rxd = (void *)msdu->data - sizeof(*rxd);
  996. l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  997. skb_put(msdu, l3_pad_bytes);
  998. skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes);
  999. hdr = (struct ieee80211_hdr *)first_hdr;
  1000. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1001. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1002. }
  1003. static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
  1004. struct sk_buff *msdu,
  1005. struct ieee80211_rx_status *status,
  1006. u8 first_hdr[64],
  1007. enum htt_rx_mpdu_encrypt_type enctype,
  1008. bool is_decrypted)
  1009. {
  1010. struct htt_rx_desc *rxd;
  1011. enum rx_msdu_decap_format decap;
  1012. /* First msdu's decapped header:
  1013. * [802.11 header] <-- padded to 4 bytes long
  1014. * [crypto param] <-- padded to 4 bytes long
  1015. * [amsdu header] <-- only if A-MSDU
  1016. * [rfc1042/llc]
  1017. *
  1018. * Other (2nd, 3rd, ..) msdu's decapped header:
  1019. * [amsdu header] <-- only if A-MSDU
  1020. * [rfc1042/llc]
  1021. */
  1022. rxd = (void *)msdu->data - sizeof(*rxd);
  1023. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1024. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1025. switch (decap) {
  1026. case RX_MSDU_DECAP_RAW:
  1027. ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
  1028. is_decrypted);
  1029. break;
  1030. case RX_MSDU_DECAP_NATIVE_WIFI:
  1031. ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
  1032. break;
  1033. case RX_MSDU_DECAP_ETHERNET2_DIX:
  1034. ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
  1035. break;
  1036. case RX_MSDU_DECAP_8023_SNAP_LLC:
  1037. ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
  1038. break;
  1039. }
  1040. }
  1041. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  1042. {
  1043. struct htt_rx_desc *rxd;
  1044. u32 flags, info;
  1045. bool is_ip4, is_ip6;
  1046. bool is_tcp, is_udp;
  1047. bool ip_csum_ok, tcpudp_csum_ok;
  1048. rxd = (void *)skb->data - sizeof(*rxd);
  1049. flags = __le32_to_cpu(rxd->attention.flags);
  1050. info = __le32_to_cpu(rxd->msdu_start.common.info1);
  1051. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  1052. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  1053. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  1054. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  1055. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  1056. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  1057. if (!is_ip4 && !is_ip6)
  1058. return CHECKSUM_NONE;
  1059. if (!is_tcp && !is_udp)
  1060. return CHECKSUM_NONE;
  1061. if (!ip_csum_ok)
  1062. return CHECKSUM_NONE;
  1063. if (!tcpudp_csum_ok)
  1064. return CHECKSUM_NONE;
  1065. return CHECKSUM_UNNECESSARY;
  1066. }
  1067. static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
  1068. {
  1069. msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
  1070. }
  1071. static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
  1072. struct sk_buff_head *amsdu,
  1073. struct ieee80211_rx_status *status)
  1074. {
  1075. struct sk_buff *first;
  1076. struct sk_buff *last;
  1077. struct sk_buff *msdu;
  1078. struct htt_rx_desc *rxd;
  1079. struct ieee80211_hdr *hdr;
  1080. enum htt_rx_mpdu_encrypt_type enctype;
  1081. u8 first_hdr[64];
  1082. u8 *qos;
  1083. size_t hdr_len;
  1084. bool has_fcs_err;
  1085. bool has_crypto_err;
  1086. bool has_tkip_err;
  1087. bool has_peer_idx_invalid;
  1088. bool is_decrypted;
  1089. bool is_mgmt;
  1090. u32 attention;
  1091. if (skb_queue_empty(amsdu))
  1092. return;
  1093. first = skb_peek(amsdu);
  1094. rxd = (void *)first->data - sizeof(*rxd);
  1095. is_mgmt = !!(rxd->attention.flags &
  1096. __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
  1097. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1098. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1099. /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
  1100. * decapped header. It'll be used for undecapping of each MSDU.
  1101. */
  1102. hdr = (void *)rxd->rx_hdr_status;
  1103. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1104. memcpy(first_hdr, hdr, hdr_len);
  1105. /* Each A-MSDU subframe will use the original header as the base and be
  1106. * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
  1107. */
  1108. hdr = (void *)first_hdr;
  1109. qos = ieee80211_get_qos_ctl(hdr);
  1110. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  1111. /* Some attention flags are valid only in the last MSDU. */
  1112. last = skb_peek_tail(amsdu);
  1113. rxd = (void *)last->data - sizeof(*rxd);
  1114. attention = __le32_to_cpu(rxd->attention.flags);
  1115. has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
  1116. has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1117. has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1118. has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
  1119. /* Note: If hardware captures an encrypted frame that it can't decrypt,
  1120. * e.g. due to fcs error, missing peer or invalid key data it will
  1121. * report the frame as raw.
  1122. */
  1123. is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
  1124. !has_fcs_err &&
  1125. !has_crypto_err &&
  1126. !has_peer_idx_invalid);
  1127. /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
  1128. status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
  1129. RX_FLAG_MMIC_ERROR |
  1130. RX_FLAG_DECRYPTED |
  1131. RX_FLAG_IV_STRIPPED |
  1132. RX_FLAG_ONLY_MONITOR |
  1133. RX_FLAG_MMIC_STRIPPED);
  1134. if (has_fcs_err)
  1135. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1136. if (has_tkip_err)
  1137. status->flag |= RX_FLAG_MMIC_ERROR;
  1138. /* Firmware reports all necessary management frames via WMI already.
  1139. * They are not reported to monitor interfaces at all so pass the ones
  1140. * coming via HTT to monitor interfaces instead. This simplifies
  1141. * matters a lot.
  1142. */
  1143. if (is_mgmt)
  1144. status->flag |= RX_FLAG_ONLY_MONITOR;
  1145. if (is_decrypted) {
  1146. status->flag |= RX_FLAG_DECRYPTED;
  1147. if (likely(!is_mgmt))
  1148. status->flag |= RX_FLAG_IV_STRIPPED |
  1149. RX_FLAG_MMIC_STRIPPED;
  1150. }
  1151. skb_queue_walk(amsdu, msdu) {
  1152. ath10k_htt_rx_h_csum_offload(msdu);
  1153. ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
  1154. is_decrypted);
  1155. /* Undecapping involves copying the original 802.11 header back
  1156. * to sk_buff. If frame is protected and hardware has decrypted
  1157. * it then remove the protected bit.
  1158. */
  1159. if (!is_decrypted)
  1160. continue;
  1161. if (is_mgmt)
  1162. continue;
  1163. hdr = (void *)msdu->data;
  1164. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1165. }
  1166. }
  1167. static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
  1168. struct sk_buff_head *amsdu,
  1169. struct ieee80211_rx_status *status)
  1170. {
  1171. struct sk_buff *msdu;
  1172. while ((msdu = __skb_dequeue(amsdu))) {
  1173. /* Setup per-MSDU flags */
  1174. if (skb_queue_empty(amsdu))
  1175. status->flag &= ~RX_FLAG_AMSDU_MORE;
  1176. else
  1177. status->flag |= RX_FLAG_AMSDU_MORE;
  1178. ath10k_process_rx(ar, status, msdu);
  1179. }
  1180. }
  1181. static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
  1182. {
  1183. struct sk_buff *skb, *first;
  1184. int space;
  1185. int total_len = 0;
  1186. /* TODO: Might could optimize this by using
  1187. * skb_try_coalesce or similar method to
  1188. * decrease copying, or maybe get mac80211 to
  1189. * provide a way to just receive a list of
  1190. * skb?
  1191. */
  1192. first = __skb_dequeue(amsdu);
  1193. /* Allocate total length all at once. */
  1194. skb_queue_walk(amsdu, skb)
  1195. total_len += skb->len;
  1196. space = total_len - skb_tailroom(first);
  1197. if ((space > 0) &&
  1198. (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
  1199. /* TODO: bump some rx-oom error stat */
  1200. /* put it back together so we can free the
  1201. * whole list at once.
  1202. */
  1203. __skb_queue_head(amsdu, first);
  1204. return -1;
  1205. }
  1206. /* Walk list again, copying contents into
  1207. * msdu_head
  1208. */
  1209. while ((skb = __skb_dequeue(amsdu))) {
  1210. skb_copy_from_linear_data(skb, skb_put(first, skb->len),
  1211. skb->len);
  1212. dev_kfree_skb_any(skb);
  1213. }
  1214. __skb_queue_head(amsdu, first);
  1215. return 0;
  1216. }
  1217. static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
  1218. struct sk_buff_head *amsdu)
  1219. {
  1220. struct sk_buff *first;
  1221. struct htt_rx_desc *rxd;
  1222. enum rx_msdu_decap_format decap;
  1223. first = skb_peek(amsdu);
  1224. rxd = (void *)first->data - sizeof(*rxd);
  1225. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1226. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1227. /* FIXME: Current unchaining logic can only handle simple case of raw
  1228. * msdu chaining. If decapping is other than raw the chaining may be
  1229. * more complex and this isn't handled by the current code. Don't even
  1230. * try re-constructing such frames - it'll be pretty much garbage.
  1231. */
  1232. if (decap != RX_MSDU_DECAP_RAW ||
  1233. skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
  1234. __skb_queue_purge(amsdu);
  1235. return;
  1236. }
  1237. ath10k_unchain_msdu(amsdu);
  1238. }
  1239. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
  1240. struct sk_buff_head *amsdu,
  1241. struct ieee80211_rx_status *rx_status)
  1242. {
  1243. /* FIXME: It might be a good idea to do some fuzzy-testing to drop
  1244. * invalid/dangerous frames.
  1245. */
  1246. if (!rx_status->freq) {
  1247. ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
  1248. return false;
  1249. }
  1250. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  1251. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
  1252. return false;
  1253. }
  1254. return true;
  1255. }
  1256. static void ath10k_htt_rx_h_filter(struct ath10k *ar,
  1257. struct sk_buff_head *amsdu,
  1258. struct ieee80211_rx_status *rx_status)
  1259. {
  1260. if (skb_queue_empty(amsdu))
  1261. return;
  1262. if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
  1263. return;
  1264. __skb_queue_purge(amsdu);
  1265. }
  1266. static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
  1267. {
  1268. struct ath10k *ar = htt->ar;
  1269. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1270. struct sk_buff_head amsdu;
  1271. int ret, num_msdus;
  1272. __skb_queue_head_init(&amsdu);
  1273. spin_lock_bh(&htt->rx_ring.lock);
  1274. if (htt->rx_confused) {
  1275. spin_unlock_bh(&htt->rx_ring.lock);
  1276. return -EIO;
  1277. }
  1278. ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu);
  1279. spin_unlock_bh(&htt->rx_ring.lock);
  1280. if (ret < 0) {
  1281. ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
  1282. __skb_queue_purge(&amsdu);
  1283. /* FIXME: It's probably a good idea to reboot the
  1284. * device instead of leaving it inoperable.
  1285. */
  1286. htt->rx_confused = true;
  1287. return ret;
  1288. }
  1289. num_msdus = skb_queue_len(&amsdu);
  1290. ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
  1291. /* only for ret = 1 indicates chained msdus */
  1292. if (ret > 0)
  1293. ath10k_htt_rx_h_unchain(ar, &amsdu);
  1294. ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
  1295. ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
  1296. ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
  1297. return num_msdus;
  1298. }
  1299. static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt,
  1300. struct htt_rx_indication *rx)
  1301. {
  1302. struct ath10k *ar = htt->ar;
  1303. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  1304. int num_mpdu_ranges;
  1305. int i, mpdu_count = 0;
  1306. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  1307. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  1308. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  1309. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1310. rx, sizeof(*rx) +
  1311. (sizeof(struct htt_rx_indication_mpdu_range) *
  1312. num_mpdu_ranges));
  1313. for (i = 0; i < num_mpdu_ranges; i++)
  1314. mpdu_count += mpdu_ranges[i].mpdu_count;
  1315. atomic_add(mpdu_count, &htt->num_mpdus_ready);
  1316. }
  1317. static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
  1318. struct sk_buff *skb)
  1319. {
  1320. struct ath10k_htt *htt = &ar->htt;
  1321. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1322. struct htt_tx_done tx_done = {};
  1323. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1324. __le16 msdu_id;
  1325. int i;
  1326. switch (status) {
  1327. case HTT_DATA_TX_STATUS_NO_ACK:
  1328. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1329. break;
  1330. case HTT_DATA_TX_STATUS_OK:
  1331. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1332. break;
  1333. case HTT_DATA_TX_STATUS_DISCARD:
  1334. case HTT_DATA_TX_STATUS_POSTPONE:
  1335. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1336. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1337. break;
  1338. default:
  1339. ath10k_warn(ar, "unhandled tx completion status %d\n", status);
  1340. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1341. break;
  1342. }
  1343. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1344. resp->data_tx_completion.num_msdus);
  1345. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1346. msdu_id = resp->data_tx_completion.msdus[i];
  1347. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1348. /* kfifo_put: In practice firmware shouldn't fire off per-CE
  1349. * interrupt and main interrupt (MSI/-X range case) for the same
  1350. * HTC service so it should be safe to use kfifo_put w/o lock.
  1351. *
  1352. * From kfifo_put() documentation:
  1353. * Note that with only one concurrent reader and one concurrent
  1354. * writer, you don't need extra locking to use these macro.
  1355. */
  1356. if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
  1357. ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
  1358. tx_done.msdu_id, tx_done.status);
  1359. ath10k_txrx_tx_unref(htt, &tx_done);
  1360. }
  1361. }
  1362. }
  1363. static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
  1364. {
  1365. struct htt_rx_addba *ev = &resp->rx_addba;
  1366. struct ath10k_peer *peer;
  1367. struct ath10k_vif *arvif;
  1368. u16 info0, tid, peer_id;
  1369. info0 = __le16_to_cpu(ev->info0);
  1370. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1371. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1372. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1373. "htt rx addba tid %hu peer_id %hu size %hhu\n",
  1374. tid, peer_id, ev->window_size);
  1375. spin_lock_bh(&ar->data_lock);
  1376. peer = ath10k_peer_find_by_id(ar, peer_id);
  1377. if (!peer) {
  1378. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1379. peer_id);
  1380. spin_unlock_bh(&ar->data_lock);
  1381. return;
  1382. }
  1383. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1384. if (!arvif) {
  1385. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1386. peer->vdev_id);
  1387. spin_unlock_bh(&ar->data_lock);
  1388. return;
  1389. }
  1390. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1391. "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
  1392. peer->addr, tid, ev->window_size);
  1393. ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1394. spin_unlock_bh(&ar->data_lock);
  1395. }
  1396. static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
  1397. {
  1398. struct htt_rx_delba *ev = &resp->rx_delba;
  1399. struct ath10k_peer *peer;
  1400. struct ath10k_vif *arvif;
  1401. u16 info0, tid, peer_id;
  1402. info0 = __le16_to_cpu(ev->info0);
  1403. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1404. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1405. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1406. "htt rx delba tid %hu peer_id %hu\n",
  1407. tid, peer_id);
  1408. spin_lock_bh(&ar->data_lock);
  1409. peer = ath10k_peer_find_by_id(ar, peer_id);
  1410. if (!peer) {
  1411. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1412. peer_id);
  1413. spin_unlock_bh(&ar->data_lock);
  1414. return;
  1415. }
  1416. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1417. if (!arvif) {
  1418. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1419. peer->vdev_id);
  1420. spin_unlock_bh(&ar->data_lock);
  1421. return;
  1422. }
  1423. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1424. "htt rx stop rx ba session sta %pM tid %hu\n",
  1425. peer->addr, tid);
  1426. ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1427. spin_unlock_bh(&ar->data_lock);
  1428. }
  1429. static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
  1430. struct sk_buff_head *amsdu)
  1431. {
  1432. struct sk_buff *msdu;
  1433. struct htt_rx_desc *rxd;
  1434. if (skb_queue_empty(list))
  1435. return -ENOBUFS;
  1436. if (WARN_ON(!skb_queue_empty(amsdu)))
  1437. return -EINVAL;
  1438. while ((msdu = __skb_dequeue(list))) {
  1439. __skb_queue_tail(amsdu, msdu);
  1440. rxd = (void *)msdu->data - sizeof(*rxd);
  1441. if (rxd->msdu_end.common.info0 &
  1442. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
  1443. break;
  1444. }
  1445. msdu = skb_peek_tail(amsdu);
  1446. rxd = (void *)msdu->data - sizeof(*rxd);
  1447. if (!(rxd->msdu_end.common.info0 &
  1448. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
  1449. skb_queue_splice_init(amsdu, list);
  1450. return -EAGAIN;
  1451. }
  1452. return 0;
  1453. }
  1454. static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
  1455. struct sk_buff *skb)
  1456. {
  1457. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1458. if (!ieee80211_has_protected(hdr->frame_control))
  1459. return;
  1460. /* Offloaded frames are already decrypted but firmware insists they are
  1461. * protected in the 802.11 header. Strip the flag. Otherwise mac80211
  1462. * will drop the frame.
  1463. */
  1464. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1465. status->flag |= RX_FLAG_DECRYPTED |
  1466. RX_FLAG_IV_STRIPPED |
  1467. RX_FLAG_MMIC_STRIPPED;
  1468. }
  1469. static int ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
  1470. struct sk_buff_head *list)
  1471. {
  1472. struct ath10k_htt *htt = &ar->htt;
  1473. struct ieee80211_rx_status *status = &htt->rx_status;
  1474. struct htt_rx_offload_msdu *rx;
  1475. struct sk_buff *msdu;
  1476. size_t offset;
  1477. int num_msdu = 0;
  1478. while ((msdu = __skb_dequeue(list))) {
  1479. /* Offloaded frames don't have Rx descriptor. Instead they have
  1480. * a short meta information header.
  1481. */
  1482. rx = (void *)msdu->data;
  1483. skb_put(msdu, sizeof(*rx));
  1484. skb_pull(msdu, sizeof(*rx));
  1485. if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
  1486. ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
  1487. dev_kfree_skb_any(msdu);
  1488. continue;
  1489. }
  1490. skb_put(msdu, __le16_to_cpu(rx->msdu_len));
  1491. /* Offloaded rx header length isn't multiple of 2 nor 4 so the
  1492. * actual payload is unaligned. Align the frame. Otherwise
  1493. * mac80211 complains. This shouldn't reduce performance much
  1494. * because these offloaded frames are rare.
  1495. */
  1496. offset = 4 - ((unsigned long)msdu->data & 3);
  1497. skb_put(msdu, offset);
  1498. memmove(msdu->data + offset, msdu->data, msdu->len);
  1499. skb_pull(msdu, offset);
  1500. /* FIXME: The frame is NWifi. Re-construct QoS Control
  1501. * if possible later.
  1502. */
  1503. memset(status, 0, sizeof(*status));
  1504. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1505. ath10k_htt_rx_h_rx_offload_prot(status, msdu);
  1506. ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
  1507. ath10k_process_rx(ar, status, msdu);
  1508. num_msdu++;
  1509. }
  1510. return num_msdu;
  1511. }
  1512. static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
  1513. {
  1514. struct ath10k_htt *htt = &ar->htt;
  1515. struct htt_resp *resp = (void *)skb->data;
  1516. struct ieee80211_rx_status *status = &htt->rx_status;
  1517. struct sk_buff_head list;
  1518. struct sk_buff_head amsdu;
  1519. u16 peer_id;
  1520. u16 msdu_count;
  1521. u8 vdev_id;
  1522. u8 tid;
  1523. bool offload;
  1524. bool frag;
  1525. int ret, num_msdus = 0;
  1526. lockdep_assert_held(&htt->rx_ring.lock);
  1527. if (htt->rx_confused)
  1528. return -EIO;
  1529. skb_pull(skb, sizeof(resp->hdr));
  1530. skb_pull(skb, sizeof(resp->rx_in_ord_ind));
  1531. peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
  1532. msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
  1533. vdev_id = resp->rx_in_ord_ind.vdev_id;
  1534. tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
  1535. offload = !!(resp->rx_in_ord_ind.info &
  1536. HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  1537. frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
  1538. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1539. "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
  1540. vdev_id, peer_id, tid, offload, frag, msdu_count);
  1541. if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
  1542. ath10k_warn(ar, "dropping invalid in order rx indication\n");
  1543. return -EINVAL;
  1544. }
  1545. /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
  1546. * extracted and processed.
  1547. */
  1548. __skb_queue_head_init(&list);
  1549. ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
  1550. if (ret < 0) {
  1551. ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
  1552. htt->rx_confused = true;
  1553. return -EIO;
  1554. }
  1555. /* Offloaded frames are very different and need to be handled
  1556. * separately.
  1557. */
  1558. if (offload)
  1559. num_msdus = ath10k_htt_rx_h_rx_offload(ar, &list);
  1560. while (!skb_queue_empty(&list)) {
  1561. __skb_queue_head_init(&amsdu);
  1562. ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
  1563. switch (ret) {
  1564. case 0:
  1565. /* Note: The in-order indication may report interleaved
  1566. * frames from different PPDUs meaning reported rx rate
  1567. * to mac80211 isn't accurate/reliable. It's still
  1568. * better to report something than nothing though. This
  1569. * should still give an idea about rx rate to the user.
  1570. */
  1571. num_msdus += skb_queue_len(&amsdu);
  1572. ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
  1573. ath10k_htt_rx_h_filter(ar, &amsdu, status);
  1574. ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
  1575. ath10k_htt_rx_h_deliver(ar, &amsdu, status);
  1576. break;
  1577. case -EAGAIN:
  1578. /* fall through */
  1579. default:
  1580. /* Should not happen. */
  1581. ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
  1582. htt->rx_confused = true;
  1583. __skb_queue_purge(&list);
  1584. return -EIO;
  1585. }
  1586. }
  1587. return num_msdus;
  1588. }
  1589. static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
  1590. const __le32 *resp_ids,
  1591. int num_resp_ids)
  1592. {
  1593. int i;
  1594. u32 resp_id;
  1595. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
  1596. num_resp_ids);
  1597. for (i = 0; i < num_resp_ids; i++) {
  1598. resp_id = le32_to_cpu(resp_ids[i]);
  1599. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
  1600. resp_id);
  1601. /* TODO: free resp_id */
  1602. }
  1603. }
  1604. static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
  1605. {
  1606. struct ieee80211_hw *hw = ar->hw;
  1607. struct ieee80211_txq *txq;
  1608. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1609. struct htt_tx_fetch_record *record;
  1610. size_t len;
  1611. size_t max_num_bytes;
  1612. size_t max_num_msdus;
  1613. size_t num_bytes;
  1614. size_t num_msdus;
  1615. const __le32 *resp_ids;
  1616. u16 num_records;
  1617. u16 num_resp_ids;
  1618. u16 peer_id;
  1619. u8 tid;
  1620. int ret;
  1621. int i;
  1622. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
  1623. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
  1624. if (unlikely(skb->len < len)) {
  1625. ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
  1626. return;
  1627. }
  1628. num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
  1629. num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
  1630. len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
  1631. len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
  1632. if (unlikely(skb->len < len)) {
  1633. ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
  1634. return;
  1635. }
  1636. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n",
  1637. num_records, num_resp_ids,
  1638. le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
  1639. if (!ar->htt.tx_q_state.enabled) {
  1640. ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
  1641. return;
  1642. }
  1643. if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
  1644. ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
  1645. return;
  1646. }
  1647. rcu_read_lock();
  1648. for (i = 0; i < num_records; i++) {
  1649. record = &resp->tx_fetch_ind.records[i];
  1650. peer_id = MS(le16_to_cpu(record->info),
  1651. HTT_TX_FETCH_RECORD_INFO_PEER_ID);
  1652. tid = MS(le16_to_cpu(record->info),
  1653. HTT_TX_FETCH_RECORD_INFO_TID);
  1654. max_num_msdus = le16_to_cpu(record->num_msdus);
  1655. max_num_bytes = le32_to_cpu(record->num_bytes);
  1656. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n",
  1657. i, peer_id, tid, max_num_msdus, max_num_bytes);
  1658. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1659. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1660. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1661. peer_id, tid);
  1662. continue;
  1663. }
  1664. spin_lock_bh(&ar->data_lock);
  1665. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1666. spin_unlock_bh(&ar->data_lock);
  1667. /* It is okay to release the lock and use txq because RCU read
  1668. * lock is held.
  1669. */
  1670. if (unlikely(!txq)) {
  1671. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1672. peer_id, tid);
  1673. continue;
  1674. }
  1675. num_msdus = 0;
  1676. num_bytes = 0;
  1677. while (num_msdus < max_num_msdus &&
  1678. num_bytes < max_num_bytes) {
  1679. ret = ath10k_mac_tx_push_txq(hw, txq);
  1680. if (ret < 0)
  1681. break;
  1682. num_msdus++;
  1683. num_bytes += ret;
  1684. }
  1685. record->num_msdus = cpu_to_le16(num_msdus);
  1686. record->num_bytes = cpu_to_le32(num_bytes);
  1687. ath10k_htt_tx_txq_recalc(hw, txq);
  1688. }
  1689. rcu_read_unlock();
  1690. resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
  1691. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
  1692. ret = ath10k_htt_tx_fetch_resp(ar,
  1693. resp->tx_fetch_ind.token,
  1694. resp->tx_fetch_ind.fetch_seq_num,
  1695. resp->tx_fetch_ind.records,
  1696. num_records);
  1697. if (unlikely(ret)) {
  1698. ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
  1699. le32_to_cpu(resp->tx_fetch_ind.token), ret);
  1700. /* FIXME: request fw restart */
  1701. }
  1702. ath10k_htt_tx_txq_sync(ar);
  1703. }
  1704. static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
  1705. struct sk_buff *skb)
  1706. {
  1707. const struct htt_resp *resp = (void *)skb->data;
  1708. size_t len;
  1709. int num_resp_ids;
  1710. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
  1711. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
  1712. if (unlikely(skb->len < len)) {
  1713. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
  1714. return;
  1715. }
  1716. num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
  1717. len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
  1718. if (unlikely(skb->len < len)) {
  1719. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
  1720. return;
  1721. }
  1722. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
  1723. resp->tx_fetch_confirm.resp_ids,
  1724. num_resp_ids);
  1725. }
  1726. static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
  1727. struct sk_buff *skb)
  1728. {
  1729. const struct htt_resp *resp = (void *)skb->data;
  1730. const struct htt_tx_mode_switch_record *record;
  1731. struct ieee80211_txq *txq;
  1732. struct ath10k_txq *artxq;
  1733. size_t len;
  1734. size_t num_records;
  1735. enum htt_tx_mode_switch_mode mode;
  1736. bool enable;
  1737. u16 info0;
  1738. u16 info1;
  1739. u16 threshold;
  1740. u16 peer_id;
  1741. u8 tid;
  1742. int i;
  1743. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
  1744. len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
  1745. if (unlikely(skb->len < len)) {
  1746. ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
  1747. return;
  1748. }
  1749. info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
  1750. info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
  1751. enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
  1752. num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1753. mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
  1754. threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1755. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1756. "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n",
  1757. info0, info1, enable, num_records, mode, threshold);
  1758. len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
  1759. if (unlikely(skb->len < len)) {
  1760. ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
  1761. return;
  1762. }
  1763. switch (mode) {
  1764. case HTT_TX_MODE_SWITCH_PUSH:
  1765. case HTT_TX_MODE_SWITCH_PUSH_PULL:
  1766. break;
  1767. default:
  1768. ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
  1769. mode);
  1770. return;
  1771. }
  1772. if (!enable)
  1773. return;
  1774. ar->htt.tx_q_state.enabled = enable;
  1775. ar->htt.tx_q_state.mode = mode;
  1776. ar->htt.tx_q_state.num_push_allowed = threshold;
  1777. rcu_read_lock();
  1778. for (i = 0; i < num_records; i++) {
  1779. record = &resp->tx_mode_switch_ind.records[i];
  1780. info0 = le16_to_cpu(record->info0);
  1781. peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
  1782. tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
  1783. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1784. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1785. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1786. peer_id, tid);
  1787. continue;
  1788. }
  1789. spin_lock_bh(&ar->data_lock);
  1790. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1791. spin_unlock_bh(&ar->data_lock);
  1792. /* It is okay to release the lock and use txq because RCU read
  1793. * lock is held.
  1794. */
  1795. if (unlikely(!txq)) {
  1796. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1797. peer_id, tid);
  1798. continue;
  1799. }
  1800. spin_lock_bh(&ar->htt.tx_lock);
  1801. artxq = (void *)txq->drv_priv;
  1802. artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
  1803. spin_unlock_bh(&ar->htt.tx_lock);
  1804. }
  1805. rcu_read_unlock();
  1806. ath10k_mac_tx_push_pending(ar);
  1807. }
  1808. void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1809. {
  1810. bool release;
  1811. release = ath10k_htt_t2h_msg_handler(ar, skb);
  1812. /* Free the indication buffer */
  1813. if (release)
  1814. dev_kfree_skb_any(skb);
  1815. }
  1816. static inline bool is_valid_legacy_rate(u8 rate)
  1817. {
  1818. static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12,
  1819. 18, 24, 36, 48, 54};
  1820. int i;
  1821. for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) {
  1822. if (rate == legacy_rates[i])
  1823. return true;
  1824. }
  1825. return false;
  1826. }
  1827. static void
  1828. ath10k_update_per_peer_tx_stats(struct ath10k *ar,
  1829. struct ieee80211_sta *sta,
  1830. struct ath10k_per_peer_tx_stats *peer_stats)
  1831. {
  1832. struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv;
  1833. u8 rate = 0, sgi;
  1834. struct rate_info txrate;
  1835. lockdep_assert_held(&ar->data_lock);
  1836. txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode);
  1837. txrate.bw = ATH10K_HW_BW(peer_stats->flags);
  1838. txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode);
  1839. txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode);
  1840. sgi = ATH10K_HW_GI(peer_stats->flags);
  1841. if (((txrate.flags == WMI_RATE_PREAMBLE_HT) ||
  1842. (txrate.flags == WMI_RATE_PREAMBLE_VHT)) && txrate.mcs > 9) {
  1843. ath10k_warn(ar, "Invalid mcs %hhd peer stats", txrate.mcs);
  1844. return;
  1845. }
  1846. if (txrate.flags == WMI_RATE_PREAMBLE_CCK ||
  1847. txrate.flags == WMI_RATE_PREAMBLE_OFDM) {
  1848. rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode);
  1849. if (!is_valid_legacy_rate(rate)) {
  1850. ath10k_warn(ar, "Invalid legacy rate %hhd peer stats",
  1851. rate);
  1852. return;
  1853. }
  1854. /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */
  1855. rate *= 10;
  1856. if (rate == 60 && txrate.flags == WMI_RATE_PREAMBLE_CCK)
  1857. rate = rate - 5;
  1858. arsta->txrate.legacy = rate * 10;
  1859. } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) {
  1860. arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
  1861. arsta->txrate.mcs = txrate.mcs;
  1862. } else {
  1863. arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
  1864. arsta->txrate.mcs = txrate.mcs;
  1865. }
  1866. if (sgi)
  1867. arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
  1868. arsta->txrate.nss = txrate.nss;
  1869. arsta->txrate.bw = txrate.bw + RATE_INFO_BW_20;
  1870. }
  1871. static void ath10k_htt_fetch_peer_stats(struct ath10k *ar,
  1872. struct sk_buff *skb)
  1873. {
  1874. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1875. struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
  1876. struct htt_per_peer_tx_stats_ind *tx_stats;
  1877. struct ieee80211_sta *sta;
  1878. struct ath10k_peer *peer;
  1879. int peer_id, i;
  1880. u8 ppdu_len, num_ppdu;
  1881. num_ppdu = resp->peer_tx_stats.num_ppdu;
  1882. ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32);
  1883. if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) {
  1884. ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len);
  1885. return;
  1886. }
  1887. tx_stats = (struct htt_per_peer_tx_stats_ind *)
  1888. (resp->peer_tx_stats.payload);
  1889. peer_id = __le16_to_cpu(tx_stats->peer_id);
  1890. rcu_read_lock();
  1891. spin_lock_bh(&ar->data_lock);
  1892. peer = ath10k_peer_find_by_id(ar, peer_id);
  1893. if (!peer) {
  1894. ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n",
  1895. peer_id);
  1896. goto out;
  1897. }
  1898. sta = peer->sta;
  1899. for (i = 0; i < num_ppdu; i++) {
  1900. tx_stats = (struct htt_per_peer_tx_stats_ind *)
  1901. (resp->peer_tx_stats.payload + i * ppdu_len);
  1902. p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes);
  1903. p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes);
  1904. p_tx_stats->failed_bytes =
  1905. __le32_to_cpu(tx_stats->failed_bytes);
  1906. p_tx_stats->ratecode = tx_stats->ratecode;
  1907. p_tx_stats->flags = tx_stats->flags;
  1908. p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts);
  1909. p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts);
  1910. p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts);
  1911. ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
  1912. }
  1913. out:
  1914. spin_unlock_bh(&ar->data_lock);
  1915. rcu_read_unlock();
  1916. }
  1917. bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1918. {
  1919. struct ath10k_htt *htt = &ar->htt;
  1920. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1921. enum htt_t2h_msg_type type;
  1922. /* confirm alignment */
  1923. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1924. ath10k_warn(ar, "unaligned htt message, expect trouble\n");
  1925. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  1926. resp->hdr.msg_type);
  1927. if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
  1928. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
  1929. resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
  1930. return true;
  1931. }
  1932. type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
  1933. switch (type) {
  1934. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  1935. htt->target_version_major = resp->ver_resp.major;
  1936. htt->target_version_minor = resp->ver_resp.minor;
  1937. complete(&htt->target_version_received);
  1938. break;
  1939. }
  1940. case HTT_T2H_MSG_TYPE_RX_IND:
  1941. ath10k_htt_rx_proc_rx_ind(htt, &resp->rx_ind);
  1942. break;
  1943. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  1944. struct htt_peer_map_event ev = {
  1945. .vdev_id = resp->peer_map.vdev_id,
  1946. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  1947. };
  1948. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  1949. ath10k_peer_map_event(htt, &ev);
  1950. break;
  1951. }
  1952. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  1953. struct htt_peer_unmap_event ev = {
  1954. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  1955. };
  1956. ath10k_peer_unmap_event(htt, &ev);
  1957. break;
  1958. }
  1959. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  1960. struct htt_tx_done tx_done = {};
  1961. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  1962. tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  1963. switch (status) {
  1964. case HTT_MGMT_TX_STATUS_OK:
  1965. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1966. break;
  1967. case HTT_MGMT_TX_STATUS_RETRY:
  1968. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1969. break;
  1970. case HTT_MGMT_TX_STATUS_DROP:
  1971. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1972. break;
  1973. }
  1974. status = ath10k_txrx_tx_unref(htt, &tx_done);
  1975. if (!status) {
  1976. spin_lock_bh(&htt->tx_lock);
  1977. ath10k_htt_tx_mgmt_dec_pending(htt);
  1978. spin_unlock_bh(&htt->tx_lock);
  1979. }
  1980. break;
  1981. }
  1982. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  1983. ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
  1984. break;
  1985. case HTT_T2H_MSG_TYPE_SEC_IND: {
  1986. struct ath10k *ar = htt->ar;
  1987. struct htt_security_indication *ev = &resp->security_indication;
  1988. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1989. "sec ind peer_id %d unicast %d type %d\n",
  1990. __le16_to_cpu(ev->peer_id),
  1991. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  1992. MS(ev->flags, HTT_SECURITY_TYPE));
  1993. complete(&ar->install_key_done);
  1994. break;
  1995. }
  1996. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  1997. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1998. skb->data, skb->len);
  1999. atomic_inc(&htt->num_mpdus_ready);
  2000. break;
  2001. }
  2002. case HTT_T2H_MSG_TYPE_TEST:
  2003. break;
  2004. case HTT_T2H_MSG_TYPE_STATS_CONF:
  2005. trace_ath10k_htt_stats(ar, skb->data, skb->len);
  2006. break;
  2007. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  2008. /* Firmware can return tx frames if it's unable to fully
  2009. * process them and suspects host may be able to fix it. ath10k
  2010. * sends all tx frames as already inspected so this shouldn't
  2011. * happen unless fw has a bug.
  2012. */
  2013. ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
  2014. break;
  2015. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  2016. ath10k_htt_rx_addba(ar, resp);
  2017. break;
  2018. case HTT_T2H_MSG_TYPE_RX_DELBA:
  2019. ath10k_htt_rx_delba(ar, resp);
  2020. break;
  2021. case HTT_T2H_MSG_TYPE_PKTLOG: {
  2022. trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
  2023. skb->len -
  2024. offsetof(struct htt_resp,
  2025. pktlog_msg.payload));
  2026. break;
  2027. }
  2028. case HTT_T2H_MSG_TYPE_RX_FLUSH: {
  2029. /* Ignore this event because mac80211 takes care of Rx
  2030. * aggregation reordering.
  2031. */
  2032. break;
  2033. }
  2034. case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
  2035. __skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
  2036. return false;
  2037. }
  2038. case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
  2039. break;
  2040. case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
  2041. u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
  2042. u32 freq = __le32_to_cpu(resp->chan_change.freq);
  2043. ar->tgt_oper_chan =
  2044. __ieee80211_get_channel(ar->hw->wiphy, freq);
  2045. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2046. "htt chan change freq %u phymode %s\n",
  2047. freq, ath10k_wmi_phymode_str(phymode));
  2048. break;
  2049. }
  2050. case HTT_T2H_MSG_TYPE_AGGR_CONF:
  2051. break;
  2052. case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
  2053. struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
  2054. if (!tx_fetch_ind) {
  2055. ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
  2056. break;
  2057. }
  2058. skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
  2059. break;
  2060. }
  2061. case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
  2062. ath10k_htt_rx_tx_fetch_confirm(ar, skb);
  2063. break;
  2064. case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
  2065. ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
  2066. break;
  2067. case HTT_T2H_MSG_TYPE_PEER_STATS:
  2068. ath10k_htt_fetch_peer_stats(ar, skb);
  2069. break;
  2070. case HTT_T2H_MSG_TYPE_EN_STATS:
  2071. default:
  2072. ath10k_warn(ar, "htt event (%d) not handled\n",
  2073. resp->hdr.msg_type);
  2074. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  2075. skb->data, skb->len);
  2076. break;
  2077. };
  2078. return true;
  2079. }
  2080. EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
  2081. void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
  2082. struct sk_buff *skb)
  2083. {
  2084. trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
  2085. dev_kfree_skb_any(skb);
  2086. }
  2087. EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
  2088. int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget)
  2089. {
  2090. struct ath10k_htt *htt = &ar->htt;
  2091. struct htt_tx_done tx_done = {};
  2092. struct sk_buff_head tx_ind_q;
  2093. struct sk_buff *skb;
  2094. unsigned long flags;
  2095. int quota = 0, done, num_rx_msdus;
  2096. bool resched_napi = false;
  2097. __skb_queue_head_init(&tx_ind_q);
  2098. /* Since in-ord-ind can deliver more than 1 A-MSDU in single event,
  2099. * process it first to utilize full available quota.
  2100. */
  2101. while (quota < budget) {
  2102. if (skb_queue_empty(&htt->rx_in_ord_compl_q))
  2103. break;
  2104. skb = __skb_dequeue(&htt->rx_in_ord_compl_q);
  2105. if (!skb) {
  2106. resched_napi = true;
  2107. goto exit;
  2108. }
  2109. spin_lock_bh(&htt->rx_ring.lock);
  2110. num_rx_msdus = ath10k_htt_rx_in_ord_ind(ar, skb);
  2111. spin_unlock_bh(&htt->rx_ring.lock);
  2112. if (num_rx_msdus < 0) {
  2113. resched_napi = true;
  2114. goto exit;
  2115. }
  2116. dev_kfree_skb_any(skb);
  2117. if (num_rx_msdus > 0)
  2118. quota += num_rx_msdus;
  2119. if ((quota > ATH10K_NAPI_QUOTA_LIMIT) &&
  2120. !skb_queue_empty(&htt->rx_in_ord_compl_q)) {
  2121. resched_napi = true;
  2122. goto exit;
  2123. }
  2124. }
  2125. while (quota < budget) {
  2126. /* no more data to receive */
  2127. if (!atomic_read(&htt->num_mpdus_ready))
  2128. break;
  2129. num_rx_msdus = ath10k_htt_rx_handle_amsdu(htt);
  2130. if (num_rx_msdus < 0) {
  2131. resched_napi = true;
  2132. goto exit;
  2133. }
  2134. quota += num_rx_msdus;
  2135. atomic_dec(&htt->num_mpdus_ready);
  2136. if ((quota > ATH10K_NAPI_QUOTA_LIMIT) &&
  2137. atomic_read(&htt->num_mpdus_ready)) {
  2138. resched_napi = true;
  2139. goto exit;
  2140. }
  2141. }
  2142. /* From NAPI documentation:
  2143. * The napi poll() function may also process TX completions, in which
  2144. * case if it processes the entire TX ring then it should count that
  2145. * work as the rest of the budget.
  2146. */
  2147. if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo))
  2148. quota = budget;
  2149. /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
  2150. * From kfifo_get() documentation:
  2151. * Note that with only one concurrent reader and one concurrent writer,
  2152. * you don't need extra locking to use these macro.
  2153. */
  2154. while (kfifo_get(&htt->txdone_fifo, &tx_done))
  2155. ath10k_txrx_tx_unref(htt, &tx_done);
  2156. ath10k_mac_tx_push_pending(ar);
  2157. spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
  2158. skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
  2159. spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
  2160. while ((skb = __skb_dequeue(&tx_ind_q))) {
  2161. ath10k_htt_rx_tx_fetch_ind(ar, skb);
  2162. dev_kfree_skb_any(skb);
  2163. }
  2164. exit:
  2165. ath10k_htt_rx_msdu_buff_replenish(htt);
  2166. /* In case of rx failure or more data to read, report budget
  2167. * to reschedule NAPI poll
  2168. */
  2169. done = resched_napi ? budget : quota;
  2170. return done;
  2171. }
  2172. EXPORT_SYMBOL(ath10k_htt_txrx_compl_task);