meson-gxl.c 2.3 KB

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  1. /*
  2. * Amlogic Meson GXL Internal PHY Driver
  3. *
  4. * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
  5. * Copyright (C) 2016 BayLibre, SAS. All rights reserved.
  6. * Author: Neil Armstrong <narmstrong@baylibre.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  16. * more details.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/mii.h>
  22. #include <linux/ethtool.h>
  23. #include <linux/phy.h>
  24. #include <linux/netdevice.h>
  25. static int meson_gxl_config_init(struct phy_device *phydev)
  26. {
  27. /* Enable Analog and DSP register Bank access by */
  28. phy_write(phydev, 0x14, 0x0000);
  29. phy_write(phydev, 0x14, 0x0400);
  30. phy_write(phydev, 0x14, 0x0000);
  31. phy_write(phydev, 0x14, 0x0400);
  32. /* Write Analog register 23 */
  33. phy_write(phydev, 0x17, 0x8E0D);
  34. phy_write(phydev, 0x14, 0x4417);
  35. /* Enable fractional PLL */
  36. phy_write(phydev, 0x17, 0x0005);
  37. phy_write(phydev, 0x14, 0x5C1B);
  38. /* Program fraction FR_PLL_DIV1 */
  39. phy_write(phydev, 0x17, 0x029A);
  40. phy_write(phydev, 0x14, 0x5C1D);
  41. /* Program fraction FR_PLL_DIV1 */
  42. phy_write(phydev, 0x17, 0xAAAA);
  43. phy_write(phydev, 0x14, 0x5C1C);
  44. return 0;
  45. }
  46. static struct phy_driver meson_gxl_phy[] = {
  47. {
  48. .phy_id = 0x01814400,
  49. .phy_id_mask = 0xfffffff0,
  50. .name = "Meson GXL Internal PHY",
  51. .features = PHY_BASIC_FEATURES,
  52. .flags = PHY_IS_INTERNAL,
  53. .config_init = meson_gxl_config_init,
  54. .config_aneg = genphy_config_aneg,
  55. .aneg_done = genphy_aneg_done,
  56. .read_status = genphy_read_status,
  57. .suspend = genphy_suspend,
  58. .resume = genphy_resume,
  59. },
  60. };
  61. static struct mdio_device_id __maybe_unused meson_gxl_tbl[] = {
  62. { 0x01814400, 0xfffffff0 },
  63. { }
  64. };
  65. module_phy_driver(meson_gxl_phy);
  66. MODULE_DEVICE_TABLE(mdio, meson_gxl_tbl);
  67. MODULE_DESCRIPTION("Amlogic Meson GXL Internal PHY driver");
  68. MODULE_AUTHOR("Baoqi wang");
  69. MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
  70. MODULE_LICENSE("GPL");