at86rf230.c 44 KB

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  1. /*
  2. * AT86RF230/RF231 driver
  3. *
  4. * Copyright (C) 2009-2012 Siemens AG
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2
  8. * as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * Written by:
  16. * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
  17. * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
  18. * Alexander Aring <aar@pengutronix.de>
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/hrtimer.h>
  23. #include <linux/jiffies.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/gpio.h>
  27. #include <linux/delay.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/spi/at86rf230.h>
  30. #include <linux/regmap.h>
  31. #include <linux/skbuff.h>
  32. #include <linux/of_gpio.h>
  33. #include <linux/ieee802154.h>
  34. #include <linux/debugfs.h>
  35. #include <net/mac802154.h>
  36. #include <net/cfg802154.h>
  37. #include "at86rf230.h"
  38. struct at86rf230_local;
  39. /* at86rf2xx chip depend data.
  40. * All timings are in us.
  41. */
  42. struct at86rf2xx_chip_data {
  43. u16 t_sleep_cycle;
  44. u16 t_channel_switch;
  45. u16 t_reset_to_off;
  46. u16 t_off_to_aack;
  47. u16 t_off_to_tx_on;
  48. u16 t_off_to_sleep;
  49. u16 t_sleep_to_off;
  50. u16 t_frame;
  51. u16 t_p_ack;
  52. int rssi_base_val;
  53. int (*set_channel)(struct at86rf230_local *, u8, u8);
  54. int (*set_txpower)(struct at86rf230_local *, s32);
  55. };
  56. #define AT86RF2XX_MAX_BUF (127 + 3)
  57. /* tx retries to access the TX_ON state
  58. * if it's above then force change will be started.
  59. *
  60. * We assume the max_frame_retries (7) value of 802.15.4 here.
  61. */
  62. #define AT86RF2XX_MAX_TX_RETRIES 7
  63. /* We use the recommended 5 minutes timeout to recalibrate */
  64. #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
  65. struct at86rf230_state_change {
  66. struct at86rf230_local *lp;
  67. int irq;
  68. struct hrtimer timer;
  69. struct spi_message msg;
  70. struct spi_transfer trx;
  71. u8 buf[AT86RF2XX_MAX_BUF];
  72. void (*complete)(void *context);
  73. u8 from_state;
  74. u8 to_state;
  75. bool free;
  76. };
  77. struct at86rf230_trac {
  78. u64 success;
  79. u64 success_data_pending;
  80. u64 success_wait_for_ack;
  81. u64 channel_access_failure;
  82. u64 no_ack;
  83. u64 invalid;
  84. };
  85. struct at86rf230_local {
  86. struct spi_device *spi;
  87. struct ieee802154_hw *hw;
  88. struct at86rf2xx_chip_data *data;
  89. struct regmap *regmap;
  90. int slp_tr;
  91. bool sleep;
  92. struct completion state_complete;
  93. struct at86rf230_state_change state;
  94. unsigned long cal_timeout;
  95. bool is_tx;
  96. bool is_tx_from_off;
  97. u8 tx_retry;
  98. struct sk_buff *tx_skb;
  99. struct at86rf230_state_change tx;
  100. struct at86rf230_trac trac;
  101. };
  102. #define AT86RF2XX_NUMREGS 0x3F
  103. static void
  104. at86rf230_async_state_change(struct at86rf230_local *lp,
  105. struct at86rf230_state_change *ctx,
  106. const u8 state, void (*complete)(void *context));
  107. static inline void
  108. at86rf230_sleep(struct at86rf230_local *lp)
  109. {
  110. if (gpio_is_valid(lp->slp_tr)) {
  111. gpio_set_value(lp->slp_tr, 1);
  112. usleep_range(lp->data->t_off_to_sleep,
  113. lp->data->t_off_to_sleep + 10);
  114. lp->sleep = true;
  115. }
  116. }
  117. static inline void
  118. at86rf230_awake(struct at86rf230_local *lp)
  119. {
  120. if (gpio_is_valid(lp->slp_tr)) {
  121. gpio_set_value(lp->slp_tr, 0);
  122. usleep_range(lp->data->t_sleep_to_off,
  123. lp->data->t_sleep_to_off + 100);
  124. lp->sleep = false;
  125. }
  126. }
  127. static inline int
  128. __at86rf230_write(struct at86rf230_local *lp,
  129. unsigned int addr, unsigned int data)
  130. {
  131. bool sleep = lp->sleep;
  132. int ret;
  133. /* awake for register setting if sleep */
  134. if (sleep)
  135. at86rf230_awake(lp);
  136. ret = regmap_write(lp->regmap, addr, data);
  137. /* sleep again if was sleeping */
  138. if (sleep)
  139. at86rf230_sleep(lp);
  140. return ret;
  141. }
  142. static inline int
  143. __at86rf230_read(struct at86rf230_local *lp,
  144. unsigned int addr, unsigned int *data)
  145. {
  146. bool sleep = lp->sleep;
  147. int ret;
  148. /* awake for register setting if sleep */
  149. if (sleep)
  150. at86rf230_awake(lp);
  151. ret = regmap_read(lp->regmap, addr, data);
  152. /* sleep again if was sleeping */
  153. if (sleep)
  154. at86rf230_sleep(lp);
  155. return ret;
  156. }
  157. static inline int
  158. at86rf230_read_subreg(struct at86rf230_local *lp,
  159. unsigned int addr, unsigned int mask,
  160. unsigned int shift, unsigned int *data)
  161. {
  162. int rc;
  163. rc = __at86rf230_read(lp, addr, data);
  164. if (!rc)
  165. *data = (*data & mask) >> shift;
  166. return rc;
  167. }
  168. static inline int
  169. at86rf230_write_subreg(struct at86rf230_local *lp,
  170. unsigned int addr, unsigned int mask,
  171. unsigned int shift, unsigned int data)
  172. {
  173. bool sleep = lp->sleep;
  174. int ret;
  175. /* awake for register setting if sleep */
  176. if (sleep)
  177. at86rf230_awake(lp);
  178. ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
  179. /* sleep again if was sleeping */
  180. if (sleep)
  181. at86rf230_sleep(lp);
  182. return ret;
  183. }
  184. static inline void
  185. at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
  186. {
  187. gpio_set_value(lp->slp_tr, 1);
  188. udelay(1);
  189. gpio_set_value(lp->slp_tr, 0);
  190. }
  191. static bool
  192. at86rf230_reg_writeable(struct device *dev, unsigned int reg)
  193. {
  194. switch (reg) {
  195. case RG_TRX_STATE:
  196. case RG_TRX_CTRL_0:
  197. case RG_TRX_CTRL_1:
  198. case RG_PHY_TX_PWR:
  199. case RG_PHY_ED_LEVEL:
  200. case RG_PHY_CC_CCA:
  201. case RG_CCA_THRES:
  202. case RG_RX_CTRL:
  203. case RG_SFD_VALUE:
  204. case RG_TRX_CTRL_2:
  205. case RG_ANT_DIV:
  206. case RG_IRQ_MASK:
  207. case RG_VREG_CTRL:
  208. case RG_BATMON:
  209. case RG_XOSC_CTRL:
  210. case RG_RX_SYN:
  211. case RG_XAH_CTRL_1:
  212. case RG_FTN_CTRL:
  213. case RG_PLL_CF:
  214. case RG_PLL_DCU:
  215. case RG_SHORT_ADDR_0:
  216. case RG_SHORT_ADDR_1:
  217. case RG_PAN_ID_0:
  218. case RG_PAN_ID_1:
  219. case RG_IEEE_ADDR_0:
  220. case RG_IEEE_ADDR_1:
  221. case RG_IEEE_ADDR_2:
  222. case RG_IEEE_ADDR_3:
  223. case RG_IEEE_ADDR_4:
  224. case RG_IEEE_ADDR_5:
  225. case RG_IEEE_ADDR_6:
  226. case RG_IEEE_ADDR_7:
  227. case RG_XAH_CTRL_0:
  228. case RG_CSMA_SEED_0:
  229. case RG_CSMA_SEED_1:
  230. case RG_CSMA_BE:
  231. return true;
  232. default:
  233. return false;
  234. }
  235. }
  236. static bool
  237. at86rf230_reg_readable(struct device *dev, unsigned int reg)
  238. {
  239. bool rc;
  240. /* all writeable are also readable */
  241. rc = at86rf230_reg_writeable(dev, reg);
  242. if (rc)
  243. return rc;
  244. /* readonly regs */
  245. switch (reg) {
  246. case RG_TRX_STATUS:
  247. case RG_PHY_RSSI:
  248. case RG_IRQ_STATUS:
  249. case RG_PART_NUM:
  250. case RG_VERSION_NUM:
  251. case RG_MAN_ID_1:
  252. case RG_MAN_ID_0:
  253. return true;
  254. default:
  255. return false;
  256. }
  257. }
  258. static bool
  259. at86rf230_reg_volatile(struct device *dev, unsigned int reg)
  260. {
  261. /* can be changed during runtime */
  262. switch (reg) {
  263. case RG_TRX_STATUS:
  264. case RG_TRX_STATE:
  265. case RG_PHY_RSSI:
  266. case RG_PHY_ED_LEVEL:
  267. case RG_IRQ_STATUS:
  268. case RG_VREG_CTRL:
  269. case RG_PLL_CF:
  270. case RG_PLL_DCU:
  271. return true;
  272. default:
  273. return false;
  274. }
  275. }
  276. static bool
  277. at86rf230_reg_precious(struct device *dev, unsigned int reg)
  278. {
  279. /* don't clear irq line on read */
  280. switch (reg) {
  281. case RG_IRQ_STATUS:
  282. return true;
  283. default:
  284. return false;
  285. }
  286. }
  287. static const struct regmap_config at86rf230_regmap_spi_config = {
  288. .reg_bits = 8,
  289. .val_bits = 8,
  290. .write_flag_mask = CMD_REG | CMD_WRITE,
  291. .read_flag_mask = CMD_REG,
  292. .cache_type = REGCACHE_RBTREE,
  293. .max_register = AT86RF2XX_NUMREGS,
  294. .writeable_reg = at86rf230_reg_writeable,
  295. .readable_reg = at86rf230_reg_readable,
  296. .volatile_reg = at86rf230_reg_volatile,
  297. .precious_reg = at86rf230_reg_precious,
  298. };
  299. static void
  300. at86rf230_async_error_recover_complete(void *context)
  301. {
  302. struct at86rf230_state_change *ctx = context;
  303. struct at86rf230_local *lp = ctx->lp;
  304. if (ctx->free)
  305. kfree(ctx);
  306. ieee802154_wake_queue(lp->hw);
  307. }
  308. static void
  309. at86rf230_async_error_recover(void *context)
  310. {
  311. struct at86rf230_state_change *ctx = context;
  312. struct at86rf230_local *lp = ctx->lp;
  313. lp->is_tx = 0;
  314. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
  315. at86rf230_async_error_recover_complete);
  316. }
  317. static inline void
  318. at86rf230_async_error(struct at86rf230_local *lp,
  319. struct at86rf230_state_change *ctx, int rc)
  320. {
  321. dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
  322. at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
  323. at86rf230_async_error_recover);
  324. }
  325. /* Generic function to get some register value in async mode */
  326. static void
  327. at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
  328. struct at86rf230_state_change *ctx,
  329. void (*complete)(void *context))
  330. {
  331. int rc;
  332. u8 *tx_buf = ctx->buf;
  333. tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
  334. ctx->msg.complete = complete;
  335. rc = spi_async(lp->spi, &ctx->msg);
  336. if (rc)
  337. at86rf230_async_error(lp, ctx, rc);
  338. }
  339. static void
  340. at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
  341. struct at86rf230_state_change *ctx,
  342. void (*complete)(void *context))
  343. {
  344. int rc;
  345. ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
  346. ctx->buf[1] = val;
  347. ctx->msg.complete = complete;
  348. rc = spi_async(lp->spi, &ctx->msg);
  349. if (rc)
  350. at86rf230_async_error(lp, ctx, rc);
  351. }
  352. static void
  353. at86rf230_async_state_assert(void *context)
  354. {
  355. struct at86rf230_state_change *ctx = context;
  356. struct at86rf230_local *lp = ctx->lp;
  357. const u8 *buf = ctx->buf;
  358. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  359. /* Assert state change */
  360. if (trx_state != ctx->to_state) {
  361. /* Special handling if transceiver state is in
  362. * STATE_BUSY_RX_AACK and a SHR was detected.
  363. */
  364. if (trx_state == STATE_BUSY_RX_AACK) {
  365. /* Undocumented race condition. If we send a state
  366. * change to STATE_RX_AACK_ON the transceiver could
  367. * change his state automatically to STATE_BUSY_RX_AACK
  368. * if a SHR was detected. This is not an error, but we
  369. * can't assert this.
  370. */
  371. if (ctx->to_state == STATE_RX_AACK_ON)
  372. goto done;
  373. /* If we change to STATE_TX_ON without forcing and
  374. * transceiver state is STATE_BUSY_RX_AACK, we wait
  375. * 'tFrame + tPAck' receiving time. In this time the
  376. * PDU should be received. If the transceiver is still
  377. * in STATE_BUSY_RX_AACK, we run a force state change
  378. * to STATE_TX_ON. This is a timeout handling, if the
  379. * transceiver stucks in STATE_BUSY_RX_AACK.
  380. *
  381. * Additional we do several retries to try to get into
  382. * TX_ON state without forcing. If the retries are
  383. * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
  384. * will do a force change.
  385. */
  386. if (ctx->to_state == STATE_TX_ON ||
  387. ctx->to_state == STATE_TRX_OFF) {
  388. u8 state = ctx->to_state;
  389. if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
  390. state = STATE_FORCE_TRX_OFF;
  391. lp->tx_retry++;
  392. at86rf230_async_state_change(lp, ctx, state,
  393. ctx->complete);
  394. return;
  395. }
  396. }
  397. dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
  398. ctx->from_state, ctx->to_state, trx_state);
  399. }
  400. done:
  401. if (ctx->complete)
  402. ctx->complete(context);
  403. }
  404. static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
  405. {
  406. struct at86rf230_state_change *ctx =
  407. container_of(timer, struct at86rf230_state_change, timer);
  408. struct at86rf230_local *lp = ctx->lp;
  409. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  410. at86rf230_async_state_assert);
  411. return HRTIMER_NORESTART;
  412. }
  413. /* Do state change timing delay. */
  414. static void
  415. at86rf230_async_state_delay(void *context)
  416. {
  417. struct at86rf230_state_change *ctx = context;
  418. struct at86rf230_local *lp = ctx->lp;
  419. struct at86rf2xx_chip_data *c = lp->data;
  420. bool force = false;
  421. ktime_t tim;
  422. /* The force state changes are will show as normal states in the
  423. * state status subregister. We change the to_state to the
  424. * corresponding one and remember if it was a force change, this
  425. * differs if we do a state change from STATE_BUSY_RX_AACK.
  426. */
  427. switch (ctx->to_state) {
  428. case STATE_FORCE_TX_ON:
  429. ctx->to_state = STATE_TX_ON;
  430. force = true;
  431. break;
  432. case STATE_FORCE_TRX_OFF:
  433. ctx->to_state = STATE_TRX_OFF;
  434. force = true;
  435. break;
  436. default:
  437. break;
  438. }
  439. switch (ctx->from_state) {
  440. case STATE_TRX_OFF:
  441. switch (ctx->to_state) {
  442. case STATE_RX_AACK_ON:
  443. tim = c->t_off_to_aack * NSEC_PER_USEC;
  444. /* state change from TRX_OFF to RX_AACK_ON to do a
  445. * calibration, we need to reset the timeout for the
  446. * next one.
  447. */
  448. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  449. goto change;
  450. case STATE_TX_ARET_ON:
  451. case STATE_TX_ON:
  452. tim = c->t_off_to_tx_on * NSEC_PER_USEC;
  453. /* state change from TRX_OFF to TX_ON or ARET_ON to do
  454. * a calibration, we need to reset the timeout for the
  455. * next one.
  456. */
  457. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  458. goto change;
  459. default:
  460. break;
  461. }
  462. break;
  463. case STATE_BUSY_RX_AACK:
  464. switch (ctx->to_state) {
  465. case STATE_TRX_OFF:
  466. case STATE_TX_ON:
  467. /* Wait for worst case receiving time if we
  468. * didn't make a force change from BUSY_RX_AACK
  469. * to TX_ON or TRX_OFF.
  470. */
  471. if (!force) {
  472. tim = (c->t_frame + c->t_p_ack) * NSEC_PER_USEC;
  473. goto change;
  474. }
  475. break;
  476. default:
  477. break;
  478. }
  479. break;
  480. /* Default value, means RESET state */
  481. case STATE_P_ON:
  482. switch (ctx->to_state) {
  483. case STATE_TRX_OFF:
  484. tim = c->t_reset_to_off * NSEC_PER_USEC;
  485. goto change;
  486. default:
  487. break;
  488. }
  489. break;
  490. default:
  491. break;
  492. }
  493. /* Default delay is 1us in the most cases */
  494. udelay(1);
  495. at86rf230_async_state_timer(&ctx->timer);
  496. return;
  497. change:
  498. hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
  499. }
  500. static void
  501. at86rf230_async_state_change_start(void *context)
  502. {
  503. struct at86rf230_state_change *ctx = context;
  504. struct at86rf230_local *lp = ctx->lp;
  505. u8 *buf = ctx->buf;
  506. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  507. /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
  508. if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
  509. udelay(1);
  510. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  511. at86rf230_async_state_change_start);
  512. return;
  513. }
  514. /* Check if we already are in the state which we change in */
  515. if (trx_state == ctx->to_state) {
  516. if (ctx->complete)
  517. ctx->complete(context);
  518. return;
  519. }
  520. /* Set current state to the context of state change */
  521. ctx->from_state = trx_state;
  522. /* Going into the next step for a state change which do a timing
  523. * relevant delay.
  524. */
  525. at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
  526. at86rf230_async_state_delay);
  527. }
  528. static void
  529. at86rf230_async_state_change(struct at86rf230_local *lp,
  530. struct at86rf230_state_change *ctx,
  531. const u8 state, void (*complete)(void *context))
  532. {
  533. /* Initialization for the state change context */
  534. ctx->to_state = state;
  535. ctx->complete = complete;
  536. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  537. at86rf230_async_state_change_start);
  538. }
  539. static void
  540. at86rf230_sync_state_change_complete(void *context)
  541. {
  542. struct at86rf230_state_change *ctx = context;
  543. struct at86rf230_local *lp = ctx->lp;
  544. complete(&lp->state_complete);
  545. }
  546. /* This function do a sync framework above the async state change.
  547. * Some callbacks of the IEEE 802.15.4 driver interface need to be
  548. * handled synchronously.
  549. */
  550. static int
  551. at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
  552. {
  553. unsigned long rc;
  554. at86rf230_async_state_change(lp, &lp->state, state,
  555. at86rf230_sync_state_change_complete);
  556. rc = wait_for_completion_timeout(&lp->state_complete,
  557. msecs_to_jiffies(100));
  558. if (!rc) {
  559. at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
  560. return -ETIMEDOUT;
  561. }
  562. return 0;
  563. }
  564. static void
  565. at86rf230_tx_complete(void *context)
  566. {
  567. struct at86rf230_state_change *ctx = context;
  568. struct at86rf230_local *lp = ctx->lp;
  569. ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
  570. kfree(ctx);
  571. }
  572. static void
  573. at86rf230_tx_on(void *context)
  574. {
  575. struct at86rf230_state_change *ctx = context;
  576. struct at86rf230_local *lp = ctx->lp;
  577. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
  578. at86rf230_tx_complete);
  579. }
  580. static void
  581. at86rf230_tx_trac_check(void *context)
  582. {
  583. struct at86rf230_state_change *ctx = context;
  584. struct at86rf230_local *lp = ctx->lp;
  585. if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
  586. u8 trac = TRAC_MASK(ctx->buf[1]);
  587. switch (trac) {
  588. case TRAC_SUCCESS:
  589. lp->trac.success++;
  590. break;
  591. case TRAC_SUCCESS_DATA_PENDING:
  592. lp->trac.success_data_pending++;
  593. break;
  594. case TRAC_CHANNEL_ACCESS_FAILURE:
  595. lp->trac.channel_access_failure++;
  596. break;
  597. case TRAC_NO_ACK:
  598. lp->trac.no_ack++;
  599. break;
  600. case TRAC_INVALID:
  601. lp->trac.invalid++;
  602. break;
  603. default:
  604. WARN_ONCE(1, "received tx trac status %d\n", trac);
  605. break;
  606. }
  607. }
  608. at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
  609. }
  610. static void
  611. at86rf230_rx_read_frame_complete(void *context)
  612. {
  613. struct at86rf230_state_change *ctx = context;
  614. struct at86rf230_local *lp = ctx->lp;
  615. const u8 *buf = ctx->buf;
  616. struct sk_buff *skb;
  617. u8 len, lqi;
  618. len = buf[1];
  619. if (!ieee802154_is_valid_psdu_len(len)) {
  620. dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
  621. len = IEEE802154_MTU;
  622. }
  623. lqi = buf[2 + len];
  624. skb = dev_alloc_skb(IEEE802154_MTU);
  625. if (!skb) {
  626. dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
  627. kfree(ctx);
  628. return;
  629. }
  630. memcpy(skb_put(skb, len), buf + 2, len);
  631. ieee802154_rx_irqsafe(lp->hw, skb, lqi);
  632. kfree(ctx);
  633. }
  634. static void
  635. at86rf230_rx_trac_check(void *context)
  636. {
  637. struct at86rf230_state_change *ctx = context;
  638. struct at86rf230_local *lp = ctx->lp;
  639. u8 *buf = ctx->buf;
  640. int rc;
  641. if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
  642. u8 trac = TRAC_MASK(buf[1]);
  643. switch (trac) {
  644. case TRAC_SUCCESS:
  645. lp->trac.success++;
  646. break;
  647. case TRAC_SUCCESS_WAIT_FOR_ACK:
  648. lp->trac.success_wait_for_ack++;
  649. break;
  650. case TRAC_INVALID:
  651. lp->trac.invalid++;
  652. break;
  653. default:
  654. WARN_ONCE(1, "received rx trac status %d\n", trac);
  655. break;
  656. }
  657. }
  658. buf[0] = CMD_FB;
  659. ctx->trx.len = AT86RF2XX_MAX_BUF;
  660. ctx->msg.complete = at86rf230_rx_read_frame_complete;
  661. rc = spi_async(lp->spi, &ctx->msg);
  662. if (rc) {
  663. ctx->trx.len = 2;
  664. at86rf230_async_error(lp, ctx, rc);
  665. }
  666. }
  667. static void
  668. at86rf230_irq_trx_end(void *context)
  669. {
  670. struct at86rf230_state_change *ctx = context;
  671. struct at86rf230_local *lp = ctx->lp;
  672. if (lp->is_tx) {
  673. lp->is_tx = 0;
  674. at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
  675. at86rf230_tx_trac_check);
  676. } else {
  677. at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
  678. at86rf230_rx_trac_check);
  679. }
  680. }
  681. static void
  682. at86rf230_irq_status(void *context)
  683. {
  684. struct at86rf230_state_change *ctx = context;
  685. struct at86rf230_local *lp = ctx->lp;
  686. const u8 *buf = ctx->buf;
  687. u8 irq = buf[1];
  688. enable_irq(lp->spi->irq);
  689. if (irq & IRQ_TRX_END) {
  690. at86rf230_irq_trx_end(ctx);
  691. } else {
  692. dev_err(&lp->spi->dev, "not supported irq %02x received\n",
  693. irq);
  694. kfree(ctx);
  695. }
  696. }
  697. static void
  698. at86rf230_setup_spi_messages(struct at86rf230_local *lp,
  699. struct at86rf230_state_change *state)
  700. {
  701. state->lp = lp;
  702. state->irq = lp->spi->irq;
  703. spi_message_init(&state->msg);
  704. state->msg.context = state;
  705. state->trx.len = 2;
  706. state->trx.tx_buf = state->buf;
  707. state->trx.rx_buf = state->buf;
  708. spi_message_add_tail(&state->trx, &state->msg);
  709. hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  710. state->timer.function = at86rf230_async_state_timer;
  711. }
  712. static irqreturn_t at86rf230_isr(int irq, void *data)
  713. {
  714. struct at86rf230_local *lp = data;
  715. struct at86rf230_state_change *ctx;
  716. int rc;
  717. disable_irq_nosync(irq);
  718. ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
  719. if (!ctx) {
  720. enable_irq(irq);
  721. return IRQ_NONE;
  722. }
  723. at86rf230_setup_spi_messages(lp, ctx);
  724. /* tell on error handling to free ctx */
  725. ctx->free = true;
  726. ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
  727. ctx->msg.complete = at86rf230_irq_status;
  728. rc = spi_async(lp->spi, &ctx->msg);
  729. if (rc) {
  730. at86rf230_async_error(lp, ctx, rc);
  731. enable_irq(irq);
  732. return IRQ_NONE;
  733. }
  734. return IRQ_HANDLED;
  735. }
  736. static void
  737. at86rf230_write_frame_complete(void *context)
  738. {
  739. struct at86rf230_state_change *ctx = context;
  740. struct at86rf230_local *lp = ctx->lp;
  741. ctx->trx.len = 2;
  742. if (gpio_is_valid(lp->slp_tr))
  743. at86rf230_slp_tr_rising_edge(lp);
  744. else
  745. at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
  746. NULL);
  747. }
  748. static void
  749. at86rf230_write_frame(void *context)
  750. {
  751. struct at86rf230_state_change *ctx = context;
  752. struct at86rf230_local *lp = ctx->lp;
  753. struct sk_buff *skb = lp->tx_skb;
  754. u8 *buf = ctx->buf;
  755. int rc;
  756. lp->is_tx = 1;
  757. buf[0] = CMD_FB | CMD_WRITE;
  758. buf[1] = skb->len + 2;
  759. memcpy(buf + 2, skb->data, skb->len);
  760. ctx->trx.len = skb->len + 2;
  761. ctx->msg.complete = at86rf230_write_frame_complete;
  762. rc = spi_async(lp->spi, &ctx->msg);
  763. if (rc) {
  764. ctx->trx.len = 2;
  765. at86rf230_async_error(lp, ctx, rc);
  766. }
  767. }
  768. static void
  769. at86rf230_xmit_tx_on(void *context)
  770. {
  771. struct at86rf230_state_change *ctx = context;
  772. struct at86rf230_local *lp = ctx->lp;
  773. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  774. at86rf230_write_frame);
  775. }
  776. static void
  777. at86rf230_xmit_start(void *context)
  778. {
  779. struct at86rf230_state_change *ctx = context;
  780. struct at86rf230_local *lp = ctx->lp;
  781. /* check if we change from off state */
  782. if (lp->is_tx_from_off)
  783. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  784. at86rf230_write_frame);
  785. else
  786. at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
  787. at86rf230_xmit_tx_on);
  788. }
  789. static int
  790. at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
  791. {
  792. struct at86rf230_local *lp = hw->priv;
  793. struct at86rf230_state_change *ctx = &lp->tx;
  794. lp->tx_skb = skb;
  795. lp->tx_retry = 0;
  796. /* After 5 minutes in PLL and the same frequency we run again the
  797. * calibration loops which is recommended by at86rf2xx datasheets.
  798. *
  799. * The calibration is initiate by a state change from TRX_OFF
  800. * to TX_ON, the lp->cal_timeout should be reinit by state_delay
  801. * function then to start in the next 5 minutes.
  802. */
  803. if (time_is_before_jiffies(lp->cal_timeout)) {
  804. lp->is_tx_from_off = true;
  805. at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
  806. at86rf230_xmit_start);
  807. } else {
  808. lp->is_tx_from_off = false;
  809. at86rf230_xmit_start(ctx);
  810. }
  811. return 0;
  812. }
  813. static int
  814. at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
  815. {
  816. BUG_ON(!level);
  817. *level = 0xbe;
  818. return 0;
  819. }
  820. static int
  821. at86rf230_start(struct ieee802154_hw *hw)
  822. {
  823. struct at86rf230_local *lp = hw->priv;
  824. /* reset trac stats on start */
  825. if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS))
  826. memset(&lp->trac, 0, sizeof(struct at86rf230_trac));
  827. at86rf230_awake(lp);
  828. enable_irq(lp->spi->irq);
  829. return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
  830. }
  831. static void
  832. at86rf230_stop(struct ieee802154_hw *hw)
  833. {
  834. struct at86rf230_local *lp = hw->priv;
  835. u8 csma_seed[2];
  836. at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  837. disable_irq(lp->spi->irq);
  838. /* It's recommended to set random new csma_seeds before sleep state.
  839. * Makes only sense in the stop callback, not doing this inside of
  840. * at86rf230_sleep, this is also used when we don't transmit afterwards
  841. * when calling start callback again.
  842. */
  843. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  844. at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  845. at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  846. at86rf230_sleep(lp);
  847. }
  848. static int
  849. at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  850. {
  851. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  852. }
  853. #define AT86RF2XX_MAX_ED_LEVELS 0xF
  854. static const s32 at86rf233_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  855. -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, -7800, -7600,
  856. -7400, -7200, -7000, -6800, -6600, -6400,
  857. };
  858. static const s32 at86rf231_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  859. -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
  860. -7100, -6900, -6700, -6500, -6300, -6100,
  861. };
  862. static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  863. -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
  864. -8000, -7800, -7600, -7400, -7200, -7000,
  865. };
  866. static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  867. -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
  868. -7800, -7600, -7400, -7200, -7000, -6800,
  869. };
  870. static inline int
  871. at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
  872. {
  873. unsigned int cca_ed_thres;
  874. int rc;
  875. rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
  876. if (rc < 0)
  877. return rc;
  878. switch (rssi_base_val) {
  879. case -98:
  880. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
  881. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
  882. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
  883. break;
  884. case -100:
  885. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  886. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  887. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
  888. break;
  889. default:
  890. WARN_ON(1);
  891. }
  892. return 0;
  893. }
  894. static int
  895. at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  896. {
  897. int rc;
  898. if (channel == 0)
  899. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
  900. else
  901. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
  902. if (rc < 0)
  903. return rc;
  904. if (page == 0) {
  905. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
  906. lp->data->rssi_base_val = -100;
  907. } else {
  908. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
  909. lp->data->rssi_base_val = -98;
  910. }
  911. if (rc < 0)
  912. return rc;
  913. rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
  914. if (rc < 0)
  915. return rc;
  916. /* This sets the symbol_duration according frequency on the 212.
  917. * TODO move this handling while set channel and page in cfg802154.
  918. * We can do that, this timings are according 802.15.4 standard.
  919. * If we do that in cfg802154, this is a more generic calculation.
  920. *
  921. * This should also protected from ifs_timer. Means cancel timer and
  922. * init with a new value. For now, this is okay.
  923. */
  924. if (channel == 0) {
  925. if (page == 0) {
  926. /* SUB:0 and BPSK:0 -> BPSK-20 */
  927. lp->hw->phy->symbol_duration = 50;
  928. } else {
  929. /* SUB:1 and BPSK:0 -> BPSK-40 */
  930. lp->hw->phy->symbol_duration = 25;
  931. }
  932. } else {
  933. if (page == 0)
  934. /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
  935. lp->hw->phy->symbol_duration = 40;
  936. else
  937. /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
  938. lp->hw->phy->symbol_duration = 16;
  939. }
  940. lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
  941. lp->hw->phy->symbol_duration;
  942. lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
  943. lp->hw->phy->symbol_duration;
  944. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  945. }
  946. static int
  947. at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
  948. {
  949. struct at86rf230_local *lp = hw->priv;
  950. int rc;
  951. rc = lp->data->set_channel(lp, page, channel);
  952. /* Wait for PLL */
  953. usleep_range(lp->data->t_channel_switch,
  954. lp->data->t_channel_switch + 10);
  955. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  956. return rc;
  957. }
  958. static int
  959. at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
  960. struct ieee802154_hw_addr_filt *filt,
  961. unsigned long changed)
  962. {
  963. struct at86rf230_local *lp = hw->priv;
  964. if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
  965. u16 addr = le16_to_cpu(filt->short_addr);
  966. dev_vdbg(&lp->spi->dev,
  967. "at86rf230_set_hw_addr_filt called for saddr\n");
  968. __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
  969. __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
  970. }
  971. if (changed & IEEE802154_AFILT_PANID_CHANGED) {
  972. u16 pan = le16_to_cpu(filt->pan_id);
  973. dev_vdbg(&lp->spi->dev,
  974. "at86rf230_set_hw_addr_filt called for pan id\n");
  975. __at86rf230_write(lp, RG_PAN_ID_0, pan);
  976. __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
  977. }
  978. if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
  979. u8 i, addr[8];
  980. memcpy(addr, &filt->ieee_addr, 8);
  981. dev_vdbg(&lp->spi->dev,
  982. "at86rf230_set_hw_addr_filt called for IEEE addr\n");
  983. for (i = 0; i < 8; i++)
  984. __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
  985. }
  986. if (changed & IEEE802154_AFILT_PANC_CHANGED) {
  987. dev_vdbg(&lp->spi->dev,
  988. "at86rf230_set_hw_addr_filt called for panc change\n");
  989. if (filt->pan_coord)
  990. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
  991. else
  992. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
  993. }
  994. return 0;
  995. }
  996. #define AT86RF23X_MAX_TX_POWERS 0xF
  997. static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  998. 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
  999. -800, -1200, -1700,
  1000. };
  1001. static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  1002. 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
  1003. -900, -1200, -1700,
  1004. };
  1005. #define AT86RF212_MAX_TX_POWERS 0x1F
  1006. static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
  1007. 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
  1008. -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
  1009. -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
  1010. };
  1011. static int
  1012. at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
  1013. {
  1014. u32 i;
  1015. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  1016. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  1017. return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
  1018. }
  1019. return -EINVAL;
  1020. }
  1021. static int
  1022. at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
  1023. {
  1024. u32 i;
  1025. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  1026. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  1027. return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
  1028. }
  1029. return -EINVAL;
  1030. }
  1031. static int
  1032. at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
  1033. {
  1034. struct at86rf230_local *lp = hw->priv;
  1035. return lp->data->set_txpower(lp, mbm);
  1036. }
  1037. static int
  1038. at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
  1039. {
  1040. struct at86rf230_local *lp = hw->priv;
  1041. return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
  1042. }
  1043. static int
  1044. at86rf230_set_cca_mode(struct ieee802154_hw *hw,
  1045. const struct wpan_phy_cca *cca)
  1046. {
  1047. struct at86rf230_local *lp = hw->priv;
  1048. u8 val;
  1049. /* mapping 802.15.4 to driver spec */
  1050. switch (cca->mode) {
  1051. case NL802154_CCA_ENERGY:
  1052. val = 1;
  1053. break;
  1054. case NL802154_CCA_CARRIER:
  1055. val = 2;
  1056. break;
  1057. case NL802154_CCA_ENERGY_CARRIER:
  1058. switch (cca->opt) {
  1059. case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
  1060. val = 3;
  1061. break;
  1062. case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
  1063. val = 0;
  1064. break;
  1065. default:
  1066. return -EINVAL;
  1067. }
  1068. break;
  1069. default:
  1070. return -EINVAL;
  1071. }
  1072. return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
  1073. }
  1074. static int
  1075. at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
  1076. {
  1077. struct at86rf230_local *lp = hw->priv;
  1078. u32 i;
  1079. for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
  1080. if (hw->phy->supported.cca_ed_levels[i] == mbm)
  1081. return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
  1082. }
  1083. return -EINVAL;
  1084. }
  1085. static int
  1086. at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
  1087. u8 retries)
  1088. {
  1089. struct at86rf230_local *lp = hw->priv;
  1090. int rc;
  1091. rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
  1092. if (rc)
  1093. return rc;
  1094. rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
  1095. if (rc)
  1096. return rc;
  1097. return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
  1098. }
  1099. static int
  1100. at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
  1101. {
  1102. struct at86rf230_local *lp = hw->priv;
  1103. return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
  1104. }
  1105. static int
  1106. at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
  1107. {
  1108. struct at86rf230_local *lp = hw->priv;
  1109. int rc;
  1110. if (on) {
  1111. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
  1112. if (rc < 0)
  1113. return rc;
  1114. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
  1115. if (rc < 0)
  1116. return rc;
  1117. } else {
  1118. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
  1119. if (rc < 0)
  1120. return rc;
  1121. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
  1122. if (rc < 0)
  1123. return rc;
  1124. }
  1125. return 0;
  1126. }
  1127. static const struct ieee802154_ops at86rf230_ops = {
  1128. .owner = THIS_MODULE,
  1129. .xmit_async = at86rf230_xmit,
  1130. .ed = at86rf230_ed,
  1131. .set_channel = at86rf230_channel,
  1132. .start = at86rf230_start,
  1133. .stop = at86rf230_stop,
  1134. .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
  1135. .set_txpower = at86rf230_set_txpower,
  1136. .set_lbt = at86rf230_set_lbt,
  1137. .set_cca_mode = at86rf230_set_cca_mode,
  1138. .set_cca_ed_level = at86rf230_set_cca_ed_level,
  1139. .set_csma_params = at86rf230_set_csma_params,
  1140. .set_frame_retries = at86rf230_set_frame_retries,
  1141. .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
  1142. };
  1143. static struct at86rf2xx_chip_data at86rf233_data = {
  1144. .t_sleep_cycle = 330,
  1145. .t_channel_switch = 11,
  1146. .t_reset_to_off = 26,
  1147. .t_off_to_aack = 80,
  1148. .t_off_to_tx_on = 80,
  1149. .t_off_to_sleep = 35,
  1150. .t_sleep_to_off = 1000,
  1151. .t_frame = 4096,
  1152. .t_p_ack = 545,
  1153. .rssi_base_val = -94,
  1154. .set_channel = at86rf23x_set_channel,
  1155. .set_txpower = at86rf23x_set_txpower,
  1156. };
  1157. static struct at86rf2xx_chip_data at86rf231_data = {
  1158. .t_sleep_cycle = 330,
  1159. .t_channel_switch = 24,
  1160. .t_reset_to_off = 37,
  1161. .t_off_to_aack = 110,
  1162. .t_off_to_tx_on = 110,
  1163. .t_off_to_sleep = 35,
  1164. .t_sleep_to_off = 1000,
  1165. .t_frame = 4096,
  1166. .t_p_ack = 545,
  1167. .rssi_base_val = -91,
  1168. .set_channel = at86rf23x_set_channel,
  1169. .set_txpower = at86rf23x_set_txpower,
  1170. };
  1171. static struct at86rf2xx_chip_data at86rf212_data = {
  1172. .t_sleep_cycle = 330,
  1173. .t_channel_switch = 11,
  1174. .t_reset_to_off = 26,
  1175. .t_off_to_aack = 200,
  1176. .t_off_to_tx_on = 200,
  1177. .t_off_to_sleep = 35,
  1178. .t_sleep_to_off = 1000,
  1179. .t_frame = 4096,
  1180. .t_p_ack = 545,
  1181. .rssi_base_val = -100,
  1182. .set_channel = at86rf212_set_channel,
  1183. .set_txpower = at86rf212_set_txpower,
  1184. };
  1185. static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
  1186. {
  1187. int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
  1188. unsigned int dvdd;
  1189. u8 csma_seed[2];
  1190. rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  1191. if (rc)
  1192. return rc;
  1193. irq_type = irq_get_trigger_type(lp->spi->irq);
  1194. if (irq_type == IRQ_TYPE_EDGE_FALLING ||
  1195. irq_type == IRQ_TYPE_LEVEL_LOW)
  1196. irq_pol = IRQ_ACTIVE_LOW;
  1197. rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
  1198. if (rc)
  1199. return rc;
  1200. rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
  1201. if (rc)
  1202. return rc;
  1203. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
  1204. if (rc)
  1205. return rc;
  1206. /* reset values differs in at86rf231 and at86rf233 */
  1207. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
  1208. if (rc)
  1209. return rc;
  1210. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  1211. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  1212. if (rc)
  1213. return rc;
  1214. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  1215. if (rc)
  1216. return rc;
  1217. /* CLKM changes are applied immediately */
  1218. rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
  1219. if (rc)
  1220. return rc;
  1221. /* Turn CLKM Off */
  1222. rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
  1223. if (rc)
  1224. return rc;
  1225. /* Wait the next SLEEP cycle */
  1226. usleep_range(lp->data->t_sleep_cycle,
  1227. lp->data->t_sleep_cycle + 100);
  1228. /* xtal_trim value is calculated by:
  1229. * CL = 0.5 * (CX + CTRIM + CPAR)
  1230. *
  1231. * whereas:
  1232. * CL = capacitor of used crystal
  1233. * CX = connected capacitors at xtal pins
  1234. * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
  1235. * but this is different on each board setup. You need to fine
  1236. * tuning this value via CTRIM.
  1237. * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
  1238. * 0 pF upto 4.5 pF.
  1239. *
  1240. * Examples:
  1241. * atben transceiver:
  1242. *
  1243. * CL = 8 pF
  1244. * CX = 12 pF
  1245. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1246. * CTRIM = 0.9 pF
  1247. *
  1248. * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
  1249. *
  1250. * xtal_trim = 0x3
  1251. *
  1252. * openlabs transceiver:
  1253. *
  1254. * CL = 16 pF
  1255. * CX = 22 pF
  1256. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1257. * CTRIM = 4.5 pF
  1258. *
  1259. * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
  1260. *
  1261. * xtal_trim = 0xf
  1262. */
  1263. rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
  1264. if (rc)
  1265. return rc;
  1266. rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
  1267. if (rc)
  1268. return rc;
  1269. if (!dvdd) {
  1270. dev_err(&lp->spi->dev, "DVDD error\n");
  1271. return -EINVAL;
  1272. }
  1273. /* Force setting slotted operation bit to 0. Sometimes the atben
  1274. * sets this bit and I don't know why. We set this always force
  1275. * to zero while probing.
  1276. */
  1277. return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
  1278. }
  1279. static int
  1280. at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
  1281. u8 *xtal_trim)
  1282. {
  1283. struct at86rf230_platform_data *pdata = spi->dev.platform_data;
  1284. int ret;
  1285. if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
  1286. if (!pdata)
  1287. return -ENOENT;
  1288. *rstn = pdata->rstn;
  1289. *slp_tr = pdata->slp_tr;
  1290. *xtal_trim = pdata->xtal_trim;
  1291. return 0;
  1292. }
  1293. *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
  1294. *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
  1295. ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
  1296. if (ret < 0 && ret != -EINVAL)
  1297. return ret;
  1298. return 0;
  1299. }
  1300. static int
  1301. at86rf230_detect_device(struct at86rf230_local *lp)
  1302. {
  1303. unsigned int part, version, val;
  1304. u16 man_id = 0;
  1305. const char *chip;
  1306. int rc;
  1307. rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
  1308. if (rc)
  1309. return rc;
  1310. man_id |= val;
  1311. rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
  1312. if (rc)
  1313. return rc;
  1314. man_id |= (val << 8);
  1315. rc = __at86rf230_read(lp, RG_PART_NUM, &part);
  1316. if (rc)
  1317. return rc;
  1318. rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
  1319. if (rc)
  1320. return rc;
  1321. if (man_id != 0x001f) {
  1322. dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
  1323. man_id >> 8, man_id & 0xFF);
  1324. return -EINVAL;
  1325. }
  1326. lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
  1327. IEEE802154_HW_CSMA_PARAMS |
  1328. IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
  1329. IEEE802154_HW_PROMISCUOUS;
  1330. lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
  1331. WPAN_PHY_FLAG_CCA_ED_LEVEL |
  1332. WPAN_PHY_FLAG_CCA_MODE;
  1333. lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
  1334. BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
  1335. lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
  1336. BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
  1337. lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
  1338. switch (part) {
  1339. case 2:
  1340. chip = "at86rf230";
  1341. rc = -ENOTSUPP;
  1342. goto not_supp;
  1343. case 3:
  1344. chip = "at86rf231";
  1345. lp->data = &at86rf231_data;
  1346. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1347. lp->hw->phy->current_channel = 11;
  1348. lp->hw->phy->symbol_duration = 16;
  1349. lp->hw->phy->supported.tx_powers = at86rf231_powers;
  1350. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
  1351. lp->hw->phy->supported.cca_ed_levels = at86rf231_ed_levels;
  1352. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf231_ed_levels);
  1353. break;
  1354. case 7:
  1355. chip = "at86rf212";
  1356. lp->data = &at86rf212_data;
  1357. lp->hw->flags |= IEEE802154_HW_LBT;
  1358. lp->hw->phy->supported.channels[0] = 0x00007FF;
  1359. lp->hw->phy->supported.channels[2] = 0x00007FF;
  1360. lp->hw->phy->current_channel = 5;
  1361. lp->hw->phy->symbol_duration = 25;
  1362. lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
  1363. lp->hw->phy->supported.tx_powers = at86rf212_powers;
  1364. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
  1365. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  1366. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  1367. break;
  1368. case 11:
  1369. chip = "at86rf233";
  1370. lp->data = &at86rf233_data;
  1371. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1372. lp->hw->phy->current_channel = 13;
  1373. lp->hw->phy->symbol_duration = 16;
  1374. lp->hw->phy->supported.tx_powers = at86rf233_powers;
  1375. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
  1376. lp->hw->phy->supported.cca_ed_levels = at86rf233_ed_levels;
  1377. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf233_ed_levels);
  1378. break;
  1379. default:
  1380. chip = "unknown";
  1381. rc = -ENOTSUPP;
  1382. goto not_supp;
  1383. }
  1384. lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
  1385. lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
  1386. not_supp:
  1387. dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
  1388. return rc;
  1389. }
  1390. #ifdef CONFIG_IEEE802154_AT86RF230_DEBUGFS
  1391. static struct dentry *at86rf230_debugfs_root;
  1392. static int at86rf230_stats_show(struct seq_file *file, void *offset)
  1393. {
  1394. struct at86rf230_local *lp = file->private;
  1395. seq_printf(file, "SUCCESS:\t\t%8llu\n", lp->trac.success);
  1396. seq_printf(file, "SUCCESS_DATA_PENDING:\t%8llu\n",
  1397. lp->trac.success_data_pending);
  1398. seq_printf(file, "SUCCESS_WAIT_FOR_ACK:\t%8llu\n",
  1399. lp->trac.success_wait_for_ack);
  1400. seq_printf(file, "CHANNEL_ACCESS_FAILURE:\t%8llu\n",
  1401. lp->trac.channel_access_failure);
  1402. seq_printf(file, "NO_ACK:\t\t\t%8llu\n", lp->trac.no_ack);
  1403. seq_printf(file, "INVALID:\t\t%8llu\n", lp->trac.invalid);
  1404. return 0;
  1405. }
  1406. static int at86rf230_stats_open(struct inode *inode, struct file *file)
  1407. {
  1408. return single_open(file, at86rf230_stats_show, inode->i_private);
  1409. }
  1410. static const struct file_operations at86rf230_stats_fops = {
  1411. .open = at86rf230_stats_open,
  1412. .read = seq_read,
  1413. .llseek = seq_lseek,
  1414. .release = single_release,
  1415. };
  1416. static int at86rf230_debugfs_init(struct at86rf230_local *lp)
  1417. {
  1418. char debugfs_dir_name[DNAME_INLINE_LEN + 1] = "at86rf230-";
  1419. struct dentry *stats;
  1420. strncat(debugfs_dir_name, dev_name(&lp->spi->dev), DNAME_INLINE_LEN);
  1421. at86rf230_debugfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
  1422. if (!at86rf230_debugfs_root)
  1423. return -ENOMEM;
  1424. stats = debugfs_create_file("trac_stats", S_IRUGO,
  1425. at86rf230_debugfs_root, lp,
  1426. &at86rf230_stats_fops);
  1427. if (!stats)
  1428. return -ENOMEM;
  1429. return 0;
  1430. }
  1431. static void at86rf230_debugfs_remove(void)
  1432. {
  1433. debugfs_remove_recursive(at86rf230_debugfs_root);
  1434. }
  1435. #else
  1436. static int at86rf230_debugfs_init(struct at86rf230_local *lp) { return 0; }
  1437. static void at86rf230_debugfs_remove(void) { }
  1438. #endif
  1439. static int at86rf230_probe(struct spi_device *spi)
  1440. {
  1441. struct ieee802154_hw *hw;
  1442. struct at86rf230_local *lp;
  1443. unsigned int status;
  1444. int rc, irq_type, rstn, slp_tr;
  1445. u8 xtal_trim = 0;
  1446. if (!spi->irq) {
  1447. dev_err(&spi->dev, "no IRQ specified\n");
  1448. return -EINVAL;
  1449. }
  1450. rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
  1451. if (rc < 0) {
  1452. dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
  1453. return rc;
  1454. }
  1455. if (gpio_is_valid(rstn)) {
  1456. rc = devm_gpio_request_one(&spi->dev, rstn,
  1457. GPIOF_OUT_INIT_HIGH, "rstn");
  1458. if (rc)
  1459. return rc;
  1460. }
  1461. if (gpio_is_valid(slp_tr)) {
  1462. rc = devm_gpio_request_one(&spi->dev, slp_tr,
  1463. GPIOF_OUT_INIT_LOW, "slp_tr");
  1464. if (rc)
  1465. return rc;
  1466. }
  1467. /* Reset */
  1468. if (gpio_is_valid(rstn)) {
  1469. udelay(1);
  1470. gpio_set_value_cansleep(rstn, 0);
  1471. udelay(1);
  1472. gpio_set_value_cansleep(rstn, 1);
  1473. usleep_range(120, 240);
  1474. }
  1475. hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
  1476. if (!hw)
  1477. return -ENOMEM;
  1478. lp = hw->priv;
  1479. lp->hw = hw;
  1480. lp->spi = spi;
  1481. lp->slp_tr = slp_tr;
  1482. hw->parent = &spi->dev;
  1483. ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
  1484. lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
  1485. if (IS_ERR(lp->regmap)) {
  1486. rc = PTR_ERR(lp->regmap);
  1487. dev_err(&spi->dev, "Failed to allocate register map: %d\n",
  1488. rc);
  1489. goto free_dev;
  1490. }
  1491. at86rf230_setup_spi_messages(lp, &lp->state);
  1492. at86rf230_setup_spi_messages(lp, &lp->tx);
  1493. rc = at86rf230_detect_device(lp);
  1494. if (rc < 0)
  1495. goto free_dev;
  1496. init_completion(&lp->state_complete);
  1497. spi_set_drvdata(spi, lp);
  1498. rc = at86rf230_hw_init(lp, xtal_trim);
  1499. if (rc)
  1500. goto free_dev;
  1501. /* Read irq status register to reset irq line */
  1502. rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
  1503. if (rc)
  1504. goto free_dev;
  1505. irq_type = irq_get_trigger_type(spi->irq);
  1506. if (!irq_type)
  1507. irq_type = IRQF_TRIGGER_HIGH;
  1508. rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
  1509. IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
  1510. if (rc)
  1511. goto free_dev;
  1512. /* disable_irq by default and wait for starting hardware */
  1513. disable_irq(spi->irq);
  1514. /* going into sleep by default */
  1515. at86rf230_sleep(lp);
  1516. rc = at86rf230_debugfs_init(lp);
  1517. if (rc)
  1518. goto free_dev;
  1519. rc = ieee802154_register_hw(lp->hw);
  1520. if (rc)
  1521. goto free_debugfs;
  1522. return rc;
  1523. free_debugfs:
  1524. at86rf230_debugfs_remove();
  1525. free_dev:
  1526. ieee802154_free_hw(lp->hw);
  1527. return rc;
  1528. }
  1529. static int at86rf230_remove(struct spi_device *spi)
  1530. {
  1531. struct at86rf230_local *lp = spi_get_drvdata(spi);
  1532. /* mask all at86rf230 irq's */
  1533. at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
  1534. ieee802154_unregister_hw(lp->hw);
  1535. ieee802154_free_hw(lp->hw);
  1536. at86rf230_debugfs_remove();
  1537. dev_dbg(&spi->dev, "unregistered at86rf230\n");
  1538. return 0;
  1539. }
  1540. static const struct of_device_id at86rf230_of_match[] = {
  1541. { .compatible = "atmel,at86rf230", },
  1542. { .compatible = "atmel,at86rf231", },
  1543. { .compatible = "atmel,at86rf233", },
  1544. { .compatible = "atmel,at86rf212", },
  1545. { },
  1546. };
  1547. MODULE_DEVICE_TABLE(of, at86rf230_of_match);
  1548. static const struct spi_device_id at86rf230_device_id[] = {
  1549. { .name = "at86rf230", },
  1550. { .name = "at86rf231", },
  1551. { .name = "at86rf233", },
  1552. { .name = "at86rf212", },
  1553. { },
  1554. };
  1555. MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
  1556. static struct spi_driver at86rf230_driver = {
  1557. .id_table = at86rf230_device_id,
  1558. .driver = {
  1559. .of_match_table = of_match_ptr(at86rf230_of_match),
  1560. .name = "at86rf230",
  1561. },
  1562. .probe = at86rf230_probe,
  1563. .remove = at86rf230_remove,
  1564. };
  1565. module_spi_driver(at86rf230_driver);
  1566. MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
  1567. MODULE_LICENSE("GPL v2");