qede_main.c 111 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015 QLogic Corporation
  3. *
  4. * This software is available under the terms of the GNU General Public License
  5. * (GPL) Version 2, available from the file COPYING in the main directory of
  6. * this source tree.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/pci.h>
  10. #include <linux/version.h>
  11. #include <linux/device.h>
  12. #include <linux/netdevice.h>
  13. #include <linux/etherdevice.h>
  14. #include <linux/skbuff.h>
  15. #include <linux/errno.h>
  16. #include <linux/list.h>
  17. #include <linux/string.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/interrupt.h>
  20. #include <asm/byteorder.h>
  21. #include <asm/param.h>
  22. #include <linux/io.h>
  23. #include <linux/netdev_features.h>
  24. #include <linux/udp.h>
  25. #include <linux/tcp.h>
  26. #include <net/udp_tunnel.h>
  27. #include <linux/ip.h>
  28. #include <net/ipv6.h>
  29. #include <net/tcp.h>
  30. #include <linux/if_ether.h>
  31. #include <linux/if_vlan.h>
  32. #include <linux/pkt_sched.h>
  33. #include <linux/ethtool.h>
  34. #include <linux/in.h>
  35. #include <linux/random.h>
  36. #include <net/ip6_checksum.h>
  37. #include <linux/bitops.h>
  38. #include <linux/qed/qede_roce.h>
  39. #include "qede.h"
  40. static char version[] =
  41. "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
  42. MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
  43. MODULE_LICENSE("GPL");
  44. MODULE_VERSION(DRV_MODULE_VERSION);
  45. static uint debug;
  46. module_param(debug, uint, 0);
  47. MODULE_PARM_DESC(debug, " Default debug msglevel");
  48. static const struct qed_eth_ops *qed_ops;
  49. #define CHIP_NUM_57980S_40 0x1634
  50. #define CHIP_NUM_57980S_10 0x1666
  51. #define CHIP_NUM_57980S_MF 0x1636
  52. #define CHIP_NUM_57980S_100 0x1644
  53. #define CHIP_NUM_57980S_50 0x1654
  54. #define CHIP_NUM_57980S_25 0x1656
  55. #define CHIP_NUM_57980S_IOV 0x1664
  56. #ifndef PCI_DEVICE_ID_NX2_57980E
  57. #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
  58. #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
  59. #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
  60. #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
  61. #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
  62. #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
  63. #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
  64. #endif
  65. enum qede_pci_private {
  66. QEDE_PRIVATE_PF,
  67. QEDE_PRIVATE_VF
  68. };
  69. static const struct pci_device_id qede_pci_tbl[] = {
  70. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
  71. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
  72. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
  73. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
  74. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
  75. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
  76. #ifdef CONFIG_QED_SRIOV
  77. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
  78. #endif
  79. { 0 }
  80. };
  81. MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
  82. static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
  83. #define TX_TIMEOUT (5 * HZ)
  84. /* Utilize last protocol index for XDP */
  85. #define XDP_PI 11
  86. static void qede_remove(struct pci_dev *pdev);
  87. static void qede_shutdown(struct pci_dev *pdev);
  88. static void qede_link_update(void *dev, struct qed_link_output *link);
  89. /* The qede lock is used to protect driver state change and driver flows that
  90. * are not reentrant.
  91. */
  92. void __qede_lock(struct qede_dev *edev)
  93. {
  94. mutex_lock(&edev->qede_lock);
  95. }
  96. void __qede_unlock(struct qede_dev *edev)
  97. {
  98. mutex_unlock(&edev->qede_lock);
  99. }
  100. #ifdef CONFIG_QED_SRIOV
  101. static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
  102. __be16 vlan_proto)
  103. {
  104. struct qede_dev *edev = netdev_priv(ndev);
  105. if (vlan > 4095) {
  106. DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
  107. return -EINVAL;
  108. }
  109. if (vlan_proto != htons(ETH_P_8021Q))
  110. return -EPROTONOSUPPORT;
  111. DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
  112. vlan, vf);
  113. return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
  114. }
  115. static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
  116. {
  117. struct qede_dev *edev = netdev_priv(ndev);
  118. DP_VERBOSE(edev, QED_MSG_IOV,
  119. "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
  120. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
  121. if (!is_valid_ether_addr(mac)) {
  122. DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
  123. return -EINVAL;
  124. }
  125. return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
  126. }
  127. static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
  128. {
  129. struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
  130. struct qed_dev_info *qed_info = &edev->dev_info.common;
  131. int rc;
  132. DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
  133. rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
  134. /* Enable/Disable Tx switching for PF */
  135. if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
  136. qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
  137. struct qed_update_vport_params params;
  138. memset(&params, 0, sizeof(params));
  139. params.vport_id = 0;
  140. params.update_tx_switching_flg = 1;
  141. params.tx_switching_flg = num_vfs_param ? 1 : 0;
  142. edev->ops->vport_update(edev->cdev, &params);
  143. }
  144. return rc;
  145. }
  146. #endif
  147. static struct pci_driver qede_pci_driver = {
  148. .name = "qede",
  149. .id_table = qede_pci_tbl,
  150. .probe = qede_probe,
  151. .remove = qede_remove,
  152. .shutdown = qede_shutdown,
  153. #ifdef CONFIG_QED_SRIOV
  154. .sriov_configure = qede_sriov_configure,
  155. #endif
  156. };
  157. static void qede_force_mac(void *dev, u8 *mac, bool forced)
  158. {
  159. struct qede_dev *edev = dev;
  160. /* MAC hints take effect only if we haven't set one already */
  161. if (is_valid_ether_addr(edev->ndev->dev_addr) && !forced)
  162. return;
  163. ether_addr_copy(edev->ndev->dev_addr, mac);
  164. ether_addr_copy(edev->primary_mac, mac);
  165. }
  166. static struct qed_eth_cb_ops qede_ll_ops = {
  167. {
  168. .link_update = qede_link_update,
  169. },
  170. .force_mac = qede_force_mac,
  171. };
  172. static int qede_netdev_event(struct notifier_block *this, unsigned long event,
  173. void *ptr)
  174. {
  175. struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
  176. struct ethtool_drvinfo drvinfo;
  177. struct qede_dev *edev;
  178. if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
  179. goto done;
  180. /* Check whether this is a qede device */
  181. if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
  182. goto done;
  183. memset(&drvinfo, 0, sizeof(drvinfo));
  184. ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
  185. if (strcmp(drvinfo.driver, "qede"))
  186. goto done;
  187. edev = netdev_priv(ndev);
  188. switch (event) {
  189. case NETDEV_CHANGENAME:
  190. /* Notify qed of the name change */
  191. if (!edev->ops || !edev->ops->common)
  192. goto done;
  193. edev->ops->common->set_id(edev->cdev, edev->ndev->name, "qede");
  194. break;
  195. case NETDEV_CHANGEADDR:
  196. edev = netdev_priv(ndev);
  197. qede_roce_event_changeaddr(edev);
  198. break;
  199. }
  200. done:
  201. return NOTIFY_DONE;
  202. }
  203. static struct notifier_block qede_netdev_notifier = {
  204. .notifier_call = qede_netdev_event,
  205. };
  206. static
  207. int __init qede_init(void)
  208. {
  209. int ret;
  210. pr_info("qede_init: %s\n", version);
  211. qed_ops = qed_get_eth_ops();
  212. if (!qed_ops) {
  213. pr_notice("Failed to get qed ethtool operations\n");
  214. return -EINVAL;
  215. }
  216. /* Must register notifier before pci ops, since we might miss
  217. * interface rename after pci probe and netdev registeration.
  218. */
  219. ret = register_netdevice_notifier(&qede_netdev_notifier);
  220. if (ret) {
  221. pr_notice("Failed to register netdevice_notifier\n");
  222. qed_put_eth_ops();
  223. return -EINVAL;
  224. }
  225. ret = pci_register_driver(&qede_pci_driver);
  226. if (ret) {
  227. pr_notice("Failed to register driver\n");
  228. unregister_netdevice_notifier(&qede_netdev_notifier);
  229. qed_put_eth_ops();
  230. return -EINVAL;
  231. }
  232. return 0;
  233. }
  234. static void __exit qede_cleanup(void)
  235. {
  236. if (debug & QED_LOG_INFO_MASK)
  237. pr_info("qede_cleanup called\n");
  238. unregister_netdevice_notifier(&qede_netdev_notifier);
  239. pci_unregister_driver(&qede_pci_driver);
  240. qed_put_eth_ops();
  241. }
  242. module_init(qede_init);
  243. module_exit(qede_cleanup);
  244. /* -------------------------------------------------------------------------
  245. * START OF FAST-PATH
  246. * -------------------------------------------------------------------------
  247. */
  248. /* Unmap the data and free skb */
  249. static int qede_free_tx_pkt(struct qede_dev *edev,
  250. struct qede_tx_queue *txq, int *len)
  251. {
  252. u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
  253. struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
  254. struct eth_tx_1st_bd *first_bd;
  255. struct eth_tx_bd *tx_data_bd;
  256. int bds_consumed = 0;
  257. int nbds;
  258. bool data_split = txq->sw_tx_ring.skbs[idx].flags & QEDE_TSO_SPLIT_BD;
  259. int i, split_bd_len = 0;
  260. if (unlikely(!skb)) {
  261. DP_ERR(edev,
  262. "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
  263. idx, txq->sw_tx_cons, txq->sw_tx_prod);
  264. return -1;
  265. }
  266. *len = skb->len;
  267. first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  268. bds_consumed++;
  269. nbds = first_bd->data.nbds;
  270. if (data_split) {
  271. struct eth_tx_bd *split = (struct eth_tx_bd *)
  272. qed_chain_consume(&txq->tx_pbl);
  273. split_bd_len = BD_UNMAP_LEN(split);
  274. bds_consumed++;
  275. }
  276. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
  277. BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
  278. /* Unmap the data of the skb frags */
  279. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
  280. tx_data_bd = (struct eth_tx_bd *)
  281. qed_chain_consume(&txq->tx_pbl);
  282. dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
  283. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  284. }
  285. while (bds_consumed++ < nbds)
  286. qed_chain_consume(&txq->tx_pbl);
  287. /* Free skb */
  288. dev_kfree_skb_any(skb);
  289. txq->sw_tx_ring.skbs[idx].skb = NULL;
  290. txq->sw_tx_ring.skbs[idx].flags = 0;
  291. return 0;
  292. }
  293. /* Unmap the data and free skb when mapping failed during start_xmit */
  294. static void qede_free_failed_tx_pkt(struct qede_tx_queue *txq,
  295. struct eth_tx_1st_bd *first_bd,
  296. int nbd, bool data_split)
  297. {
  298. u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  299. struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
  300. struct eth_tx_bd *tx_data_bd;
  301. int i, split_bd_len = 0;
  302. /* Return prod to its position before this skb was handled */
  303. qed_chain_set_prod(&txq->tx_pbl,
  304. le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
  305. first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
  306. if (data_split) {
  307. struct eth_tx_bd *split = (struct eth_tx_bd *)
  308. qed_chain_produce(&txq->tx_pbl);
  309. split_bd_len = BD_UNMAP_LEN(split);
  310. nbd--;
  311. }
  312. dma_unmap_single(txq->dev, BD_UNMAP_ADDR(first_bd),
  313. BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
  314. /* Unmap the data of the skb frags */
  315. for (i = 0; i < nbd; i++) {
  316. tx_data_bd = (struct eth_tx_bd *)
  317. qed_chain_produce(&txq->tx_pbl);
  318. if (tx_data_bd->nbytes)
  319. dma_unmap_page(txq->dev,
  320. BD_UNMAP_ADDR(tx_data_bd),
  321. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  322. }
  323. /* Return again prod to its position before this skb was handled */
  324. qed_chain_set_prod(&txq->tx_pbl,
  325. le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
  326. /* Free skb */
  327. dev_kfree_skb_any(skb);
  328. txq->sw_tx_ring.skbs[idx].skb = NULL;
  329. txq->sw_tx_ring.skbs[idx].flags = 0;
  330. }
  331. static u32 qede_xmit_type(struct sk_buff *skb, int *ipv6_ext)
  332. {
  333. u32 rc = XMIT_L4_CSUM;
  334. __be16 l3_proto;
  335. if (skb->ip_summed != CHECKSUM_PARTIAL)
  336. return XMIT_PLAIN;
  337. l3_proto = vlan_get_protocol(skb);
  338. if (l3_proto == htons(ETH_P_IPV6) &&
  339. (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
  340. *ipv6_ext = 1;
  341. if (skb->encapsulation) {
  342. rc |= XMIT_ENC;
  343. if (skb_is_gso(skb)) {
  344. unsigned short gso_type = skb_shinfo(skb)->gso_type;
  345. if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
  346. (gso_type & SKB_GSO_GRE_CSUM))
  347. rc |= XMIT_ENC_GSO_L4_CSUM;
  348. rc |= XMIT_LSO;
  349. return rc;
  350. }
  351. }
  352. if (skb_is_gso(skb))
  353. rc |= XMIT_LSO;
  354. return rc;
  355. }
  356. static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
  357. struct eth_tx_2nd_bd *second_bd,
  358. struct eth_tx_3rd_bd *third_bd)
  359. {
  360. u8 l4_proto;
  361. u16 bd2_bits1 = 0, bd2_bits2 = 0;
  362. bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
  363. bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
  364. ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
  365. << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
  366. bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
  367. ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
  368. if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
  369. l4_proto = ipv6_hdr(skb)->nexthdr;
  370. else
  371. l4_proto = ip_hdr(skb)->protocol;
  372. if (l4_proto == IPPROTO_UDP)
  373. bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
  374. if (third_bd)
  375. third_bd->data.bitfields |=
  376. cpu_to_le16(((tcp_hdrlen(skb) / 4) &
  377. ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
  378. ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
  379. second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
  380. second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
  381. }
  382. static int map_frag_to_bd(struct qede_tx_queue *txq,
  383. skb_frag_t *frag, struct eth_tx_bd *bd)
  384. {
  385. dma_addr_t mapping;
  386. /* Map skb non-linear frag data for DMA */
  387. mapping = skb_frag_dma_map(txq->dev, frag, 0,
  388. skb_frag_size(frag), DMA_TO_DEVICE);
  389. if (unlikely(dma_mapping_error(txq->dev, mapping)))
  390. return -ENOMEM;
  391. /* Setup the data pointer of the frag data */
  392. BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
  393. return 0;
  394. }
  395. static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
  396. {
  397. if (is_encap_pkt)
  398. return (skb_inner_transport_header(skb) +
  399. inner_tcp_hdrlen(skb) - skb->data);
  400. else
  401. return (skb_transport_header(skb) +
  402. tcp_hdrlen(skb) - skb->data);
  403. }
  404. /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
  405. #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
  406. static bool qede_pkt_req_lin(struct sk_buff *skb, u8 xmit_type)
  407. {
  408. int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
  409. if (xmit_type & XMIT_LSO) {
  410. int hlen;
  411. hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
  412. /* linear payload would require its own BD */
  413. if (skb_headlen(skb) > hlen)
  414. allowed_frags--;
  415. }
  416. return (skb_shinfo(skb)->nr_frags > allowed_frags);
  417. }
  418. #endif
  419. static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
  420. {
  421. /* wmb makes sure that the BDs data is updated before updating the
  422. * producer, otherwise FW may read old data from the BDs.
  423. */
  424. wmb();
  425. barrier();
  426. writel(txq->tx_db.raw, txq->doorbell_addr);
  427. /* mmiowb is needed to synchronize doorbell writes from more than one
  428. * processor. It guarantees that the write arrives to the device before
  429. * the queue lock is released and another start_xmit is called (possibly
  430. * on another CPU). Without this barrier, the next doorbell can bypass
  431. * this doorbell. This is applicable to IA64/Altix systems.
  432. */
  433. mmiowb();
  434. }
  435. static int qede_xdp_xmit(struct qede_dev *edev, struct qede_fastpath *fp,
  436. struct sw_rx_data *metadata, u16 padding, u16 length)
  437. {
  438. struct qede_tx_queue *txq = fp->xdp_tx;
  439. u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  440. struct eth_tx_1st_bd *first_bd;
  441. if (!qed_chain_get_elem_left(&txq->tx_pbl)) {
  442. txq->stopped_cnt++;
  443. return -ENOMEM;
  444. }
  445. first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
  446. memset(first_bd, 0, sizeof(*first_bd));
  447. first_bd->data.bd_flags.bitfields =
  448. BIT(ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT);
  449. first_bd->data.bitfields |=
  450. (length & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
  451. ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
  452. first_bd->data.nbds = 1;
  453. /* We can safely ignore the offset, as it's 0 for XDP */
  454. BD_SET_UNMAP_ADDR_LEN(first_bd, metadata->mapping + padding, length);
  455. /* Synchronize the buffer back to device, as program [probably]
  456. * has changed it.
  457. */
  458. dma_sync_single_for_device(&edev->pdev->dev,
  459. metadata->mapping + padding,
  460. length, PCI_DMA_TODEVICE);
  461. txq->sw_tx_ring.pages[idx] = metadata->data;
  462. txq->sw_tx_prod++;
  463. /* Mark the fastpath for future XDP doorbell */
  464. fp->xdp_xmit = 1;
  465. return 0;
  466. }
  467. /* Main transmit function */
  468. static netdev_tx_t qede_start_xmit(struct sk_buff *skb,
  469. struct net_device *ndev)
  470. {
  471. struct qede_dev *edev = netdev_priv(ndev);
  472. struct netdev_queue *netdev_txq;
  473. struct qede_tx_queue *txq;
  474. struct eth_tx_1st_bd *first_bd;
  475. struct eth_tx_2nd_bd *second_bd = NULL;
  476. struct eth_tx_3rd_bd *third_bd = NULL;
  477. struct eth_tx_bd *tx_data_bd = NULL;
  478. u16 txq_index;
  479. u8 nbd = 0;
  480. dma_addr_t mapping;
  481. int rc, frag_idx = 0, ipv6_ext = 0;
  482. u8 xmit_type;
  483. u16 idx;
  484. u16 hlen;
  485. bool data_split = false;
  486. /* Get tx-queue context and netdev index */
  487. txq_index = skb_get_queue_mapping(skb);
  488. WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
  489. txq = edev->fp_array[edev->fp_num_rx + txq_index].txq;
  490. netdev_txq = netdev_get_tx_queue(ndev, txq_index);
  491. WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
  492. xmit_type = qede_xmit_type(skb, &ipv6_ext);
  493. #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
  494. if (qede_pkt_req_lin(skb, xmit_type)) {
  495. if (skb_linearize(skb)) {
  496. DP_NOTICE(edev,
  497. "SKB linearization failed - silently dropping this SKB\n");
  498. dev_kfree_skb_any(skb);
  499. return NETDEV_TX_OK;
  500. }
  501. }
  502. #endif
  503. /* Fill the entry in the SW ring and the BDs in the FW ring */
  504. idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  505. txq->sw_tx_ring.skbs[idx].skb = skb;
  506. first_bd = (struct eth_tx_1st_bd *)
  507. qed_chain_produce(&txq->tx_pbl);
  508. memset(first_bd, 0, sizeof(*first_bd));
  509. first_bd->data.bd_flags.bitfields =
  510. 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
  511. /* Map skb linear data for DMA and set in the first BD */
  512. mapping = dma_map_single(txq->dev, skb->data,
  513. skb_headlen(skb), DMA_TO_DEVICE);
  514. if (unlikely(dma_mapping_error(txq->dev, mapping))) {
  515. DP_NOTICE(edev, "SKB mapping failed\n");
  516. qede_free_failed_tx_pkt(txq, first_bd, 0, false);
  517. qede_update_tx_producer(txq);
  518. return NETDEV_TX_OK;
  519. }
  520. nbd++;
  521. BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
  522. /* In case there is IPv6 with extension headers or LSO we need 2nd and
  523. * 3rd BDs.
  524. */
  525. if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
  526. second_bd = (struct eth_tx_2nd_bd *)
  527. qed_chain_produce(&txq->tx_pbl);
  528. memset(second_bd, 0, sizeof(*second_bd));
  529. nbd++;
  530. third_bd = (struct eth_tx_3rd_bd *)
  531. qed_chain_produce(&txq->tx_pbl);
  532. memset(third_bd, 0, sizeof(*third_bd));
  533. nbd++;
  534. /* We need to fill in additional data in second_bd... */
  535. tx_data_bd = (struct eth_tx_bd *)second_bd;
  536. }
  537. if (skb_vlan_tag_present(skb)) {
  538. first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
  539. first_bd->data.bd_flags.bitfields |=
  540. 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
  541. }
  542. /* Fill the parsing flags & params according to the requested offload */
  543. if (xmit_type & XMIT_L4_CSUM) {
  544. /* We don't re-calculate IP checksum as it is already done by
  545. * the upper stack
  546. */
  547. first_bd->data.bd_flags.bitfields |=
  548. 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
  549. if (xmit_type & XMIT_ENC) {
  550. first_bd->data.bd_flags.bitfields |=
  551. 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
  552. first_bd->data.bitfields |=
  553. 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
  554. }
  555. /* Legacy FW had flipped behavior in regard to this bit -
  556. * I.e., needed to set to prevent FW from touching encapsulated
  557. * packets when it didn't need to.
  558. */
  559. if (unlikely(txq->is_legacy))
  560. first_bd->data.bitfields ^=
  561. 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
  562. /* If the packet is IPv6 with extension header, indicate that
  563. * to FW and pass few params, since the device cracker doesn't
  564. * support parsing IPv6 with extension header/s.
  565. */
  566. if (unlikely(ipv6_ext))
  567. qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
  568. }
  569. if (xmit_type & XMIT_LSO) {
  570. first_bd->data.bd_flags.bitfields |=
  571. (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
  572. third_bd->data.lso_mss =
  573. cpu_to_le16(skb_shinfo(skb)->gso_size);
  574. if (unlikely(xmit_type & XMIT_ENC)) {
  575. first_bd->data.bd_flags.bitfields |=
  576. 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
  577. if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
  578. u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
  579. first_bd->data.bd_flags.bitfields |= 1 << tmp;
  580. }
  581. hlen = qede_get_skb_hlen(skb, true);
  582. } else {
  583. first_bd->data.bd_flags.bitfields |=
  584. 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
  585. hlen = qede_get_skb_hlen(skb, false);
  586. }
  587. /* @@@TBD - if will not be removed need to check */
  588. third_bd->data.bitfields |=
  589. cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
  590. /* Make life easier for FW guys who can't deal with header and
  591. * data on same BD. If we need to split, use the second bd...
  592. */
  593. if (unlikely(skb_headlen(skb) > hlen)) {
  594. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  595. "TSO split header size is %d (%x:%x)\n",
  596. first_bd->nbytes, first_bd->addr.hi,
  597. first_bd->addr.lo);
  598. mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
  599. le32_to_cpu(first_bd->addr.lo)) +
  600. hlen;
  601. BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
  602. le16_to_cpu(first_bd->nbytes) -
  603. hlen);
  604. /* this marks the BD as one that has no
  605. * individual mapping
  606. */
  607. txq->sw_tx_ring.skbs[idx].flags |= QEDE_TSO_SPLIT_BD;
  608. first_bd->nbytes = cpu_to_le16(hlen);
  609. tx_data_bd = (struct eth_tx_bd *)third_bd;
  610. data_split = true;
  611. }
  612. } else {
  613. first_bd->data.bitfields |=
  614. (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
  615. ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
  616. }
  617. /* Handle fragmented skb */
  618. /* special handle for frags inside 2nd and 3rd bds.. */
  619. while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
  620. rc = map_frag_to_bd(txq,
  621. &skb_shinfo(skb)->frags[frag_idx],
  622. tx_data_bd);
  623. if (rc) {
  624. qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
  625. qede_update_tx_producer(txq);
  626. return NETDEV_TX_OK;
  627. }
  628. if (tx_data_bd == (struct eth_tx_bd *)second_bd)
  629. tx_data_bd = (struct eth_tx_bd *)third_bd;
  630. else
  631. tx_data_bd = NULL;
  632. frag_idx++;
  633. }
  634. /* map last frags into 4th, 5th .... */
  635. for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
  636. tx_data_bd = (struct eth_tx_bd *)
  637. qed_chain_produce(&txq->tx_pbl);
  638. memset(tx_data_bd, 0, sizeof(*tx_data_bd));
  639. rc = map_frag_to_bd(txq,
  640. &skb_shinfo(skb)->frags[frag_idx],
  641. tx_data_bd);
  642. if (rc) {
  643. qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
  644. qede_update_tx_producer(txq);
  645. return NETDEV_TX_OK;
  646. }
  647. }
  648. /* update the first BD with the actual num BDs */
  649. first_bd->data.nbds = nbd;
  650. netdev_tx_sent_queue(netdev_txq, skb->len);
  651. skb_tx_timestamp(skb);
  652. /* Advance packet producer only before sending the packet since mapping
  653. * of pages may fail.
  654. */
  655. txq->sw_tx_prod++;
  656. /* 'next page' entries are counted in the producer value */
  657. txq->tx_db.data.bd_prod =
  658. cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
  659. if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
  660. qede_update_tx_producer(txq);
  661. if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
  662. < (MAX_SKB_FRAGS + 1))) {
  663. if (skb->xmit_more)
  664. qede_update_tx_producer(txq);
  665. netif_tx_stop_queue(netdev_txq);
  666. txq->stopped_cnt++;
  667. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  668. "Stop queue was called\n");
  669. /* paired memory barrier is in qede_tx_int(), we have to keep
  670. * ordering of set_bit() in netif_tx_stop_queue() and read of
  671. * fp->bd_tx_cons
  672. */
  673. smp_mb();
  674. if (qed_chain_get_elem_left(&txq->tx_pbl)
  675. >= (MAX_SKB_FRAGS + 1) &&
  676. (edev->state == QEDE_STATE_OPEN)) {
  677. netif_tx_wake_queue(netdev_txq);
  678. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  679. "Wake queue was called\n");
  680. }
  681. }
  682. return NETDEV_TX_OK;
  683. }
  684. int qede_txq_has_work(struct qede_tx_queue *txq)
  685. {
  686. u16 hw_bd_cons;
  687. /* Tell compiler that consumer and producer can change */
  688. barrier();
  689. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  690. if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
  691. return 0;
  692. return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
  693. }
  694. static void qede_xdp_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
  695. {
  696. struct eth_tx_1st_bd *bd;
  697. u16 hw_bd_cons;
  698. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  699. barrier();
  700. while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
  701. bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  702. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(bd),
  703. PAGE_SIZE, DMA_BIDIRECTIONAL);
  704. __free_page(txq->sw_tx_ring.pages[txq->sw_tx_cons &
  705. NUM_TX_BDS_MAX]);
  706. txq->sw_tx_cons++;
  707. txq->xmit_pkts++;
  708. }
  709. }
  710. static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
  711. {
  712. struct netdev_queue *netdev_txq;
  713. u16 hw_bd_cons;
  714. unsigned int pkts_compl = 0, bytes_compl = 0;
  715. int rc;
  716. netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
  717. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  718. barrier();
  719. while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
  720. int len = 0;
  721. rc = qede_free_tx_pkt(edev, txq, &len);
  722. if (rc) {
  723. DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
  724. hw_bd_cons,
  725. qed_chain_get_cons_idx(&txq->tx_pbl));
  726. break;
  727. }
  728. bytes_compl += len;
  729. pkts_compl++;
  730. txq->sw_tx_cons++;
  731. txq->xmit_pkts++;
  732. }
  733. netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
  734. /* Need to make the tx_bd_cons update visible to start_xmit()
  735. * before checking for netif_tx_queue_stopped(). Without the
  736. * memory barrier, there is a small possibility that
  737. * start_xmit() will miss it and cause the queue to be stopped
  738. * forever.
  739. * On the other hand we need an rmb() here to ensure the proper
  740. * ordering of bit testing in the following
  741. * netif_tx_queue_stopped(txq) call.
  742. */
  743. smp_mb();
  744. if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
  745. /* Taking tx_lock is needed to prevent reenabling the queue
  746. * while it's empty. This could have happen if rx_action() gets
  747. * suspended in qede_tx_int() after the condition before
  748. * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
  749. *
  750. * stops the queue->sees fresh tx_bd_cons->releases the queue->
  751. * sends some packets consuming the whole queue again->
  752. * stops the queue
  753. */
  754. __netif_tx_lock(netdev_txq, smp_processor_id());
  755. if ((netif_tx_queue_stopped(netdev_txq)) &&
  756. (edev->state == QEDE_STATE_OPEN) &&
  757. (qed_chain_get_elem_left(&txq->tx_pbl)
  758. >= (MAX_SKB_FRAGS + 1))) {
  759. netif_tx_wake_queue(netdev_txq);
  760. DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
  761. "Wake queue was called\n");
  762. }
  763. __netif_tx_unlock(netdev_txq);
  764. }
  765. return 0;
  766. }
  767. bool qede_has_rx_work(struct qede_rx_queue *rxq)
  768. {
  769. u16 hw_comp_cons, sw_comp_cons;
  770. /* Tell compiler that status block fields can change */
  771. barrier();
  772. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  773. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  774. return hw_comp_cons != sw_comp_cons;
  775. }
  776. static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
  777. {
  778. qed_chain_consume(&rxq->rx_bd_ring);
  779. rxq->sw_rx_cons++;
  780. }
  781. /* This function reuses the buffer(from an offset) from
  782. * consumer index to producer index in the bd ring
  783. */
  784. static inline void qede_reuse_page(struct qede_rx_queue *rxq,
  785. struct sw_rx_data *curr_cons)
  786. {
  787. struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
  788. struct sw_rx_data *curr_prod;
  789. dma_addr_t new_mapping;
  790. curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  791. *curr_prod = *curr_cons;
  792. new_mapping = curr_prod->mapping + curr_prod->page_offset;
  793. rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
  794. rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
  795. rxq->sw_rx_prod++;
  796. curr_cons->data = NULL;
  797. }
  798. /* In case of allocation failures reuse buffers
  799. * from consumer index to produce buffers for firmware
  800. */
  801. void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count)
  802. {
  803. struct sw_rx_data *curr_cons;
  804. for (; count > 0; count--) {
  805. curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
  806. qede_reuse_page(rxq, curr_cons);
  807. qede_rx_bd_ring_consume(rxq);
  808. }
  809. }
  810. static int qede_alloc_rx_buffer(struct qede_rx_queue *rxq)
  811. {
  812. struct sw_rx_data *sw_rx_data;
  813. struct eth_rx_bd *rx_bd;
  814. dma_addr_t mapping;
  815. struct page *data;
  816. data = alloc_pages(GFP_ATOMIC, 0);
  817. if (unlikely(!data))
  818. return -ENOMEM;
  819. /* Map the entire page as it would be used
  820. * for multiple RX buffer segment size mapping.
  821. */
  822. mapping = dma_map_page(rxq->dev, data, 0,
  823. PAGE_SIZE, rxq->data_direction);
  824. if (unlikely(dma_mapping_error(rxq->dev, mapping))) {
  825. __free_page(data);
  826. return -ENOMEM;
  827. }
  828. sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  829. sw_rx_data->page_offset = 0;
  830. sw_rx_data->data = data;
  831. sw_rx_data->mapping = mapping;
  832. /* Advance PROD and get BD pointer */
  833. rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
  834. WARN_ON(!rx_bd);
  835. rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
  836. rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
  837. rxq->sw_rx_prod++;
  838. return 0;
  839. }
  840. static inline int qede_realloc_rx_buffer(struct qede_rx_queue *rxq,
  841. struct sw_rx_data *curr_cons)
  842. {
  843. /* Move to the next segment in the page */
  844. curr_cons->page_offset += rxq->rx_buf_seg_size;
  845. if (curr_cons->page_offset == PAGE_SIZE) {
  846. if (unlikely(qede_alloc_rx_buffer(rxq))) {
  847. /* Since we failed to allocate new buffer
  848. * current buffer can be used again.
  849. */
  850. curr_cons->page_offset -= rxq->rx_buf_seg_size;
  851. return -ENOMEM;
  852. }
  853. dma_unmap_page(rxq->dev, curr_cons->mapping,
  854. PAGE_SIZE, rxq->data_direction);
  855. } else {
  856. /* Increment refcount of the page as we don't want
  857. * network stack to take the ownership of the page
  858. * which can be recycled multiple times by the driver.
  859. */
  860. page_ref_inc(curr_cons->data);
  861. qede_reuse_page(rxq, curr_cons);
  862. }
  863. return 0;
  864. }
  865. void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
  866. {
  867. u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
  868. u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
  869. struct eth_rx_prod_data rx_prods = {0};
  870. /* Update producers */
  871. rx_prods.bd_prod = cpu_to_le16(bd_prod);
  872. rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
  873. /* Make sure that the BD and SGE data is updated before updating the
  874. * producers since FW might read the BD/SGE right after the producer
  875. * is updated.
  876. */
  877. wmb();
  878. internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
  879. (u32 *)&rx_prods);
  880. /* mmiowb is needed to synchronize doorbell writes from more than one
  881. * processor. It guarantees that the write arrives to the device before
  882. * the napi lock is released and another qede_poll is called (possibly
  883. * on another CPU). Without this barrier, the next doorbell can bypass
  884. * this doorbell. This is applicable to IA64/Altix systems.
  885. */
  886. mmiowb();
  887. }
  888. static void qede_get_rxhash(struct sk_buff *skb, u8 bitfields, __le32 rss_hash)
  889. {
  890. enum pkt_hash_types hash_type = PKT_HASH_TYPE_NONE;
  891. enum rss_hash_type htype;
  892. u32 hash = 0;
  893. htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
  894. if (htype) {
  895. hash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
  896. (htype == RSS_HASH_TYPE_IPV6)) ?
  897. PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
  898. hash = le32_to_cpu(rss_hash);
  899. }
  900. skb_set_hash(skb, hash, hash_type);
  901. }
  902. static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
  903. {
  904. skb_checksum_none_assert(skb);
  905. if (csum_flag & QEDE_CSUM_UNNECESSARY)
  906. skb->ip_summed = CHECKSUM_UNNECESSARY;
  907. if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
  908. skb->csum_level = 1;
  909. }
  910. static inline void qede_skb_receive(struct qede_dev *edev,
  911. struct qede_fastpath *fp,
  912. struct qede_rx_queue *rxq,
  913. struct sk_buff *skb, u16 vlan_tag)
  914. {
  915. if (vlan_tag)
  916. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
  917. napi_gro_receive(&fp->napi, skb);
  918. fp->rxq->rcv_pkts++;
  919. }
  920. static void qede_set_gro_params(struct qede_dev *edev,
  921. struct sk_buff *skb,
  922. struct eth_fast_path_rx_tpa_start_cqe *cqe)
  923. {
  924. u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
  925. if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
  926. PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
  927. skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
  928. else
  929. skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
  930. skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
  931. cqe->header_len;
  932. }
  933. static int qede_fill_frag_skb(struct qede_dev *edev,
  934. struct qede_rx_queue *rxq,
  935. u8 tpa_agg_index, u16 len_on_bd)
  936. {
  937. struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
  938. NUM_RX_BDS_MAX];
  939. struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
  940. struct sk_buff *skb = tpa_info->skb;
  941. if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
  942. goto out;
  943. /* Add one frag and update the appropriate fields in the skb */
  944. skb_fill_page_desc(skb, tpa_info->frag_id++,
  945. current_bd->data, current_bd->page_offset,
  946. len_on_bd);
  947. if (unlikely(qede_realloc_rx_buffer(rxq, current_bd))) {
  948. /* Incr page ref count to reuse on allocation failure
  949. * so that it doesn't get freed while freeing SKB.
  950. */
  951. page_ref_inc(current_bd->data);
  952. goto out;
  953. }
  954. qed_chain_consume(&rxq->rx_bd_ring);
  955. rxq->sw_rx_cons++;
  956. skb->data_len += len_on_bd;
  957. skb->truesize += rxq->rx_buf_seg_size;
  958. skb->len += len_on_bd;
  959. return 0;
  960. out:
  961. tpa_info->state = QEDE_AGG_STATE_ERROR;
  962. qede_recycle_rx_bd_ring(rxq, 1);
  963. return -ENOMEM;
  964. }
  965. static void qede_tpa_start(struct qede_dev *edev,
  966. struct qede_rx_queue *rxq,
  967. struct eth_fast_path_rx_tpa_start_cqe *cqe)
  968. {
  969. struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
  970. struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
  971. struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
  972. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  973. dma_addr_t mapping = tpa_info->buffer_mapping;
  974. struct sw_rx_data *sw_rx_data_cons;
  975. struct sw_rx_data *sw_rx_data_prod;
  976. sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
  977. sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  978. /* Use pre-allocated replacement buffer - we can't release the agg.
  979. * start until its over and we don't want to risk allocation failing
  980. * here, so re-allocate when aggregation will be over.
  981. */
  982. sw_rx_data_prod->mapping = replace_buf->mapping;
  983. sw_rx_data_prod->data = replace_buf->data;
  984. rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
  985. rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
  986. sw_rx_data_prod->page_offset = replace_buf->page_offset;
  987. rxq->sw_rx_prod++;
  988. /* move partial skb from cons to pool (don't unmap yet)
  989. * save mapping, incase we drop the packet later on.
  990. */
  991. tpa_info->buffer = *sw_rx_data_cons;
  992. mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
  993. le32_to_cpu(rx_bd_cons->addr.lo));
  994. tpa_info->buffer_mapping = mapping;
  995. rxq->sw_rx_cons++;
  996. /* set tpa state to start only if we are able to allocate skb
  997. * for this aggregation, otherwise mark as error and aggregation will
  998. * be dropped
  999. */
  1000. tpa_info->skb = netdev_alloc_skb(edev->ndev,
  1001. le16_to_cpu(cqe->len_on_first_bd));
  1002. if (unlikely(!tpa_info->skb)) {
  1003. DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
  1004. tpa_info->state = QEDE_AGG_STATE_ERROR;
  1005. goto cons_buf;
  1006. }
  1007. /* Start filling in the aggregation info */
  1008. skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
  1009. tpa_info->frag_id = 0;
  1010. tpa_info->state = QEDE_AGG_STATE_START;
  1011. /* Store some information from first CQE */
  1012. tpa_info->start_cqe_placement_offset = cqe->placement_offset;
  1013. tpa_info->start_cqe_bd_len = le16_to_cpu(cqe->len_on_first_bd);
  1014. if ((le16_to_cpu(cqe->pars_flags.flags) >>
  1015. PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
  1016. PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
  1017. tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
  1018. else
  1019. tpa_info->vlan_tag = 0;
  1020. qede_get_rxhash(tpa_info->skb, cqe->bitfields, cqe->rss_hash);
  1021. /* This is needed in order to enable forwarding support */
  1022. qede_set_gro_params(edev, tpa_info->skb, cqe);
  1023. cons_buf: /* We still need to handle bd_len_list to consume buffers */
  1024. if (likely(cqe->ext_bd_len_list[0]))
  1025. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  1026. le16_to_cpu(cqe->ext_bd_len_list[0]));
  1027. if (unlikely(cqe->ext_bd_len_list[1])) {
  1028. DP_ERR(edev,
  1029. "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
  1030. tpa_info->state = QEDE_AGG_STATE_ERROR;
  1031. }
  1032. }
  1033. #ifdef CONFIG_INET
  1034. static void qede_gro_ip_csum(struct sk_buff *skb)
  1035. {
  1036. const struct iphdr *iph = ip_hdr(skb);
  1037. struct tcphdr *th;
  1038. skb_set_transport_header(skb, sizeof(struct iphdr));
  1039. th = tcp_hdr(skb);
  1040. th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
  1041. iph->saddr, iph->daddr, 0);
  1042. tcp_gro_complete(skb);
  1043. }
  1044. static void qede_gro_ipv6_csum(struct sk_buff *skb)
  1045. {
  1046. struct ipv6hdr *iph = ipv6_hdr(skb);
  1047. struct tcphdr *th;
  1048. skb_set_transport_header(skb, sizeof(struct ipv6hdr));
  1049. th = tcp_hdr(skb);
  1050. th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
  1051. &iph->saddr, &iph->daddr, 0);
  1052. tcp_gro_complete(skb);
  1053. }
  1054. #endif
  1055. static void qede_gro_receive(struct qede_dev *edev,
  1056. struct qede_fastpath *fp,
  1057. struct sk_buff *skb,
  1058. u16 vlan_tag)
  1059. {
  1060. /* FW can send a single MTU sized packet from gro flow
  1061. * due to aggregation timeout/last segment etc. which
  1062. * is not expected to be a gro packet. If a skb has zero
  1063. * frags then simply push it in the stack as non gso skb.
  1064. */
  1065. if (unlikely(!skb->data_len)) {
  1066. skb_shinfo(skb)->gso_type = 0;
  1067. skb_shinfo(skb)->gso_size = 0;
  1068. goto send_skb;
  1069. }
  1070. #ifdef CONFIG_INET
  1071. if (skb_shinfo(skb)->gso_size) {
  1072. skb_reset_network_header(skb);
  1073. switch (skb->protocol) {
  1074. case htons(ETH_P_IP):
  1075. qede_gro_ip_csum(skb);
  1076. break;
  1077. case htons(ETH_P_IPV6):
  1078. qede_gro_ipv6_csum(skb);
  1079. break;
  1080. default:
  1081. DP_ERR(edev,
  1082. "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
  1083. ntohs(skb->protocol));
  1084. }
  1085. }
  1086. #endif
  1087. send_skb:
  1088. skb_record_rx_queue(skb, fp->rxq->rxq_id);
  1089. qede_skb_receive(edev, fp, fp->rxq, skb, vlan_tag);
  1090. }
  1091. static inline void qede_tpa_cont(struct qede_dev *edev,
  1092. struct qede_rx_queue *rxq,
  1093. struct eth_fast_path_rx_tpa_cont_cqe *cqe)
  1094. {
  1095. int i;
  1096. for (i = 0; cqe->len_list[i]; i++)
  1097. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  1098. le16_to_cpu(cqe->len_list[i]));
  1099. if (unlikely(i > 1))
  1100. DP_ERR(edev,
  1101. "Strange - TPA cont with more than a single len_list entry\n");
  1102. }
  1103. static void qede_tpa_end(struct qede_dev *edev,
  1104. struct qede_fastpath *fp,
  1105. struct eth_fast_path_rx_tpa_end_cqe *cqe)
  1106. {
  1107. struct qede_rx_queue *rxq = fp->rxq;
  1108. struct qede_agg_info *tpa_info;
  1109. struct sk_buff *skb;
  1110. int i;
  1111. tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
  1112. skb = tpa_info->skb;
  1113. for (i = 0; cqe->len_list[i]; i++)
  1114. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  1115. le16_to_cpu(cqe->len_list[i]));
  1116. if (unlikely(i > 1))
  1117. DP_ERR(edev,
  1118. "Strange - TPA emd with more than a single len_list entry\n");
  1119. if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
  1120. goto err;
  1121. /* Sanity */
  1122. if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
  1123. DP_ERR(edev,
  1124. "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
  1125. cqe->num_of_bds, tpa_info->frag_id);
  1126. if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
  1127. DP_ERR(edev,
  1128. "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
  1129. le16_to_cpu(cqe->total_packet_len), skb->len);
  1130. memcpy(skb->data,
  1131. page_address(tpa_info->buffer.data) +
  1132. tpa_info->start_cqe_placement_offset +
  1133. tpa_info->buffer.page_offset, tpa_info->start_cqe_bd_len);
  1134. /* Finalize the SKB */
  1135. skb->protocol = eth_type_trans(skb, edev->ndev);
  1136. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1137. /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
  1138. * to skb_shinfo(skb)->gso_segs
  1139. */
  1140. NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
  1141. qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
  1142. tpa_info->state = QEDE_AGG_STATE_NONE;
  1143. return;
  1144. err:
  1145. tpa_info->state = QEDE_AGG_STATE_NONE;
  1146. dev_kfree_skb_any(tpa_info->skb);
  1147. tpa_info->skb = NULL;
  1148. }
  1149. static bool qede_tunn_exist(u16 flag)
  1150. {
  1151. return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
  1152. PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
  1153. }
  1154. static u8 qede_check_tunn_csum(u16 flag)
  1155. {
  1156. u16 csum_flag = 0;
  1157. u8 tcsum = 0;
  1158. if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
  1159. PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
  1160. csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
  1161. PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
  1162. if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
  1163. PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
  1164. csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
  1165. PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
  1166. tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
  1167. }
  1168. csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
  1169. PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
  1170. PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
  1171. PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
  1172. if (csum_flag & flag)
  1173. return QEDE_CSUM_ERROR;
  1174. return QEDE_CSUM_UNNECESSARY | tcsum;
  1175. }
  1176. static u8 qede_check_notunn_csum(u16 flag)
  1177. {
  1178. u16 csum_flag = 0;
  1179. u8 csum = 0;
  1180. if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
  1181. PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
  1182. csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
  1183. PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
  1184. csum = QEDE_CSUM_UNNECESSARY;
  1185. }
  1186. csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
  1187. PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
  1188. if (csum_flag & flag)
  1189. return QEDE_CSUM_ERROR;
  1190. return csum;
  1191. }
  1192. static u8 qede_check_csum(u16 flag)
  1193. {
  1194. if (!qede_tunn_exist(flag))
  1195. return qede_check_notunn_csum(flag);
  1196. else
  1197. return qede_check_tunn_csum(flag);
  1198. }
  1199. static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
  1200. u16 flag)
  1201. {
  1202. u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
  1203. if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
  1204. ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
  1205. (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
  1206. PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
  1207. return true;
  1208. return false;
  1209. }
  1210. /* Return true iff packet is to be passed to stack */
  1211. static bool qede_rx_xdp(struct qede_dev *edev,
  1212. struct qede_fastpath *fp,
  1213. struct qede_rx_queue *rxq,
  1214. struct bpf_prog *prog,
  1215. struct sw_rx_data *bd,
  1216. struct eth_fast_path_rx_reg_cqe *cqe)
  1217. {
  1218. u16 len = le16_to_cpu(cqe->len_on_first_bd);
  1219. struct xdp_buff xdp;
  1220. enum xdp_action act;
  1221. xdp.data = page_address(bd->data) + cqe->placement_offset;
  1222. xdp.data_end = xdp.data + len;
  1223. /* Queues always have a full reset currently, so for the time
  1224. * being until there's atomic program replace just mark read
  1225. * side for map helpers.
  1226. */
  1227. rcu_read_lock();
  1228. act = bpf_prog_run_xdp(prog, &xdp);
  1229. rcu_read_unlock();
  1230. if (act == XDP_PASS)
  1231. return true;
  1232. /* Count number of packets not to be passed to stack */
  1233. rxq->xdp_no_pass++;
  1234. switch (act) {
  1235. case XDP_TX:
  1236. /* We need the replacement buffer before transmit. */
  1237. if (qede_alloc_rx_buffer(rxq)) {
  1238. qede_recycle_rx_bd_ring(rxq, 1);
  1239. return false;
  1240. }
  1241. /* Now if there's a transmission problem, we'd still have to
  1242. * throw current buffer, as replacement was already allocated.
  1243. */
  1244. if (qede_xdp_xmit(edev, fp, bd, cqe->placement_offset, len)) {
  1245. dma_unmap_page(rxq->dev, bd->mapping,
  1246. PAGE_SIZE, DMA_BIDIRECTIONAL);
  1247. __free_page(bd->data);
  1248. }
  1249. /* Regardless, we've consumed an Rx BD */
  1250. qede_rx_bd_ring_consume(rxq);
  1251. return false;
  1252. default:
  1253. bpf_warn_invalid_xdp_action(act);
  1254. case XDP_ABORTED:
  1255. case XDP_DROP:
  1256. qede_recycle_rx_bd_ring(rxq, cqe->bd_num);
  1257. }
  1258. return false;
  1259. }
  1260. static struct sk_buff *qede_rx_allocate_skb(struct qede_dev *edev,
  1261. struct qede_rx_queue *rxq,
  1262. struct sw_rx_data *bd, u16 len,
  1263. u16 pad)
  1264. {
  1265. unsigned int offset = bd->page_offset;
  1266. struct skb_frag_struct *frag;
  1267. struct page *page = bd->data;
  1268. unsigned int pull_len;
  1269. struct sk_buff *skb;
  1270. unsigned char *va;
  1271. /* Allocate a new SKB with a sufficient large header len */
  1272. skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
  1273. if (unlikely(!skb))
  1274. return NULL;
  1275. /* Copy data into SKB - if it's small, we can simply copy it and
  1276. * re-use the already allcoated & mapped memory.
  1277. */
  1278. if (len + pad <= edev->rx_copybreak) {
  1279. memcpy(skb_put(skb, len),
  1280. page_address(page) + pad + offset, len);
  1281. qede_reuse_page(rxq, bd);
  1282. goto out;
  1283. }
  1284. frag = &skb_shinfo(skb)->frags[0];
  1285. skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
  1286. page, pad + offset, len, rxq->rx_buf_seg_size);
  1287. va = skb_frag_address(frag);
  1288. pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
  1289. /* Align the pull_len to optimize memcpy */
  1290. memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
  1291. /* Correct the skb & frag sizes offset after the pull */
  1292. skb_frag_size_sub(frag, pull_len);
  1293. frag->page_offset += pull_len;
  1294. skb->data_len -= pull_len;
  1295. skb->tail += pull_len;
  1296. if (unlikely(qede_realloc_rx_buffer(rxq, bd))) {
  1297. /* Incr page ref count to reuse on allocation failure so
  1298. * that it doesn't get freed while freeing SKB [as its
  1299. * already mapped there].
  1300. */
  1301. page_ref_inc(page);
  1302. dev_kfree_skb_any(skb);
  1303. return NULL;
  1304. }
  1305. out:
  1306. /* We've consumed the first BD and prepared an SKB */
  1307. qede_rx_bd_ring_consume(rxq);
  1308. return skb;
  1309. }
  1310. static int qede_rx_build_jumbo(struct qede_dev *edev,
  1311. struct qede_rx_queue *rxq,
  1312. struct sk_buff *skb,
  1313. struct eth_fast_path_rx_reg_cqe *cqe,
  1314. u16 first_bd_len)
  1315. {
  1316. u16 pkt_len = le16_to_cpu(cqe->pkt_len);
  1317. struct sw_rx_data *bd;
  1318. u16 bd_cons_idx;
  1319. u8 num_frags;
  1320. pkt_len -= first_bd_len;
  1321. /* We've already used one BD for the SKB. Now take care of the rest */
  1322. for (num_frags = cqe->bd_num - 1; num_frags > 0; num_frags--) {
  1323. u16 cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
  1324. pkt_len;
  1325. if (unlikely(!cur_size)) {
  1326. DP_ERR(edev,
  1327. "Still got %d BDs for mapping jumbo, but length became 0\n",
  1328. num_frags);
  1329. goto out;
  1330. }
  1331. /* We need a replacement buffer for each BD */
  1332. if (unlikely(qede_alloc_rx_buffer(rxq)))
  1333. goto out;
  1334. /* Now that we've allocated the replacement buffer,
  1335. * we can safely consume the next BD and map it to the SKB.
  1336. */
  1337. bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1338. bd = &rxq->sw_rx_ring[bd_cons_idx];
  1339. qede_rx_bd_ring_consume(rxq);
  1340. dma_unmap_page(rxq->dev, bd->mapping,
  1341. PAGE_SIZE, DMA_FROM_DEVICE);
  1342. skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
  1343. bd->data, 0, cur_size);
  1344. skb->truesize += PAGE_SIZE;
  1345. skb->data_len += cur_size;
  1346. skb->len += cur_size;
  1347. pkt_len -= cur_size;
  1348. }
  1349. if (unlikely(pkt_len))
  1350. DP_ERR(edev,
  1351. "Mapped all BDs of jumbo, but still have %d bytes\n",
  1352. pkt_len);
  1353. out:
  1354. return num_frags;
  1355. }
  1356. static int qede_rx_process_tpa_cqe(struct qede_dev *edev,
  1357. struct qede_fastpath *fp,
  1358. struct qede_rx_queue *rxq,
  1359. union eth_rx_cqe *cqe,
  1360. enum eth_rx_cqe_type type)
  1361. {
  1362. switch (type) {
  1363. case ETH_RX_CQE_TYPE_TPA_START:
  1364. qede_tpa_start(edev, rxq, &cqe->fast_path_tpa_start);
  1365. return 0;
  1366. case ETH_RX_CQE_TYPE_TPA_CONT:
  1367. qede_tpa_cont(edev, rxq, &cqe->fast_path_tpa_cont);
  1368. return 0;
  1369. case ETH_RX_CQE_TYPE_TPA_END:
  1370. qede_tpa_end(edev, fp, &cqe->fast_path_tpa_end);
  1371. return 1;
  1372. default:
  1373. return 0;
  1374. }
  1375. }
  1376. static int qede_rx_process_cqe(struct qede_dev *edev,
  1377. struct qede_fastpath *fp,
  1378. struct qede_rx_queue *rxq)
  1379. {
  1380. struct bpf_prog *xdp_prog = READ_ONCE(rxq->xdp_prog);
  1381. struct eth_fast_path_rx_reg_cqe *fp_cqe;
  1382. u16 len, pad, bd_cons_idx, parse_flag;
  1383. enum eth_rx_cqe_type cqe_type;
  1384. union eth_rx_cqe *cqe;
  1385. struct sw_rx_data *bd;
  1386. struct sk_buff *skb;
  1387. __le16 flags;
  1388. u8 csum_flag;
  1389. /* Get the CQE from the completion ring */
  1390. cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
  1391. cqe_type = cqe->fast_path_regular.type;
  1392. /* Process an unlikely slowpath event */
  1393. if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
  1394. struct eth_slow_path_rx_cqe *sp_cqe;
  1395. sp_cqe = (struct eth_slow_path_rx_cqe *)cqe;
  1396. edev->ops->eth_cqe_completion(edev->cdev, fp->id, sp_cqe);
  1397. return 0;
  1398. }
  1399. /* Handle TPA cqes */
  1400. if (cqe_type != ETH_RX_CQE_TYPE_REGULAR)
  1401. return qede_rx_process_tpa_cqe(edev, fp, rxq, cqe, cqe_type);
  1402. /* Get the data from the SW ring; Consume it only after it's evident
  1403. * we wouldn't recycle it.
  1404. */
  1405. bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1406. bd = &rxq->sw_rx_ring[bd_cons_idx];
  1407. fp_cqe = &cqe->fast_path_regular;
  1408. len = le16_to_cpu(fp_cqe->len_on_first_bd);
  1409. pad = fp_cqe->placement_offset;
  1410. /* Run eBPF program if one is attached */
  1411. if (xdp_prog)
  1412. if (!qede_rx_xdp(edev, fp, rxq, xdp_prog, bd, fp_cqe))
  1413. return 1;
  1414. /* If this is an error packet then drop it */
  1415. flags = cqe->fast_path_regular.pars_flags.flags;
  1416. parse_flag = le16_to_cpu(flags);
  1417. csum_flag = qede_check_csum(parse_flag);
  1418. if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
  1419. if (qede_pkt_is_ip_fragmented(fp_cqe, parse_flag)) {
  1420. rxq->rx_ip_frags++;
  1421. } else {
  1422. DP_NOTICE(edev,
  1423. "CQE has error, flags = %x, dropping incoming packet\n",
  1424. parse_flag);
  1425. rxq->rx_hw_errors++;
  1426. qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
  1427. return 0;
  1428. }
  1429. }
  1430. /* Basic validation passed; Need to prepare an SKB. This would also
  1431. * guarantee to finally consume the first BD upon success.
  1432. */
  1433. skb = qede_rx_allocate_skb(edev, rxq, bd, len, pad);
  1434. if (!skb) {
  1435. rxq->rx_alloc_errors++;
  1436. qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
  1437. return 0;
  1438. }
  1439. /* In case of Jumbo packet, several PAGE_SIZEd buffers will be pointed
  1440. * by a single cqe.
  1441. */
  1442. if (fp_cqe->bd_num > 1) {
  1443. u16 unmapped_frags = qede_rx_build_jumbo(edev, rxq, skb,
  1444. fp_cqe, len);
  1445. if (unlikely(unmapped_frags > 0)) {
  1446. qede_recycle_rx_bd_ring(rxq, unmapped_frags);
  1447. dev_kfree_skb_any(skb);
  1448. return 0;
  1449. }
  1450. }
  1451. /* The SKB contains all the data. Now prepare meta-magic */
  1452. skb->protocol = eth_type_trans(skb, edev->ndev);
  1453. qede_get_rxhash(skb, fp_cqe->bitfields, fp_cqe->rss_hash);
  1454. qede_set_skb_csum(skb, csum_flag);
  1455. skb_record_rx_queue(skb, rxq->rxq_id);
  1456. /* SKB is prepared - pass it to stack */
  1457. qede_skb_receive(edev, fp, rxq, skb, le16_to_cpu(fp_cqe->vlan_tag));
  1458. return 1;
  1459. }
  1460. static int qede_rx_int(struct qede_fastpath *fp, int budget)
  1461. {
  1462. struct qede_rx_queue *rxq = fp->rxq;
  1463. struct qede_dev *edev = fp->edev;
  1464. u16 hw_comp_cons, sw_comp_cons;
  1465. int work_done = 0;
  1466. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  1467. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1468. /* Memory barrier to prevent the CPU from doing speculative reads of CQE
  1469. * / BD in the while-loop before reading hw_comp_cons. If the CQE is
  1470. * read before it is written by FW, then FW writes CQE and SB, and then
  1471. * the CPU reads the hw_comp_cons, it will use an old CQE.
  1472. */
  1473. rmb();
  1474. /* Loop to complete all indicated BDs */
  1475. while ((sw_comp_cons != hw_comp_cons) && (work_done < budget)) {
  1476. qede_rx_process_cqe(edev, fp, rxq);
  1477. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1478. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1479. work_done++;
  1480. }
  1481. /* Update producers */
  1482. qede_update_rx_prod(edev, rxq);
  1483. return work_done;
  1484. }
  1485. static bool qede_poll_is_more_work(struct qede_fastpath *fp)
  1486. {
  1487. qed_sb_update_sb_idx(fp->sb_info);
  1488. /* *_has_*_work() reads the status block, thus we need to ensure that
  1489. * status block indices have been actually read (qed_sb_update_sb_idx)
  1490. * prior to this check (*_has_*_work) so that we won't write the
  1491. * "newer" value of the status block to HW (if there was a DMA right
  1492. * after qede_has_rx_work and if there is no rmb, the memory reading
  1493. * (qed_sb_update_sb_idx) may be postponed to right before *_ack_sb).
  1494. * In this case there will never be another interrupt until there is
  1495. * another update of the status block, while there is still unhandled
  1496. * work.
  1497. */
  1498. rmb();
  1499. if (likely(fp->type & QEDE_FASTPATH_RX))
  1500. if (qede_has_rx_work(fp->rxq))
  1501. return true;
  1502. if (fp->type & QEDE_FASTPATH_XDP)
  1503. if (qede_txq_has_work(fp->xdp_tx))
  1504. return true;
  1505. if (likely(fp->type & QEDE_FASTPATH_TX))
  1506. if (qede_txq_has_work(fp->txq))
  1507. return true;
  1508. return false;
  1509. }
  1510. static int qede_poll(struct napi_struct *napi, int budget)
  1511. {
  1512. struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
  1513. napi);
  1514. struct qede_dev *edev = fp->edev;
  1515. int rx_work_done = 0;
  1516. if (likely(fp->type & QEDE_FASTPATH_TX) && qede_txq_has_work(fp->txq))
  1517. qede_tx_int(edev, fp->txq);
  1518. if ((fp->type & QEDE_FASTPATH_XDP) && qede_txq_has_work(fp->xdp_tx))
  1519. qede_xdp_tx_int(edev, fp->xdp_tx);
  1520. rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
  1521. qede_has_rx_work(fp->rxq)) ?
  1522. qede_rx_int(fp, budget) : 0;
  1523. if (rx_work_done < budget) {
  1524. if (!qede_poll_is_more_work(fp)) {
  1525. napi_complete(napi);
  1526. /* Update and reenable interrupts */
  1527. qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1);
  1528. } else {
  1529. rx_work_done = budget;
  1530. }
  1531. }
  1532. if (fp->xdp_xmit) {
  1533. u16 xdp_prod = qed_chain_get_prod_idx(&fp->xdp_tx->tx_pbl);
  1534. fp->xdp_xmit = 0;
  1535. fp->xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
  1536. qede_update_tx_producer(fp->xdp_tx);
  1537. }
  1538. return rx_work_done;
  1539. }
  1540. static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
  1541. {
  1542. struct qede_fastpath *fp = fp_cookie;
  1543. qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
  1544. napi_schedule_irqoff(&fp->napi);
  1545. return IRQ_HANDLED;
  1546. }
  1547. /* -------------------------------------------------------------------------
  1548. * END OF FAST-PATH
  1549. * -------------------------------------------------------------------------
  1550. */
  1551. static int qede_open(struct net_device *ndev);
  1552. static int qede_close(struct net_device *ndev);
  1553. static int qede_set_mac_addr(struct net_device *ndev, void *p);
  1554. static void qede_set_rx_mode(struct net_device *ndev);
  1555. static void qede_config_rx_mode(struct net_device *ndev);
  1556. static int qede_set_ucast_rx_mac(struct qede_dev *edev,
  1557. enum qed_filter_xcast_params_type opcode,
  1558. unsigned char mac[ETH_ALEN])
  1559. {
  1560. struct qed_filter_params filter_cmd;
  1561. memset(&filter_cmd, 0, sizeof(filter_cmd));
  1562. filter_cmd.type = QED_FILTER_TYPE_UCAST;
  1563. filter_cmd.filter.ucast.type = opcode;
  1564. filter_cmd.filter.ucast.mac_valid = 1;
  1565. ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
  1566. return edev->ops->filter_config(edev->cdev, &filter_cmd);
  1567. }
  1568. static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
  1569. enum qed_filter_xcast_params_type opcode,
  1570. u16 vid)
  1571. {
  1572. struct qed_filter_params filter_cmd;
  1573. memset(&filter_cmd, 0, sizeof(filter_cmd));
  1574. filter_cmd.type = QED_FILTER_TYPE_UCAST;
  1575. filter_cmd.filter.ucast.type = opcode;
  1576. filter_cmd.filter.ucast.vlan_valid = 1;
  1577. filter_cmd.filter.ucast.vlan = vid;
  1578. return edev->ops->filter_config(edev->cdev, &filter_cmd);
  1579. }
  1580. void qede_fill_by_demand_stats(struct qede_dev *edev)
  1581. {
  1582. struct qed_eth_stats stats;
  1583. edev->ops->get_vport_stats(edev->cdev, &stats);
  1584. edev->stats.no_buff_discards = stats.no_buff_discards;
  1585. edev->stats.packet_too_big_discard = stats.packet_too_big_discard;
  1586. edev->stats.ttl0_discard = stats.ttl0_discard;
  1587. edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
  1588. edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
  1589. edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
  1590. edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
  1591. edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
  1592. edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
  1593. edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
  1594. edev->stats.mac_filter_discards = stats.mac_filter_discards;
  1595. edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
  1596. edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
  1597. edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
  1598. edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
  1599. edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
  1600. edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
  1601. edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
  1602. edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
  1603. edev->stats.coalesced_events = stats.tpa_coalesced_events;
  1604. edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
  1605. edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
  1606. edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
  1607. edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
  1608. edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
  1609. edev->stats.rx_128_to_255_byte_packets =
  1610. stats.rx_128_to_255_byte_packets;
  1611. edev->stats.rx_256_to_511_byte_packets =
  1612. stats.rx_256_to_511_byte_packets;
  1613. edev->stats.rx_512_to_1023_byte_packets =
  1614. stats.rx_512_to_1023_byte_packets;
  1615. edev->stats.rx_1024_to_1518_byte_packets =
  1616. stats.rx_1024_to_1518_byte_packets;
  1617. edev->stats.rx_1519_to_1522_byte_packets =
  1618. stats.rx_1519_to_1522_byte_packets;
  1619. edev->stats.rx_1519_to_2047_byte_packets =
  1620. stats.rx_1519_to_2047_byte_packets;
  1621. edev->stats.rx_2048_to_4095_byte_packets =
  1622. stats.rx_2048_to_4095_byte_packets;
  1623. edev->stats.rx_4096_to_9216_byte_packets =
  1624. stats.rx_4096_to_9216_byte_packets;
  1625. edev->stats.rx_9217_to_16383_byte_packets =
  1626. stats.rx_9217_to_16383_byte_packets;
  1627. edev->stats.rx_crc_errors = stats.rx_crc_errors;
  1628. edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
  1629. edev->stats.rx_pause_frames = stats.rx_pause_frames;
  1630. edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
  1631. edev->stats.rx_align_errors = stats.rx_align_errors;
  1632. edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
  1633. edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
  1634. edev->stats.rx_jabbers = stats.rx_jabbers;
  1635. edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
  1636. edev->stats.rx_fragments = stats.rx_fragments;
  1637. edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
  1638. edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
  1639. edev->stats.tx_128_to_255_byte_packets =
  1640. stats.tx_128_to_255_byte_packets;
  1641. edev->stats.tx_256_to_511_byte_packets =
  1642. stats.tx_256_to_511_byte_packets;
  1643. edev->stats.tx_512_to_1023_byte_packets =
  1644. stats.tx_512_to_1023_byte_packets;
  1645. edev->stats.tx_1024_to_1518_byte_packets =
  1646. stats.tx_1024_to_1518_byte_packets;
  1647. edev->stats.tx_1519_to_2047_byte_packets =
  1648. stats.tx_1519_to_2047_byte_packets;
  1649. edev->stats.tx_2048_to_4095_byte_packets =
  1650. stats.tx_2048_to_4095_byte_packets;
  1651. edev->stats.tx_4096_to_9216_byte_packets =
  1652. stats.tx_4096_to_9216_byte_packets;
  1653. edev->stats.tx_9217_to_16383_byte_packets =
  1654. stats.tx_9217_to_16383_byte_packets;
  1655. edev->stats.tx_pause_frames = stats.tx_pause_frames;
  1656. edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
  1657. edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
  1658. edev->stats.tx_total_collisions = stats.tx_total_collisions;
  1659. edev->stats.brb_truncates = stats.brb_truncates;
  1660. edev->stats.brb_discards = stats.brb_discards;
  1661. edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
  1662. }
  1663. static
  1664. struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev,
  1665. struct rtnl_link_stats64 *stats)
  1666. {
  1667. struct qede_dev *edev = netdev_priv(dev);
  1668. qede_fill_by_demand_stats(edev);
  1669. stats->rx_packets = edev->stats.rx_ucast_pkts +
  1670. edev->stats.rx_mcast_pkts +
  1671. edev->stats.rx_bcast_pkts;
  1672. stats->tx_packets = edev->stats.tx_ucast_pkts +
  1673. edev->stats.tx_mcast_pkts +
  1674. edev->stats.tx_bcast_pkts;
  1675. stats->rx_bytes = edev->stats.rx_ucast_bytes +
  1676. edev->stats.rx_mcast_bytes +
  1677. edev->stats.rx_bcast_bytes;
  1678. stats->tx_bytes = edev->stats.tx_ucast_bytes +
  1679. edev->stats.tx_mcast_bytes +
  1680. edev->stats.tx_bcast_bytes;
  1681. stats->tx_errors = edev->stats.tx_err_drop_pkts;
  1682. stats->multicast = edev->stats.rx_mcast_pkts +
  1683. edev->stats.rx_bcast_pkts;
  1684. stats->rx_fifo_errors = edev->stats.no_buff_discards;
  1685. stats->collisions = edev->stats.tx_total_collisions;
  1686. stats->rx_crc_errors = edev->stats.rx_crc_errors;
  1687. stats->rx_frame_errors = edev->stats.rx_align_errors;
  1688. return stats;
  1689. }
  1690. #ifdef CONFIG_QED_SRIOV
  1691. static int qede_get_vf_config(struct net_device *dev, int vfidx,
  1692. struct ifla_vf_info *ivi)
  1693. {
  1694. struct qede_dev *edev = netdev_priv(dev);
  1695. if (!edev->ops)
  1696. return -EINVAL;
  1697. return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
  1698. }
  1699. static int qede_set_vf_rate(struct net_device *dev, int vfidx,
  1700. int min_tx_rate, int max_tx_rate)
  1701. {
  1702. struct qede_dev *edev = netdev_priv(dev);
  1703. return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
  1704. max_tx_rate);
  1705. }
  1706. static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
  1707. {
  1708. struct qede_dev *edev = netdev_priv(dev);
  1709. if (!edev->ops)
  1710. return -EINVAL;
  1711. return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
  1712. }
  1713. static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
  1714. int link_state)
  1715. {
  1716. struct qede_dev *edev = netdev_priv(dev);
  1717. if (!edev->ops)
  1718. return -EINVAL;
  1719. return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
  1720. }
  1721. #endif
  1722. static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
  1723. {
  1724. struct qed_update_vport_params params;
  1725. int rc;
  1726. /* Proceed only if action actually needs to be performed */
  1727. if (edev->accept_any_vlan == action)
  1728. return;
  1729. memset(&params, 0, sizeof(params));
  1730. params.vport_id = 0;
  1731. params.accept_any_vlan = action;
  1732. params.update_accept_any_vlan_flg = 1;
  1733. rc = edev->ops->vport_update(edev->cdev, &params);
  1734. if (rc) {
  1735. DP_ERR(edev, "Failed to %s accept-any-vlan\n",
  1736. action ? "enable" : "disable");
  1737. } else {
  1738. DP_INFO(edev, "%s accept-any-vlan\n",
  1739. action ? "enabled" : "disabled");
  1740. edev->accept_any_vlan = action;
  1741. }
  1742. }
  1743. static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
  1744. {
  1745. struct qede_dev *edev = netdev_priv(dev);
  1746. struct qede_vlan *vlan, *tmp;
  1747. int rc = 0;
  1748. DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
  1749. vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
  1750. if (!vlan) {
  1751. DP_INFO(edev, "Failed to allocate struct for vlan\n");
  1752. return -ENOMEM;
  1753. }
  1754. INIT_LIST_HEAD(&vlan->list);
  1755. vlan->vid = vid;
  1756. vlan->configured = false;
  1757. /* Verify vlan isn't already configured */
  1758. list_for_each_entry(tmp, &edev->vlan_list, list) {
  1759. if (tmp->vid == vlan->vid) {
  1760. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  1761. "vlan already configured\n");
  1762. kfree(vlan);
  1763. return -EEXIST;
  1764. }
  1765. }
  1766. /* If interface is down, cache this VLAN ID and return */
  1767. __qede_lock(edev);
  1768. if (edev->state != QEDE_STATE_OPEN) {
  1769. DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
  1770. "Interface is down, VLAN %d will be configured when interface is up\n",
  1771. vid);
  1772. if (vid != 0)
  1773. edev->non_configured_vlans++;
  1774. list_add(&vlan->list, &edev->vlan_list);
  1775. goto out;
  1776. }
  1777. /* Check for the filter limit.
  1778. * Note - vlan0 has a reserved filter and can be added without
  1779. * worrying about quota
  1780. */
  1781. if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
  1782. (vlan->vid == 0)) {
  1783. rc = qede_set_ucast_rx_vlan(edev,
  1784. QED_FILTER_XCAST_TYPE_ADD,
  1785. vlan->vid);
  1786. if (rc) {
  1787. DP_ERR(edev, "Failed to configure VLAN %d\n",
  1788. vlan->vid);
  1789. kfree(vlan);
  1790. goto out;
  1791. }
  1792. vlan->configured = true;
  1793. /* vlan0 filter isn't consuming out of our quota */
  1794. if (vlan->vid != 0)
  1795. edev->configured_vlans++;
  1796. } else {
  1797. /* Out of quota; Activate accept-any-VLAN mode */
  1798. if (!edev->non_configured_vlans)
  1799. qede_config_accept_any_vlan(edev, true);
  1800. edev->non_configured_vlans++;
  1801. }
  1802. list_add(&vlan->list, &edev->vlan_list);
  1803. out:
  1804. __qede_unlock(edev);
  1805. return rc;
  1806. }
  1807. static void qede_del_vlan_from_list(struct qede_dev *edev,
  1808. struct qede_vlan *vlan)
  1809. {
  1810. /* vlan0 filter isn't consuming out of our quota */
  1811. if (vlan->vid != 0) {
  1812. if (vlan->configured)
  1813. edev->configured_vlans--;
  1814. else
  1815. edev->non_configured_vlans--;
  1816. }
  1817. list_del(&vlan->list);
  1818. kfree(vlan);
  1819. }
  1820. static int qede_configure_vlan_filters(struct qede_dev *edev)
  1821. {
  1822. int rc = 0, real_rc = 0, accept_any_vlan = 0;
  1823. struct qed_dev_eth_info *dev_info;
  1824. struct qede_vlan *vlan = NULL;
  1825. if (list_empty(&edev->vlan_list))
  1826. return 0;
  1827. dev_info = &edev->dev_info;
  1828. /* Configure non-configured vlans */
  1829. list_for_each_entry(vlan, &edev->vlan_list, list) {
  1830. if (vlan->configured)
  1831. continue;
  1832. /* We have used all our credits, now enable accept_any_vlan */
  1833. if ((vlan->vid != 0) &&
  1834. (edev->configured_vlans == dev_info->num_vlan_filters)) {
  1835. accept_any_vlan = 1;
  1836. continue;
  1837. }
  1838. DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
  1839. rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
  1840. vlan->vid);
  1841. if (rc) {
  1842. DP_ERR(edev, "Failed to configure VLAN %u\n",
  1843. vlan->vid);
  1844. real_rc = rc;
  1845. continue;
  1846. }
  1847. vlan->configured = true;
  1848. /* vlan0 filter doesn't consume our VLAN filter's quota */
  1849. if (vlan->vid != 0) {
  1850. edev->non_configured_vlans--;
  1851. edev->configured_vlans++;
  1852. }
  1853. }
  1854. /* enable accept_any_vlan mode if we have more VLANs than credits,
  1855. * or remove accept_any_vlan mode if we've actually removed
  1856. * a non-configured vlan, and all remaining vlans are truly configured.
  1857. */
  1858. if (accept_any_vlan)
  1859. qede_config_accept_any_vlan(edev, true);
  1860. else if (!edev->non_configured_vlans)
  1861. qede_config_accept_any_vlan(edev, false);
  1862. return real_rc;
  1863. }
  1864. static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
  1865. {
  1866. struct qede_dev *edev = netdev_priv(dev);
  1867. struct qede_vlan *vlan = NULL;
  1868. int rc = 0;
  1869. DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
  1870. /* Find whether entry exists */
  1871. __qede_lock(edev);
  1872. list_for_each_entry(vlan, &edev->vlan_list, list)
  1873. if (vlan->vid == vid)
  1874. break;
  1875. if (!vlan || (vlan->vid != vid)) {
  1876. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  1877. "Vlan isn't configured\n");
  1878. goto out;
  1879. }
  1880. if (edev->state != QEDE_STATE_OPEN) {
  1881. /* As interface is already down, we don't have a VPORT
  1882. * instance to remove vlan filter. So just update vlan list
  1883. */
  1884. DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
  1885. "Interface is down, removing VLAN from list only\n");
  1886. qede_del_vlan_from_list(edev, vlan);
  1887. goto out;
  1888. }
  1889. /* Remove vlan */
  1890. if (vlan->configured) {
  1891. rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
  1892. vid);
  1893. if (rc) {
  1894. DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
  1895. goto out;
  1896. }
  1897. }
  1898. qede_del_vlan_from_list(edev, vlan);
  1899. /* We have removed a VLAN - try to see if we can
  1900. * configure non-configured VLAN from the list.
  1901. */
  1902. rc = qede_configure_vlan_filters(edev);
  1903. out:
  1904. __qede_unlock(edev);
  1905. return rc;
  1906. }
  1907. static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
  1908. {
  1909. struct qede_vlan *vlan = NULL;
  1910. if (list_empty(&edev->vlan_list))
  1911. return;
  1912. list_for_each_entry(vlan, &edev->vlan_list, list) {
  1913. if (!vlan->configured)
  1914. continue;
  1915. vlan->configured = false;
  1916. /* vlan0 filter isn't consuming out of our quota */
  1917. if (vlan->vid != 0) {
  1918. edev->non_configured_vlans++;
  1919. edev->configured_vlans--;
  1920. }
  1921. DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
  1922. "marked vlan %d as non-configured\n", vlan->vid);
  1923. }
  1924. edev->accept_any_vlan = false;
  1925. }
  1926. static void qede_set_features_reload(struct qede_dev *edev,
  1927. struct qede_reload_args *args)
  1928. {
  1929. edev->ndev->features = args->u.features;
  1930. }
  1931. int qede_set_features(struct net_device *dev, netdev_features_t features)
  1932. {
  1933. struct qede_dev *edev = netdev_priv(dev);
  1934. netdev_features_t changes = features ^ dev->features;
  1935. bool need_reload = false;
  1936. /* No action needed if hardware GRO is disabled during driver load */
  1937. if (changes & NETIF_F_GRO) {
  1938. if (dev->features & NETIF_F_GRO)
  1939. need_reload = !edev->gro_disable;
  1940. else
  1941. need_reload = edev->gro_disable;
  1942. }
  1943. if (need_reload) {
  1944. struct qede_reload_args args;
  1945. args.u.features = features;
  1946. args.func = &qede_set_features_reload;
  1947. /* Make sure that we definitely need to reload.
  1948. * In case of an eBPF attached program, there will be no FW
  1949. * aggregations, so no need to actually reload.
  1950. */
  1951. __qede_lock(edev);
  1952. if (edev->xdp_prog)
  1953. args.func(edev, &args);
  1954. else
  1955. qede_reload(edev, &args, true);
  1956. __qede_unlock(edev);
  1957. return 1;
  1958. }
  1959. return 0;
  1960. }
  1961. static void qede_udp_tunnel_add(struct net_device *dev,
  1962. struct udp_tunnel_info *ti)
  1963. {
  1964. struct qede_dev *edev = netdev_priv(dev);
  1965. u16 t_port = ntohs(ti->port);
  1966. switch (ti->type) {
  1967. case UDP_TUNNEL_TYPE_VXLAN:
  1968. if (edev->vxlan_dst_port)
  1969. return;
  1970. edev->vxlan_dst_port = t_port;
  1971. DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n",
  1972. t_port);
  1973. set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
  1974. break;
  1975. case UDP_TUNNEL_TYPE_GENEVE:
  1976. if (edev->geneve_dst_port)
  1977. return;
  1978. edev->geneve_dst_port = t_port;
  1979. DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n",
  1980. t_port);
  1981. set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
  1982. break;
  1983. default:
  1984. return;
  1985. }
  1986. schedule_delayed_work(&edev->sp_task, 0);
  1987. }
  1988. static void qede_udp_tunnel_del(struct net_device *dev,
  1989. struct udp_tunnel_info *ti)
  1990. {
  1991. struct qede_dev *edev = netdev_priv(dev);
  1992. u16 t_port = ntohs(ti->port);
  1993. switch (ti->type) {
  1994. case UDP_TUNNEL_TYPE_VXLAN:
  1995. if (t_port != edev->vxlan_dst_port)
  1996. return;
  1997. edev->vxlan_dst_port = 0;
  1998. DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n",
  1999. t_port);
  2000. set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
  2001. break;
  2002. case UDP_TUNNEL_TYPE_GENEVE:
  2003. if (t_port != edev->geneve_dst_port)
  2004. return;
  2005. edev->geneve_dst_port = 0;
  2006. DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n",
  2007. t_port);
  2008. set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
  2009. break;
  2010. default:
  2011. return;
  2012. }
  2013. schedule_delayed_work(&edev->sp_task, 0);
  2014. }
  2015. /* 8B udp header + 8B base tunnel header + 32B option length */
  2016. #define QEDE_MAX_TUN_HDR_LEN 48
  2017. static netdev_features_t qede_features_check(struct sk_buff *skb,
  2018. struct net_device *dev,
  2019. netdev_features_t features)
  2020. {
  2021. if (skb->encapsulation) {
  2022. u8 l4_proto = 0;
  2023. switch (vlan_get_protocol(skb)) {
  2024. case htons(ETH_P_IP):
  2025. l4_proto = ip_hdr(skb)->protocol;
  2026. break;
  2027. case htons(ETH_P_IPV6):
  2028. l4_proto = ipv6_hdr(skb)->nexthdr;
  2029. break;
  2030. default:
  2031. return features;
  2032. }
  2033. /* Disable offloads for geneve tunnels, as HW can't parse
  2034. * the geneve header which has option length greater than 32B.
  2035. */
  2036. if ((l4_proto == IPPROTO_UDP) &&
  2037. ((skb_inner_mac_header(skb) -
  2038. skb_transport_header(skb)) > QEDE_MAX_TUN_HDR_LEN))
  2039. return features & ~(NETIF_F_CSUM_MASK |
  2040. NETIF_F_GSO_MASK);
  2041. }
  2042. return features;
  2043. }
  2044. static void qede_xdp_reload_func(struct qede_dev *edev,
  2045. struct qede_reload_args *args)
  2046. {
  2047. struct bpf_prog *old;
  2048. old = xchg(&edev->xdp_prog, args->u.new_prog);
  2049. if (old)
  2050. bpf_prog_put(old);
  2051. }
  2052. static int qede_xdp_set(struct qede_dev *edev, struct bpf_prog *prog)
  2053. {
  2054. struct qede_reload_args args;
  2055. if (prog && prog->xdp_adjust_head) {
  2056. DP_ERR(edev, "Does not support bpf_xdp_adjust_head()\n");
  2057. return -EOPNOTSUPP;
  2058. }
  2059. /* If we're called, there was already a bpf reference increment */
  2060. args.func = &qede_xdp_reload_func;
  2061. args.u.new_prog = prog;
  2062. qede_reload(edev, &args, false);
  2063. return 0;
  2064. }
  2065. static int qede_xdp(struct net_device *dev, struct netdev_xdp *xdp)
  2066. {
  2067. struct qede_dev *edev = netdev_priv(dev);
  2068. switch (xdp->command) {
  2069. case XDP_SETUP_PROG:
  2070. return qede_xdp_set(edev, xdp->prog);
  2071. case XDP_QUERY_PROG:
  2072. xdp->prog_attached = !!edev->xdp_prog;
  2073. return 0;
  2074. default:
  2075. return -EINVAL;
  2076. }
  2077. }
  2078. static const struct net_device_ops qede_netdev_ops = {
  2079. .ndo_open = qede_open,
  2080. .ndo_stop = qede_close,
  2081. .ndo_start_xmit = qede_start_xmit,
  2082. .ndo_set_rx_mode = qede_set_rx_mode,
  2083. .ndo_set_mac_address = qede_set_mac_addr,
  2084. .ndo_validate_addr = eth_validate_addr,
  2085. .ndo_change_mtu = qede_change_mtu,
  2086. #ifdef CONFIG_QED_SRIOV
  2087. .ndo_set_vf_mac = qede_set_vf_mac,
  2088. .ndo_set_vf_vlan = qede_set_vf_vlan,
  2089. #endif
  2090. .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
  2091. .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
  2092. .ndo_set_features = qede_set_features,
  2093. .ndo_get_stats64 = qede_get_stats64,
  2094. #ifdef CONFIG_QED_SRIOV
  2095. .ndo_set_vf_link_state = qede_set_vf_link_state,
  2096. .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
  2097. .ndo_get_vf_config = qede_get_vf_config,
  2098. .ndo_set_vf_rate = qede_set_vf_rate,
  2099. #endif
  2100. .ndo_udp_tunnel_add = qede_udp_tunnel_add,
  2101. .ndo_udp_tunnel_del = qede_udp_tunnel_del,
  2102. .ndo_features_check = qede_features_check,
  2103. .ndo_xdp = qede_xdp,
  2104. };
  2105. /* -------------------------------------------------------------------------
  2106. * START OF PROBE / REMOVE
  2107. * -------------------------------------------------------------------------
  2108. */
  2109. static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
  2110. struct pci_dev *pdev,
  2111. struct qed_dev_eth_info *info,
  2112. u32 dp_module, u8 dp_level)
  2113. {
  2114. struct net_device *ndev;
  2115. struct qede_dev *edev;
  2116. ndev = alloc_etherdev_mqs(sizeof(*edev),
  2117. info->num_queues, info->num_queues);
  2118. if (!ndev) {
  2119. pr_err("etherdev allocation failed\n");
  2120. return NULL;
  2121. }
  2122. edev = netdev_priv(ndev);
  2123. edev->ndev = ndev;
  2124. edev->cdev = cdev;
  2125. edev->pdev = pdev;
  2126. edev->dp_module = dp_module;
  2127. edev->dp_level = dp_level;
  2128. edev->ops = qed_ops;
  2129. edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
  2130. edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
  2131. DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
  2132. info->num_queues, info->num_queues);
  2133. SET_NETDEV_DEV(ndev, &pdev->dev);
  2134. memset(&edev->stats, 0, sizeof(edev->stats));
  2135. memcpy(&edev->dev_info, info, sizeof(*info));
  2136. INIT_LIST_HEAD(&edev->vlan_list);
  2137. return edev;
  2138. }
  2139. static void qede_init_ndev(struct qede_dev *edev)
  2140. {
  2141. struct net_device *ndev = edev->ndev;
  2142. struct pci_dev *pdev = edev->pdev;
  2143. u32 hw_features;
  2144. pci_set_drvdata(pdev, ndev);
  2145. ndev->mem_start = edev->dev_info.common.pci_mem_start;
  2146. ndev->base_addr = ndev->mem_start;
  2147. ndev->mem_end = edev->dev_info.common.pci_mem_end;
  2148. ndev->irq = edev->dev_info.common.pci_irq;
  2149. ndev->watchdog_timeo = TX_TIMEOUT;
  2150. ndev->netdev_ops = &qede_netdev_ops;
  2151. qede_set_ethtool_ops(ndev);
  2152. ndev->priv_flags |= IFF_UNICAST_FLT;
  2153. /* user-changeble features */
  2154. hw_features = NETIF_F_GRO | NETIF_F_SG |
  2155. NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2156. NETIF_F_TSO | NETIF_F_TSO6;
  2157. /* Encap features*/
  2158. hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
  2159. NETIF_F_TSO_ECN | NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2160. NETIF_F_GSO_GRE_CSUM;
  2161. ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2162. NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
  2163. NETIF_F_TSO6 | NETIF_F_GSO_GRE |
  2164. NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM |
  2165. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2166. NETIF_F_GSO_GRE_CSUM;
  2167. ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
  2168. NETIF_F_HIGHDMA;
  2169. ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
  2170. NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
  2171. NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
  2172. ndev->hw_features = hw_features;
  2173. /* MTU range: 46 - 9600 */
  2174. ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
  2175. ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
  2176. /* Set network device HW mac */
  2177. ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
  2178. ndev->mtu = edev->dev_info.common.mtu;
  2179. }
  2180. /* This function converts from 32b param to two params of level and module
  2181. * Input 32b decoding:
  2182. * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
  2183. * 'happy' flow, e.g. memory allocation failed.
  2184. * b30 - enable all INFO prints. INFO prints are for major steps in the flow
  2185. * and provide important parameters.
  2186. * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
  2187. * module. VERBOSE prints are for tracking the specific flow in low level.
  2188. *
  2189. * Notice that the level should be that of the lowest required logs.
  2190. */
  2191. void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
  2192. {
  2193. *p_dp_level = QED_LEVEL_NOTICE;
  2194. *p_dp_module = 0;
  2195. if (debug & QED_LOG_VERBOSE_MASK) {
  2196. *p_dp_level = QED_LEVEL_VERBOSE;
  2197. *p_dp_module = (debug & 0x3FFFFFFF);
  2198. } else if (debug & QED_LOG_INFO_MASK) {
  2199. *p_dp_level = QED_LEVEL_INFO;
  2200. } else if (debug & QED_LOG_NOTICE_MASK) {
  2201. *p_dp_level = QED_LEVEL_NOTICE;
  2202. }
  2203. }
  2204. static void qede_free_fp_array(struct qede_dev *edev)
  2205. {
  2206. if (edev->fp_array) {
  2207. struct qede_fastpath *fp;
  2208. int i;
  2209. for_each_queue(i) {
  2210. fp = &edev->fp_array[i];
  2211. kfree(fp->sb_info);
  2212. kfree(fp->rxq);
  2213. kfree(fp->xdp_tx);
  2214. kfree(fp->txq);
  2215. }
  2216. kfree(edev->fp_array);
  2217. }
  2218. edev->num_queues = 0;
  2219. edev->fp_num_tx = 0;
  2220. edev->fp_num_rx = 0;
  2221. }
  2222. static int qede_alloc_fp_array(struct qede_dev *edev)
  2223. {
  2224. u8 fp_combined, fp_rx = edev->fp_num_rx;
  2225. struct qede_fastpath *fp;
  2226. int i;
  2227. edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
  2228. sizeof(*edev->fp_array), GFP_KERNEL);
  2229. if (!edev->fp_array) {
  2230. DP_NOTICE(edev, "fp array allocation failed\n");
  2231. goto err;
  2232. }
  2233. fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
  2234. /* Allocate the FP elements for Rx queues followed by combined and then
  2235. * the Tx. This ordering should be maintained so that the respective
  2236. * queues (Rx or Tx) will be together in the fastpath array and the
  2237. * associated ids will be sequential.
  2238. */
  2239. for_each_queue(i) {
  2240. fp = &edev->fp_array[i];
  2241. fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
  2242. if (!fp->sb_info) {
  2243. DP_NOTICE(edev, "sb info struct allocation failed\n");
  2244. goto err;
  2245. }
  2246. if (fp_rx) {
  2247. fp->type = QEDE_FASTPATH_RX;
  2248. fp_rx--;
  2249. } else if (fp_combined) {
  2250. fp->type = QEDE_FASTPATH_COMBINED;
  2251. fp_combined--;
  2252. } else {
  2253. fp->type = QEDE_FASTPATH_TX;
  2254. }
  2255. if (fp->type & QEDE_FASTPATH_TX) {
  2256. fp->txq = kzalloc(sizeof(*fp->txq), GFP_KERNEL);
  2257. if (!fp->txq)
  2258. goto err;
  2259. }
  2260. if (fp->type & QEDE_FASTPATH_RX) {
  2261. fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
  2262. if (!fp->rxq)
  2263. goto err;
  2264. if (edev->xdp_prog) {
  2265. fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
  2266. GFP_KERNEL);
  2267. if (!fp->xdp_tx)
  2268. goto err;
  2269. fp->type |= QEDE_FASTPATH_XDP;
  2270. }
  2271. }
  2272. }
  2273. return 0;
  2274. err:
  2275. qede_free_fp_array(edev);
  2276. return -ENOMEM;
  2277. }
  2278. static void qede_sp_task(struct work_struct *work)
  2279. {
  2280. struct qede_dev *edev = container_of(work, struct qede_dev,
  2281. sp_task.work);
  2282. struct qed_dev *cdev = edev->cdev;
  2283. __qede_lock(edev);
  2284. if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
  2285. if (edev->state == QEDE_STATE_OPEN)
  2286. qede_config_rx_mode(edev->ndev);
  2287. if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
  2288. struct qed_tunn_params tunn_params;
  2289. memset(&tunn_params, 0, sizeof(tunn_params));
  2290. tunn_params.update_vxlan_port = 1;
  2291. tunn_params.vxlan_port = edev->vxlan_dst_port;
  2292. qed_ops->tunn_config(cdev, &tunn_params);
  2293. }
  2294. if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
  2295. struct qed_tunn_params tunn_params;
  2296. memset(&tunn_params, 0, sizeof(tunn_params));
  2297. tunn_params.update_geneve_port = 1;
  2298. tunn_params.geneve_port = edev->geneve_dst_port;
  2299. qed_ops->tunn_config(cdev, &tunn_params);
  2300. }
  2301. __qede_unlock(edev);
  2302. }
  2303. static void qede_update_pf_params(struct qed_dev *cdev)
  2304. {
  2305. struct qed_pf_params pf_params;
  2306. /* 64 rx + 64 tx + 64 XDP */
  2307. memset(&pf_params, 0, sizeof(struct qed_pf_params));
  2308. pf_params.eth_pf_params.num_cons = 192;
  2309. qed_ops->common->update_pf_params(cdev, &pf_params);
  2310. }
  2311. enum qede_probe_mode {
  2312. QEDE_PROBE_NORMAL,
  2313. };
  2314. static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
  2315. bool is_vf, enum qede_probe_mode mode)
  2316. {
  2317. struct qed_probe_params probe_params;
  2318. struct qed_slowpath_params sp_params;
  2319. struct qed_dev_eth_info dev_info;
  2320. struct qede_dev *edev;
  2321. struct qed_dev *cdev;
  2322. int rc;
  2323. if (unlikely(dp_level & QED_LEVEL_INFO))
  2324. pr_notice("Starting qede probe\n");
  2325. memset(&probe_params, 0, sizeof(probe_params));
  2326. probe_params.protocol = QED_PROTOCOL_ETH;
  2327. probe_params.dp_module = dp_module;
  2328. probe_params.dp_level = dp_level;
  2329. probe_params.is_vf = is_vf;
  2330. cdev = qed_ops->common->probe(pdev, &probe_params);
  2331. if (!cdev) {
  2332. rc = -ENODEV;
  2333. goto err0;
  2334. }
  2335. qede_update_pf_params(cdev);
  2336. /* Start the Slowpath-process */
  2337. memset(&sp_params, 0, sizeof(sp_params));
  2338. sp_params.int_mode = QED_INT_MODE_MSIX;
  2339. sp_params.drv_major = QEDE_MAJOR_VERSION;
  2340. sp_params.drv_minor = QEDE_MINOR_VERSION;
  2341. sp_params.drv_rev = QEDE_REVISION_VERSION;
  2342. sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
  2343. strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
  2344. rc = qed_ops->common->slowpath_start(cdev, &sp_params);
  2345. if (rc) {
  2346. pr_notice("Cannot start slowpath\n");
  2347. goto err1;
  2348. }
  2349. /* Learn information crucial for qede to progress */
  2350. rc = qed_ops->fill_dev_info(cdev, &dev_info);
  2351. if (rc)
  2352. goto err2;
  2353. edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
  2354. dp_level);
  2355. if (!edev) {
  2356. rc = -ENOMEM;
  2357. goto err2;
  2358. }
  2359. if (is_vf)
  2360. edev->flags |= QEDE_FLAG_IS_VF;
  2361. qede_init_ndev(edev);
  2362. rc = qede_roce_dev_add(edev);
  2363. if (rc)
  2364. goto err3;
  2365. rc = register_netdev(edev->ndev);
  2366. if (rc) {
  2367. DP_NOTICE(edev, "Cannot register net-device\n");
  2368. goto err4;
  2369. }
  2370. edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
  2371. edev->ops->register_ops(cdev, &qede_ll_ops, edev);
  2372. #ifdef CONFIG_DCB
  2373. if (!IS_VF(edev))
  2374. qede_set_dcbnl_ops(edev->ndev);
  2375. #endif
  2376. INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
  2377. mutex_init(&edev->qede_lock);
  2378. edev->rx_copybreak = QEDE_RX_HDR_SIZE;
  2379. DP_INFO(edev, "Ending successfully qede probe\n");
  2380. return 0;
  2381. err4:
  2382. qede_roce_dev_remove(edev);
  2383. err3:
  2384. free_netdev(edev->ndev);
  2385. err2:
  2386. qed_ops->common->slowpath_stop(cdev);
  2387. err1:
  2388. qed_ops->common->remove(cdev);
  2389. err0:
  2390. return rc;
  2391. }
  2392. static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2393. {
  2394. bool is_vf = false;
  2395. u32 dp_module = 0;
  2396. u8 dp_level = 0;
  2397. switch ((enum qede_pci_private)id->driver_data) {
  2398. case QEDE_PRIVATE_VF:
  2399. if (debug & QED_LOG_VERBOSE_MASK)
  2400. dev_err(&pdev->dev, "Probing a VF\n");
  2401. is_vf = true;
  2402. break;
  2403. default:
  2404. if (debug & QED_LOG_VERBOSE_MASK)
  2405. dev_err(&pdev->dev, "Probing a PF\n");
  2406. }
  2407. qede_config_debug(debug, &dp_module, &dp_level);
  2408. return __qede_probe(pdev, dp_module, dp_level, is_vf,
  2409. QEDE_PROBE_NORMAL);
  2410. }
  2411. enum qede_remove_mode {
  2412. QEDE_REMOVE_NORMAL,
  2413. };
  2414. static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
  2415. {
  2416. struct net_device *ndev = pci_get_drvdata(pdev);
  2417. struct qede_dev *edev = netdev_priv(ndev);
  2418. struct qed_dev *cdev = edev->cdev;
  2419. DP_INFO(edev, "Starting qede_remove\n");
  2420. cancel_delayed_work_sync(&edev->sp_task);
  2421. unregister_netdev(ndev);
  2422. qede_roce_dev_remove(edev);
  2423. edev->ops->common->set_power_state(cdev, PCI_D0);
  2424. pci_set_drvdata(pdev, NULL);
  2425. /* Release edev's reference to XDP's bpf if such exist */
  2426. if (edev->xdp_prog)
  2427. bpf_prog_put(edev->xdp_prog);
  2428. free_netdev(ndev);
  2429. /* Use global ops since we've freed edev */
  2430. qed_ops->common->slowpath_stop(cdev);
  2431. if (system_state == SYSTEM_POWER_OFF)
  2432. return;
  2433. qed_ops->common->remove(cdev);
  2434. dev_info(&pdev->dev, "Ending qede_remove successfully\n");
  2435. }
  2436. static void qede_remove(struct pci_dev *pdev)
  2437. {
  2438. __qede_remove(pdev, QEDE_REMOVE_NORMAL);
  2439. }
  2440. static void qede_shutdown(struct pci_dev *pdev)
  2441. {
  2442. __qede_remove(pdev, QEDE_REMOVE_NORMAL);
  2443. }
  2444. /* -------------------------------------------------------------------------
  2445. * START OF LOAD / UNLOAD
  2446. * -------------------------------------------------------------------------
  2447. */
  2448. static int qede_set_num_queues(struct qede_dev *edev)
  2449. {
  2450. int rc;
  2451. u16 rss_num;
  2452. /* Setup queues according to possible resources*/
  2453. if (edev->req_queues)
  2454. rss_num = edev->req_queues;
  2455. else
  2456. rss_num = netif_get_num_default_rss_queues() *
  2457. edev->dev_info.common.num_hwfns;
  2458. rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
  2459. rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
  2460. if (rc > 0) {
  2461. /* Managed to request interrupts for our queues */
  2462. edev->num_queues = rc;
  2463. DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
  2464. QEDE_QUEUE_CNT(edev), rss_num);
  2465. rc = 0;
  2466. }
  2467. edev->fp_num_tx = edev->req_num_tx;
  2468. edev->fp_num_rx = edev->req_num_rx;
  2469. return rc;
  2470. }
  2471. static void qede_free_mem_sb(struct qede_dev *edev,
  2472. struct qed_sb_info *sb_info)
  2473. {
  2474. if (sb_info->sb_virt)
  2475. dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
  2476. (void *)sb_info->sb_virt, sb_info->sb_phys);
  2477. }
  2478. /* This function allocates fast-path status block memory */
  2479. static int qede_alloc_mem_sb(struct qede_dev *edev,
  2480. struct qed_sb_info *sb_info, u16 sb_id)
  2481. {
  2482. struct status_block *sb_virt;
  2483. dma_addr_t sb_phys;
  2484. int rc;
  2485. sb_virt = dma_alloc_coherent(&edev->pdev->dev,
  2486. sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
  2487. if (!sb_virt) {
  2488. DP_ERR(edev, "Status block allocation failed\n");
  2489. return -ENOMEM;
  2490. }
  2491. rc = edev->ops->common->sb_init(edev->cdev, sb_info,
  2492. sb_virt, sb_phys, sb_id,
  2493. QED_SB_TYPE_L2_QUEUE);
  2494. if (rc) {
  2495. DP_ERR(edev, "Status block initialization failed\n");
  2496. dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
  2497. sb_virt, sb_phys);
  2498. return rc;
  2499. }
  2500. return 0;
  2501. }
  2502. static void qede_free_rx_buffers(struct qede_dev *edev,
  2503. struct qede_rx_queue *rxq)
  2504. {
  2505. u16 i;
  2506. for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
  2507. struct sw_rx_data *rx_buf;
  2508. struct page *data;
  2509. rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
  2510. data = rx_buf->data;
  2511. dma_unmap_page(&edev->pdev->dev,
  2512. rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
  2513. rx_buf->data = NULL;
  2514. __free_page(data);
  2515. }
  2516. }
  2517. static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
  2518. {
  2519. int i;
  2520. if (edev->gro_disable)
  2521. return;
  2522. for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
  2523. struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
  2524. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  2525. if (replace_buf->data) {
  2526. dma_unmap_page(&edev->pdev->dev,
  2527. replace_buf->mapping,
  2528. PAGE_SIZE, DMA_FROM_DEVICE);
  2529. __free_page(replace_buf->data);
  2530. }
  2531. }
  2532. }
  2533. static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
  2534. {
  2535. qede_free_sge_mem(edev, rxq);
  2536. /* Free rx buffers */
  2537. qede_free_rx_buffers(edev, rxq);
  2538. /* Free the parallel SW ring */
  2539. kfree(rxq->sw_rx_ring);
  2540. /* Free the real RQ ring used by FW */
  2541. edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
  2542. edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
  2543. }
  2544. static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
  2545. {
  2546. dma_addr_t mapping;
  2547. int i;
  2548. /* Don't perform FW aggregations in case of XDP */
  2549. if (edev->xdp_prog)
  2550. edev->gro_disable = 1;
  2551. if (edev->gro_disable)
  2552. return 0;
  2553. if (edev->ndev->mtu > PAGE_SIZE) {
  2554. edev->gro_disable = 1;
  2555. return 0;
  2556. }
  2557. for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
  2558. struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
  2559. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  2560. replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
  2561. if (unlikely(!replace_buf->data)) {
  2562. DP_NOTICE(edev,
  2563. "Failed to allocate TPA skb pool [replacement buffer]\n");
  2564. goto err;
  2565. }
  2566. mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
  2567. PAGE_SIZE, DMA_FROM_DEVICE);
  2568. if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
  2569. DP_NOTICE(edev,
  2570. "Failed to map TPA replacement buffer\n");
  2571. goto err;
  2572. }
  2573. replace_buf->mapping = mapping;
  2574. tpa_info->buffer.page_offset = 0;
  2575. tpa_info->buffer_mapping = mapping;
  2576. tpa_info->state = QEDE_AGG_STATE_NONE;
  2577. }
  2578. return 0;
  2579. err:
  2580. qede_free_sge_mem(edev, rxq);
  2581. edev->gro_disable = 1;
  2582. return -ENOMEM;
  2583. }
  2584. /* This function allocates all memory needed per Rx queue */
  2585. static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
  2586. {
  2587. int i, rc, size;
  2588. rxq->num_rx_buffers = edev->q_num_rx_buffers;
  2589. rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
  2590. if (rxq->rx_buf_size > PAGE_SIZE)
  2591. rxq->rx_buf_size = PAGE_SIZE;
  2592. /* Segment size to spilt a page in multiple equal parts,
  2593. * unless XDP is used in which case we'd use the entire page.
  2594. */
  2595. if (!edev->xdp_prog)
  2596. rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
  2597. else
  2598. rxq->rx_buf_seg_size = PAGE_SIZE;
  2599. /* Allocate the parallel driver ring for Rx buffers */
  2600. size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
  2601. rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
  2602. if (!rxq->sw_rx_ring) {
  2603. DP_ERR(edev, "Rx buffers ring allocation failed\n");
  2604. rc = -ENOMEM;
  2605. goto err;
  2606. }
  2607. /* Allocate FW Rx ring */
  2608. rc = edev->ops->common->chain_alloc(edev->cdev,
  2609. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  2610. QED_CHAIN_MODE_NEXT_PTR,
  2611. QED_CHAIN_CNT_TYPE_U16,
  2612. RX_RING_SIZE,
  2613. sizeof(struct eth_rx_bd),
  2614. &rxq->rx_bd_ring);
  2615. if (rc)
  2616. goto err;
  2617. /* Allocate FW completion ring */
  2618. rc = edev->ops->common->chain_alloc(edev->cdev,
  2619. QED_CHAIN_USE_TO_CONSUME,
  2620. QED_CHAIN_MODE_PBL,
  2621. QED_CHAIN_CNT_TYPE_U16,
  2622. RX_RING_SIZE,
  2623. sizeof(union eth_rx_cqe),
  2624. &rxq->rx_comp_ring);
  2625. if (rc)
  2626. goto err;
  2627. /* Allocate buffers for the Rx ring */
  2628. for (i = 0; i < rxq->num_rx_buffers; i++) {
  2629. rc = qede_alloc_rx_buffer(rxq);
  2630. if (rc) {
  2631. DP_ERR(edev,
  2632. "Rx buffers allocation failed at index %d\n", i);
  2633. goto err;
  2634. }
  2635. }
  2636. rc = qede_alloc_sge_mem(edev, rxq);
  2637. err:
  2638. return rc;
  2639. }
  2640. static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
  2641. {
  2642. /* Free the parallel SW ring */
  2643. if (txq->is_xdp)
  2644. kfree(txq->sw_tx_ring.pages);
  2645. else
  2646. kfree(txq->sw_tx_ring.skbs);
  2647. /* Free the real RQ ring used by FW */
  2648. edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
  2649. }
  2650. /* This function allocates all memory needed per Tx queue */
  2651. static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
  2652. {
  2653. union eth_tx_bd_types *p_virt;
  2654. int size, rc;
  2655. txq->num_tx_buffers = edev->q_num_tx_buffers;
  2656. /* Allocate the parallel driver ring for Tx buffers */
  2657. if (txq->is_xdp) {
  2658. size = sizeof(*txq->sw_tx_ring.pages) * TX_RING_SIZE;
  2659. txq->sw_tx_ring.pages = kzalloc(size, GFP_KERNEL);
  2660. if (!txq->sw_tx_ring.pages)
  2661. goto err;
  2662. } else {
  2663. size = sizeof(*txq->sw_tx_ring.skbs) * TX_RING_SIZE;
  2664. txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
  2665. if (!txq->sw_tx_ring.skbs)
  2666. goto err;
  2667. }
  2668. rc = edev->ops->common->chain_alloc(edev->cdev,
  2669. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  2670. QED_CHAIN_MODE_PBL,
  2671. QED_CHAIN_CNT_TYPE_U16,
  2672. TX_RING_SIZE,
  2673. sizeof(*p_virt), &txq->tx_pbl);
  2674. if (rc)
  2675. goto err;
  2676. return 0;
  2677. err:
  2678. qede_free_mem_txq(edev, txq);
  2679. return -ENOMEM;
  2680. }
  2681. /* This function frees all memory of a single fp */
  2682. static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
  2683. {
  2684. qede_free_mem_sb(edev, fp->sb_info);
  2685. if (fp->type & QEDE_FASTPATH_RX)
  2686. qede_free_mem_rxq(edev, fp->rxq);
  2687. if (fp->type & QEDE_FASTPATH_TX)
  2688. qede_free_mem_txq(edev, fp->txq);
  2689. }
  2690. /* This function allocates all memory needed for a single fp (i.e. an entity
  2691. * which contains status block, one rx queue and/or multiple per-TC tx queues.
  2692. */
  2693. static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
  2694. {
  2695. int rc = 0;
  2696. rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
  2697. if (rc)
  2698. goto out;
  2699. if (fp->type & QEDE_FASTPATH_RX) {
  2700. rc = qede_alloc_mem_rxq(edev, fp->rxq);
  2701. if (rc)
  2702. goto out;
  2703. }
  2704. if (fp->type & QEDE_FASTPATH_XDP) {
  2705. rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
  2706. if (rc)
  2707. goto out;
  2708. }
  2709. if (fp->type & QEDE_FASTPATH_TX) {
  2710. rc = qede_alloc_mem_txq(edev, fp->txq);
  2711. if (rc)
  2712. goto out;
  2713. }
  2714. out:
  2715. return rc;
  2716. }
  2717. static void qede_free_mem_load(struct qede_dev *edev)
  2718. {
  2719. int i;
  2720. for_each_queue(i) {
  2721. struct qede_fastpath *fp = &edev->fp_array[i];
  2722. qede_free_mem_fp(edev, fp);
  2723. }
  2724. }
  2725. /* This function allocates all qede memory at NIC load. */
  2726. static int qede_alloc_mem_load(struct qede_dev *edev)
  2727. {
  2728. int rc = 0, queue_id;
  2729. for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
  2730. struct qede_fastpath *fp = &edev->fp_array[queue_id];
  2731. rc = qede_alloc_mem_fp(edev, fp);
  2732. if (rc) {
  2733. DP_ERR(edev,
  2734. "Failed to allocate memory for fastpath - rss id = %d\n",
  2735. queue_id);
  2736. qede_free_mem_load(edev);
  2737. return rc;
  2738. }
  2739. }
  2740. return 0;
  2741. }
  2742. /* This function inits fp content and resets the SB, RXQ and TXQ structures */
  2743. static void qede_init_fp(struct qede_dev *edev)
  2744. {
  2745. int queue_id, rxq_index = 0, txq_index = 0;
  2746. struct qede_fastpath *fp;
  2747. for_each_queue(queue_id) {
  2748. fp = &edev->fp_array[queue_id];
  2749. fp->edev = edev;
  2750. fp->id = queue_id;
  2751. if (fp->type & QEDE_FASTPATH_XDP) {
  2752. fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
  2753. rxq_index);
  2754. fp->xdp_tx->is_xdp = 1;
  2755. }
  2756. if (fp->type & QEDE_FASTPATH_RX) {
  2757. fp->rxq->rxq_id = rxq_index++;
  2758. /* Determine how to map buffers for this queue */
  2759. if (fp->type & QEDE_FASTPATH_XDP)
  2760. fp->rxq->data_direction = DMA_BIDIRECTIONAL;
  2761. else
  2762. fp->rxq->data_direction = DMA_FROM_DEVICE;
  2763. fp->rxq->dev = &edev->pdev->dev;
  2764. }
  2765. if (fp->type & QEDE_FASTPATH_TX) {
  2766. fp->txq->index = txq_index++;
  2767. if (edev->dev_info.is_legacy)
  2768. fp->txq->is_legacy = 1;
  2769. fp->txq->dev = &edev->pdev->dev;
  2770. }
  2771. snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
  2772. edev->ndev->name, queue_id);
  2773. }
  2774. edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
  2775. }
  2776. static int qede_set_real_num_queues(struct qede_dev *edev)
  2777. {
  2778. int rc = 0;
  2779. rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev));
  2780. if (rc) {
  2781. DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
  2782. return rc;
  2783. }
  2784. rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
  2785. if (rc) {
  2786. DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
  2787. return rc;
  2788. }
  2789. return 0;
  2790. }
  2791. static void qede_napi_disable_remove(struct qede_dev *edev)
  2792. {
  2793. int i;
  2794. for_each_queue(i) {
  2795. napi_disable(&edev->fp_array[i].napi);
  2796. netif_napi_del(&edev->fp_array[i].napi);
  2797. }
  2798. }
  2799. static void qede_napi_add_enable(struct qede_dev *edev)
  2800. {
  2801. int i;
  2802. /* Add NAPI objects */
  2803. for_each_queue(i) {
  2804. netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
  2805. qede_poll, NAPI_POLL_WEIGHT);
  2806. napi_enable(&edev->fp_array[i].napi);
  2807. }
  2808. }
  2809. static void qede_sync_free_irqs(struct qede_dev *edev)
  2810. {
  2811. int i;
  2812. for (i = 0; i < edev->int_info.used_cnt; i++) {
  2813. if (edev->int_info.msix_cnt) {
  2814. synchronize_irq(edev->int_info.msix[i].vector);
  2815. free_irq(edev->int_info.msix[i].vector,
  2816. &edev->fp_array[i]);
  2817. } else {
  2818. edev->ops->common->simd_handler_clean(edev->cdev, i);
  2819. }
  2820. }
  2821. edev->int_info.used_cnt = 0;
  2822. }
  2823. static int qede_req_msix_irqs(struct qede_dev *edev)
  2824. {
  2825. int i, rc;
  2826. /* Sanitize number of interrupts == number of prepared RSS queues */
  2827. if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
  2828. DP_ERR(edev,
  2829. "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
  2830. QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
  2831. return -EINVAL;
  2832. }
  2833. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  2834. rc = request_irq(edev->int_info.msix[i].vector,
  2835. qede_msix_fp_int, 0, edev->fp_array[i].name,
  2836. &edev->fp_array[i]);
  2837. if (rc) {
  2838. DP_ERR(edev, "Request fp %d irq failed\n", i);
  2839. qede_sync_free_irqs(edev);
  2840. return rc;
  2841. }
  2842. DP_VERBOSE(edev, NETIF_MSG_INTR,
  2843. "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
  2844. edev->fp_array[i].name, i,
  2845. &edev->fp_array[i]);
  2846. edev->int_info.used_cnt++;
  2847. }
  2848. return 0;
  2849. }
  2850. static void qede_simd_fp_handler(void *cookie)
  2851. {
  2852. struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
  2853. napi_schedule_irqoff(&fp->napi);
  2854. }
  2855. static int qede_setup_irqs(struct qede_dev *edev)
  2856. {
  2857. int i, rc = 0;
  2858. /* Learn Interrupt configuration */
  2859. rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
  2860. if (rc)
  2861. return rc;
  2862. if (edev->int_info.msix_cnt) {
  2863. rc = qede_req_msix_irqs(edev);
  2864. if (rc)
  2865. return rc;
  2866. edev->ndev->irq = edev->int_info.msix[0].vector;
  2867. } else {
  2868. const struct qed_common_ops *ops;
  2869. /* qed should learn receive the RSS ids and callbacks */
  2870. ops = edev->ops->common;
  2871. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
  2872. ops->simd_handler_config(edev->cdev,
  2873. &edev->fp_array[i], i,
  2874. qede_simd_fp_handler);
  2875. edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
  2876. }
  2877. return 0;
  2878. }
  2879. static int qede_drain_txq(struct qede_dev *edev,
  2880. struct qede_tx_queue *txq, bool allow_drain)
  2881. {
  2882. int rc, cnt = 1000;
  2883. while (txq->sw_tx_cons != txq->sw_tx_prod) {
  2884. if (!cnt) {
  2885. if (allow_drain) {
  2886. DP_NOTICE(edev,
  2887. "Tx queue[%d] is stuck, requesting MCP to drain\n",
  2888. txq->index);
  2889. rc = edev->ops->common->drain(edev->cdev);
  2890. if (rc)
  2891. return rc;
  2892. return qede_drain_txq(edev, txq, false);
  2893. }
  2894. DP_NOTICE(edev,
  2895. "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
  2896. txq->index, txq->sw_tx_prod,
  2897. txq->sw_tx_cons);
  2898. return -ENODEV;
  2899. }
  2900. cnt--;
  2901. usleep_range(1000, 2000);
  2902. barrier();
  2903. }
  2904. /* FW finished processing, wait for HW to transmit all tx packets */
  2905. usleep_range(1000, 2000);
  2906. return 0;
  2907. }
  2908. static int qede_stop_txq(struct qede_dev *edev,
  2909. struct qede_tx_queue *txq, int rss_id)
  2910. {
  2911. return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
  2912. }
  2913. static int qede_stop_queues(struct qede_dev *edev)
  2914. {
  2915. struct qed_update_vport_params vport_update_params;
  2916. struct qed_dev *cdev = edev->cdev;
  2917. struct qede_fastpath *fp;
  2918. int rc, i;
  2919. /* Disable the vport */
  2920. memset(&vport_update_params, 0, sizeof(vport_update_params));
  2921. vport_update_params.vport_id = 0;
  2922. vport_update_params.update_vport_active_flg = 1;
  2923. vport_update_params.vport_active_flg = 0;
  2924. vport_update_params.update_rss_flg = 0;
  2925. rc = edev->ops->vport_update(cdev, &vport_update_params);
  2926. if (rc) {
  2927. DP_ERR(edev, "Failed to update vport\n");
  2928. return rc;
  2929. }
  2930. /* Flush Tx queues. If needed, request drain from MCP */
  2931. for_each_queue(i) {
  2932. fp = &edev->fp_array[i];
  2933. if (fp->type & QEDE_FASTPATH_TX) {
  2934. rc = qede_drain_txq(edev, fp->txq, true);
  2935. if (rc)
  2936. return rc;
  2937. }
  2938. if (fp->type & QEDE_FASTPATH_XDP) {
  2939. rc = qede_drain_txq(edev, fp->xdp_tx, true);
  2940. if (rc)
  2941. return rc;
  2942. }
  2943. }
  2944. /* Stop all Queues in reverse order */
  2945. for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
  2946. fp = &edev->fp_array[i];
  2947. /* Stop the Tx Queue(s) */
  2948. if (fp->type & QEDE_FASTPATH_TX) {
  2949. rc = qede_stop_txq(edev, fp->txq, i);
  2950. if (rc)
  2951. return rc;
  2952. }
  2953. /* Stop the Rx Queue */
  2954. if (fp->type & QEDE_FASTPATH_RX) {
  2955. rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
  2956. if (rc) {
  2957. DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
  2958. return rc;
  2959. }
  2960. }
  2961. /* Stop the XDP forwarding queue */
  2962. if (fp->type & QEDE_FASTPATH_XDP) {
  2963. rc = qede_stop_txq(edev, fp->xdp_tx, i);
  2964. if (rc)
  2965. return rc;
  2966. bpf_prog_put(fp->rxq->xdp_prog);
  2967. }
  2968. }
  2969. /* Stop the vport */
  2970. rc = edev->ops->vport_stop(cdev, 0);
  2971. if (rc)
  2972. DP_ERR(edev, "Failed to stop VPORT\n");
  2973. return rc;
  2974. }
  2975. static int qede_start_txq(struct qede_dev *edev,
  2976. struct qede_fastpath *fp,
  2977. struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
  2978. {
  2979. dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
  2980. u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
  2981. struct qed_queue_start_common_params params;
  2982. struct qed_txq_start_ret_params ret_params;
  2983. int rc;
  2984. memset(&params, 0, sizeof(params));
  2985. memset(&ret_params, 0, sizeof(ret_params));
  2986. /* Let the XDP queue share the queue-zone with one of the regular txq.
  2987. * We don't really care about its coalescing.
  2988. */
  2989. if (txq->is_xdp)
  2990. params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
  2991. else
  2992. params.queue_id = txq->index;
  2993. params.sb = fp->sb_info->igu_sb_id;
  2994. params.sb_idx = sb_idx;
  2995. rc = edev->ops->q_tx_start(edev->cdev, rss_id, &params, phys_table,
  2996. page_cnt, &ret_params);
  2997. if (rc) {
  2998. DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
  2999. return rc;
  3000. }
  3001. txq->doorbell_addr = ret_params.p_doorbell;
  3002. txq->handle = ret_params.p_handle;
  3003. /* Determine the FW consumer address associated */
  3004. txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
  3005. /* Prepare the doorbell parameters */
  3006. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
  3007. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
  3008. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
  3009. DQ_XCM_ETH_TX_BD_PROD_CMD);
  3010. txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
  3011. return rc;
  3012. }
  3013. static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
  3014. {
  3015. int vlan_removal_en = 1;
  3016. struct qed_dev *cdev = edev->cdev;
  3017. struct qed_update_vport_params vport_update_params;
  3018. struct qed_queue_start_common_params q_params;
  3019. struct qed_dev_info *qed_info = &edev->dev_info.common;
  3020. struct qed_start_vport_params start = {0};
  3021. bool reset_rss_indir = false;
  3022. int rc, i;
  3023. if (!edev->num_queues) {
  3024. DP_ERR(edev,
  3025. "Cannot update V-VPORT as active as there are no Rx queues\n");
  3026. return -EINVAL;
  3027. }
  3028. start.gro_enable = !edev->gro_disable;
  3029. start.mtu = edev->ndev->mtu;
  3030. start.vport_id = 0;
  3031. start.drop_ttl0 = true;
  3032. start.remove_inner_vlan = vlan_removal_en;
  3033. start.clear_stats = clear_stats;
  3034. rc = edev->ops->vport_start(cdev, &start);
  3035. if (rc) {
  3036. DP_ERR(edev, "Start V-PORT failed %d\n", rc);
  3037. return rc;
  3038. }
  3039. DP_VERBOSE(edev, NETIF_MSG_IFUP,
  3040. "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
  3041. start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
  3042. for_each_queue(i) {
  3043. struct qede_fastpath *fp = &edev->fp_array[i];
  3044. dma_addr_t p_phys_table;
  3045. u32 page_cnt;
  3046. if (fp->type & QEDE_FASTPATH_RX) {
  3047. struct qed_rxq_start_ret_params ret_params;
  3048. struct qede_rx_queue *rxq = fp->rxq;
  3049. __le16 *val;
  3050. memset(&ret_params, 0, sizeof(ret_params));
  3051. memset(&q_params, 0, sizeof(q_params));
  3052. q_params.queue_id = rxq->rxq_id;
  3053. q_params.vport_id = 0;
  3054. q_params.sb = fp->sb_info->igu_sb_id;
  3055. q_params.sb_idx = RX_PI;
  3056. p_phys_table =
  3057. qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
  3058. page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
  3059. rc = edev->ops->q_rx_start(cdev, i, &q_params,
  3060. rxq->rx_buf_size,
  3061. rxq->rx_bd_ring.p_phys_addr,
  3062. p_phys_table,
  3063. page_cnt, &ret_params);
  3064. if (rc) {
  3065. DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
  3066. rc);
  3067. return rc;
  3068. }
  3069. /* Use the return parameters */
  3070. rxq->hw_rxq_prod_addr = ret_params.p_prod;
  3071. rxq->handle = ret_params.p_handle;
  3072. val = &fp->sb_info->sb_virt->pi_array[RX_PI];
  3073. rxq->hw_cons_ptr = val;
  3074. qede_update_rx_prod(edev, rxq);
  3075. }
  3076. if (fp->type & QEDE_FASTPATH_XDP) {
  3077. rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
  3078. if (rc)
  3079. return rc;
  3080. fp->rxq->xdp_prog = bpf_prog_add(edev->xdp_prog, 1);
  3081. if (IS_ERR(fp->rxq->xdp_prog)) {
  3082. rc = PTR_ERR(fp->rxq->xdp_prog);
  3083. fp->rxq->xdp_prog = NULL;
  3084. return rc;
  3085. }
  3086. }
  3087. if (fp->type & QEDE_FASTPATH_TX) {
  3088. rc = qede_start_txq(edev, fp, fp->txq, i, TX_PI(0));
  3089. if (rc)
  3090. return rc;
  3091. }
  3092. }
  3093. /* Prepare and send the vport enable */
  3094. memset(&vport_update_params, 0, sizeof(vport_update_params));
  3095. vport_update_params.vport_id = start.vport_id;
  3096. vport_update_params.update_vport_active_flg = 1;
  3097. vport_update_params.vport_active_flg = 1;
  3098. if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
  3099. qed_info->tx_switching) {
  3100. vport_update_params.update_tx_switching_flg = 1;
  3101. vport_update_params.tx_switching_flg = 1;
  3102. }
  3103. /* Fill struct with RSS params */
  3104. if (QEDE_RSS_COUNT(edev) > 1) {
  3105. vport_update_params.update_rss_flg = 1;
  3106. /* Need to validate current RSS config uses valid entries */
  3107. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
  3108. if (edev->rss_params.rss_ind_table[i] >=
  3109. QEDE_RSS_COUNT(edev)) {
  3110. reset_rss_indir = true;
  3111. break;
  3112. }
  3113. }
  3114. if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
  3115. reset_rss_indir) {
  3116. u16 val;
  3117. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
  3118. u16 indir_val;
  3119. val = QEDE_RSS_COUNT(edev);
  3120. indir_val = ethtool_rxfh_indir_default(i, val);
  3121. edev->rss_params.rss_ind_table[i] = indir_val;
  3122. }
  3123. edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
  3124. }
  3125. if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
  3126. netdev_rss_key_fill(edev->rss_params.rss_key,
  3127. sizeof(edev->rss_params.rss_key));
  3128. edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
  3129. }
  3130. if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
  3131. edev->rss_params.rss_caps = QED_RSS_IPV4 |
  3132. QED_RSS_IPV6 |
  3133. QED_RSS_IPV4_TCP |
  3134. QED_RSS_IPV6_TCP;
  3135. edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
  3136. }
  3137. memcpy(&vport_update_params.rss_params, &edev->rss_params,
  3138. sizeof(vport_update_params.rss_params));
  3139. } else {
  3140. memset(&vport_update_params.rss_params, 0,
  3141. sizeof(vport_update_params.rss_params));
  3142. }
  3143. rc = edev->ops->vport_update(cdev, &vport_update_params);
  3144. if (rc) {
  3145. DP_ERR(edev, "Update V-PORT failed %d\n", rc);
  3146. return rc;
  3147. }
  3148. return 0;
  3149. }
  3150. static int qede_set_mcast_rx_mac(struct qede_dev *edev,
  3151. enum qed_filter_xcast_params_type opcode,
  3152. unsigned char *mac, int num_macs)
  3153. {
  3154. struct qed_filter_params filter_cmd;
  3155. int i;
  3156. memset(&filter_cmd, 0, sizeof(filter_cmd));
  3157. filter_cmd.type = QED_FILTER_TYPE_MCAST;
  3158. filter_cmd.filter.mcast.type = opcode;
  3159. filter_cmd.filter.mcast.num = num_macs;
  3160. for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
  3161. ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
  3162. return edev->ops->filter_config(edev->cdev, &filter_cmd);
  3163. }
  3164. enum qede_unload_mode {
  3165. QEDE_UNLOAD_NORMAL,
  3166. };
  3167. static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
  3168. bool is_locked)
  3169. {
  3170. struct qed_link_params link_params;
  3171. int rc;
  3172. DP_INFO(edev, "Starting qede unload\n");
  3173. if (!is_locked)
  3174. __qede_lock(edev);
  3175. qede_roce_dev_event_close(edev);
  3176. edev->state = QEDE_STATE_CLOSED;
  3177. /* Close OS Tx */
  3178. netif_tx_disable(edev->ndev);
  3179. netif_carrier_off(edev->ndev);
  3180. /* Reset the link */
  3181. memset(&link_params, 0, sizeof(link_params));
  3182. link_params.link_up = false;
  3183. edev->ops->common->set_link(edev->cdev, &link_params);
  3184. rc = qede_stop_queues(edev);
  3185. if (rc) {
  3186. qede_sync_free_irqs(edev);
  3187. goto out;
  3188. }
  3189. DP_INFO(edev, "Stopped Queues\n");
  3190. qede_vlan_mark_nonconfigured(edev);
  3191. edev->ops->fastpath_stop(edev->cdev);
  3192. /* Release the interrupts */
  3193. qede_sync_free_irqs(edev);
  3194. edev->ops->common->set_fp_int(edev->cdev, 0);
  3195. qede_napi_disable_remove(edev);
  3196. qede_free_mem_load(edev);
  3197. qede_free_fp_array(edev);
  3198. out:
  3199. if (!is_locked)
  3200. __qede_unlock(edev);
  3201. DP_INFO(edev, "Ending qede unload\n");
  3202. }
  3203. enum qede_load_mode {
  3204. QEDE_LOAD_NORMAL,
  3205. QEDE_LOAD_RELOAD,
  3206. };
  3207. static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
  3208. bool is_locked)
  3209. {
  3210. struct qed_link_params link_params;
  3211. struct qed_link_output link_output;
  3212. int rc;
  3213. DP_INFO(edev, "Starting qede load\n");
  3214. if (!is_locked)
  3215. __qede_lock(edev);
  3216. rc = qede_set_num_queues(edev);
  3217. if (rc)
  3218. goto out;
  3219. rc = qede_alloc_fp_array(edev);
  3220. if (rc)
  3221. goto out;
  3222. qede_init_fp(edev);
  3223. rc = qede_alloc_mem_load(edev);
  3224. if (rc)
  3225. goto err1;
  3226. DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
  3227. QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
  3228. rc = qede_set_real_num_queues(edev);
  3229. if (rc)
  3230. goto err2;
  3231. qede_napi_add_enable(edev);
  3232. DP_INFO(edev, "Napi added and enabled\n");
  3233. rc = qede_setup_irqs(edev);
  3234. if (rc)
  3235. goto err3;
  3236. DP_INFO(edev, "Setup IRQs succeeded\n");
  3237. rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
  3238. if (rc)
  3239. goto err4;
  3240. DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
  3241. /* Add primary mac and set Rx filters */
  3242. ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
  3243. /* Program un-configured VLANs */
  3244. qede_configure_vlan_filters(edev);
  3245. /* Ask for link-up using current configuration */
  3246. memset(&link_params, 0, sizeof(link_params));
  3247. link_params.link_up = true;
  3248. edev->ops->common->set_link(edev->cdev, &link_params);
  3249. /* Query whether link is already-up */
  3250. memset(&link_output, 0, sizeof(link_output));
  3251. edev->ops->common->get_link(edev->cdev, &link_output);
  3252. qede_roce_dev_event_open(edev);
  3253. qede_link_update(edev, &link_output);
  3254. edev->state = QEDE_STATE_OPEN;
  3255. DP_INFO(edev, "Ending successfully qede load\n");
  3256. goto out;
  3257. err4:
  3258. qede_sync_free_irqs(edev);
  3259. memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
  3260. err3:
  3261. qede_napi_disable_remove(edev);
  3262. err2:
  3263. qede_free_mem_load(edev);
  3264. err1:
  3265. edev->ops->common->set_fp_int(edev->cdev, 0);
  3266. qede_free_fp_array(edev);
  3267. edev->num_queues = 0;
  3268. edev->fp_num_tx = 0;
  3269. edev->fp_num_rx = 0;
  3270. out:
  3271. if (!is_locked)
  3272. __qede_unlock(edev);
  3273. return rc;
  3274. }
  3275. /* 'func' should be able to run between unload and reload assuming interface
  3276. * is actually running, or afterwards in case it's currently DOWN.
  3277. */
  3278. void qede_reload(struct qede_dev *edev,
  3279. struct qede_reload_args *args, bool is_locked)
  3280. {
  3281. if (!is_locked)
  3282. __qede_lock(edev);
  3283. /* Since qede_lock is held, internal state wouldn't change even
  3284. * if netdev state would start transitioning. Check whether current
  3285. * internal configuration indicates device is up, then reload.
  3286. */
  3287. if (edev->state == QEDE_STATE_OPEN) {
  3288. qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
  3289. if (args)
  3290. args->func(edev, args);
  3291. qede_load(edev, QEDE_LOAD_RELOAD, true);
  3292. /* Since no one is going to do it for us, re-configure */
  3293. qede_config_rx_mode(edev->ndev);
  3294. } else if (args) {
  3295. args->func(edev, args);
  3296. }
  3297. if (!is_locked)
  3298. __qede_unlock(edev);
  3299. }
  3300. /* called with rtnl_lock */
  3301. static int qede_open(struct net_device *ndev)
  3302. {
  3303. struct qede_dev *edev = netdev_priv(ndev);
  3304. int rc;
  3305. netif_carrier_off(ndev);
  3306. edev->ops->common->set_power_state(edev->cdev, PCI_D0);
  3307. rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
  3308. if (rc)
  3309. return rc;
  3310. udp_tunnel_get_rx_info(ndev);
  3311. edev->ops->common->update_drv_state(edev->cdev, true);
  3312. return 0;
  3313. }
  3314. static int qede_close(struct net_device *ndev)
  3315. {
  3316. struct qede_dev *edev = netdev_priv(ndev);
  3317. qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
  3318. edev->ops->common->update_drv_state(edev->cdev, false);
  3319. return 0;
  3320. }
  3321. static void qede_link_update(void *dev, struct qed_link_output *link)
  3322. {
  3323. struct qede_dev *edev = dev;
  3324. if (!netif_running(edev->ndev)) {
  3325. DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
  3326. return;
  3327. }
  3328. if (link->link_up) {
  3329. if (!netif_carrier_ok(edev->ndev)) {
  3330. DP_NOTICE(edev, "Link is up\n");
  3331. netif_tx_start_all_queues(edev->ndev);
  3332. netif_carrier_on(edev->ndev);
  3333. }
  3334. } else {
  3335. if (netif_carrier_ok(edev->ndev)) {
  3336. DP_NOTICE(edev, "Link is down\n");
  3337. netif_tx_disable(edev->ndev);
  3338. netif_carrier_off(edev->ndev);
  3339. }
  3340. }
  3341. }
  3342. static int qede_set_mac_addr(struct net_device *ndev, void *p)
  3343. {
  3344. struct qede_dev *edev = netdev_priv(ndev);
  3345. struct sockaddr *addr = p;
  3346. int rc;
  3347. ASSERT_RTNL(); /* @@@TBD To be removed */
  3348. DP_INFO(edev, "Set_mac_addr called\n");
  3349. if (!is_valid_ether_addr(addr->sa_data)) {
  3350. DP_NOTICE(edev, "The MAC address is not valid\n");
  3351. return -EFAULT;
  3352. }
  3353. if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
  3354. DP_NOTICE(edev, "qed prevents setting MAC\n");
  3355. return -EINVAL;
  3356. }
  3357. ether_addr_copy(ndev->dev_addr, addr->sa_data);
  3358. if (!netif_running(ndev)) {
  3359. DP_NOTICE(edev, "The device is currently down\n");
  3360. return 0;
  3361. }
  3362. /* Remove the previous primary mac */
  3363. rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
  3364. edev->primary_mac);
  3365. if (rc)
  3366. return rc;
  3367. edev->ops->common->update_mac(edev->cdev, addr->sa_data);
  3368. /* Add MAC filter according to the new unicast HW MAC address */
  3369. ether_addr_copy(edev->primary_mac, ndev->dev_addr);
  3370. return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
  3371. edev->primary_mac);
  3372. }
  3373. static int
  3374. qede_configure_mcast_filtering(struct net_device *ndev,
  3375. enum qed_filter_rx_mode_type *accept_flags)
  3376. {
  3377. struct qede_dev *edev = netdev_priv(ndev);
  3378. unsigned char *mc_macs, *temp;
  3379. struct netdev_hw_addr *ha;
  3380. int rc = 0, mc_count;
  3381. size_t size;
  3382. size = 64 * ETH_ALEN;
  3383. mc_macs = kzalloc(size, GFP_KERNEL);
  3384. if (!mc_macs) {
  3385. DP_NOTICE(edev,
  3386. "Failed to allocate memory for multicast MACs\n");
  3387. rc = -ENOMEM;
  3388. goto exit;
  3389. }
  3390. temp = mc_macs;
  3391. /* Remove all previously configured MAC filters */
  3392. rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
  3393. mc_macs, 1);
  3394. if (rc)
  3395. goto exit;
  3396. netif_addr_lock_bh(ndev);
  3397. mc_count = netdev_mc_count(ndev);
  3398. if (mc_count < 64) {
  3399. netdev_for_each_mc_addr(ha, ndev) {
  3400. ether_addr_copy(temp, ha->addr);
  3401. temp += ETH_ALEN;
  3402. }
  3403. }
  3404. netif_addr_unlock_bh(ndev);
  3405. /* Check for all multicast @@@TBD resource allocation */
  3406. if ((ndev->flags & IFF_ALLMULTI) ||
  3407. (mc_count > 64)) {
  3408. if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
  3409. *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
  3410. } else {
  3411. /* Add all multicast MAC filters */
  3412. rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
  3413. mc_macs, mc_count);
  3414. }
  3415. exit:
  3416. kfree(mc_macs);
  3417. return rc;
  3418. }
  3419. static void qede_set_rx_mode(struct net_device *ndev)
  3420. {
  3421. struct qede_dev *edev = netdev_priv(ndev);
  3422. set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
  3423. schedule_delayed_work(&edev->sp_task, 0);
  3424. }
  3425. /* Must be called with qede_lock held */
  3426. static void qede_config_rx_mode(struct net_device *ndev)
  3427. {
  3428. enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
  3429. struct qede_dev *edev = netdev_priv(ndev);
  3430. struct qed_filter_params rx_mode;
  3431. unsigned char *uc_macs, *temp;
  3432. struct netdev_hw_addr *ha;
  3433. int rc, uc_count;
  3434. size_t size;
  3435. netif_addr_lock_bh(ndev);
  3436. uc_count = netdev_uc_count(ndev);
  3437. size = uc_count * ETH_ALEN;
  3438. uc_macs = kzalloc(size, GFP_ATOMIC);
  3439. if (!uc_macs) {
  3440. DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
  3441. netif_addr_unlock_bh(ndev);
  3442. return;
  3443. }
  3444. temp = uc_macs;
  3445. netdev_for_each_uc_addr(ha, ndev) {
  3446. ether_addr_copy(temp, ha->addr);
  3447. temp += ETH_ALEN;
  3448. }
  3449. netif_addr_unlock_bh(ndev);
  3450. /* Configure the struct for the Rx mode */
  3451. memset(&rx_mode, 0, sizeof(struct qed_filter_params));
  3452. rx_mode.type = QED_FILTER_TYPE_RX_MODE;
  3453. /* Remove all previous unicast secondary macs and multicast macs
  3454. * (configrue / leave the primary mac)
  3455. */
  3456. rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
  3457. edev->primary_mac);
  3458. if (rc)
  3459. goto out;
  3460. /* Check for promiscuous */
  3461. if ((ndev->flags & IFF_PROMISC) ||
  3462. (uc_count > edev->dev_info.num_mac_filters - 1)) {
  3463. accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
  3464. } else {
  3465. /* Add MAC filters according to the unicast secondary macs */
  3466. int i;
  3467. temp = uc_macs;
  3468. for (i = 0; i < uc_count; i++) {
  3469. rc = qede_set_ucast_rx_mac(edev,
  3470. QED_FILTER_XCAST_TYPE_ADD,
  3471. temp);
  3472. if (rc)
  3473. goto out;
  3474. temp += ETH_ALEN;
  3475. }
  3476. rc = qede_configure_mcast_filtering(ndev, &accept_flags);
  3477. if (rc)
  3478. goto out;
  3479. }
  3480. /* take care of VLAN mode */
  3481. if (ndev->flags & IFF_PROMISC) {
  3482. qede_config_accept_any_vlan(edev, true);
  3483. } else if (!edev->non_configured_vlans) {
  3484. /* It's possible that accept_any_vlan mode is set due to a
  3485. * previous setting of IFF_PROMISC. If vlan credits are
  3486. * sufficient, disable accept_any_vlan.
  3487. */
  3488. qede_config_accept_any_vlan(edev, false);
  3489. }
  3490. rx_mode.filter.accept_flags = accept_flags;
  3491. edev->ops->filter_config(edev->cdev, &rx_mode);
  3492. out:
  3493. kfree(uc_macs);
  3494. }