qed_sriov.c 109 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096
  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015 QLogic Corporation
  3. *
  4. * This software is available under the terms of the GNU General Public License
  5. * (GPL) Version 2, available from the file COPYING in the main directory of
  6. * this source tree.
  7. */
  8. #include <linux/etherdevice.h>
  9. #include <linux/crc32.h>
  10. #include <linux/qed/qed_iov_if.h>
  11. #include "qed_cxt.h"
  12. #include "qed_hsi.h"
  13. #include "qed_hw.h"
  14. #include "qed_init_ops.h"
  15. #include "qed_int.h"
  16. #include "qed_mcp.h"
  17. #include "qed_reg_addr.h"
  18. #include "qed_sp.h"
  19. #include "qed_sriov.h"
  20. #include "qed_vf.h"
  21. /* IOV ramrods */
  22. static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
  23. {
  24. struct vf_start_ramrod_data *p_ramrod = NULL;
  25. struct qed_spq_entry *p_ent = NULL;
  26. struct qed_sp_init_data init_data;
  27. int rc = -EINVAL;
  28. u8 fp_minor;
  29. /* Get SPQ entry */
  30. memset(&init_data, 0, sizeof(init_data));
  31. init_data.cid = qed_spq_get_cid(p_hwfn);
  32. init_data.opaque_fid = p_vf->opaque_fid;
  33. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  34. rc = qed_sp_init_request(p_hwfn, &p_ent,
  35. COMMON_RAMROD_VF_START,
  36. PROTOCOLID_COMMON, &init_data);
  37. if (rc)
  38. return rc;
  39. p_ramrod = &p_ent->ramrod.vf_start;
  40. p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
  41. p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
  42. switch (p_hwfn->hw_info.personality) {
  43. case QED_PCI_ETH:
  44. p_ramrod->personality = PERSONALITY_ETH;
  45. break;
  46. case QED_PCI_ETH_ROCE:
  47. p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
  48. break;
  49. default:
  50. DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
  51. p_hwfn->hw_info.personality);
  52. return -EINVAL;
  53. }
  54. fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
  55. if (fp_minor > ETH_HSI_VER_MINOR &&
  56. fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) {
  57. DP_VERBOSE(p_hwfn,
  58. QED_MSG_IOV,
  59. "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
  60. p_vf->abs_vf_id,
  61. ETH_HSI_VER_MAJOR,
  62. fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
  63. fp_minor = ETH_HSI_VER_MINOR;
  64. }
  65. p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
  66. p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
  67. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  68. "VF[%d] - Starting using HSI %02x.%02x\n",
  69. p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
  70. return qed_spq_post(p_hwfn, p_ent, NULL);
  71. }
  72. static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
  73. u32 concrete_vfid, u16 opaque_vfid)
  74. {
  75. struct vf_stop_ramrod_data *p_ramrod = NULL;
  76. struct qed_spq_entry *p_ent = NULL;
  77. struct qed_sp_init_data init_data;
  78. int rc = -EINVAL;
  79. /* Get SPQ entry */
  80. memset(&init_data, 0, sizeof(init_data));
  81. init_data.cid = qed_spq_get_cid(p_hwfn);
  82. init_data.opaque_fid = opaque_vfid;
  83. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  84. rc = qed_sp_init_request(p_hwfn, &p_ent,
  85. COMMON_RAMROD_VF_STOP,
  86. PROTOCOLID_COMMON, &init_data);
  87. if (rc)
  88. return rc;
  89. p_ramrod = &p_ent->ramrod.vf_stop;
  90. p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
  91. return qed_spq_post(p_hwfn, p_ent, NULL);
  92. }
  93. static bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
  94. int rel_vf_id,
  95. bool b_enabled_only, bool b_non_malicious)
  96. {
  97. if (!p_hwfn->pf_iov_info) {
  98. DP_NOTICE(p_hwfn->cdev, "No iov info\n");
  99. return false;
  100. }
  101. if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
  102. (rel_vf_id < 0))
  103. return false;
  104. if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
  105. b_enabled_only)
  106. return false;
  107. if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) &&
  108. b_non_malicious)
  109. return false;
  110. return true;
  111. }
  112. static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
  113. u16 relative_vf_id,
  114. bool b_enabled_only)
  115. {
  116. struct qed_vf_info *vf = NULL;
  117. if (!p_hwfn->pf_iov_info) {
  118. DP_NOTICE(p_hwfn->cdev, "No iov info\n");
  119. return NULL;
  120. }
  121. if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id,
  122. b_enabled_only, false))
  123. vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
  124. else
  125. DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
  126. relative_vf_id);
  127. return vf;
  128. }
  129. static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn,
  130. struct qed_vf_info *p_vf, u16 rx_qid)
  131. {
  132. if (rx_qid >= p_vf->num_rxqs)
  133. DP_VERBOSE(p_hwfn,
  134. QED_MSG_IOV,
  135. "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n",
  136. p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
  137. return rx_qid < p_vf->num_rxqs;
  138. }
  139. static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn,
  140. struct qed_vf_info *p_vf, u16 tx_qid)
  141. {
  142. if (tx_qid >= p_vf->num_txqs)
  143. DP_VERBOSE(p_hwfn,
  144. QED_MSG_IOV,
  145. "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n",
  146. p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
  147. return tx_qid < p_vf->num_txqs;
  148. }
  149. static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn,
  150. struct qed_vf_info *p_vf, u16 sb_idx)
  151. {
  152. int i;
  153. for (i = 0; i < p_vf->num_sbs; i++)
  154. if (p_vf->igu_sbs[i] == sb_idx)
  155. return true;
  156. DP_VERBOSE(p_hwfn,
  157. QED_MSG_IOV,
  158. "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n",
  159. p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
  160. return false;
  161. }
  162. static int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
  163. int vfid, struct qed_ptt *p_ptt)
  164. {
  165. struct qed_bulletin_content *p_bulletin;
  166. int crc_size = sizeof(p_bulletin->crc);
  167. struct qed_dmae_params params;
  168. struct qed_vf_info *p_vf;
  169. p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  170. if (!p_vf)
  171. return -EINVAL;
  172. if (!p_vf->vf_bulletin)
  173. return -EINVAL;
  174. p_bulletin = p_vf->bulletin.p_virt;
  175. /* Increment bulletin board version and compute crc */
  176. p_bulletin->version++;
  177. p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
  178. p_vf->bulletin.size - crc_size);
  179. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  180. "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
  181. p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
  182. /* propagate bulletin board via dmae to vm memory */
  183. memset(&params, 0, sizeof(params));
  184. params.flags = QED_DMAE_FLAG_VF_DST;
  185. params.dst_vfid = p_vf->abs_vf_id;
  186. return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
  187. p_vf->vf_bulletin, p_vf->bulletin.size / 4,
  188. &params);
  189. }
  190. static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
  191. {
  192. struct qed_hw_sriov_info *iov = cdev->p_iov_info;
  193. int pos = iov->pos;
  194. DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
  195. pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
  196. pci_read_config_word(cdev->pdev,
  197. pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
  198. pci_read_config_word(cdev->pdev,
  199. pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
  200. pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
  201. if (iov->num_vfs) {
  202. DP_VERBOSE(cdev,
  203. QED_MSG_IOV,
  204. "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
  205. iov->num_vfs = 0;
  206. }
  207. pci_read_config_word(cdev->pdev,
  208. pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  209. pci_read_config_word(cdev->pdev,
  210. pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  211. pci_read_config_word(cdev->pdev,
  212. pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
  213. pci_read_config_dword(cdev->pdev,
  214. pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
  215. pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
  216. pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  217. DP_VERBOSE(cdev,
  218. QED_MSG_IOV,
  219. "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
  220. iov->nres,
  221. iov->cap,
  222. iov->ctrl,
  223. iov->total_vfs,
  224. iov->initial_vfs,
  225. iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
  226. /* Some sanity checks */
  227. if (iov->num_vfs > NUM_OF_VFS(cdev) ||
  228. iov->total_vfs > NUM_OF_VFS(cdev)) {
  229. /* This can happen only due to a bug. In this case we set
  230. * num_vfs to zero to avoid memory corruption in the code that
  231. * assumes max number of vfs
  232. */
  233. DP_NOTICE(cdev,
  234. "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
  235. iov->num_vfs);
  236. iov->num_vfs = 0;
  237. iov->total_vfs = 0;
  238. }
  239. return 0;
  240. }
  241. static void qed_iov_clear_vf_igu_blocks(struct qed_hwfn *p_hwfn,
  242. struct qed_ptt *p_ptt)
  243. {
  244. struct qed_igu_block *p_sb;
  245. u16 sb_id;
  246. u32 val;
  247. if (!p_hwfn->hw_info.p_igu_info) {
  248. DP_ERR(p_hwfn,
  249. "qed_iov_clear_vf_igu_blocks IGU Info not initialized\n");
  250. return;
  251. }
  252. for (sb_id = 0; sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev);
  253. sb_id++) {
  254. p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
  255. if ((p_sb->status & QED_IGU_STATUS_FREE) &&
  256. !(p_sb->status & QED_IGU_STATUS_PF)) {
  257. val = qed_rd(p_hwfn, p_ptt,
  258. IGU_REG_MAPPING_MEMORY + sb_id * 4);
  259. SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
  260. qed_wr(p_hwfn, p_ptt,
  261. IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
  262. }
  263. }
  264. }
  265. static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
  266. {
  267. struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
  268. struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
  269. struct qed_bulletin_content *p_bulletin_virt;
  270. dma_addr_t req_p, rply_p, bulletin_p;
  271. union pfvf_tlvs *p_reply_virt_addr;
  272. union vfpf_tlvs *p_req_virt_addr;
  273. u8 idx = 0;
  274. memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
  275. p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
  276. req_p = p_iov_info->mbx_msg_phys_addr;
  277. p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
  278. rply_p = p_iov_info->mbx_reply_phys_addr;
  279. p_bulletin_virt = p_iov_info->p_bulletins;
  280. bulletin_p = p_iov_info->bulletins_phys;
  281. if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
  282. DP_ERR(p_hwfn,
  283. "qed_iov_setup_vfdb called without allocating mem first\n");
  284. return;
  285. }
  286. for (idx = 0; idx < p_iov->total_vfs; idx++) {
  287. struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
  288. u32 concrete;
  289. vf->vf_mbx.req_virt = p_req_virt_addr + idx;
  290. vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
  291. vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
  292. vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
  293. vf->state = VF_STOPPED;
  294. vf->b_init = false;
  295. vf->bulletin.phys = idx *
  296. sizeof(struct qed_bulletin_content) +
  297. bulletin_p;
  298. vf->bulletin.p_virt = p_bulletin_virt + idx;
  299. vf->bulletin.size = sizeof(struct qed_bulletin_content);
  300. vf->relative_vf_id = idx;
  301. vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
  302. concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
  303. vf->concrete_fid = concrete;
  304. vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
  305. (vf->abs_vf_id << 8);
  306. vf->vport_id = idx + 1;
  307. vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
  308. vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
  309. }
  310. }
  311. static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
  312. {
  313. struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
  314. void **p_v_addr;
  315. u16 num_vfs = 0;
  316. num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
  317. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  318. "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
  319. /* Allocate PF Mailbox buffer (per-VF) */
  320. p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
  321. p_v_addr = &p_iov_info->mbx_msg_virt_addr;
  322. *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  323. p_iov_info->mbx_msg_size,
  324. &p_iov_info->mbx_msg_phys_addr,
  325. GFP_KERNEL);
  326. if (!*p_v_addr)
  327. return -ENOMEM;
  328. /* Allocate PF Mailbox Reply buffer (per-VF) */
  329. p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
  330. p_v_addr = &p_iov_info->mbx_reply_virt_addr;
  331. *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  332. p_iov_info->mbx_reply_size,
  333. &p_iov_info->mbx_reply_phys_addr,
  334. GFP_KERNEL);
  335. if (!*p_v_addr)
  336. return -ENOMEM;
  337. p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
  338. num_vfs;
  339. p_v_addr = &p_iov_info->p_bulletins;
  340. *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  341. p_iov_info->bulletins_size,
  342. &p_iov_info->bulletins_phys,
  343. GFP_KERNEL);
  344. if (!*p_v_addr)
  345. return -ENOMEM;
  346. DP_VERBOSE(p_hwfn,
  347. QED_MSG_IOV,
  348. "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
  349. p_iov_info->mbx_msg_virt_addr,
  350. (u64) p_iov_info->mbx_msg_phys_addr,
  351. p_iov_info->mbx_reply_virt_addr,
  352. (u64) p_iov_info->mbx_reply_phys_addr,
  353. p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
  354. return 0;
  355. }
  356. static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
  357. {
  358. struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
  359. if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
  360. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  361. p_iov_info->mbx_msg_size,
  362. p_iov_info->mbx_msg_virt_addr,
  363. p_iov_info->mbx_msg_phys_addr);
  364. if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
  365. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  366. p_iov_info->mbx_reply_size,
  367. p_iov_info->mbx_reply_virt_addr,
  368. p_iov_info->mbx_reply_phys_addr);
  369. if (p_iov_info->p_bulletins)
  370. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  371. p_iov_info->bulletins_size,
  372. p_iov_info->p_bulletins,
  373. p_iov_info->bulletins_phys);
  374. }
  375. int qed_iov_alloc(struct qed_hwfn *p_hwfn)
  376. {
  377. struct qed_pf_iov *p_sriov;
  378. if (!IS_PF_SRIOV(p_hwfn)) {
  379. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  380. "No SR-IOV - no need for IOV db\n");
  381. return 0;
  382. }
  383. p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
  384. if (!p_sriov)
  385. return -ENOMEM;
  386. p_hwfn->pf_iov_info = p_sriov;
  387. return qed_iov_allocate_vfdb(p_hwfn);
  388. }
  389. void qed_iov_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  390. {
  391. if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
  392. return;
  393. qed_iov_setup_vfdb(p_hwfn);
  394. qed_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
  395. }
  396. void qed_iov_free(struct qed_hwfn *p_hwfn)
  397. {
  398. if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
  399. qed_iov_free_vfdb(p_hwfn);
  400. kfree(p_hwfn->pf_iov_info);
  401. }
  402. }
  403. void qed_iov_free_hw_info(struct qed_dev *cdev)
  404. {
  405. kfree(cdev->p_iov_info);
  406. cdev->p_iov_info = NULL;
  407. }
  408. int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
  409. {
  410. struct qed_dev *cdev = p_hwfn->cdev;
  411. int pos;
  412. int rc;
  413. if (IS_VF(p_hwfn->cdev))
  414. return 0;
  415. /* Learn the PCI configuration */
  416. pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
  417. PCI_EXT_CAP_ID_SRIOV);
  418. if (!pos) {
  419. DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
  420. return 0;
  421. }
  422. /* Allocate a new struct for IOV information */
  423. cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
  424. if (!cdev->p_iov_info)
  425. return -ENOMEM;
  426. cdev->p_iov_info->pos = pos;
  427. rc = qed_iov_pci_cfg_info(cdev);
  428. if (rc)
  429. return rc;
  430. /* We want PF IOV to be synonemous with the existance of p_iov_info;
  431. * In case the capability is published but there are no VFs, simply
  432. * de-allocate the struct.
  433. */
  434. if (!cdev->p_iov_info->total_vfs) {
  435. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  436. "IOV capabilities, but no VFs are published\n");
  437. kfree(cdev->p_iov_info);
  438. cdev->p_iov_info = NULL;
  439. return 0;
  440. }
  441. /* Calculate the first VF index - this is a bit tricky; Basically,
  442. * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
  443. * after the first engine's VFs.
  444. */
  445. cdev->p_iov_info->first_vf_in_pf = p_hwfn->cdev->p_iov_info->offset +
  446. p_hwfn->abs_pf_id - 16;
  447. if (QED_PATH_ID(p_hwfn))
  448. cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
  449. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  450. "First VF in hwfn 0x%08x\n",
  451. cdev->p_iov_info->first_vf_in_pf);
  452. return 0;
  453. }
  454. bool _qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn,
  455. int vfid, bool b_fail_malicious)
  456. {
  457. /* Check PF supports sriov */
  458. if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
  459. !IS_PF_SRIOV_ALLOC(p_hwfn))
  460. return false;
  461. /* Check VF validity */
  462. if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious))
  463. return false;
  464. return true;
  465. }
  466. bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
  467. {
  468. return _qed_iov_pf_sanity_check(p_hwfn, vfid, true);
  469. }
  470. static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
  471. u16 rel_vf_id, u8 to_disable)
  472. {
  473. struct qed_vf_info *vf;
  474. int i;
  475. for_each_hwfn(cdev, i) {
  476. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  477. vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
  478. if (!vf)
  479. continue;
  480. vf->to_disable = to_disable;
  481. }
  482. }
  483. static void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
  484. {
  485. u16 i;
  486. if (!IS_QED_SRIOV(cdev))
  487. return;
  488. for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
  489. qed_iov_set_vf_to_disable(cdev, i, to_disable);
  490. }
  491. static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
  492. struct qed_ptt *p_ptt, u8 abs_vfid)
  493. {
  494. qed_wr(p_hwfn, p_ptt,
  495. PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
  496. 1 << (abs_vfid & 0x1f));
  497. }
  498. static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
  499. struct qed_ptt *p_ptt, struct qed_vf_info *vf)
  500. {
  501. int i;
  502. /* Set VF masks and configuration - pretend */
  503. qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
  504. qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
  505. /* unpretend */
  506. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  507. /* iterate over all queues, clear sb consumer */
  508. for (i = 0; i < vf->num_sbs; i++)
  509. qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
  510. vf->igu_sbs[i],
  511. vf->opaque_fid, true);
  512. }
  513. static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
  514. struct qed_ptt *p_ptt,
  515. struct qed_vf_info *vf, bool enable)
  516. {
  517. u32 igu_vf_conf;
  518. qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
  519. igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
  520. if (enable)
  521. igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
  522. else
  523. igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
  524. qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
  525. /* unpretend */
  526. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  527. }
  528. static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
  529. struct qed_ptt *p_ptt,
  530. struct qed_vf_info *vf)
  531. {
  532. u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
  533. int rc;
  534. if (vf->to_disable)
  535. return 0;
  536. DP_VERBOSE(p_hwfn,
  537. QED_MSG_IOV,
  538. "Enable internal access for vf %x [abs %x]\n",
  539. vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
  540. qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
  541. qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
  542. /* It's possible VF was previously considered malicious */
  543. vf->b_malicious = false;
  544. rc = qed_mcp_config_vf_msix(p_hwfn, p_ptt, vf->abs_vf_id, vf->num_sbs);
  545. if (rc)
  546. return rc;
  547. qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
  548. SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
  549. STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
  550. qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
  551. p_hwfn->hw_info.hw_mode);
  552. /* unpretend */
  553. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  554. vf->state = VF_FREE;
  555. return rc;
  556. }
  557. /**
  558. * @brief qed_iov_config_perm_table - configure the permission
  559. * zone table.
  560. * In E4, queue zone permission table size is 320x9. There
  561. * are 320 VF queues for single engine device (256 for dual
  562. * engine device), and each entry has the following format:
  563. * {Valid, VF[7:0]}
  564. * @param p_hwfn
  565. * @param p_ptt
  566. * @param vf
  567. * @param enable
  568. */
  569. static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
  570. struct qed_ptt *p_ptt,
  571. struct qed_vf_info *vf, u8 enable)
  572. {
  573. u32 reg_addr, val;
  574. u16 qzone_id = 0;
  575. int qid;
  576. for (qid = 0; qid < vf->num_rxqs; qid++) {
  577. qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
  578. &qzone_id);
  579. reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
  580. val = enable ? (vf->abs_vf_id | BIT(8)) : 0;
  581. qed_wr(p_hwfn, p_ptt, reg_addr, val);
  582. }
  583. }
  584. static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
  585. struct qed_ptt *p_ptt,
  586. struct qed_vf_info *vf)
  587. {
  588. /* Reset vf in IGU - interrupts are still disabled */
  589. qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
  590. qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
  591. /* Permission Table */
  592. qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
  593. }
  594. static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
  595. struct qed_ptt *p_ptt,
  596. struct qed_vf_info *vf, u16 num_rx_queues)
  597. {
  598. struct qed_igu_block *igu_blocks;
  599. int qid = 0, igu_id = 0;
  600. u32 val = 0;
  601. igu_blocks = p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
  602. if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
  603. num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
  604. p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
  605. SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
  606. SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
  607. SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
  608. while ((qid < num_rx_queues) &&
  609. (igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev))) {
  610. if (igu_blocks[igu_id].status & QED_IGU_STATUS_FREE) {
  611. struct cau_sb_entry sb_entry;
  612. vf->igu_sbs[qid] = (u16)igu_id;
  613. igu_blocks[igu_id].status &= ~QED_IGU_STATUS_FREE;
  614. SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
  615. qed_wr(p_hwfn, p_ptt,
  616. IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
  617. val);
  618. /* Configure igu sb in CAU which were marked valid */
  619. qed_init_cau_sb_entry(p_hwfn, &sb_entry,
  620. p_hwfn->rel_pf_id,
  621. vf->abs_vf_id, 1);
  622. qed_dmae_host2grc(p_hwfn, p_ptt,
  623. (u64)(uintptr_t)&sb_entry,
  624. CAU_REG_SB_VAR_MEMORY +
  625. igu_id * sizeof(u64), 2, 0);
  626. qid++;
  627. }
  628. igu_id++;
  629. }
  630. vf->num_sbs = (u8) num_rx_queues;
  631. return vf->num_sbs;
  632. }
  633. static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
  634. struct qed_ptt *p_ptt,
  635. struct qed_vf_info *vf)
  636. {
  637. struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
  638. int idx, igu_id;
  639. u32 addr, val;
  640. /* Invalidate igu CAM lines and mark them as free */
  641. for (idx = 0; idx < vf->num_sbs; idx++) {
  642. igu_id = vf->igu_sbs[idx];
  643. addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
  644. val = qed_rd(p_hwfn, p_ptt, addr);
  645. SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
  646. qed_wr(p_hwfn, p_ptt, addr, val);
  647. p_info->igu_map.igu_blocks[igu_id].status |=
  648. QED_IGU_STATUS_FREE;
  649. p_hwfn->hw_info.p_igu_info->free_blks++;
  650. }
  651. vf->num_sbs = 0;
  652. }
  653. static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
  654. struct qed_ptt *p_ptt,
  655. struct qed_iov_vf_init_params *p_params)
  656. {
  657. u8 num_of_vf_avaiable_chains = 0;
  658. struct qed_vf_info *vf = NULL;
  659. u16 qid, num_irqs;
  660. int rc = 0;
  661. u32 cids;
  662. u8 i;
  663. vf = qed_iov_get_vf_info(p_hwfn, p_params->rel_vf_id, false);
  664. if (!vf) {
  665. DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
  666. return -EINVAL;
  667. }
  668. if (vf->b_init) {
  669. DP_NOTICE(p_hwfn, "VF[%d] is already active.\n",
  670. p_params->rel_vf_id);
  671. return -EINVAL;
  672. }
  673. /* Perform sanity checking on the requested queue_id */
  674. for (i = 0; i < p_params->num_queues; i++) {
  675. u16 min_vf_qzone = FEAT_NUM(p_hwfn, QED_PF_L2_QUE);
  676. u16 max_vf_qzone = min_vf_qzone +
  677. FEAT_NUM(p_hwfn, QED_VF_L2_QUE) - 1;
  678. qid = p_params->req_rx_queue[i];
  679. if (qid < min_vf_qzone || qid > max_vf_qzone) {
  680. DP_NOTICE(p_hwfn,
  681. "Can't enable Rx qid [%04x] for VF[%d]: qids [0x%04x,...,0x%04x] available\n",
  682. qid,
  683. p_params->rel_vf_id,
  684. min_vf_qzone, max_vf_qzone);
  685. return -EINVAL;
  686. }
  687. qid = p_params->req_tx_queue[i];
  688. if (qid > max_vf_qzone) {
  689. DP_NOTICE(p_hwfn,
  690. "Can't enable Tx qid [%04x] for VF[%d]: max qid 0x%04x\n",
  691. qid, p_params->rel_vf_id, max_vf_qzone);
  692. return -EINVAL;
  693. }
  694. /* If client *really* wants, Tx qid can be shared with PF */
  695. if (qid < min_vf_qzone)
  696. DP_VERBOSE(p_hwfn,
  697. QED_MSG_IOV,
  698. "VF[%d] is using PF qid [0x%04x] for Txq[0x%02x]\n",
  699. p_params->rel_vf_id, qid, i);
  700. }
  701. /* Limit number of queues according to number of CIDs */
  702. qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
  703. DP_VERBOSE(p_hwfn,
  704. QED_MSG_IOV,
  705. "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
  706. vf->relative_vf_id, p_params->num_queues, (u16)cids);
  707. num_irqs = min_t(u16, p_params->num_queues, ((u16)cids));
  708. num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
  709. p_ptt,
  710. vf, num_irqs);
  711. if (!num_of_vf_avaiable_chains) {
  712. DP_ERR(p_hwfn, "no available igu sbs\n");
  713. return -ENOMEM;
  714. }
  715. /* Choose queue number and index ranges */
  716. vf->num_rxqs = num_of_vf_avaiable_chains;
  717. vf->num_txqs = num_of_vf_avaiable_chains;
  718. for (i = 0; i < vf->num_rxqs; i++) {
  719. struct qed_vf_q_info *p_queue = &vf->vf_queues[i];
  720. p_queue->fw_rx_qid = p_params->req_rx_queue[i];
  721. p_queue->fw_tx_qid = p_params->req_tx_queue[i];
  722. /* CIDs are per-VF, so no problem having them 0-based. */
  723. p_queue->fw_cid = i;
  724. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  725. "VF[%d] - Q[%d] SB %04x, qid [Rx %04x Tx %04x] CID %04x\n",
  726. vf->relative_vf_id,
  727. i, vf->igu_sbs[i],
  728. p_queue->fw_rx_qid,
  729. p_queue->fw_tx_qid, p_queue->fw_cid);
  730. }
  731. rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
  732. if (!rc) {
  733. vf->b_init = true;
  734. if (IS_LEAD_HWFN(p_hwfn))
  735. p_hwfn->cdev->p_iov_info->num_vfs++;
  736. }
  737. return rc;
  738. }
  739. static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
  740. u16 vfid,
  741. struct qed_mcp_link_params *params,
  742. struct qed_mcp_link_state *link,
  743. struct qed_mcp_link_capabilities *p_caps)
  744. {
  745. struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
  746. vfid,
  747. false);
  748. struct qed_bulletin_content *p_bulletin;
  749. if (!p_vf)
  750. return;
  751. p_bulletin = p_vf->bulletin.p_virt;
  752. p_bulletin->req_autoneg = params->speed.autoneg;
  753. p_bulletin->req_adv_speed = params->speed.advertised_speeds;
  754. p_bulletin->req_forced_speed = params->speed.forced_speed;
  755. p_bulletin->req_autoneg_pause = params->pause.autoneg;
  756. p_bulletin->req_forced_rx = params->pause.forced_rx;
  757. p_bulletin->req_forced_tx = params->pause.forced_tx;
  758. p_bulletin->req_loopback = params->loopback_mode;
  759. p_bulletin->link_up = link->link_up;
  760. p_bulletin->speed = link->speed;
  761. p_bulletin->full_duplex = link->full_duplex;
  762. p_bulletin->autoneg = link->an;
  763. p_bulletin->autoneg_complete = link->an_complete;
  764. p_bulletin->parallel_detection = link->parallel_detection;
  765. p_bulletin->pfc_enabled = link->pfc_enabled;
  766. p_bulletin->partner_adv_speed = link->partner_adv_speed;
  767. p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
  768. p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
  769. p_bulletin->partner_adv_pause = link->partner_adv_pause;
  770. p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
  771. p_bulletin->capability_speed = p_caps->speed_capabilities;
  772. }
  773. static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
  774. struct qed_ptt *p_ptt, u16 rel_vf_id)
  775. {
  776. struct qed_mcp_link_capabilities caps;
  777. struct qed_mcp_link_params params;
  778. struct qed_mcp_link_state link;
  779. struct qed_vf_info *vf = NULL;
  780. vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
  781. if (!vf) {
  782. DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
  783. return -EINVAL;
  784. }
  785. if (vf->bulletin.p_virt)
  786. memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
  787. memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
  788. /* Get the link configuration back in bulletin so
  789. * that when VFs are re-enabled they get the actual
  790. * link configuration.
  791. */
  792. memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
  793. memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
  794. memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
  795. qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
  796. /* Forget the VF's acquisition message */
  797. memset(&vf->acquire, 0, sizeof(vf->acquire));
  798. /* disablng interrupts and resetting permission table was done during
  799. * vf-close, however, we could get here without going through vf_close
  800. */
  801. /* Disable Interrupts for VF */
  802. qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
  803. /* Reset Permission table */
  804. qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
  805. vf->num_rxqs = 0;
  806. vf->num_txqs = 0;
  807. qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
  808. if (vf->b_init) {
  809. vf->b_init = false;
  810. if (IS_LEAD_HWFN(p_hwfn))
  811. p_hwfn->cdev->p_iov_info->num_vfs--;
  812. }
  813. return 0;
  814. }
  815. static bool qed_iov_tlv_supported(u16 tlvtype)
  816. {
  817. return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
  818. }
  819. /* place a given tlv on the tlv buffer, continuing current tlv list */
  820. void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
  821. {
  822. struct channel_tlv *tl = (struct channel_tlv *)*offset;
  823. tl->type = type;
  824. tl->length = length;
  825. /* Offset should keep pointing to next TLV (the end of the last) */
  826. *offset += length;
  827. /* Return a pointer to the start of the added tlv */
  828. return *offset - length;
  829. }
  830. /* list the types and lengths of the tlvs on the buffer */
  831. void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
  832. {
  833. u16 i = 1, total_length = 0;
  834. struct channel_tlv *tlv;
  835. do {
  836. tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
  837. /* output tlv */
  838. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  839. "TLV number %d: type %d, length %d\n",
  840. i, tlv->type, tlv->length);
  841. if (tlv->type == CHANNEL_TLV_LIST_END)
  842. return;
  843. /* Validate entry - protect against malicious VFs */
  844. if (!tlv->length) {
  845. DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
  846. return;
  847. }
  848. total_length += tlv->length;
  849. if (total_length >= sizeof(struct tlv_buffer_size)) {
  850. DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
  851. return;
  852. }
  853. i++;
  854. } while (1);
  855. }
  856. static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
  857. struct qed_ptt *p_ptt,
  858. struct qed_vf_info *p_vf,
  859. u16 length, u8 status)
  860. {
  861. struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
  862. struct qed_dmae_params params;
  863. u8 eng_vf_id;
  864. mbx->reply_virt->default_resp.hdr.status = status;
  865. qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
  866. eng_vf_id = p_vf->abs_vf_id;
  867. memset(&params, 0, sizeof(struct qed_dmae_params));
  868. params.flags = QED_DMAE_FLAG_VF_DST;
  869. params.dst_vfid = eng_vf_id;
  870. qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
  871. mbx->req_virt->first_tlv.reply_address +
  872. sizeof(u64),
  873. (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
  874. &params);
  875. qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
  876. mbx->req_virt->first_tlv.reply_address,
  877. sizeof(u64) / 4, &params);
  878. REG_WR(p_hwfn,
  879. GTT_BAR0_MAP_REG_USDM_RAM +
  880. USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
  881. }
  882. static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
  883. enum qed_iov_vport_update_flag flag)
  884. {
  885. switch (flag) {
  886. case QED_IOV_VP_UPDATE_ACTIVATE:
  887. return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
  888. case QED_IOV_VP_UPDATE_VLAN_STRIP:
  889. return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
  890. case QED_IOV_VP_UPDATE_TX_SWITCH:
  891. return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
  892. case QED_IOV_VP_UPDATE_MCAST:
  893. return CHANNEL_TLV_VPORT_UPDATE_MCAST;
  894. case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
  895. return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
  896. case QED_IOV_VP_UPDATE_RSS:
  897. return CHANNEL_TLV_VPORT_UPDATE_RSS;
  898. case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
  899. return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
  900. case QED_IOV_VP_UPDATE_SGE_TPA:
  901. return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
  902. default:
  903. return 0;
  904. }
  905. }
  906. static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
  907. struct qed_vf_info *p_vf,
  908. struct qed_iov_vf_mbx *p_mbx,
  909. u8 status,
  910. u16 tlvs_mask, u16 tlvs_accepted)
  911. {
  912. struct pfvf_def_resp_tlv *resp;
  913. u16 size, total_len, i;
  914. memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
  915. p_mbx->offset = (u8 *)p_mbx->reply_virt;
  916. size = sizeof(struct pfvf_def_resp_tlv);
  917. total_len = size;
  918. qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
  919. /* Prepare response for all extended tlvs if they are found by PF */
  920. for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
  921. if (!(tlvs_mask & BIT(i)))
  922. continue;
  923. resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
  924. qed_iov_vport_to_tlv(p_hwfn, i), size);
  925. if (tlvs_accepted & BIT(i))
  926. resp->hdr.status = status;
  927. else
  928. resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
  929. DP_VERBOSE(p_hwfn,
  930. QED_MSG_IOV,
  931. "VF[%d] - vport_update response: TLV %d, status %02x\n",
  932. p_vf->relative_vf_id,
  933. qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
  934. total_len += size;
  935. }
  936. qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
  937. sizeof(struct channel_list_end_tlv));
  938. return total_len;
  939. }
  940. static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
  941. struct qed_ptt *p_ptt,
  942. struct qed_vf_info *vf_info,
  943. u16 type, u16 length, u8 status)
  944. {
  945. struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
  946. mbx->offset = (u8 *)mbx->reply_virt;
  947. qed_add_tlv(p_hwfn, &mbx->offset, type, length);
  948. qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
  949. sizeof(struct channel_list_end_tlv));
  950. qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
  951. }
  952. static struct
  953. qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
  954. u16 relative_vf_id,
  955. bool b_enabled_only)
  956. {
  957. struct qed_vf_info *vf = NULL;
  958. vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
  959. if (!vf)
  960. return NULL;
  961. return &vf->p_vf_info;
  962. }
  963. static void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
  964. {
  965. struct qed_public_vf_info *vf_info;
  966. vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
  967. if (!vf_info)
  968. return;
  969. /* Clear the VF mac */
  970. memset(vf_info->mac, 0, ETH_ALEN);
  971. }
  972. static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
  973. struct qed_vf_info *p_vf)
  974. {
  975. u32 i;
  976. p_vf->vf_bulletin = 0;
  977. p_vf->vport_instance = 0;
  978. p_vf->configured_features = 0;
  979. /* If VF previously requested less resources, go back to default */
  980. p_vf->num_rxqs = p_vf->num_sbs;
  981. p_vf->num_txqs = p_vf->num_sbs;
  982. p_vf->num_active_rxqs = 0;
  983. for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
  984. struct qed_vf_q_info *p_queue = &p_vf->vf_queues[i];
  985. if (p_queue->p_rx_cid) {
  986. qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
  987. p_queue->p_rx_cid = NULL;
  988. }
  989. if (p_queue->p_tx_cid) {
  990. qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
  991. p_queue->p_tx_cid = NULL;
  992. }
  993. }
  994. memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
  995. memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
  996. qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
  997. }
  998. static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
  999. struct qed_ptt *p_ptt,
  1000. struct qed_vf_info *p_vf,
  1001. struct vf_pf_resc_request *p_req,
  1002. struct pf_vf_resc *p_resp)
  1003. {
  1004. int i;
  1005. /* Queue related information */
  1006. p_resp->num_rxqs = p_vf->num_rxqs;
  1007. p_resp->num_txqs = p_vf->num_txqs;
  1008. p_resp->num_sbs = p_vf->num_sbs;
  1009. for (i = 0; i < p_resp->num_sbs; i++) {
  1010. p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
  1011. p_resp->hw_sbs[i].sb_qid = 0;
  1012. }
  1013. /* These fields are filled for backward compatibility.
  1014. * Unused by modern vfs.
  1015. */
  1016. for (i = 0; i < p_resp->num_rxqs; i++) {
  1017. qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
  1018. (u16 *)&p_resp->hw_qid[i]);
  1019. p_resp->cid[i] = p_vf->vf_queues[i].fw_cid;
  1020. }
  1021. /* Filter related information */
  1022. p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
  1023. p_req->num_mac_filters);
  1024. p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
  1025. p_req->num_vlan_filters);
  1026. /* This isn't really needed/enforced, but some legacy VFs might depend
  1027. * on the correct filling of this field.
  1028. */
  1029. p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
  1030. /* Validate sufficient resources for VF */
  1031. if (p_resp->num_rxqs < p_req->num_rxqs ||
  1032. p_resp->num_txqs < p_req->num_txqs ||
  1033. p_resp->num_sbs < p_req->num_sbs ||
  1034. p_resp->num_mac_filters < p_req->num_mac_filters ||
  1035. p_resp->num_vlan_filters < p_req->num_vlan_filters ||
  1036. p_resp->num_mc_filters < p_req->num_mc_filters) {
  1037. DP_VERBOSE(p_hwfn,
  1038. QED_MSG_IOV,
  1039. "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x]\n",
  1040. p_vf->abs_vf_id,
  1041. p_req->num_rxqs,
  1042. p_resp->num_rxqs,
  1043. p_req->num_rxqs,
  1044. p_resp->num_txqs,
  1045. p_req->num_sbs,
  1046. p_resp->num_sbs,
  1047. p_req->num_mac_filters,
  1048. p_resp->num_mac_filters,
  1049. p_req->num_vlan_filters,
  1050. p_resp->num_vlan_filters,
  1051. p_req->num_mc_filters, p_resp->num_mc_filters);
  1052. /* Some legacy OSes are incapable of correctly handling this
  1053. * failure.
  1054. */
  1055. if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
  1056. ETH_HSI_VER_NO_PKT_LEN_TUNN) &&
  1057. (p_vf->acquire.vfdev_info.os_type ==
  1058. VFPF_ACQUIRE_OS_WINDOWS))
  1059. return PFVF_STATUS_SUCCESS;
  1060. return PFVF_STATUS_NO_RESOURCE;
  1061. }
  1062. return PFVF_STATUS_SUCCESS;
  1063. }
  1064. static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
  1065. struct pfvf_stats_info *p_stats)
  1066. {
  1067. p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
  1068. offsetof(struct mstorm_vf_zone,
  1069. non_trigger.eth_queue_stat);
  1070. p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
  1071. p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
  1072. offsetof(struct ustorm_vf_zone,
  1073. non_trigger.eth_queue_stat);
  1074. p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
  1075. p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
  1076. offsetof(struct pstorm_vf_zone,
  1077. non_trigger.eth_queue_stat);
  1078. p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
  1079. p_stats->tstats.address = 0;
  1080. p_stats->tstats.len = 0;
  1081. }
  1082. static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
  1083. struct qed_ptt *p_ptt,
  1084. struct qed_vf_info *vf)
  1085. {
  1086. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1087. struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
  1088. struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
  1089. struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
  1090. u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
  1091. struct pf_vf_resc *resc = &resp->resc;
  1092. int rc;
  1093. memset(resp, 0, sizeof(*resp));
  1094. /* Write the PF version so that VF would know which version
  1095. * is supported - might be later overriden. This guarantees that
  1096. * VF could recognize legacy PF based on lack of versions in reply.
  1097. */
  1098. pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
  1099. pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
  1100. if (vf->state != VF_FREE && vf->state != VF_STOPPED) {
  1101. DP_VERBOSE(p_hwfn,
  1102. QED_MSG_IOV,
  1103. "VF[%d] sent ACQUIRE but is already in state %d - fail request\n",
  1104. vf->abs_vf_id, vf->state);
  1105. goto out;
  1106. }
  1107. /* Validate FW compatibility */
  1108. if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
  1109. if (req->vfdev_info.capabilities &
  1110. VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
  1111. struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info;
  1112. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1113. "VF[%d] is pre-fastpath HSI\n",
  1114. vf->abs_vf_id);
  1115. p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
  1116. p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN;
  1117. } else {
  1118. DP_INFO(p_hwfn,
  1119. "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
  1120. vf->abs_vf_id,
  1121. req->vfdev_info.eth_fp_hsi_major,
  1122. req->vfdev_info.eth_fp_hsi_minor,
  1123. ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
  1124. goto out;
  1125. }
  1126. }
  1127. /* On 100g PFs, prevent old VFs from loading */
  1128. if ((p_hwfn->cdev->num_hwfns > 1) &&
  1129. !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
  1130. DP_INFO(p_hwfn,
  1131. "VF[%d] is running an old driver that doesn't support 100g\n",
  1132. vf->abs_vf_id);
  1133. goto out;
  1134. }
  1135. /* Store the acquire message */
  1136. memcpy(&vf->acquire, req, sizeof(vf->acquire));
  1137. vf->opaque_fid = req->vfdev_info.opaque_fid;
  1138. vf->vf_bulletin = req->bulletin_addr;
  1139. vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
  1140. vf->bulletin.size : req->bulletin_size;
  1141. /* fill in pfdev info */
  1142. pfdev_info->chip_num = p_hwfn->cdev->chip_num;
  1143. pfdev_info->db_size = 0;
  1144. pfdev_info->indices_per_sb = PIS_PER_SB;
  1145. pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
  1146. PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
  1147. if (p_hwfn->cdev->num_hwfns > 1)
  1148. pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
  1149. qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
  1150. memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
  1151. pfdev_info->fw_major = FW_MAJOR_VERSION;
  1152. pfdev_info->fw_minor = FW_MINOR_VERSION;
  1153. pfdev_info->fw_rev = FW_REVISION_VERSION;
  1154. pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
  1155. /* Incorrect when legacy, but doesn't matter as legacy isn't reading
  1156. * this field.
  1157. */
  1158. pfdev_info->minor_fp_hsi = min_t(u8, ETH_HSI_VER_MINOR,
  1159. req->vfdev_info.eth_fp_hsi_minor);
  1160. pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
  1161. qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
  1162. pfdev_info->dev_type = p_hwfn->cdev->type;
  1163. pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
  1164. /* Fill resources available to VF; Make sure there are enough to
  1165. * satisfy the VF's request.
  1166. */
  1167. vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
  1168. &req->resc_request, resc);
  1169. if (vfpf_status != PFVF_STATUS_SUCCESS)
  1170. goto out;
  1171. /* Start the VF in FW */
  1172. rc = qed_sp_vf_start(p_hwfn, vf);
  1173. if (rc) {
  1174. DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
  1175. vfpf_status = PFVF_STATUS_FAILURE;
  1176. goto out;
  1177. }
  1178. /* Fill agreed size of bulletin board in response */
  1179. resp->bulletin_size = vf->bulletin.size;
  1180. qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
  1181. DP_VERBOSE(p_hwfn,
  1182. QED_MSG_IOV,
  1183. "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
  1184. "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
  1185. vf->abs_vf_id,
  1186. resp->pfdev_info.chip_num,
  1187. resp->pfdev_info.db_size,
  1188. resp->pfdev_info.indices_per_sb,
  1189. resp->pfdev_info.capabilities,
  1190. resc->num_rxqs,
  1191. resc->num_txqs,
  1192. resc->num_sbs,
  1193. resc->num_mac_filters,
  1194. resc->num_vlan_filters);
  1195. vf->state = VF_ACQUIRED;
  1196. /* Prepare Response */
  1197. out:
  1198. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
  1199. sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
  1200. }
  1201. static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
  1202. struct qed_vf_info *p_vf, bool val)
  1203. {
  1204. struct qed_sp_vport_update_params params;
  1205. int rc;
  1206. if (val == p_vf->spoof_chk) {
  1207. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1208. "Spoofchk value[%d] is already configured\n", val);
  1209. return 0;
  1210. }
  1211. memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
  1212. params.opaque_fid = p_vf->opaque_fid;
  1213. params.vport_id = p_vf->vport_id;
  1214. params.update_anti_spoofing_en_flg = 1;
  1215. params.anti_spoofing_en = val;
  1216. rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
  1217. if (!rc) {
  1218. p_vf->spoof_chk = val;
  1219. p_vf->req_spoofchk_val = p_vf->spoof_chk;
  1220. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1221. "Spoofchk val[%d] configured\n", val);
  1222. } else {
  1223. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1224. "Spoofchk configuration[val:%d] failed for VF[%d]\n",
  1225. val, p_vf->relative_vf_id);
  1226. }
  1227. return rc;
  1228. }
  1229. static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
  1230. struct qed_vf_info *p_vf)
  1231. {
  1232. struct qed_filter_ucast filter;
  1233. int rc = 0;
  1234. int i;
  1235. memset(&filter, 0, sizeof(filter));
  1236. filter.is_rx_filter = 1;
  1237. filter.is_tx_filter = 1;
  1238. filter.vport_to_add_to = p_vf->vport_id;
  1239. filter.opcode = QED_FILTER_ADD;
  1240. /* Reconfigure vlans */
  1241. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
  1242. if (!p_vf->shadow_config.vlans[i].used)
  1243. continue;
  1244. filter.type = QED_FILTER_VLAN;
  1245. filter.vlan = p_vf->shadow_config.vlans[i].vid;
  1246. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1247. "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
  1248. filter.vlan, p_vf->relative_vf_id);
  1249. rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
  1250. &filter, QED_SPQ_MODE_CB, NULL);
  1251. if (rc) {
  1252. DP_NOTICE(p_hwfn,
  1253. "Failed to configure VLAN [%04x] to VF [%04x]\n",
  1254. filter.vlan, p_vf->relative_vf_id);
  1255. break;
  1256. }
  1257. }
  1258. return rc;
  1259. }
  1260. static int
  1261. qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
  1262. struct qed_vf_info *p_vf, u64 events)
  1263. {
  1264. int rc = 0;
  1265. if ((events & BIT(VLAN_ADDR_FORCED)) &&
  1266. !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
  1267. rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
  1268. return rc;
  1269. }
  1270. static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
  1271. struct qed_vf_info *p_vf, u64 events)
  1272. {
  1273. int rc = 0;
  1274. struct qed_filter_ucast filter;
  1275. if (!p_vf->vport_instance)
  1276. return -EINVAL;
  1277. if (events & BIT(MAC_ADDR_FORCED)) {
  1278. /* Since there's no way [currently] of removing the MAC,
  1279. * we can always assume this means we need to force it.
  1280. */
  1281. memset(&filter, 0, sizeof(filter));
  1282. filter.type = QED_FILTER_MAC;
  1283. filter.opcode = QED_FILTER_REPLACE;
  1284. filter.is_rx_filter = 1;
  1285. filter.is_tx_filter = 1;
  1286. filter.vport_to_add_to = p_vf->vport_id;
  1287. ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
  1288. rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
  1289. &filter, QED_SPQ_MODE_CB, NULL);
  1290. if (rc) {
  1291. DP_NOTICE(p_hwfn,
  1292. "PF failed to configure MAC for VF\n");
  1293. return rc;
  1294. }
  1295. p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
  1296. }
  1297. if (events & BIT(VLAN_ADDR_FORCED)) {
  1298. struct qed_sp_vport_update_params vport_update;
  1299. u8 removal;
  1300. int i;
  1301. memset(&filter, 0, sizeof(filter));
  1302. filter.type = QED_FILTER_VLAN;
  1303. filter.is_rx_filter = 1;
  1304. filter.is_tx_filter = 1;
  1305. filter.vport_to_add_to = p_vf->vport_id;
  1306. filter.vlan = p_vf->bulletin.p_virt->pvid;
  1307. filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
  1308. QED_FILTER_FLUSH;
  1309. /* Send the ramrod */
  1310. rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
  1311. &filter, QED_SPQ_MODE_CB, NULL);
  1312. if (rc) {
  1313. DP_NOTICE(p_hwfn,
  1314. "PF failed to configure VLAN for VF\n");
  1315. return rc;
  1316. }
  1317. /* Update the default-vlan & silent vlan stripping */
  1318. memset(&vport_update, 0, sizeof(vport_update));
  1319. vport_update.opaque_fid = p_vf->opaque_fid;
  1320. vport_update.vport_id = p_vf->vport_id;
  1321. vport_update.update_default_vlan_enable_flg = 1;
  1322. vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
  1323. vport_update.update_default_vlan_flg = 1;
  1324. vport_update.default_vlan = filter.vlan;
  1325. vport_update.update_inner_vlan_removal_flg = 1;
  1326. removal = filter.vlan ? 1
  1327. : p_vf->shadow_config.inner_vlan_removal;
  1328. vport_update.inner_vlan_removal_flg = removal;
  1329. vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
  1330. rc = qed_sp_vport_update(p_hwfn,
  1331. &vport_update,
  1332. QED_SPQ_MODE_EBLOCK, NULL);
  1333. if (rc) {
  1334. DP_NOTICE(p_hwfn,
  1335. "PF failed to configure VF vport for vlan\n");
  1336. return rc;
  1337. }
  1338. /* Update all the Rx queues */
  1339. for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
  1340. struct qed_queue_cid *p_cid;
  1341. p_cid = p_vf->vf_queues[i].p_rx_cid;
  1342. if (!p_cid)
  1343. continue;
  1344. rc = qed_sp_eth_rx_queues_update(p_hwfn,
  1345. (void **)&p_cid,
  1346. 1, 0, 1,
  1347. QED_SPQ_MODE_EBLOCK,
  1348. NULL);
  1349. if (rc) {
  1350. DP_NOTICE(p_hwfn,
  1351. "Failed to send Rx update fo queue[0x%04x]\n",
  1352. p_cid->rel.queue_id);
  1353. return rc;
  1354. }
  1355. }
  1356. if (filter.vlan)
  1357. p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
  1358. else
  1359. p_vf->configured_features &= ~BIT(VLAN_ADDR_FORCED);
  1360. }
  1361. /* If forced features are terminated, we need to configure the shadow
  1362. * configuration back again.
  1363. */
  1364. if (events)
  1365. qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
  1366. return rc;
  1367. }
  1368. static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
  1369. struct qed_ptt *p_ptt,
  1370. struct qed_vf_info *vf)
  1371. {
  1372. struct qed_sp_vport_start_params params = { 0 };
  1373. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1374. struct vfpf_vport_start_tlv *start;
  1375. u8 status = PFVF_STATUS_SUCCESS;
  1376. struct qed_vf_info *vf_info;
  1377. u64 *p_bitmap;
  1378. int sb_id;
  1379. int rc;
  1380. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
  1381. if (!vf_info) {
  1382. DP_NOTICE(p_hwfn->cdev,
  1383. "Failed to get VF info, invalid vfid [%d]\n",
  1384. vf->relative_vf_id);
  1385. return;
  1386. }
  1387. vf->state = VF_ENABLED;
  1388. start = &mbx->req_virt->start_vport;
  1389. /* Initialize Status block in CAU */
  1390. for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
  1391. if (!start->sb_addr[sb_id]) {
  1392. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1393. "VF[%d] did not fill the address of SB %d\n",
  1394. vf->relative_vf_id, sb_id);
  1395. break;
  1396. }
  1397. qed_int_cau_conf_sb(p_hwfn, p_ptt,
  1398. start->sb_addr[sb_id],
  1399. vf->igu_sbs[sb_id], vf->abs_vf_id, 1);
  1400. }
  1401. qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
  1402. vf->mtu = start->mtu;
  1403. vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
  1404. /* Take into consideration configuration forced by hypervisor;
  1405. * If none is configured, use the supplied VF values [for old
  1406. * vfs that would still be fine, since they passed '0' as padding].
  1407. */
  1408. p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
  1409. if (!(*p_bitmap & BIT(VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
  1410. u8 vf_req = start->only_untagged;
  1411. vf_info->bulletin.p_virt->default_only_untagged = vf_req;
  1412. *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
  1413. }
  1414. params.tpa_mode = start->tpa_mode;
  1415. params.remove_inner_vlan = start->inner_vlan_removal;
  1416. params.tx_switching = true;
  1417. params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
  1418. params.drop_ttl0 = false;
  1419. params.concrete_fid = vf->concrete_fid;
  1420. params.opaque_fid = vf->opaque_fid;
  1421. params.vport_id = vf->vport_id;
  1422. params.max_buffers_per_cqe = start->max_buffers_per_cqe;
  1423. params.mtu = vf->mtu;
  1424. params.check_mac = true;
  1425. rc = qed_sp_eth_vport_start(p_hwfn, &params);
  1426. if (rc) {
  1427. DP_ERR(p_hwfn,
  1428. "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
  1429. status = PFVF_STATUS_FAILURE;
  1430. } else {
  1431. vf->vport_instance++;
  1432. /* Force configuration if needed on the newly opened vport */
  1433. qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
  1434. __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
  1435. }
  1436. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
  1437. sizeof(struct pfvf_def_resp_tlv), status);
  1438. }
  1439. static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
  1440. struct qed_ptt *p_ptt,
  1441. struct qed_vf_info *vf)
  1442. {
  1443. u8 status = PFVF_STATUS_SUCCESS;
  1444. int rc;
  1445. vf->vport_instance--;
  1446. vf->spoof_chk = false;
  1447. rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
  1448. if (rc) {
  1449. DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
  1450. rc);
  1451. status = PFVF_STATUS_FAILURE;
  1452. }
  1453. /* Forget the configuration on the vport */
  1454. vf->configured_features = 0;
  1455. memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
  1456. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
  1457. sizeof(struct pfvf_def_resp_tlv), status);
  1458. }
  1459. static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
  1460. struct qed_ptt *p_ptt,
  1461. struct qed_vf_info *vf,
  1462. u8 status, bool b_legacy)
  1463. {
  1464. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1465. struct pfvf_start_queue_resp_tlv *p_tlv;
  1466. struct vfpf_start_rxq_tlv *req;
  1467. u16 length;
  1468. mbx->offset = (u8 *)mbx->reply_virt;
  1469. /* Taking a bigger struct instead of adding a TLV to list was a
  1470. * mistake, but one which we're now stuck with, as some older
  1471. * clients assume the size of the previous response.
  1472. */
  1473. if (!b_legacy)
  1474. length = sizeof(*p_tlv);
  1475. else
  1476. length = sizeof(struct pfvf_def_resp_tlv);
  1477. p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
  1478. length);
  1479. qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
  1480. sizeof(struct channel_list_end_tlv));
  1481. /* Update the TLV with the response */
  1482. if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
  1483. req = &mbx->req_virt->start_rxq;
  1484. p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
  1485. offsetof(struct mstorm_vf_zone,
  1486. non_trigger.eth_rx_queue_producers) +
  1487. sizeof(struct eth_rx_prod_data) * req->rx_qid;
  1488. }
  1489. qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
  1490. }
  1491. static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
  1492. struct qed_ptt *p_ptt,
  1493. struct qed_vf_info *vf)
  1494. {
  1495. struct qed_queue_start_common_params params;
  1496. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1497. u8 status = PFVF_STATUS_NO_RESOURCE;
  1498. struct qed_vf_q_info *p_queue;
  1499. struct vfpf_start_rxq_tlv *req;
  1500. bool b_legacy_vf = false;
  1501. int rc;
  1502. req = &mbx->req_virt->start_rxq;
  1503. if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid) ||
  1504. !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
  1505. goto out;
  1506. /* Acquire a new queue-cid */
  1507. p_queue = &vf->vf_queues[req->rx_qid];
  1508. memset(&params, 0, sizeof(params));
  1509. params.queue_id = p_queue->fw_rx_qid;
  1510. params.vport_id = vf->vport_id;
  1511. params.stats_id = vf->abs_vf_id + 0x10;
  1512. params.sb = req->hw_sb;
  1513. params.sb_idx = req->sb_index;
  1514. p_queue->p_rx_cid = _qed_eth_queue_to_cid(p_hwfn,
  1515. vf->opaque_fid,
  1516. p_queue->fw_cid,
  1517. req->rx_qid, &params);
  1518. if (!p_queue->p_rx_cid)
  1519. goto out;
  1520. /* Legacy VFs have their Producers in a different location, which they
  1521. * calculate on their own and clean the producer prior to this.
  1522. */
  1523. if (vf->acquire.vfdev_info.eth_fp_hsi_minor ==
  1524. ETH_HSI_VER_NO_PKT_LEN_TUNN) {
  1525. b_legacy_vf = true;
  1526. } else {
  1527. REG_WR(p_hwfn,
  1528. GTT_BAR0_MAP_REG_MSDM_RAM +
  1529. MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid),
  1530. 0);
  1531. }
  1532. p_queue->p_rx_cid->b_legacy_vf = b_legacy_vf;
  1533. rc = qed_eth_rxq_start_ramrod(p_hwfn,
  1534. p_queue->p_rx_cid,
  1535. req->bd_max_bytes,
  1536. req->rxq_addr,
  1537. req->cqe_pbl_addr, req->cqe_pbl_size);
  1538. if (rc) {
  1539. status = PFVF_STATUS_FAILURE;
  1540. qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
  1541. p_queue->p_rx_cid = NULL;
  1542. } else {
  1543. status = PFVF_STATUS_SUCCESS;
  1544. vf->num_active_rxqs++;
  1545. }
  1546. out:
  1547. qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status, b_legacy_vf);
  1548. }
  1549. static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn,
  1550. struct qed_ptt *p_ptt,
  1551. struct qed_vf_info *p_vf, u8 status)
  1552. {
  1553. struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
  1554. struct pfvf_start_queue_resp_tlv *p_tlv;
  1555. bool b_legacy = false;
  1556. u16 length;
  1557. mbx->offset = (u8 *)mbx->reply_virt;
  1558. /* Taking a bigger struct instead of adding a TLV to list was a
  1559. * mistake, but one which we're now stuck with, as some older
  1560. * clients assume the size of the previous response.
  1561. */
  1562. if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
  1563. ETH_HSI_VER_NO_PKT_LEN_TUNN)
  1564. b_legacy = true;
  1565. if (!b_legacy)
  1566. length = sizeof(*p_tlv);
  1567. else
  1568. length = sizeof(struct pfvf_def_resp_tlv);
  1569. p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
  1570. length);
  1571. qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
  1572. sizeof(struct channel_list_end_tlv));
  1573. /* Update the TLV with the response */
  1574. if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
  1575. u16 qid = mbx->req_virt->start_txq.tx_qid;
  1576. p_tlv->offset = qed_db_addr_vf(p_vf->vf_queues[qid].fw_cid,
  1577. DQ_DEMS_LEGACY);
  1578. }
  1579. qed_iov_send_response(p_hwfn, p_ptt, p_vf, length, status);
  1580. }
  1581. static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
  1582. struct qed_ptt *p_ptt,
  1583. struct qed_vf_info *vf)
  1584. {
  1585. struct qed_queue_start_common_params params;
  1586. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1587. u8 status = PFVF_STATUS_NO_RESOURCE;
  1588. union qed_qm_pq_params pq_params;
  1589. struct vfpf_start_txq_tlv *req;
  1590. struct qed_vf_q_info *p_queue;
  1591. int rc;
  1592. u16 pq;
  1593. /* Prepare the parameters which would choose the right PQ */
  1594. memset(&pq_params, 0, sizeof(pq_params));
  1595. pq_params.eth.is_vf = 1;
  1596. pq_params.eth.vf_id = vf->relative_vf_id;
  1597. memset(&params, 0, sizeof(params));
  1598. req = &mbx->req_virt->start_txq;
  1599. if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid) ||
  1600. !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
  1601. goto out;
  1602. /* Acquire a new queue-cid */
  1603. p_queue = &vf->vf_queues[req->tx_qid];
  1604. params.queue_id = p_queue->fw_tx_qid;
  1605. params.vport_id = vf->vport_id;
  1606. params.stats_id = vf->abs_vf_id + 0x10;
  1607. params.sb = req->hw_sb;
  1608. params.sb_idx = req->sb_index;
  1609. p_queue->p_tx_cid = _qed_eth_queue_to_cid(p_hwfn,
  1610. vf->opaque_fid,
  1611. p_queue->fw_cid,
  1612. req->tx_qid, &params);
  1613. if (!p_queue->p_tx_cid)
  1614. goto out;
  1615. pq = qed_get_qm_pq(p_hwfn, PROTOCOLID_ETH, &pq_params);
  1616. rc = qed_eth_txq_start_ramrod(p_hwfn, p_queue->p_tx_cid,
  1617. req->pbl_addr, req->pbl_size, pq);
  1618. if (rc) {
  1619. status = PFVF_STATUS_FAILURE;
  1620. qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
  1621. p_queue->p_tx_cid = NULL;
  1622. } else {
  1623. status = PFVF_STATUS_SUCCESS;
  1624. }
  1625. out:
  1626. qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, status);
  1627. }
  1628. static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
  1629. struct qed_vf_info *vf,
  1630. u16 rxq_id, u8 num_rxqs, bool cqe_completion)
  1631. {
  1632. struct qed_vf_q_info *p_queue;
  1633. int rc = 0;
  1634. int qid;
  1635. if (rxq_id + num_rxqs > ARRAY_SIZE(vf->vf_queues))
  1636. return -EINVAL;
  1637. for (qid = rxq_id; qid < rxq_id + num_rxqs; qid++) {
  1638. p_queue = &vf->vf_queues[qid];
  1639. if (!p_queue->p_rx_cid)
  1640. continue;
  1641. rc = qed_eth_rx_queue_stop(p_hwfn,
  1642. p_queue->p_rx_cid,
  1643. false, cqe_completion);
  1644. if (rc)
  1645. return rc;
  1646. vf->vf_queues[qid].p_rx_cid = NULL;
  1647. vf->num_active_rxqs--;
  1648. }
  1649. return rc;
  1650. }
  1651. static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
  1652. struct qed_vf_info *vf, u16 txq_id, u8 num_txqs)
  1653. {
  1654. int rc = 0;
  1655. struct qed_vf_q_info *p_queue;
  1656. int qid;
  1657. if (txq_id + num_txqs > ARRAY_SIZE(vf->vf_queues))
  1658. return -EINVAL;
  1659. for (qid = txq_id; qid < txq_id + num_txqs; qid++) {
  1660. p_queue = &vf->vf_queues[qid];
  1661. if (!p_queue->p_tx_cid)
  1662. continue;
  1663. rc = qed_eth_tx_queue_stop(p_hwfn, p_queue->p_tx_cid);
  1664. if (rc)
  1665. return rc;
  1666. p_queue->p_tx_cid = NULL;
  1667. }
  1668. return rc;
  1669. }
  1670. static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
  1671. struct qed_ptt *p_ptt,
  1672. struct qed_vf_info *vf)
  1673. {
  1674. u16 length = sizeof(struct pfvf_def_resp_tlv);
  1675. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1676. u8 status = PFVF_STATUS_SUCCESS;
  1677. struct vfpf_stop_rxqs_tlv *req;
  1678. int rc;
  1679. /* We give the option of starting from qid != 0, in this case we
  1680. * need to make sure that qid + num_qs doesn't exceed the actual
  1681. * amount of queues that exist.
  1682. */
  1683. req = &mbx->req_virt->stop_rxqs;
  1684. rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
  1685. req->num_rxqs, req->cqe_completion);
  1686. if (rc)
  1687. status = PFVF_STATUS_FAILURE;
  1688. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
  1689. length, status);
  1690. }
  1691. static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
  1692. struct qed_ptt *p_ptt,
  1693. struct qed_vf_info *vf)
  1694. {
  1695. u16 length = sizeof(struct pfvf_def_resp_tlv);
  1696. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1697. u8 status = PFVF_STATUS_SUCCESS;
  1698. struct vfpf_stop_txqs_tlv *req;
  1699. int rc;
  1700. /* We give the option of starting from qid != 0, in this case we
  1701. * need to make sure that qid + num_qs doesn't exceed the actual
  1702. * amount of queues that exist.
  1703. */
  1704. req = &mbx->req_virt->stop_txqs;
  1705. rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, req->num_txqs);
  1706. if (rc)
  1707. status = PFVF_STATUS_FAILURE;
  1708. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
  1709. length, status);
  1710. }
  1711. static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
  1712. struct qed_ptt *p_ptt,
  1713. struct qed_vf_info *vf)
  1714. {
  1715. struct qed_queue_cid *handlers[QED_MAX_VF_CHAINS_PER_PF];
  1716. u16 length = sizeof(struct pfvf_def_resp_tlv);
  1717. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1718. struct vfpf_update_rxq_tlv *req;
  1719. u8 status = PFVF_STATUS_FAILURE;
  1720. u8 complete_event_flg;
  1721. u8 complete_cqe_flg;
  1722. u16 qid;
  1723. int rc;
  1724. u8 i;
  1725. req = &mbx->req_virt->update_rxq;
  1726. complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
  1727. complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
  1728. /* Validate inputs */
  1729. if (req->num_rxqs + req->rx_qid > QED_MAX_VF_CHAINS_PER_PF ||
  1730. !qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid)) {
  1731. DP_INFO(p_hwfn, "VF[%d]: Incorrect Rxqs [%04x, %02x]\n",
  1732. vf->relative_vf_id, req->rx_qid, req->num_rxqs);
  1733. goto out;
  1734. }
  1735. for (i = 0; i < req->num_rxqs; i++) {
  1736. qid = req->rx_qid + i;
  1737. if (!vf->vf_queues[qid].p_rx_cid) {
  1738. DP_INFO(p_hwfn,
  1739. "VF[%d] rx_qid = %d isn`t active!\n",
  1740. vf->relative_vf_id, qid);
  1741. goto out;
  1742. }
  1743. handlers[i] = vf->vf_queues[qid].p_rx_cid;
  1744. }
  1745. rc = qed_sp_eth_rx_queues_update(p_hwfn, (void **)&handlers,
  1746. req->num_rxqs,
  1747. complete_cqe_flg,
  1748. complete_event_flg,
  1749. QED_SPQ_MODE_EBLOCK, NULL);
  1750. if (rc)
  1751. goto out;
  1752. status = PFVF_STATUS_SUCCESS;
  1753. out:
  1754. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
  1755. length, status);
  1756. }
  1757. void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
  1758. void *p_tlvs_list, u16 req_type)
  1759. {
  1760. struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
  1761. int len = 0;
  1762. do {
  1763. if (!p_tlv->length) {
  1764. DP_NOTICE(p_hwfn, "Zero length TLV found\n");
  1765. return NULL;
  1766. }
  1767. if (p_tlv->type == req_type) {
  1768. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1769. "Extended tlv type %d, length %d found\n",
  1770. p_tlv->type, p_tlv->length);
  1771. return p_tlv;
  1772. }
  1773. len += p_tlv->length;
  1774. p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
  1775. if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
  1776. DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
  1777. return NULL;
  1778. }
  1779. } while (p_tlv->type != CHANNEL_TLV_LIST_END);
  1780. return NULL;
  1781. }
  1782. static void
  1783. qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
  1784. struct qed_sp_vport_update_params *p_data,
  1785. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1786. {
  1787. struct vfpf_vport_update_activate_tlv *p_act_tlv;
  1788. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
  1789. p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
  1790. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1791. if (!p_act_tlv)
  1792. return;
  1793. p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
  1794. p_data->vport_active_rx_flg = p_act_tlv->active_rx;
  1795. p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
  1796. p_data->vport_active_tx_flg = p_act_tlv->active_tx;
  1797. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
  1798. }
  1799. static void
  1800. qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
  1801. struct qed_sp_vport_update_params *p_data,
  1802. struct qed_vf_info *p_vf,
  1803. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1804. {
  1805. struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
  1806. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
  1807. p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
  1808. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1809. if (!p_vlan_tlv)
  1810. return;
  1811. p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
  1812. /* Ignore the VF request if we're forcing a vlan */
  1813. if (!(p_vf->configured_features & BIT(VLAN_ADDR_FORCED))) {
  1814. p_data->update_inner_vlan_removal_flg = 1;
  1815. p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
  1816. }
  1817. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
  1818. }
  1819. static void
  1820. qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
  1821. struct qed_sp_vport_update_params *p_data,
  1822. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1823. {
  1824. struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
  1825. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
  1826. p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
  1827. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
  1828. tlv);
  1829. if (!p_tx_switch_tlv)
  1830. return;
  1831. p_data->update_tx_switching_flg = 1;
  1832. p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
  1833. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
  1834. }
  1835. static void
  1836. qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
  1837. struct qed_sp_vport_update_params *p_data,
  1838. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1839. {
  1840. struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
  1841. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
  1842. p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
  1843. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1844. if (!p_mcast_tlv)
  1845. return;
  1846. p_data->update_approx_mcast_flg = 1;
  1847. memcpy(p_data->bins, p_mcast_tlv->bins,
  1848. sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
  1849. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
  1850. }
  1851. static void
  1852. qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
  1853. struct qed_sp_vport_update_params *p_data,
  1854. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1855. {
  1856. struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
  1857. struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
  1858. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
  1859. p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
  1860. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1861. if (!p_accept_tlv)
  1862. return;
  1863. p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
  1864. p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
  1865. p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
  1866. p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
  1867. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
  1868. }
  1869. static void
  1870. qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
  1871. struct qed_sp_vport_update_params *p_data,
  1872. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1873. {
  1874. struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
  1875. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
  1876. p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
  1877. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
  1878. tlv);
  1879. if (!p_accept_any_vlan)
  1880. return;
  1881. p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
  1882. p_data->update_accept_any_vlan_flg =
  1883. p_accept_any_vlan->update_accept_any_vlan_flg;
  1884. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
  1885. }
  1886. static void
  1887. qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
  1888. struct qed_vf_info *vf,
  1889. struct qed_sp_vport_update_params *p_data,
  1890. struct qed_rss_params *p_rss,
  1891. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1892. {
  1893. struct vfpf_vport_update_rss_tlv *p_rss_tlv;
  1894. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
  1895. u16 i, q_idx, max_q_idx;
  1896. u16 table_size;
  1897. p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
  1898. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1899. if (!p_rss_tlv) {
  1900. p_data->rss_params = NULL;
  1901. return;
  1902. }
  1903. memset(p_rss, 0, sizeof(struct qed_rss_params));
  1904. p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
  1905. VFPF_UPDATE_RSS_CONFIG_FLAG);
  1906. p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
  1907. VFPF_UPDATE_RSS_CAPS_FLAG);
  1908. p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
  1909. VFPF_UPDATE_RSS_IND_TABLE_FLAG);
  1910. p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
  1911. VFPF_UPDATE_RSS_KEY_FLAG);
  1912. p_rss->rss_enable = p_rss_tlv->rss_enable;
  1913. p_rss->rss_eng_id = vf->relative_vf_id + 1;
  1914. p_rss->rss_caps = p_rss_tlv->rss_caps;
  1915. p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
  1916. memcpy(p_rss->rss_ind_table, p_rss_tlv->rss_ind_table,
  1917. sizeof(p_rss->rss_ind_table));
  1918. memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
  1919. table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
  1920. (1 << p_rss_tlv->rss_table_size_log));
  1921. max_q_idx = ARRAY_SIZE(vf->vf_queues);
  1922. for (i = 0; i < table_size; i++) {
  1923. u16 index = vf->vf_queues[0].fw_rx_qid;
  1924. q_idx = p_rss->rss_ind_table[i];
  1925. if (q_idx >= max_q_idx)
  1926. DP_NOTICE(p_hwfn,
  1927. "rss_ind_table[%d] = %d, rxq is out of range\n",
  1928. i, q_idx);
  1929. else if (!vf->vf_queues[q_idx].p_rx_cid)
  1930. DP_NOTICE(p_hwfn,
  1931. "rss_ind_table[%d] = %d, rxq is not active\n",
  1932. i, q_idx);
  1933. else
  1934. index = vf->vf_queues[q_idx].fw_rx_qid;
  1935. p_rss->rss_ind_table[i] = index;
  1936. }
  1937. p_data->rss_params = p_rss;
  1938. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
  1939. }
  1940. static void
  1941. qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
  1942. struct qed_vf_info *vf,
  1943. struct qed_sp_vport_update_params *p_data,
  1944. struct qed_sge_tpa_params *p_sge_tpa,
  1945. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1946. {
  1947. struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
  1948. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
  1949. p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
  1950. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1951. if (!p_sge_tpa_tlv) {
  1952. p_data->sge_tpa_params = NULL;
  1953. return;
  1954. }
  1955. memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
  1956. p_sge_tpa->update_tpa_en_flg =
  1957. !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
  1958. p_sge_tpa->update_tpa_param_flg =
  1959. !!(p_sge_tpa_tlv->update_sge_tpa_flags &
  1960. VFPF_UPDATE_TPA_PARAM_FLAG);
  1961. p_sge_tpa->tpa_ipv4_en_flg =
  1962. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
  1963. p_sge_tpa->tpa_ipv6_en_flg =
  1964. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
  1965. p_sge_tpa->tpa_pkt_split_flg =
  1966. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
  1967. p_sge_tpa->tpa_hdr_data_split_flg =
  1968. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
  1969. p_sge_tpa->tpa_gro_consistent_flg =
  1970. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
  1971. p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
  1972. p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
  1973. p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
  1974. p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
  1975. p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
  1976. p_data->sge_tpa_params = p_sge_tpa;
  1977. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
  1978. }
  1979. static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
  1980. struct qed_ptt *p_ptt,
  1981. struct qed_vf_info *vf)
  1982. {
  1983. struct qed_sp_vport_update_params params;
  1984. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1985. struct qed_sge_tpa_params sge_tpa_params;
  1986. struct qed_rss_params rss_params;
  1987. u8 status = PFVF_STATUS_SUCCESS;
  1988. u16 tlvs_mask = 0;
  1989. u16 length;
  1990. int rc;
  1991. /* Valiate PF can send such a request */
  1992. if (!vf->vport_instance) {
  1993. DP_VERBOSE(p_hwfn,
  1994. QED_MSG_IOV,
  1995. "No VPORT instance available for VF[%d], failing vport update\n",
  1996. vf->abs_vf_id);
  1997. status = PFVF_STATUS_FAILURE;
  1998. goto out;
  1999. }
  2000. memset(&params, 0, sizeof(params));
  2001. params.opaque_fid = vf->opaque_fid;
  2002. params.vport_id = vf->vport_id;
  2003. params.rss_params = NULL;
  2004. /* Search for extended tlvs list and update values
  2005. * from VF in struct qed_sp_vport_update_params.
  2006. */
  2007. qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
  2008. qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
  2009. qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
  2010. qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
  2011. qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
  2012. qed_iov_vp_update_rss_param(p_hwfn, vf, &params, &rss_params,
  2013. mbx, &tlvs_mask);
  2014. qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
  2015. qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
  2016. &sge_tpa_params, mbx, &tlvs_mask);
  2017. /* Just log a message if there is no single extended tlv in buffer.
  2018. * When all features of vport update ramrod would be requested by VF
  2019. * as extended TLVs in buffer then an error can be returned in response
  2020. * if there is no extended TLV present in buffer.
  2021. */
  2022. if (!tlvs_mask) {
  2023. DP_NOTICE(p_hwfn,
  2024. "No feature tlvs found for vport update\n");
  2025. status = PFVF_STATUS_NOT_SUPPORTED;
  2026. goto out;
  2027. }
  2028. rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
  2029. if (rc)
  2030. status = PFVF_STATUS_FAILURE;
  2031. out:
  2032. length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
  2033. tlvs_mask, tlvs_mask);
  2034. qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
  2035. }
  2036. static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn,
  2037. struct qed_vf_info *p_vf,
  2038. struct qed_filter_ucast *p_params)
  2039. {
  2040. int i;
  2041. /* First remove entries and then add new ones */
  2042. if (p_params->opcode == QED_FILTER_REMOVE) {
  2043. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
  2044. if (p_vf->shadow_config.vlans[i].used &&
  2045. p_vf->shadow_config.vlans[i].vid ==
  2046. p_params->vlan) {
  2047. p_vf->shadow_config.vlans[i].used = false;
  2048. break;
  2049. }
  2050. if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
  2051. DP_VERBOSE(p_hwfn,
  2052. QED_MSG_IOV,
  2053. "VF [%d] - Tries to remove a non-existing vlan\n",
  2054. p_vf->relative_vf_id);
  2055. return -EINVAL;
  2056. }
  2057. } else if (p_params->opcode == QED_FILTER_REPLACE ||
  2058. p_params->opcode == QED_FILTER_FLUSH) {
  2059. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
  2060. p_vf->shadow_config.vlans[i].used = false;
  2061. }
  2062. /* In forced mode, we're willing to remove entries - but we don't add
  2063. * new ones.
  2064. */
  2065. if (p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED))
  2066. return 0;
  2067. if (p_params->opcode == QED_FILTER_ADD ||
  2068. p_params->opcode == QED_FILTER_REPLACE) {
  2069. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
  2070. if (p_vf->shadow_config.vlans[i].used)
  2071. continue;
  2072. p_vf->shadow_config.vlans[i].used = true;
  2073. p_vf->shadow_config.vlans[i].vid = p_params->vlan;
  2074. break;
  2075. }
  2076. if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
  2077. DP_VERBOSE(p_hwfn,
  2078. QED_MSG_IOV,
  2079. "VF [%d] - Tries to configure more than %d vlan filters\n",
  2080. p_vf->relative_vf_id,
  2081. QED_ETH_VF_NUM_VLAN_FILTERS + 1);
  2082. return -EINVAL;
  2083. }
  2084. }
  2085. return 0;
  2086. }
  2087. static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn,
  2088. struct qed_vf_info *p_vf,
  2089. struct qed_filter_ucast *p_params)
  2090. {
  2091. int i;
  2092. /* If we're in forced-mode, we don't allow any change */
  2093. if (p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))
  2094. return 0;
  2095. /* First remove entries and then add new ones */
  2096. if (p_params->opcode == QED_FILTER_REMOVE) {
  2097. for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
  2098. if (ether_addr_equal(p_vf->shadow_config.macs[i],
  2099. p_params->mac)) {
  2100. memset(p_vf->shadow_config.macs[i], 0,
  2101. ETH_ALEN);
  2102. break;
  2103. }
  2104. }
  2105. if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
  2106. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2107. "MAC isn't configured\n");
  2108. return -EINVAL;
  2109. }
  2110. } else if (p_params->opcode == QED_FILTER_REPLACE ||
  2111. p_params->opcode == QED_FILTER_FLUSH) {
  2112. for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++)
  2113. memset(p_vf->shadow_config.macs[i], 0, ETH_ALEN);
  2114. }
  2115. /* List the new MAC address */
  2116. if (p_params->opcode != QED_FILTER_ADD &&
  2117. p_params->opcode != QED_FILTER_REPLACE)
  2118. return 0;
  2119. for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
  2120. if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) {
  2121. ether_addr_copy(p_vf->shadow_config.macs[i],
  2122. p_params->mac);
  2123. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2124. "Added MAC at %d entry in shadow\n", i);
  2125. break;
  2126. }
  2127. }
  2128. if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
  2129. DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n");
  2130. return -EINVAL;
  2131. }
  2132. return 0;
  2133. }
  2134. static int
  2135. qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
  2136. struct qed_vf_info *p_vf,
  2137. struct qed_filter_ucast *p_params)
  2138. {
  2139. int rc = 0;
  2140. if (p_params->type == QED_FILTER_MAC) {
  2141. rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
  2142. if (rc)
  2143. return rc;
  2144. }
  2145. if (p_params->type == QED_FILTER_VLAN)
  2146. rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
  2147. return rc;
  2148. }
  2149. static int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
  2150. int vfid, struct qed_filter_ucast *params)
  2151. {
  2152. struct qed_public_vf_info *vf;
  2153. vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
  2154. if (!vf)
  2155. return -EINVAL;
  2156. /* No real decision to make; Store the configured MAC */
  2157. if (params->type == QED_FILTER_MAC ||
  2158. params->type == QED_FILTER_MAC_VLAN)
  2159. ether_addr_copy(vf->mac, params->mac);
  2160. return 0;
  2161. }
  2162. static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
  2163. struct qed_ptt *p_ptt,
  2164. struct qed_vf_info *vf)
  2165. {
  2166. struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
  2167. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  2168. struct vfpf_ucast_filter_tlv *req;
  2169. u8 status = PFVF_STATUS_SUCCESS;
  2170. struct qed_filter_ucast params;
  2171. int rc;
  2172. /* Prepare the unicast filter params */
  2173. memset(&params, 0, sizeof(struct qed_filter_ucast));
  2174. req = &mbx->req_virt->ucast_filter;
  2175. params.opcode = (enum qed_filter_opcode)req->opcode;
  2176. params.type = (enum qed_filter_ucast_type)req->type;
  2177. params.is_rx_filter = 1;
  2178. params.is_tx_filter = 1;
  2179. params.vport_to_remove_from = vf->vport_id;
  2180. params.vport_to_add_to = vf->vport_id;
  2181. memcpy(params.mac, req->mac, ETH_ALEN);
  2182. params.vlan = req->vlan;
  2183. DP_VERBOSE(p_hwfn,
  2184. QED_MSG_IOV,
  2185. "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
  2186. vf->abs_vf_id, params.opcode, params.type,
  2187. params.is_rx_filter ? "RX" : "",
  2188. params.is_tx_filter ? "TX" : "",
  2189. params.vport_to_add_to,
  2190. params.mac[0], params.mac[1],
  2191. params.mac[2], params.mac[3],
  2192. params.mac[4], params.mac[5], params.vlan);
  2193. if (!vf->vport_instance) {
  2194. DP_VERBOSE(p_hwfn,
  2195. QED_MSG_IOV,
  2196. "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
  2197. vf->abs_vf_id);
  2198. status = PFVF_STATUS_FAILURE;
  2199. goto out;
  2200. }
  2201. /* Update shadow copy of the VF configuration */
  2202. if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
  2203. status = PFVF_STATUS_FAILURE;
  2204. goto out;
  2205. }
  2206. /* Determine if the unicast filtering is acceptible by PF */
  2207. if ((p_bulletin->valid_bitmap & BIT(VLAN_ADDR_FORCED)) &&
  2208. (params.type == QED_FILTER_VLAN ||
  2209. params.type == QED_FILTER_MAC_VLAN)) {
  2210. /* Once VLAN is forced or PVID is set, do not allow
  2211. * to add/replace any further VLANs.
  2212. */
  2213. if (params.opcode == QED_FILTER_ADD ||
  2214. params.opcode == QED_FILTER_REPLACE)
  2215. status = PFVF_STATUS_FORCED;
  2216. goto out;
  2217. }
  2218. if ((p_bulletin->valid_bitmap & BIT(MAC_ADDR_FORCED)) &&
  2219. (params.type == QED_FILTER_MAC ||
  2220. params.type == QED_FILTER_MAC_VLAN)) {
  2221. if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
  2222. (params.opcode != QED_FILTER_ADD &&
  2223. params.opcode != QED_FILTER_REPLACE))
  2224. status = PFVF_STATUS_FORCED;
  2225. goto out;
  2226. }
  2227. rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
  2228. if (rc) {
  2229. status = PFVF_STATUS_FAILURE;
  2230. goto out;
  2231. }
  2232. rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
  2233. QED_SPQ_MODE_CB, NULL);
  2234. if (rc)
  2235. status = PFVF_STATUS_FAILURE;
  2236. out:
  2237. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
  2238. sizeof(struct pfvf_def_resp_tlv), status);
  2239. }
  2240. static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
  2241. struct qed_ptt *p_ptt,
  2242. struct qed_vf_info *vf)
  2243. {
  2244. int i;
  2245. /* Reset the SBs */
  2246. for (i = 0; i < vf->num_sbs; i++)
  2247. qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
  2248. vf->igu_sbs[i],
  2249. vf->opaque_fid, false);
  2250. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
  2251. sizeof(struct pfvf_def_resp_tlv),
  2252. PFVF_STATUS_SUCCESS);
  2253. }
  2254. static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
  2255. struct qed_ptt *p_ptt, struct qed_vf_info *vf)
  2256. {
  2257. u16 length = sizeof(struct pfvf_def_resp_tlv);
  2258. u8 status = PFVF_STATUS_SUCCESS;
  2259. /* Disable Interrupts for VF */
  2260. qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
  2261. /* Reset Permission table */
  2262. qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
  2263. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
  2264. length, status);
  2265. }
  2266. static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
  2267. struct qed_ptt *p_ptt,
  2268. struct qed_vf_info *p_vf)
  2269. {
  2270. u16 length = sizeof(struct pfvf_def_resp_tlv);
  2271. u8 status = PFVF_STATUS_SUCCESS;
  2272. int rc = 0;
  2273. qed_iov_vf_cleanup(p_hwfn, p_vf);
  2274. if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
  2275. /* Stopping the VF */
  2276. rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
  2277. p_vf->opaque_fid);
  2278. if (rc) {
  2279. DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
  2280. rc);
  2281. status = PFVF_STATUS_FAILURE;
  2282. }
  2283. p_vf->state = VF_STOPPED;
  2284. }
  2285. qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
  2286. length, status);
  2287. }
  2288. static int
  2289. qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
  2290. struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
  2291. {
  2292. int cnt;
  2293. u32 val;
  2294. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
  2295. for (cnt = 0; cnt < 50; cnt++) {
  2296. val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
  2297. if (!val)
  2298. break;
  2299. msleep(20);
  2300. }
  2301. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  2302. if (cnt == 50) {
  2303. DP_ERR(p_hwfn,
  2304. "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
  2305. p_vf->abs_vf_id, val);
  2306. return -EBUSY;
  2307. }
  2308. return 0;
  2309. }
  2310. static int
  2311. qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
  2312. struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
  2313. {
  2314. u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
  2315. int i, cnt;
  2316. /* Read initial consumers & producers */
  2317. for (i = 0; i < MAX_NUM_VOQS; i++) {
  2318. u32 prod;
  2319. cons[i] = qed_rd(p_hwfn, p_ptt,
  2320. PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
  2321. i * 0x40);
  2322. prod = qed_rd(p_hwfn, p_ptt,
  2323. PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
  2324. i * 0x40);
  2325. distance[i] = prod - cons[i];
  2326. }
  2327. /* Wait for consumers to pass the producers */
  2328. i = 0;
  2329. for (cnt = 0; cnt < 50; cnt++) {
  2330. for (; i < MAX_NUM_VOQS; i++) {
  2331. u32 tmp;
  2332. tmp = qed_rd(p_hwfn, p_ptt,
  2333. PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
  2334. i * 0x40);
  2335. if (distance[i] > tmp - cons[i])
  2336. break;
  2337. }
  2338. if (i == MAX_NUM_VOQS)
  2339. break;
  2340. msleep(20);
  2341. }
  2342. if (cnt == 50) {
  2343. DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
  2344. p_vf->abs_vf_id, i);
  2345. return -EBUSY;
  2346. }
  2347. return 0;
  2348. }
  2349. static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
  2350. struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
  2351. {
  2352. int rc;
  2353. rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
  2354. if (rc)
  2355. return rc;
  2356. rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
  2357. if (rc)
  2358. return rc;
  2359. return 0;
  2360. }
  2361. static int
  2362. qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
  2363. struct qed_ptt *p_ptt,
  2364. u16 rel_vf_id, u32 *ack_vfs)
  2365. {
  2366. struct qed_vf_info *p_vf;
  2367. int rc = 0;
  2368. p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
  2369. if (!p_vf)
  2370. return 0;
  2371. if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
  2372. (1ULL << (rel_vf_id % 64))) {
  2373. u16 vfid = p_vf->abs_vf_id;
  2374. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2375. "VF[%d] - Handling FLR\n", vfid);
  2376. qed_iov_vf_cleanup(p_hwfn, p_vf);
  2377. /* If VF isn't active, no need for anything but SW */
  2378. if (!p_vf->b_init)
  2379. goto cleanup;
  2380. rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
  2381. if (rc)
  2382. goto cleanup;
  2383. rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
  2384. if (rc) {
  2385. DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
  2386. return rc;
  2387. }
  2388. /* Workaround to make VF-PF channel ready, as FW
  2389. * doesn't do that as a part of FLR.
  2390. */
  2391. REG_WR(p_hwfn,
  2392. GTT_BAR0_MAP_REG_USDM_RAM +
  2393. USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1);
  2394. /* VF_STOPPED has to be set only after final cleanup
  2395. * but prior to re-enabling the VF.
  2396. */
  2397. p_vf->state = VF_STOPPED;
  2398. rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
  2399. if (rc) {
  2400. DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
  2401. vfid);
  2402. return rc;
  2403. }
  2404. cleanup:
  2405. /* Mark VF for ack and clean pending state */
  2406. if (p_vf->state == VF_RESET)
  2407. p_vf->state = VF_STOPPED;
  2408. ack_vfs[vfid / 32] |= BIT((vfid % 32));
  2409. p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
  2410. ~(1ULL << (rel_vf_id % 64));
  2411. p_hwfn->pf_iov_info->pending_events[rel_vf_id / 64] &=
  2412. ~(1ULL << (rel_vf_id % 64));
  2413. }
  2414. return rc;
  2415. }
  2416. static int
  2417. qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  2418. {
  2419. u32 ack_vfs[VF_MAX_STATIC / 32];
  2420. int rc = 0;
  2421. u16 i;
  2422. memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
  2423. /* Since BRB <-> PRS interface can't be tested as part of the flr
  2424. * polling due to HW limitations, simply sleep a bit. And since
  2425. * there's no need to wait per-vf, do it before looping.
  2426. */
  2427. msleep(100);
  2428. for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
  2429. qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
  2430. rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
  2431. return rc;
  2432. }
  2433. int qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
  2434. {
  2435. u16 i, found = 0;
  2436. DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
  2437. for (i = 0; i < (VF_MAX_STATIC / 32); i++)
  2438. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2439. "[%08x,...,%08x]: %08x\n",
  2440. i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
  2441. if (!p_hwfn->cdev->p_iov_info) {
  2442. DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
  2443. return 0;
  2444. }
  2445. /* Mark VFs */
  2446. for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
  2447. struct qed_vf_info *p_vf;
  2448. u8 vfid;
  2449. p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
  2450. if (!p_vf)
  2451. continue;
  2452. vfid = p_vf->abs_vf_id;
  2453. if (BIT((vfid % 32)) & p_disabled_vfs[vfid / 32]) {
  2454. u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
  2455. u16 rel_vf_id = p_vf->relative_vf_id;
  2456. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2457. "VF[%d] [rel %d] got FLR-ed\n",
  2458. vfid, rel_vf_id);
  2459. p_vf->state = VF_RESET;
  2460. /* No need to lock here, since pending_flr should
  2461. * only change here and before ACKing MFw. Since
  2462. * MFW will not trigger an additional attention for
  2463. * VF flr until ACKs, we're safe.
  2464. */
  2465. p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
  2466. found = 1;
  2467. }
  2468. }
  2469. return found;
  2470. }
  2471. static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
  2472. u16 vfid,
  2473. struct qed_mcp_link_params *p_params,
  2474. struct qed_mcp_link_state *p_link,
  2475. struct qed_mcp_link_capabilities *p_caps)
  2476. {
  2477. struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
  2478. vfid,
  2479. false);
  2480. struct qed_bulletin_content *p_bulletin;
  2481. if (!p_vf)
  2482. return;
  2483. p_bulletin = p_vf->bulletin.p_virt;
  2484. if (p_params)
  2485. __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
  2486. if (p_link)
  2487. __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
  2488. if (p_caps)
  2489. __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
  2490. }
  2491. static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
  2492. struct qed_ptt *p_ptt, int vfid)
  2493. {
  2494. struct qed_iov_vf_mbx *mbx;
  2495. struct qed_vf_info *p_vf;
  2496. p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2497. if (!p_vf)
  2498. return;
  2499. mbx = &p_vf->vf_mbx;
  2500. /* qed_iov_process_mbx_request */
  2501. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2502. "VF[%02x]: Processing mailbox message\n", p_vf->abs_vf_id);
  2503. mbx->first_tlv = mbx->req_virt->first_tlv;
  2504. /* check if tlv type is known */
  2505. if (qed_iov_tlv_supported(mbx->first_tlv.tl.type) &&
  2506. !p_vf->b_malicious) {
  2507. switch (mbx->first_tlv.tl.type) {
  2508. case CHANNEL_TLV_ACQUIRE:
  2509. qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
  2510. break;
  2511. case CHANNEL_TLV_VPORT_START:
  2512. qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
  2513. break;
  2514. case CHANNEL_TLV_VPORT_TEARDOWN:
  2515. qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
  2516. break;
  2517. case CHANNEL_TLV_START_RXQ:
  2518. qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
  2519. break;
  2520. case CHANNEL_TLV_START_TXQ:
  2521. qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
  2522. break;
  2523. case CHANNEL_TLV_STOP_RXQS:
  2524. qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
  2525. break;
  2526. case CHANNEL_TLV_STOP_TXQS:
  2527. qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
  2528. break;
  2529. case CHANNEL_TLV_UPDATE_RXQ:
  2530. qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
  2531. break;
  2532. case CHANNEL_TLV_VPORT_UPDATE:
  2533. qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
  2534. break;
  2535. case CHANNEL_TLV_UCAST_FILTER:
  2536. qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
  2537. break;
  2538. case CHANNEL_TLV_CLOSE:
  2539. qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
  2540. break;
  2541. case CHANNEL_TLV_INT_CLEANUP:
  2542. qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
  2543. break;
  2544. case CHANNEL_TLV_RELEASE:
  2545. qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
  2546. break;
  2547. }
  2548. } else if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
  2549. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2550. "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n",
  2551. p_vf->abs_vf_id, mbx->first_tlv.tl.type);
  2552. qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
  2553. mbx->first_tlv.tl.type,
  2554. sizeof(struct pfvf_def_resp_tlv),
  2555. PFVF_STATUS_MALICIOUS);
  2556. } else {
  2557. /* unknown TLV - this may belong to a VF driver from the future
  2558. * - a version written after this PF driver was written, which
  2559. * supports features unknown as of yet. Too bad since we don't
  2560. * support them. Or this may be because someone wrote a crappy
  2561. * VF driver and is sending garbage over the channel.
  2562. */
  2563. DP_NOTICE(p_hwfn,
  2564. "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n",
  2565. p_vf->abs_vf_id,
  2566. mbx->first_tlv.tl.type,
  2567. mbx->first_tlv.tl.length,
  2568. mbx->first_tlv.padding, mbx->first_tlv.reply_address);
  2569. /* Try replying in case reply address matches the acquisition's
  2570. * posted address.
  2571. */
  2572. if (p_vf->acquire.first_tlv.reply_address &&
  2573. (mbx->first_tlv.reply_address ==
  2574. p_vf->acquire.first_tlv.reply_address)) {
  2575. qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
  2576. mbx->first_tlv.tl.type,
  2577. sizeof(struct pfvf_def_resp_tlv),
  2578. PFVF_STATUS_NOT_SUPPORTED);
  2579. } else {
  2580. DP_VERBOSE(p_hwfn,
  2581. QED_MSG_IOV,
  2582. "VF[%02x]: Can't respond to TLV - no valid reply address\n",
  2583. p_vf->abs_vf_id);
  2584. }
  2585. }
  2586. }
  2587. static void qed_iov_pf_add_pending_events(struct qed_hwfn *p_hwfn, u8 vfid)
  2588. {
  2589. u64 add_bit = 1ULL << (vfid % 64);
  2590. p_hwfn->pf_iov_info->pending_events[vfid / 64] |= add_bit;
  2591. }
  2592. static void qed_iov_pf_get_and_clear_pending_events(struct qed_hwfn *p_hwfn,
  2593. u64 *events)
  2594. {
  2595. u64 *p_pending_events = p_hwfn->pf_iov_info->pending_events;
  2596. memcpy(events, p_pending_events, sizeof(u64) * QED_VF_ARRAY_LENGTH);
  2597. memset(p_pending_events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
  2598. }
  2599. static struct qed_vf_info *qed_sriov_get_vf_from_absid(struct qed_hwfn *p_hwfn,
  2600. u16 abs_vfid)
  2601. {
  2602. u8 min = (u8) p_hwfn->cdev->p_iov_info->first_vf_in_pf;
  2603. if (!_qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) {
  2604. DP_VERBOSE(p_hwfn,
  2605. QED_MSG_IOV,
  2606. "Got indication for VF [abs 0x%08x] that cannot be handled by PF\n",
  2607. abs_vfid);
  2608. return NULL;
  2609. }
  2610. return &p_hwfn->pf_iov_info->vfs_array[(u8) abs_vfid - min];
  2611. }
  2612. static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
  2613. u16 abs_vfid, struct regpair *vf_msg)
  2614. {
  2615. struct qed_vf_info *p_vf = qed_sriov_get_vf_from_absid(p_hwfn,
  2616. abs_vfid);
  2617. if (!p_vf)
  2618. return 0;
  2619. /* List the physical address of the request so that handler
  2620. * could later on copy the message from it.
  2621. */
  2622. p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
  2623. /* Mark the event and schedule the workqueue */
  2624. qed_iov_pf_add_pending_events(p_hwfn, p_vf->relative_vf_id);
  2625. qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
  2626. return 0;
  2627. }
  2628. static void qed_sriov_vfpf_malicious(struct qed_hwfn *p_hwfn,
  2629. struct malicious_vf_eqe_data *p_data)
  2630. {
  2631. struct qed_vf_info *p_vf;
  2632. p_vf = qed_sriov_get_vf_from_absid(p_hwfn, p_data->vf_id);
  2633. if (!p_vf)
  2634. return;
  2635. DP_INFO(p_hwfn,
  2636. "VF [%d] - Malicious behavior [%02x]\n",
  2637. p_vf->abs_vf_id, p_data->err_id);
  2638. p_vf->b_malicious = true;
  2639. }
  2640. int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
  2641. u8 opcode, __le16 echo, union event_ring_data *data)
  2642. {
  2643. switch (opcode) {
  2644. case COMMON_EVENT_VF_PF_CHANNEL:
  2645. return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
  2646. &data->vf_pf_channel.msg_addr);
  2647. case COMMON_EVENT_MALICIOUS_VF:
  2648. qed_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf);
  2649. return 0;
  2650. default:
  2651. DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
  2652. opcode);
  2653. return -EINVAL;
  2654. }
  2655. }
  2656. u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
  2657. {
  2658. struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
  2659. u16 i;
  2660. if (!p_iov)
  2661. goto out;
  2662. for (i = rel_vf_id; i < p_iov->total_vfs; i++)
  2663. if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false))
  2664. return i;
  2665. out:
  2666. return MAX_NUM_VFS;
  2667. }
  2668. static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
  2669. int vfid)
  2670. {
  2671. struct qed_dmae_params params;
  2672. struct qed_vf_info *vf_info;
  2673. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2674. if (!vf_info)
  2675. return -EINVAL;
  2676. memset(&params, 0, sizeof(struct qed_dmae_params));
  2677. params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
  2678. params.src_vfid = vf_info->abs_vf_id;
  2679. if (qed_dmae_host2host(p_hwfn, ptt,
  2680. vf_info->vf_mbx.pending_req,
  2681. vf_info->vf_mbx.req_phys,
  2682. sizeof(union vfpf_tlvs) / 4, &params)) {
  2683. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2684. "Failed to copy message from VF 0x%02x\n", vfid);
  2685. return -EIO;
  2686. }
  2687. return 0;
  2688. }
  2689. static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
  2690. u8 *mac, int vfid)
  2691. {
  2692. struct qed_vf_info *vf_info;
  2693. u64 feature;
  2694. vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
  2695. if (!vf_info) {
  2696. DP_NOTICE(p_hwfn->cdev,
  2697. "Can not set forced MAC, invalid vfid [%d]\n", vfid);
  2698. return;
  2699. }
  2700. if (vf_info->b_malicious) {
  2701. DP_NOTICE(p_hwfn->cdev,
  2702. "Can't set forced MAC to malicious VF [%d]\n", vfid);
  2703. return;
  2704. }
  2705. feature = 1 << MAC_ADDR_FORCED;
  2706. memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
  2707. vf_info->bulletin.p_virt->valid_bitmap |= feature;
  2708. /* Forced MAC will disable MAC_ADDR */
  2709. vf_info->bulletin.p_virt->valid_bitmap &= ~BIT(VFPF_BULLETIN_MAC_ADDR);
  2710. qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
  2711. }
  2712. static void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
  2713. u16 pvid, int vfid)
  2714. {
  2715. struct qed_vf_info *vf_info;
  2716. u64 feature;
  2717. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2718. if (!vf_info) {
  2719. DP_NOTICE(p_hwfn->cdev,
  2720. "Can not set forced MAC, invalid vfid [%d]\n", vfid);
  2721. return;
  2722. }
  2723. if (vf_info->b_malicious) {
  2724. DP_NOTICE(p_hwfn->cdev,
  2725. "Can't set forced vlan to malicious VF [%d]\n", vfid);
  2726. return;
  2727. }
  2728. feature = 1 << VLAN_ADDR_FORCED;
  2729. vf_info->bulletin.p_virt->pvid = pvid;
  2730. if (pvid)
  2731. vf_info->bulletin.p_virt->valid_bitmap |= feature;
  2732. else
  2733. vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
  2734. qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
  2735. }
  2736. static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
  2737. {
  2738. struct qed_vf_info *p_vf_info;
  2739. p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2740. if (!p_vf_info)
  2741. return false;
  2742. return !!p_vf_info->vport_instance;
  2743. }
  2744. static bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
  2745. {
  2746. struct qed_vf_info *p_vf_info;
  2747. p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2748. if (!p_vf_info)
  2749. return true;
  2750. return p_vf_info->state == VF_STOPPED;
  2751. }
  2752. static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
  2753. {
  2754. struct qed_vf_info *vf_info;
  2755. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2756. if (!vf_info)
  2757. return false;
  2758. return vf_info->spoof_chk;
  2759. }
  2760. static int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
  2761. {
  2762. struct qed_vf_info *vf;
  2763. int rc = -EINVAL;
  2764. if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
  2765. DP_NOTICE(p_hwfn,
  2766. "SR-IOV sanity check failed, can't set spoofchk\n");
  2767. goto out;
  2768. }
  2769. vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2770. if (!vf)
  2771. goto out;
  2772. if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
  2773. /* After VF VPORT start PF will configure spoof check */
  2774. vf->req_spoofchk_val = val;
  2775. rc = 0;
  2776. goto out;
  2777. }
  2778. rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
  2779. out:
  2780. return rc;
  2781. }
  2782. static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
  2783. u16 rel_vf_id)
  2784. {
  2785. struct qed_vf_info *p_vf;
  2786. p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
  2787. if (!p_vf || !p_vf->bulletin.p_virt)
  2788. return NULL;
  2789. if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)))
  2790. return NULL;
  2791. return p_vf->bulletin.p_virt->mac;
  2792. }
  2793. static u16
  2794. qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
  2795. {
  2796. struct qed_vf_info *p_vf;
  2797. p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
  2798. if (!p_vf || !p_vf->bulletin.p_virt)
  2799. return 0;
  2800. if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED)))
  2801. return 0;
  2802. return p_vf->bulletin.p_virt->pvid;
  2803. }
  2804. static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
  2805. struct qed_ptt *p_ptt, int vfid, int val)
  2806. {
  2807. struct qed_vf_info *vf;
  2808. u8 abs_vp_id = 0;
  2809. int rc;
  2810. vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
  2811. if (!vf)
  2812. return -EINVAL;
  2813. rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
  2814. if (rc)
  2815. return rc;
  2816. return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
  2817. }
  2818. static int
  2819. qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
  2820. {
  2821. struct qed_vf_info *vf;
  2822. u8 vport_id;
  2823. int i;
  2824. for_each_hwfn(cdev, i) {
  2825. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  2826. if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
  2827. DP_NOTICE(p_hwfn,
  2828. "SR-IOV sanity check failed, can't set min rate\n");
  2829. return -EINVAL;
  2830. }
  2831. }
  2832. vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
  2833. vport_id = vf->vport_id;
  2834. return qed_configure_vport_wfq(cdev, vport_id, rate);
  2835. }
  2836. static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
  2837. {
  2838. struct qed_wfq_data *vf_vp_wfq;
  2839. struct qed_vf_info *vf_info;
  2840. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2841. if (!vf_info)
  2842. return 0;
  2843. vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
  2844. if (vf_vp_wfq->configured)
  2845. return vf_vp_wfq->min_speed;
  2846. else
  2847. return 0;
  2848. }
  2849. /**
  2850. * qed_schedule_iov - schedules IOV task for VF and PF
  2851. * @hwfn: hardware function pointer
  2852. * @flag: IOV flag for VF/PF
  2853. */
  2854. void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
  2855. {
  2856. smp_mb__before_atomic();
  2857. set_bit(flag, &hwfn->iov_task_flags);
  2858. smp_mb__after_atomic();
  2859. DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
  2860. queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
  2861. }
  2862. void qed_vf_start_iov_wq(struct qed_dev *cdev)
  2863. {
  2864. int i;
  2865. for_each_hwfn(cdev, i)
  2866. queue_delayed_work(cdev->hwfns[i].iov_wq,
  2867. &cdev->hwfns[i].iov_task, 0);
  2868. }
  2869. int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
  2870. {
  2871. int i, j;
  2872. for_each_hwfn(cdev, i)
  2873. if (cdev->hwfns[i].iov_wq)
  2874. flush_workqueue(cdev->hwfns[i].iov_wq);
  2875. /* Mark VFs for disablement */
  2876. qed_iov_set_vfs_to_disable(cdev, true);
  2877. if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
  2878. pci_disable_sriov(cdev->pdev);
  2879. for_each_hwfn(cdev, i) {
  2880. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  2881. struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
  2882. /* Failure to acquire the ptt in 100g creates an odd error
  2883. * where the first engine has already relased IOV.
  2884. */
  2885. if (!ptt) {
  2886. DP_ERR(hwfn, "Failed to acquire ptt\n");
  2887. return -EBUSY;
  2888. }
  2889. /* Clean WFQ db and configure equal weight for all vports */
  2890. qed_clean_wfq_db(hwfn, ptt);
  2891. qed_for_each_vf(hwfn, j) {
  2892. int k;
  2893. if (!qed_iov_is_valid_vfid(hwfn, j, true, false))
  2894. continue;
  2895. /* Wait until VF is disabled before releasing */
  2896. for (k = 0; k < 100; k++) {
  2897. if (!qed_iov_is_vf_stopped(hwfn, j))
  2898. msleep(20);
  2899. else
  2900. break;
  2901. }
  2902. if (k < 100)
  2903. qed_iov_release_hw_for_vf(&cdev->hwfns[i],
  2904. ptt, j);
  2905. else
  2906. DP_ERR(hwfn,
  2907. "Timeout waiting for VF's FLR to end\n");
  2908. }
  2909. qed_ptt_release(hwfn, ptt);
  2910. }
  2911. qed_iov_set_vfs_to_disable(cdev, false);
  2912. return 0;
  2913. }
  2914. static void qed_sriov_enable_qid_config(struct qed_hwfn *hwfn,
  2915. u16 vfid,
  2916. struct qed_iov_vf_init_params *params)
  2917. {
  2918. u16 base, i;
  2919. /* Since we have an equal resource distribution per-VF, and we assume
  2920. * PF has acquired the QED_PF_L2_QUE first queues, we start setting
  2921. * sequentially from there.
  2922. */
  2923. base = FEAT_NUM(hwfn, QED_PF_L2_QUE) + vfid * params->num_queues;
  2924. params->rel_vf_id = vfid;
  2925. for (i = 0; i < params->num_queues; i++) {
  2926. params->req_rx_queue[i] = base + i;
  2927. params->req_tx_queue[i] = base + i;
  2928. }
  2929. }
  2930. static int qed_sriov_enable(struct qed_dev *cdev, int num)
  2931. {
  2932. struct qed_iov_vf_init_params params;
  2933. int i, j, rc;
  2934. if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
  2935. DP_NOTICE(cdev, "Can start at most %d VFs\n",
  2936. RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
  2937. return -EINVAL;
  2938. }
  2939. memset(&params, 0, sizeof(params));
  2940. /* Initialize HW for VF access */
  2941. for_each_hwfn(cdev, j) {
  2942. struct qed_hwfn *hwfn = &cdev->hwfns[j];
  2943. struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
  2944. /* Make sure not to use more than 16 queues per VF */
  2945. params.num_queues = min_t(int,
  2946. FEAT_NUM(hwfn, QED_VF_L2_QUE) / num,
  2947. 16);
  2948. if (!ptt) {
  2949. DP_ERR(hwfn, "Failed to acquire ptt\n");
  2950. rc = -EBUSY;
  2951. goto err;
  2952. }
  2953. for (i = 0; i < num; i++) {
  2954. if (!qed_iov_is_valid_vfid(hwfn, i, false, true))
  2955. continue;
  2956. qed_sriov_enable_qid_config(hwfn, i, &params);
  2957. rc = qed_iov_init_hw_for_vf(hwfn, ptt, &params);
  2958. if (rc) {
  2959. DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
  2960. qed_ptt_release(hwfn, ptt);
  2961. goto err;
  2962. }
  2963. }
  2964. qed_ptt_release(hwfn, ptt);
  2965. }
  2966. /* Enable SRIOV PCIe functions */
  2967. rc = pci_enable_sriov(cdev->pdev, num);
  2968. if (rc) {
  2969. DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
  2970. goto err;
  2971. }
  2972. return num;
  2973. err:
  2974. qed_sriov_disable(cdev, false);
  2975. return rc;
  2976. }
  2977. static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
  2978. {
  2979. if (!IS_QED_SRIOV(cdev)) {
  2980. DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
  2981. return -EOPNOTSUPP;
  2982. }
  2983. if (num_vfs_param)
  2984. return qed_sriov_enable(cdev, num_vfs_param);
  2985. else
  2986. return qed_sriov_disable(cdev, true);
  2987. }
  2988. static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
  2989. {
  2990. int i;
  2991. if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
  2992. DP_VERBOSE(cdev, QED_MSG_IOV,
  2993. "Cannot set a VF MAC; Sriov is not enabled\n");
  2994. return -EINVAL;
  2995. }
  2996. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
  2997. DP_VERBOSE(cdev, QED_MSG_IOV,
  2998. "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
  2999. return -EINVAL;
  3000. }
  3001. for_each_hwfn(cdev, i) {
  3002. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  3003. struct qed_public_vf_info *vf_info;
  3004. vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
  3005. if (!vf_info)
  3006. continue;
  3007. /* Set the forced MAC, and schedule the IOV task */
  3008. ether_addr_copy(vf_info->forced_mac, mac);
  3009. qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
  3010. }
  3011. return 0;
  3012. }
  3013. static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
  3014. {
  3015. int i;
  3016. if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
  3017. DP_VERBOSE(cdev, QED_MSG_IOV,
  3018. "Cannot set a VF MAC; Sriov is not enabled\n");
  3019. return -EINVAL;
  3020. }
  3021. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
  3022. DP_VERBOSE(cdev, QED_MSG_IOV,
  3023. "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
  3024. return -EINVAL;
  3025. }
  3026. for_each_hwfn(cdev, i) {
  3027. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  3028. struct qed_public_vf_info *vf_info;
  3029. vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
  3030. if (!vf_info)
  3031. continue;
  3032. /* Set the forced vlan, and schedule the IOV task */
  3033. vf_info->forced_vlan = vid;
  3034. qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
  3035. }
  3036. return 0;
  3037. }
  3038. static int qed_get_vf_config(struct qed_dev *cdev,
  3039. int vf_id, struct ifla_vf_info *ivi)
  3040. {
  3041. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  3042. struct qed_public_vf_info *vf_info;
  3043. struct qed_mcp_link_state link;
  3044. u32 tx_rate;
  3045. /* Sanitize request */
  3046. if (IS_VF(cdev))
  3047. return -EINVAL;
  3048. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, false)) {
  3049. DP_VERBOSE(cdev, QED_MSG_IOV,
  3050. "VF index [%d] isn't active\n", vf_id);
  3051. return -EINVAL;
  3052. }
  3053. vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
  3054. qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
  3055. /* Fill information about VF */
  3056. ivi->vf = vf_id;
  3057. if (is_valid_ether_addr(vf_info->forced_mac))
  3058. ether_addr_copy(ivi->mac, vf_info->forced_mac);
  3059. else
  3060. ether_addr_copy(ivi->mac, vf_info->mac);
  3061. ivi->vlan = vf_info->forced_vlan;
  3062. ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
  3063. ivi->linkstate = vf_info->link_state;
  3064. tx_rate = vf_info->tx_rate;
  3065. ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
  3066. ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
  3067. return 0;
  3068. }
  3069. void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
  3070. {
  3071. struct qed_mcp_link_capabilities caps;
  3072. struct qed_mcp_link_params params;
  3073. struct qed_mcp_link_state link;
  3074. int i;
  3075. if (!hwfn->pf_iov_info)
  3076. return;
  3077. /* Update bulletin of all future possible VFs with link configuration */
  3078. for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
  3079. struct qed_public_vf_info *vf_info;
  3080. vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
  3081. if (!vf_info)
  3082. continue;
  3083. memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
  3084. memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
  3085. memcpy(&caps, qed_mcp_get_link_capabilities(hwfn),
  3086. sizeof(caps));
  3087. /* Modify link according to the VF's configured link state */
  3088. switch (vf_info->link_state) {
  3089. case IFLA_VF_LINK_STATE_DISABLE:
  3090. link.link_up = false;
  3091. break;
  3092. case IFLA_VF_LINK_STATE_ENABLE:
  3093. link.link_up = true;
  3094. /* Set speed according to maximum supported by HW.
  3095. * that is 40G for regular devices and 100G for CMT
  3096. * mode devices.
  3097. */
  3098. link.speed = (hwfn->cdev->num_hwfns > 1) ?
  3099. 100000 : 40000;
  3100. default:
  3101. /* In auto mode pass PF link image to VF */
  3102. break;
  3103. }
  3104. if (link.link_up && vf_info->tx_rate) {
  3105. struct qed_ptt *ptt;
  3106. int rate;
  3107. rate = min_t(int, vf_info->tx_rate, link.speed);
  3108. ptt = qed_ptt_acquire(hwfn);
  3109. if (!ptt) {
  3110. DP_NOTICE(hwfn, "Failed to acquire PTT\n");
  3111. return;
  3112. }
  3113. if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
  3114. vf_info->tx_rate = rate;
  3115. link.speed = rate;
  3116. }
  3117. qed_ptt_release(hwfn, ptt);
  3118. }
  3119. qed_iov_set_link(hwfn, i, &params, &link, &caps);
  3120. }
  3121. qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
  3122. }
  3123. static int qed_set_vf_link_state(struct qed_dev *cdev,
  3124. int vf_id, int link_state)
  3125. {
  3126. int i;
  3127. /* Sanitize request */
  3128. if (IS_VF(cdev))
  3129. return -EINVAL;
  3130. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, true)) {
  3131. DP_VERBOSE(cdev, QED_MSG_IOV,
  3132. "VF index [%d] isn't active\n", vf_id);
  3133. return -EINVAL;
  3134. }
  3135. /* Handle configuration of link state */
  3136. for_each_hwfn(cdev, i) {
  3137. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  3138. struct qed_public_vf_info *vf;
  3139. vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
  3140. if (!vf)
  3141. continue;
  3142. if (vf->link_state == link_state)
  3143. continue;
  3144. vf->link_state = link_state;
  3145. qed_inform_vf_link_state(&cdev->hwfns[i]);
  3146. }
  3147. return 0;
  3148. }
  3149. static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
  3150. {
  3151. int i, rc = -EINVAL;
  3152. for_each_hwfn(cdev, i) {
  3153. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  3154. rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
  3155. if (rc)
  3156. break;
  3157. }
  3158. return rc;
  3159. }
  3160. static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
  3161. {
  3162. int i;
  3163. for_each_hwfn(cdev, i) {
  3164. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  3165. struct qed_public_vf_info *vf;
  3166. if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
  3167. DP_NOTICE(p_hwfn,
  3168. "SR-IOV sanity check failed, can't set tx rate\n");
  3169. return -EINVAL;
  3170. }
  3171. vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
  3172. vf->tx_rate = rate;
  3173. qed_inform_vf_link_state(p_hwfn);
  3174. }
  3175. return 0;
  3176. }
  3177. static int qed_set_vf_rate(struct qed_dev *cdev,
  3178. int vfid, u32 min_rate, u32 max_rate)
  3179. {
  3180. int rc_min = 0, rc_max = 0;
  3181. if (max_rate)
  3182. rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
  3183. if (min_rate)
  3184. rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
  3185. if (rc_max | rc_min)
  3186. return -EINVAL;
  3187. return 0;
  3188. }
  3189. static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
  3190. {
  3191. u64 events[QED_VF_ARRAY_LENGTH];
  3192. struct qed_ptt *ptt;
  3193. int i;
  3194. ptt = qed_ptt_acquire(hwfn);
  3195. if (!ptt) {
  3196. DP_VERBOSE(hwfn, QED_MSG_IOV,
  3197. "Can't acquire PTT; re-scheduling\n");
  3198. qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
  3199. return;
  3200. }
  3201. qed_iov_pf_get_and_clear_pending_events(hwfn, events);
  3202. DP_VERBOSE(hwfn, QED_MSG_IOV,
  3203. "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
  3204. events[0], events[1], events[2]);
  3205. qed_for_each_vf(hwfn, i) {
  3206. /* Skip VFs with no pending messages */
  3207. if (!(events[i / 64] & (1ULL << (i % 64))))
  3208. continue;
  3209. DP_VERBOSE(hwfn, QED_MSG_IOV,
  3210. "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
  3211. i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
  3212. /* Copy VF's message to PF's request buffer for that VF */
  3213. if (qed_iov_copy_vf_msg(hwfn, ptt, i))
  3214. continue;
  3215. qed_iov_process_mbx_req(hwfn, ptt, i);
  3216. }
  3217. qed_ptt_release(hwfn, ptt);
  3218. }
  3219. static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
  3220. {
  3221. int i;
  3222. qed_for_each_vf(hwfn, i) {
  3223. struct qed_public_vf_info *info;
  3224. bool update = false;
  3225. u8 *mac;
  3226. info = qed_iov_get_public_vf_info(hwfn, i, true);
  3227. if (!info)
  3228. continue;
  3229. /* Update data on bulletin board */
  3230. mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
  3231. if (is_valid_ether_addr(info->forced_mac) &&
  3232. (!mac || !ether_addr_equal(mac, info->forced_mac))) {
  3233. DP_VERBOSE(hwfn,
  3234. QED_MSG_IOV,
  3235. "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
  3236. i,
  3237. hwfn->cdev->p_iov_info->first_vf_in_pf + i);
  3238. /* Update bulletin board with forced MAC */
  3239. qed_iov_bulletin_set_forced_mac(hwfn,
  3240. info->forced_mac, i);
  3241. update = true;
  3242. }
  3243. if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
  3244. info->forced_vlan) {
  3245. DP_VERBOSE(hwfn,
  3246. QED_MSG_IOV,
  3247. "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
  3248. info->forced_vlan,
  3249. i,
  3250. hwfn->cdev->p_iov_info->first_vf_in_pf + i);
  3251. qed_iov_bulletin_set_forced_vlan(hwfn,
  3252. info->forced_vlan, i);
  3253. update = true;
  3254. }
  3255. if (update)
  3256. qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
  3257. }
  3258. }
  3259. static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
  3260. {
  3261. struct qed_ptt *ptt;
  3262. int i;
  3263. ptt = qed_ptt_acquire(hwfn);
  3264. if (!ptt) {
  3265. DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
  3266. qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
  3267. return;
  3268. }
  3269. qed_for_each_vf(hwfn, i)
  3270. qed_iov_post_vf_bulletin(hwfn, i, ptt);
  3271. qed_ptt_release(hwfn, ptt);
  3272. }
  3273. static void qed_iov_pf_task(struct work_struct *work)
  3274. {
  3275. struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
  3276. iov_task.work);
  3277. int rc;
  3278. if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
  3279. return;
  3280. if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
  3281. struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
  3282. if (!ptt) {
  3283. qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
  3284. return;
  3285. }
  3286. rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
  3287. if (rc)
  3288. qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
  3289. qed_ptt_release(hwfn, ptt);
  3290. }
  3291. if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
  3292. qed_handle_vf_msg(hwfn);
  3293. if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
  3294. &hwfn->iov_task_flags))
  3295. qed_handle_pf_set_vf_unicast(hwfn);
  3296. if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
  3297. &hwfn->iov_task_flags))
  3298. qed_handle_bulletin_post(hwfn);
  3299. }
  3300. void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
  3301. {
  3302. int i;
  3303. for_each_hwfn(cdev, i) {
  3304. if (!cdev->hwfns[i].iov_wq)
  3305. continue;
  3306. if (schedule_first) {
  3307. qed_schedule_iov(&cdev->hwfns[i],
  3308. QED_IOV_WQ_STOP_WQ_FLAG);
  3309. cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
  3310. }
  3311. flush_workqueue(cdev->hwfns[i].iov_wq);
  3312. destroy_workqueue(cdev->hwfns[i].iov_wq);
  3313. }
  3314. }
  3315. int qed_iov_wq_start(struct qed_dev *cdev)
  3316. {
  3317. char name[NAME_SIZE];
  3318. int i;
  3319. for_each_hwfn(cdev, i) {
  3320. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  3321. /* PFs needs a dedicated workqueue only if they support IOV.
  3322. * VFs always require one.
  3323. */
  3324. if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
  3325. continue;
  3326. snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
  3327. cdev->pdev->bus->number,
  3328. PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
  3329. p_hwfn->iov_wq = create_singlethread_workqueue(name);
  3330. if (!p_hwfn->iov_wq) {
  3331. DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
  3332. return -ENOMEM;
  3333. }
  3334. if (IS_PF(cdev))
  3335. INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
  3336. else
  3337. INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
  3338. }
  3339. return 0;
  3340. }
  3341. const struct qed_iov_hv_ops qed_iov_ops_pass = {
  3342. .configure = &qed_sriov_configure,
  3343. .set_mac = &qed_sriov_pf_set_mac,
  3344. .set_vlan = &qed_sriov_pf_set_vlan,
  3345. .get_config = &qed_get_vf_config,
  3346. .set_link_state = &qed_set_vf_link_state,
  3347. .set_spoof = &qed_spoof_configure,
  3348. .set_rate = &qed_set_vf_rate,
  3349. };