qed_l2.c 64 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015 QLogic Corporation
  3. *
  4. * This software is available under the terms of the GNU General Public License
  5. * (GPL) Version 2, available from the file COPYING in the main directory of
  6. * this source tree.
  7. */
  8. #include <linux/types.h>
  9. #include <asm/byteorder.h>
  10. #include <asm/param.h>
  11. #include <linux/delay.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/etherdevice.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/pci.h>
  18. #include <linux/slab.h>
  19. #include <linux/stddef.h>
  20. #include <linux/string.h>
  21. #include <linux/version.h>
  22. #include <linux/workqueue.h>
  23. #include <linux/bitops.h>
  24. #include <linux/bug.h>
  25. #include <linux/vmalloc.h>
  26. #include "qed.h"
  27. #include <linux/qed/qed_chain.h>
  28. #include "qed_cxt.h"
  29. #include "qed_dev_api.h"
  30. #include <linux/qed/qed_eth_if.h>
  31. #include "qed_hsi.h"
  32. #include "qed_hw.h"
  33. #include "qed_int.h"
  34. #include "qed_l2.h"
  35. #include "qed_mcp.h"
  36. #include "qed_reg_addr.h"
  37. #include "qed_sp.h"
  38. #include "qed_sriov.h"
  39. #define QED_MAX_SGES_NUM 16
  40. #define CRC32_POLY 0x1edc6f41
  41. void qed_eth_queue_cid_release(struct qed_hwfn *p_hwfn,
  42. struct qed_queue_cid *p_cid)
  43. {
  44. /* VFs' CIDs are 0-based in PF-view, and uninitialized on VF */
  45. if (!p_cid->is_vf && IS_PF(p_hwfn->cdev))
  46. qed_cxt_release_cid(p_hwfn, p_cid->cid);
  47. vfree(p_cid);
  48. }
  49. /* The internal is only meant to be directly called by PFs initializeing CIDs
  50. * for their VFs.
  51. */
  52. struct qed_queue_cid *
  53. _qed_eth_queue_to_cid(struct qed_hwfn *p_hwfn,
  54. u16 opaque_fid,
  55. u32 cid,
  56. u8 vf_qid,
  57. struct qed_queue_start_common_params *p_params)
  58. {
  59. bool b_is_same = (p_hwfn->hw_info.opaque_fid == opaque_fid);
  60. struct qed_queue_cid *p_cid;
  61. int rc;
  62. p_cid = vmalloc(sizeof(*p_cid));
  63. if (!p_cid)
  64. return NULL;
  65. memset(p_cid, 0, sizeof(*p_cid));
  66. p_cid->opaque_fid = opaque_fid;
  67. p_cid->cid = cid;
  68. p_cid->vf_qid = vf_qid;
  69. p_cid->rel = *p_params;
  70. /* Don't try calculating the absolute indices for VFs */
  71. if (IS_VF(p_hwfn->cdev)) {
  72. p_cid->abs = p_cid->rel;
  73. goto out;
  74. }
  75. /* Calculate the engine-absolute indices of the resources.
  76. * This would guarantee they're valid later on.
  77. * In some cases [SBs] we already have the right values.
  78. */
  79. rc = qed_fw_vport(p_hwfn, p_cid->rel.vport_id, &p_cid->abs.vport_id);
  80. if (rc)
  81. goto fail;
  82. rc = qed_fw_l2_queue(p_hwfn, p_cid->rel.queue_id, &p_cid->abs.queue_id);
  83. if (rc)
  84. goto fail;
  85. /* In case of a PF configuring its VF's queues, the stats-id is already
  86. * absolute [since there's a single index that's suitable per-VF].
  87. */
  88. if (b_is_same) {
  89. rc = qed_fw_vport(p_hwfn, p_cid->rel.stats_id,
  90. &p_cid->abs.stats_id);
  91. if (rc)
  92. goto fail;
  93. } else {
  94. p_cid->abs.stats_id = p_cid->rel.stats_id;
  95. }
  96. /* SBs relevant information was already provided as absolute */
  97. p_cid->abs.sb = p_cid->rel.sb;
  98. p_cid->abs.sb_idx = p_cid->rel.sb_idx;
  99. /* This is tricky - we're actually interested in whehter this is a PF
  100. * entry meant for the VF.
  101. */
  102. if (!b_is_same)
  103. p_cid->is_vf = true;
  104. out:
  105. DP_VERBOSE(p_hwfn,
  106. QED_MSG_SP,
  107. "opaque_fid: %04x CID %08x vport %02x [%02x] qzone %04x [%04x] stats %02x [%02x] SB %04x PI %02x\n",
  108. p_cid->opaque_fid,
  109. p_cid->cid,
  110. p_cid->rel.vport_id,
  111. p_cid->abs.vport_id,
  112. p_cid->rel.queue_id,
  113. p_cid->abs.queue_id,
  114. p_cid->rel.stats_id,
  115. p_cid->abs.stats_id, p_cid->abs.sb, p_cid->abs.sb_idx);
  116. return p_cid;
  117. fail:
  118. vfree(p_cid);
  119. return NULL;
  120. }
  121. static struct qed_queue_cid *qed_eth_queue_to_cid(struct qed_hwfn *p_hwfn,
  122. u16 opaque_fid, struct
  123. qed_queue_start_common_params
  124. *p_params)
  125. {
  126. struct qed_queue_cid *p_cid;
  127. u32 cid = 0;
  128. /* Get a unique firmware CID for this queue, in case it's a PF.
  129. * VF's don't need a CID as the queue configuration will be done
  130. * by PF.
  131. */
  132. if (IS_PF(p_hwfn->cdev)) {
  133. if (qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_ETH, &cid)) {
  134. DP_NOTICE(p_hwfn, "Failed to acquire cid\n");
  135. return NULL;
  136. }
  137. }
  138. p_cid = _qed_eth_queue_to_cid(p_hwfn, opaque_fid, cid, 0, p_params);
  139. if (!p_cid && IS_PF(p_hwfn->cdev))
  140. qed_cxt_release_cid(p_hwfn, cid);
  141. return p_cid;
  142. }
  143. int qed_sp_eth_vport_start(struct qed_hwfn *p_hwfn,
  144. struct qed_sp_vport_start_params *p_params)
  145. {
  146. struct vport_start_ramrod_data *p_ramrod = NULL;
  147. struct qed_spq_entry *p_ent = NULL;
  148. struct qed_sp_init_data init_data;
  149. u8 abs_vport_id = 0;
  150. int rc = -EINVAL;
  151. u16 rx_mode = 0;
  152. rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
  153. if (rc)
  154. return rc;
  155. memset(&init_data, 0, sizeof(init_data));
  156. init_data.cid = qed_spq_get_cid(p_hwfn);
  157. init_data.opaque_fid = p_params->opaque_fid;
  158. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  159. rc = qed_sp_init_request(p_hwfn, &p_ent,
  160. ETH_RAMROD_VPORT_START,
  161. PROTOCOLID_ETH, &init_data);
  162. if (rc)
  163. return rc;
  164. p_ramrod = &p_ent->ramrod.vport_start;
  165. p_ramrod->vport_id = abs_vport_id;
  166. p_ramrod->mtu = cpu_to_le16(p_params->mtu);
  167. p_ramrod->inner_vlan_removal_en = p_params->remove_inner_vlan;
  168. p_ramrod->drop_ttl0_en = p_params->drop_ttl0;
  169. p_ramrod->untagged = p_params->only_untagged;
  170. SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 1);
  171. SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 1);
  172. p_ramrod->rx_mode.state = cpu_to_le16(rx_mode);
  173. /* TPA related fields */
  174. memset(&p_ramrod->tpa_param, 0, sizeof(struct eth_vport_tpa_param));
  175. p_ramrod->tpa_param.max_buff_num = p_params->max_buffers_per_cqe;
  176. switch (p_params->tpa_mode) {
  177. case QED_TPA_MODE_GRO:
  178. p_ramrod->tpa_param.tpa_max_aggs_num = ETH_TPA_MAX_AGGS_NUM;
  179. p_ramrod->tpa_param.tpa_max_size = (u16)-1;
  180. p_ramrod->tpa_param.tpa_min_size_to_cont = p_params->mtu / 2;
  181. p_ramrod->tpa_param.tpa_min_size_to_start = p_params->mtu / 2;
  182. p_ramrod->tpa_param.tpa_ipv4_en_flg = 1;
  183. p_ramrod->tpa_param.tpa_ipv6_en_flg = 1;
  184. p_ramrod->tpa_param.tpa_pkt_split_flg = 1;
  185. p_ramrod->tpa_param.tpa_gro_consistent_flg = 1;
  186. break;
  187. default:
  188. break;
  189. }
  190. p_ramrod->tx_switching_en = p_params->tx_switching;
  191. p_ramrod->ctl_frame_mac_check_en = !!p_params->check_mac;
  192. p_ramrod->ctl_frame_ethtype_check_en = !!p_params->check_ethtype;
  193. /* Software Function ID in hwfn (PFs are 0 - 15, VFs are 16 - 135) */
  194. p_ramrod->sw_fid = qed_concrete_to_sw_fid(p_hwfn->cdev,
  195. p_params->concrete_fid);
  196. return qed_spq_post(p_hwfn, p_ent, NULL);
  197. }
  198. static int qed_sp_vport_start(struct qed_hwfn *p_hwfn,
  199. struct qed_sp_vport_start_params *p_params)
  200. {
  201. if (IS_VF(p_hwfn->cdev)) {
  202. return qed_vf_pf_vport_start(p_hwfn, p_params->vport_id,
  203. p_params->mtu,
  204. p_params->remove_inner_vlan,
  205. p_params->tpa_mode,
  206. p_params->max_buffers_per_cqe,
  207. p_params->only_untagged);
  208. }
  209. return qed_sp_eth_vport_start(p_hwfn, p_params);
  210. }
  211. static int
  212. qed_sp_vport_update_rss(struct qed_hwfn *p_hwfn,
  213. struct vport_update_ramrod_data *p_ramrod,
  214. struct qed_rss_params *p_params)
  215. {
  216. struct eth_vport_rss_config *rss = &p_ramrod->rss_config;
  217. u16 abs_l2_queue = 0, capabilities = 0;
  218. int rc = 0, i;
  219. if (!p_params) {
  220. p_ramrod->common.update_rss_flg = 0;
  221. return rc;
  222. }
  223. BUILD_BUG_ON(QED_RSS_IND_TABLE_SIZE !=
  224. ETH_RSS_IND_TABLE_ENTRIES_NUM);
  225. rc = qed_fw_rss_eng(p_hwfn, p_params->rss_eng_id, &rss->rss_id);
  226. if (rc)
  227. return rc;
  228. p_ramrod->common.update_rss_flg = p_params->update_rss_config;
  229. rss->update_rss_capabilities = p_params->update_rss_capabilities;
  230. rss->update_rss_ind_table = p_params->update_rss_ind_table;
  231. rss->update_rss_key = p_params->update_rss_key;
  232. rss->rss_mode = p_params->rss_enable ?
  233. ETH_VPORT_RSS_MODE_REGULAR :
  234. ETH_VPORT_RSS_MODE_DISABLED;
  235. SET_FIELD(capabilities,
  236. ETH_VPORT_RSS_CONFIG_IPV4_CAPABILITY,
  237. !!(p_params->rss_caps & QED_RSS_IPV4));
  238. SET_FIELD(capabilities,
  239. ETH_VPORT_RSS_CONFIG_IPV6_CAPABILITY,
  240. !!(p_params->rss_caps & QED_RSS_IPV6));
  241. SET_FIELD(capabilities,
  242. ETH_VPORT_RSS_CONFIG_IPV4_TCP_CAPABILITY,
  243. !!(p_params->rss_caps & QED_RSS_IPV4_TCP));
  244. SET_FIELD(capabilities,
  245. ETH_VPORT_RSS_CONFIG_IPV6_TCP_CAPABILITY,
  246. !!(p_params->rss_caps & QED_RSS_IPV6_TCP));
  247. SET_FIELD(capabilities,
  248. ETH_VPORT_RSS_CONFIG_IPV4_UDP_CAPABILITY,
  249. !!(p_params->rss_caps & QED_RSS_IPV4_UDP));
  250. SET_FIELD(capabilities,
  251. ETH_VPORT_RSS_CONFIG_IPV6_UDP_CAPABILITY,
  252. !!(p_params->rss_caps & QED_RSS_IPV6_UDP));
  253. rss->tbl_size = p_params->rss_table_size_log;
  254. rss->capabilities = cpu_to_le16(capabilities);
  255. DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP,
  256. "update rss flag %d, rss_mode = %d, update_caps = %d, capabilities = %d, update_ind = %d, update_rss_key = %d\n",
  257. p_ramrod->common.update_rss_flg,
  258. rss->rss_mode, rss->update_rss_capabilities,
  259. capabilities, rss->update_rss_ind_table,
  260. rss->update_rss_key);
  261. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
  262. rc = qed_fw_l2_queue(p_hwfn,
  263. (u8)p_params->rss_ind_table[i],
  264. &abs_l2_queue);
  265. if (rc)
  266. return rc;
  267. rss->indirection_table[i] = cpu_to_le16(abs_l2_queue);
  268. DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP, "i= %d, queue = %d\n",
  269. i, rss->indirection_table[i]);
  270. }
  271. for (i = 0; i < 10; i++)
  272. rss->rss_key[i] = cpu_to_le32(p_params->rss_key[i]);
  273. return rc;
  274. }
  275. static void
  276. qed_sp_update_accept_mode(struct qed_hwfn *p_hwfn,
  277. struct vport_update_ramrod_data *p_ramrod,
  278. struct qed_filter_accept_flags accept_flags)
  279. {
  280. p_ramrod->common.update_rx_mode_flg =
  281. accept_flags.update_rx_mode_config;
  282. p_ramrod->common.update_tx_mode_flg =
  283. accept_flags.update_tx_mode_config;
  284. /* Set Rx mode accept flags */
  285. if (p_ramrod->common.update_rx_mode_flg) {
  286. u8 accept_filter = accept_flags.rx_accept_filter;
  287. u16 state = 0;
  288. SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_DROP_ALL,
  289. !(!!(accept_filter & QED_ACCEPT_UCAST_MATCHED) ||
  290. !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED)));
  291. SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_ACCEPT_UNMATCHED,
  292. !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED));
  293. SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_DROP_ALL,
  294. !(!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) ||
  295. !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
  296. SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_ACCEPT_ALL,
  297. (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) &&
  298. !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
  299. SET_FIELD(state, ETH_VPORT_RX_MODE_BCAST_ACCEPT_ALL,
  300. !!(accept_filter & QED_ACCEPT_BCAST));
  301. p_ramrod->rx_mode.state = cpu_to_le16(state);
  302. DP_VERBOSE(p_hwfn, QED_MSG_SP,
  303. "p_ramrod->rx_mode.state = 0x%x\n", state);
  304. }
  305. /* Set Tx mode accept flags */
  306. if (p_ramrod->common.update_tx_mode_flg) {
  307. u8 accept_filter = accept_flags.tx_accept_filter;
  308. u16 state = 0;
  309. SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_DROP_ALL,
  310. !!(accept_filter & QED_ACCEPT_NONE));
  311. SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_DROP_ALL,
  312. !!(accept_filter & QED_ACCEPT_NONE));
  313. SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_ACCEPT_ALL,
  314. (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) &&
  315. !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
  316. SET_FIELD(state, ETH_VPORT_TX_MODE_BCAST_ACCEPT_ALL,
  317. !!(accept_filter & QED_ACCEPT_BCAST));
  318. p_ramrod->tx_mode.state = cpu_to_le16(state);
  319. DP_VERBOSE(p_hwfn, QED_MSG_SP,
  320. "p_ramrod->tx_mode.state = 0x%x\n", state);
  321. }
  322. }
  323. static void
  324. qed_sp_vport_update_sge_tpa(struct qed_hwfn *p_hwfn,
  325. struct vport_update_ramrod_data *p_ramrod,
  326. struct qed_sge_tpa_params *p_params)
  327. {
  328. struct eth_vport_tpa_param *p_tpa;
  329. if (!p_params) {
  330. p_ramrod->common.update_tpa_param_flg = 0;
  331. p_ramrod->common.update_tpa_en_flg = 0;
  332. p_ramrod->common.update_tpa_param_flg = 0;
  333. return;
  334. }
  335. p_ramrod->common.update_tpa_en_flg = p_params->update_tpa_en_flg;
  336. p_tpa = &p_ramrod->tpa_param;
  337. p_tpa->tpa_ipv4_en_flg = p_params->tpa_ipv4_en_flg;
  338. p_tpa->tpa_ipv6_en_flg = p_params->tpa_ipv6_en_flg;
  339. p_tpa->tpa_ipv4_tunn_en_flg = p_params->tpa_ipv4_tunn_en_flg;
  340. p_tpa->tpa_ipv6_tunn_en_flg = p_params->tpa_ipv6_tunn_en_flg;
  341. p_ramrod->common.update_tpa_param_flg = p_params->update_tpa_param_flg;
  342. p_tpa->max_buff_num = p_params->max_buffers_per_cqe;
  343. p_tpa->tpa_pkt_split_flg = p_params->tpa_pkt_split_flg;
  344. p_tpa->tpa_hdr_data_split_flg = p_params->tpa_hdr_data_split_flg;
  345. p_tpa->tpa_gro_consistent_flg = p_params->tpa_gro_consistent_flg;
  346. p_tpa->tpa_max_aggs_num = p_params->tpa_max_aggs_num;
  347. p_tpa->tpa_max_size = p_params->tpa_max_size;
  348. p_tpa->tpa_min_size_to_start = p_params->tpa_min_size_to_start;
  349. p_tpa->tpa_min_size_to_cont = p_params->tpa_min_size_to_cont;
  350. }
  351. static void
  352. qed_sp_update_mcast_bin(struct qed_hwfn *p_hwfn,
  353. struct vport_update_ramrod_data *p_ramrod,
  354. struct qed_sp_vport_update_params *p_params)
  355. {
  356. int i;
  357. memset(&p_ramrod->approx_mcast.bins, 0,
  358. sizeof(p_ramrod->approx_mcast.bins));
  359. if (!p_params->update_approx_mcast_flg)
  360. return;
  361. p_ramrod->common.update_approx_mcast_flg = 1;
  362. for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
  363. u32 *p_bins = (u32 *)p_params->bins;
  364. p_ramrod->approx_mcast.bins[i] = cpu_to_le32(p_bins[i]);
  365. }
  366. }
  367. int qed_sp_vport_update(struct qed_hwfn *p_hwfn,
  368. struct qed_sp_vport_update_params *p_params,
  369. enum spq_mode comp_mode,
  370. struct qed_spq_comp_cb *p_comp_data)
  371. {
  372. struct qed_rss_params *p_rss_params = p_params->rss_params;
  373. struct vport_update_ramrod_data_cmn *p_cmn;
  374. struct qed_sp_init_data init_data;
  375. struct vport_update_ramrod_data *p_ramrod = NULL;
  376. struct qed_spq_entry *p_ent = NULL;
  377. u8 abs_vport_id = 0, val;
  378. int rc = -EINVAL;
  379. if (IS_VF(p_hwfn->cdev)) {
  380. rc = qed_vf_pf_vport_update(p_hwfn, p_params);
  381. return rc;
  382. }
  383. rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
  384. if (rc)
  385. return rc;
  386. memset(&init_data, 0, sizeof(init_data));
  387. init_data.cid = qed_spq_get_cid(p_hwfn);
  388. init_data.opaque_fid = p_params->opaque_fid;
  389. init_data.comp_mode = comp_mode;
  390. init_data.p_comp_data = p_comp_data;
  391. rc = qed_sp_init_request(p_hwfn, &p_ent,
  392. ETH_RAMROD_VPORT_UPDATE,
  393. PROTOCOLID_ETH, &init_data);
  394. if (rc)
  395. return rc;
  396. /* Copy input params to ramrod according to FW struct */
  397. p_ramrod = &p_ent->ramrod.vport_update;
  398. p_cmn = &p_ramrod->common;
  399. p_cmn->vport_id = abs_vport_id;
  400. p_cmn->rx_active_flg = p_params->vport_active_rx_flg;
  401. p_cmn->update_rx_active_flg = p_params->update_vport_active_rx_flg;
  402. p_cmn->tx_active_flg = p_params->vport_active_tx_flg;
  403. p_cmn->update_tx_active_flg = p_params->update_vport_active_tx_flg;
  404. p_cmn->accept_any_vlan = p_params->accept_any_vlan;
  405. val = p_params->update_accept_any_vlan_flg;
  406. p_cmn->update_accept_any_vlan_flg = val;
  407. p_cmn->inner_vlan_removal_en = p_params->inner_vlan_removal_flg;
  408. val = p_params->update_inner_vlan_removal_flg;
  409. p_cmn->update_inner_vlan_removal_en_flg = val;
  410. p_cmn->default_vlan_en = p_params->default_vlan_enable_flg;
  411. val = p_params->update_default_vlan_enable_flg;
  412. p_cmn->update_default_vlan_en_flg = val;
  413. p_cmn->default_vlan = cpu_to_le16(p_params->default_vlan);
  414. p_cmn->update_default_vlan_flg = p_params->update_default_vlan_flg;
  415. p_cmn->silent_vlan_removal_en = p_params->silent_vlan_removal_flg;
  416. p_ramrod->common.tx_switching_en = p_params->tx_switching_flg;
  417. p_cmn->update_tx_switching_en_flg = p_params->update_tx_switching_flg;
  418. p_cmn->anti_spoofing_en = p_params->anti_spoofing_en;
  419. val = p_params->update_anti_spoofing_en_flg;
  420. p_ramrod->common.update_anti_spoofing_en_flg = val;
  421. rc = qed_sp_vport_update_rss(p_hwfn, p_ramrod, p_rss_params);
  422. if (rc) {
  423. /* Return spq entry which is taken in qed_sp_init_request()*/
  424. qed_spq_return_entry(p_hwfn, p_ent);
  425. return rc;
  426. }
  427. /* Update mcast bins for VFs, PF doesn't use this functionality */
  428. qed_sp_update_mcast_bin(p_hwfn, p_ramrod, p_params);
  429. qed_sp_update_accept_mode(p_hwfn, p_ramrod, p_params->accept_flags);
  430. qed_sp_vport_update_sge_tpa(p_hwfn, p_ramrod, p_params->sge_tpa_params);
  431. return qed_spq_post(p_hwfn, p_ent, NULL);
  432. }
  433. int qed_sp_vport_stop(struct qed_hwfn *p_hwfn, u16 opaque_fid, u8 vport_id)
  434. {
  435. struct vport_stop_ramrod_data *p_ramrod;
  436. struct qed_sp_init_data init_data;
  437. struct qed_spq_entry *p_ent;
  438. u8 abs_vport_id = 0;
  439. int rc;
  440. if (IS_VF(p_hwfn->cdev))
  441. return qed_vf_pf_vport_stop(p_hwfn);
  442. rc = qed_fw_vport(p_hwfn, vport_id, &abs_vport_id);
  443. if (rc)
  444. return rc;
  445. memset(&init_data, 0, sizeof(init_data));
  446. init_data.cid = qed_spq_get_cid(p_hwfn);
  447. init_data.opaque_fid = opaque_fid;
  448. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  449. rc = qed_sp_init_request(p_hwfn, &p_ent,
  450. ETH_RAMROD_VPORT_STOP,
  451. PROTOCOLID_ETH, &init_data);
  452. if (rc)
  453. return rc;
  454. p_ramrod = &p_ent->ramrod.vport_stop;
  455. p_ramrod->vport_id = abs_vport_id;
  456. return qed_spq_post(p_hwfn, p_ent, NULL);
  457. }
  458. static int
  459. qed_vf_pf_accept_flags(struct qed_hwfn *p_hwfn,
  460. struct qed_filter_accept_flags *p_accept_flags)
  461. {
  462. struct qed_sp_vport_update_params s_params;
  463. memset(&s_params, 0, sizeof(s_params));
  464. memcpy(&s_params.accept_flags, p_accept_flags,
  465. sizeof(struct qed_filter_accept_flags));
  466. return qed_vf_pf_vport_update(p_hwfn, &s_params);
  467. }
  468. static int qed_filter_accept_cmd(struct qed_dev *cdev,
  469. u8 vport,
  470. struct qed_filter_accept_flags accept_flags,
  471. u8 update_accept_any_vlan,
  472. u8 accept_any_vlan,
  473. enum spq_mode comp_mode,
  474. struct qed_spq_comp_cb *p_comp_data)
  475. {
  476. struct qed_sp_vport_update_params vport_update_params;
  477. int i, rc;
  478. /* Prepare and send the vport rx_mode change */
  479. memset(&vport_update_params, 0, sizeof(vport_update_params));
  480. vport_update_params.vport_id = vport;
  481. vport_update_params.accept_flags = accept_flags;
  482. vport_update_params.update_accept_any_vlan_flg = update_accept_any_vlan;
  483. vport_update_params.accept_any_vlan = accept_any_vlan;
  484. for_each_hwfn(cdev, i) {
  485. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  486. vport_update_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
  487. if (IS_VF(cdev)) {
  488. rc = qed_vf_pf_accept_flags(p_hwfn, &accept_flags);
  489. if (rc)
  490. return rc;
  491. continue;
  492. }
  493. rc = qed_sp_vport_update(p_hwfn, &vport_update_params,
  494. comp_mode, p_comp_data);
  495. if (rc) {
  496. DP_ERR(cdev, "Update rx_mode failed %d\n", rc);
  497. return rc;
  498. }
  499. DP_VERBOSE(p_hwfn, QED_MSG_SP,
  500. "Accept filter configured, flags = [Rx]%x [Tx]%x\n",
  501. accept_flags.rx_accept_filter,
  502. accept_flags.tx_accept_filter);
  503. if (update_accept_any_vlan)
  504. DP_VERBOSE(p_hwfn, QED_MSG_SP,
  505. "accept_any_vlan=%d configured\n",
  506. accept_any_vlan);
  507. }
  508. return 0;
  509. }
  510. int qed_eth_rxq_start_ramrod(struct qed_hwfn *p_hwfn,
  511. struct qed_queue_cid *p_cid,
  512. u16 bd_max_bytes,
  513. dma_addr_t bd_chain_phys_addr,
  514. dma_addr_t cqe_pbl_addr, u16 cqe_pbl_size)
  515. {
  516. struct rx_queue_start_ramrod_data *p_ramrod = NULL;
  517. struct qed_spq_entry *p_ent = NULL;
  518. struct qed_sp_init_data init_data;
  519. int rc = -EINVAL;
  520. DP_VERBOSE(p_hwfn, QED_MSG_SP,
  521. "opaque_fid=0x%x, cid=0x%x, rx_qzone=0x%x, vport_id=0x%x, sb_id=0x%x\n",
  522. p_cid->opaque_fid, p_cid->cid,
  523. p_cid->abs.queue_id, p_cid->abs.vport_id, p_cid->abs.sb);
  524. /* Get SPQ entry */
  525. memset(&init_data, 0, sizeof(init_data));
  526. init_data.cid = p_cid->cid;
  527. init_data.opaque_fid = p_cid->opaque_fid;
  528. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  529. rc = qed_sp_init_request(p_hwfn, &p_ent,
  530. ETH_RAMROD_RX_QUEUE_START,
  531. PROTOCOLID_ETH, &init_data);
  532. if (rc)
  533. return rc;
  534. p_ramrod = &p_ent->ramrod.rx_queue_start;
  535. p_ramrod->sb_id = cpu_to_le16(p_cid->abs.sb);
  536. p_ramrod->sb_index = p_cid->abs.sb_idx;
  537. p_ramrod->vport_id = p_cid->abs.vport_id;
  538. p_ramrod->stats_counter_id = p_cid->abs.stats_id;
  539. p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id);
  540. p_ramrod->complete_cqe_flg = 0;
  541. p_ramrod->complete_event_flg = 1;
  542. p_ramrod->bd_max_bytes = cpu_to_le16(bd_max_bytes);
  543. DMA_REGPAIR_LE(p_ramrod->bd_base, bd_chain_phys_addr);
  544. p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
  545. DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, cqe_pbl_addr);
  546. if (p_cid->is_vf) {
  547. p_ramrod->vf_rx_prod_index = p_cid->vf_qid;
  548. DP_VERBOSE(p_hwfn, QED_MSG_SP,
  549. "Queue%s is meant for VF rxq[%02x]\n",
  550. !!p_cid->b_legacy_vf ? " [legacy]" : "",
  551. p_cid->vf_qid);
  552. p_ramrod->vf_rx_prod_use_zone_a = !!p_cid->b_legacy_vf;
  553. }
  554. return qed_spq_post(p_hwfn, p_ent, NULL);
  555. }
  556. static int
  557. qed_eth_pf_rx_queue_start(struct qed_hwfn *p_hwfn,
  558. struct qed_queue_cid *p_cid,
  559. u16 bd_max_bytes,
  560. dma_addr_t bd_chain_phys_addr,
  561. dma_addr_t cqe_pbl_addr,
  562. u16 cqe_pbl_size, void __iomem **pp_prod)
  563. {
  564. u32 init_prod_val = 0;
  565. *pp_prod = p_hwfn->regview +
  566. GTT_BAR0_MAP_REG_MSDM_RAM +
  567. MSTORM_ETH_PF_PRODS_OFFSET(p_cid->abs.queue_id);
  568. /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
  569. __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
  570. (u32 *)(&init_prod_val));
  571. return qed_eth_rxq_start_ramrod(p_hwfn, p_cid,
  572. bd_max_bytes,
  573. bd_chain_phys_addr,
  574. cqe_pbl_addr, cqe_pbl_size);
  575. }
  576. static int
  577. qed_eth_rx_queue_start(struct qed_hwfn *p_hwfn,
  578. u16 opaque_fid,
  579. struct qed_queue_start_common_params *p_params,
  580. u16 bd_max_bytes,
  581. dma_addr_t bd_chain_phys_addr,
  582. dma_addr_t cqe_pbl_addr,
  583. u16 cqe_pbl_size,
  584. struct qed_rxq_start_ret_params *p_ret_params)
  585. {
  586. struct qed_queue_cid *p_cid;
  587. int rc;
  588. /* Allocate a CID for the queue */
  589. p_cid = qed_eth_queue_to_cid(p_hwfn, opaque_fid, p_params);
  590. if (!p_cid)
  591. return -ENOMEM;
  592. if (IS_PF(p_hwfn->cdev)) {
  593. rc = qed_eth_pf_rx_queue_start(p_hwfn, p_cid,
  594. bd_max_bytes,
  595. bd_chain_phys_addr,
  596. cqe_pbl_addr, cqe_pbl_size,
  597. &p_ret_params->p_prod);
  598. } else {
  599. rc = qed_vf_pf_rxq_start(p_hwfn, p_cid,
  600. bd_max_bytes,
  601. bd_chain_phys_addr,
  602. cqe_pbl_addr,
  603. cqe_pbl_size, &p_ret_params->p_prod);
  604. }
  605. /* Provide the caller with a reference to as handler */
  606. if (rc)
  607. qed_eth_queue_cid_release(p_hwfn, p_cid);
  608. else
  609. p_ret_params->p_handle = (void *)p_cid;
  610. return rc;
  611. }
  612. int qed_sp_eth_rx_queues_update(struct qed_hwfn *p_hwfn,
  613. void **pp_rxq_handles,
  614. u8 num_rxqs,
  615. u8 complete_cqe_flg,
  616. u8 complete_event_flg,
  617. enum spq_mode comp_mode,
  618. struct qed_spq_comp_cb *p_comp_data)
  619. {
  620. struct rx_queue_update_ramrod_data *p_ramrod = NULL;
  621. struct qed_spq_entry *p_ent = NULL;
  622. struct qed_sp_init_data init_data;
  623. struct qed_queue_cid *p_cid;
  624. int rc = -EINVAL;
  625. u8 i;
  626. memset(&init_data, 0, sizeof(init_data));
  627. init_data.comp_mode = comp_mode;
  628. init_data.p_comp_data = p_comp_data;
  629. for (i = 0; i < num_rxqs; i++) {
  630. p_cid = ((struct qed_queue_cid **)pp_rxq_handles)[i];
  631. /* Get SPQ entry */
  632. init_data.cid = p_cid->cid;
  633. init_data.opaque_fid = p_cid->opaque_fid;
  634. rc = qed_sp_init_request(p_hwfn, &p_ent,
  635. ETH_RAMROD_RX_QUEUE_UPDATE,
  636. PROTOCOLID_ETH, &init_data);
  637. if (rc)
  638. return rc;
  639. p_ramrod = &p_ent->ramrod.rx_queue_update;
  640. p_ramrod->vport_id = p_cid->abs.vport_id;
  641. p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id);
  642. p_ramrod->complete_cqe_flg = complete_cqe_flg;
  643. p_ramrod->complete_event_flg = complete_event_flg;
  644. rc = qed_spq_post(p_hwfn, p_ent, NULL);
  645. if (rc)
  646. return rc;
  647. }
  648. return rc;
  649. }
  650. static int
  651. qed_eth_pf_rx_queue_stop(struct qed_hwfn *p_hwfn,
  652. struct qed_queue_cid *p_cid,
  653. bool b_eq_completion_only, bool b_cqe_completion)
  654. {
  655. struct rx_queue_stop_ramrod_data *p_ramrod = NULL;
  656. struct qed_spq_entry *p_ent = NULL;
  657. struct qed_sp_init_data init_data;
  658. int rc;
  659. memset(&init_data, 0, sizeof(init_data));
  660. init_data.cid = p_cid->cid;
  661. init_data.opaque_fid = p_cid->opaque_fid;
  662. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  663. rc = qed_sp_init_request(p_hwfn, &p_ent,
  664. ETH_RAMROD_RX_QUEUE_STOP,
  665. PROTOCOLID_ETH, &init_data);
  666. if (rc)
  667. return rc;
  668. p_ramrod = &p_ent->ramrod.rx_queue_stop;
  669. p_ramrod->vport_id = p_cid->abs.vport_id;
  670. p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id);
  671. /* Cleaning the queue requires the completion to arrive there.
  672. * In addition, VFs require the answer to come as eqe to PF.
  673. */
  674. p_ramrod->complete_cqe_flg = (!p_cid->is_vf &&
  675. !b_eq_completion_only) ||
  676. b_cqe_completion;
  677. p_ramrod->complete_event_flg = p_cid->is_vf || b_eq_completion_only;
  678. return qed_spq_post(p_hwfn, p_ent, NULL);
  679. }
  680. int qed_eth_rx_queue_stop(struct qed_hwfn *p_hwfn,
  681. void *p_rxq,
  682. bool eq_completion_only, bool cqe_completion)
  683. {
  684. struct qed_queue_cid *p_cid = (struct qed_queue_cid *)p_rxq;
  685. int rc = -EINVAL;
  686. if (IS_PF(p_hwfn->cdev))
  687. rc = qed_eth_pf_rx_queue_stop(p_hwfn, p_cid,
  688. eq_completion_only,
  689. cqe_completion);
  690. else
  691. rc = qed_vf_pf_rxq_stop(p_hwfn, p_cid, cqe_completion);
  692. if (!rc)
  693. qed_eth_queue_cid_release(p_hwfn, p_cid);
  694. return rc;
  695. }
  696. int
  697. qed_eth_txq_start_ramrod(struct qed_hwfn *p_hwfn,
  698. struct qed_queue_cid *p_cid,
  699. dma_addr_t pbl_addr, u16 pbl_size, u16 pq_id)
  700. {
  701. struct tx_queue_start_ramrod_data *p_ramrod = NULL;
  702. struct qed_spq_entry *p_ent = NULL;
  703. struct qed_sp_init_data init_data;
  704. int rc = -EINVAL;
  705. /* Get SPQ entry */
  706. memset(&init_data, 0, sizeof(init_data));
  707. init_data.cid = p_cid->cid;
  708. init_data.opaque_fid = p_cid->opaque_fid;
  709. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  710. rc = qed_sp_init_request(p_hwfn, &p_ent,
  711. ETH_RAMROD_TX_QUEUE_START,
  712. PROTOCOLID_ETH, &init_data);
  713. if (rc)
  714. return rc;
  715. p_ramrod = &p_ent->ramrod.tx_queue_start;
  716. p_ramrod->vport_id = p_cid->abs.vport_id;
  717. p_ramrod->sb_id = cpu_to_le16(p_cid->abs.sb);
  718. p_ramrod->sb_index = p_cid->abs.sb_idx;
  719. p_ramrod->stats_counter_id = p_cid->abs.stats_id;
  720. p_ramrod->queue_zone_id = cpu_to_le16(p_cid->abs.queue_id);
  721. p_ramrod->same_as_last_id = cpu_to_le16(p_cid->abs.queue_id);
  722. p_ramrod->pbl_size = cpu_to_le16(pbl_size);
  723. DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, pbl_addr);
  724. p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
  725. return qed_spq_post(p_hwfn, p_ent, NULL);
  726. }
  727. static int
  728. qed_eth_pf_tx_queue_start(struct qed_hwfn *p_hwfn,
  729. struct qed_queue_cid *p_cid,
  730. u8 tc,
  731. dma_addr_t pbl_addr,
  732. u16 pbl_size, void __iomem **pp_doorbell)
  733. {
  734. union qed_qm_pq_params pq_params;
  735. int rc;
  736. memset(&pq_params, 0, sizeof(pq_params));
  737. rc = qed_eth_txq_start_ramrod(p_hwfn, p_cid,
  738. pbl_addr, pbl_size,
  739. qed_get_qm_pq(p_hwfn, PROTOCOLID_ETH,
  740. &pq_params));
  741. if (rc)
  742. return rc;
  743. /* Provide the caller with the necessary return values */
  744. *pp_doorbell = p_hwfn->doorbells +
  745. qed_db_addr(p_cid->cid, DQ_DEMS_LEGACY);
  746. return 0;
  747. }
  748. static int
  749. qed_eth_tx_queue_start(struct qed_hwfn *p_hwfn,
  750. u16 opaque_fid,
  751. struct qed_queue_start_common_params *p_params,
  752. u8 tc,
  753. dma_addr_t pbl_addr,
  754. u16 pbl_size,
  755. struct qed_txq_start_ret_params *p_ret_params)
  756. {
  757. struct qed_queue_cid *p_cid;
  758. int rc;
  759. p_cid = qed_eth_queue_to_cid(p_hwfn, opaque_fid, p_params);
  760. if (!p_cid)
  761. return -EINVAL;
  762. if (IS_PF(p_hwfn->cdev))
  763. rc = qed_eth_pf_tx_queue_start(p_hwfn, p_cid, tc,
  764. pbl_addr, pbl_size,
  765. &p_ret_params->p_doorbell);
  766. else
  767. rc = qed_vf_pf_txq_start(p_hwfn, p_cid,
  768. pbl_addr, pbl_size,
  769. &p_ret_params->p_doorbell);
  770. if (rc)
  771. qed_eth_queue_cid_release(p_hwfn, p_cid);
  772. else
  773. p_ret_params->p_handle = (void *)p_cid;
  774. return rc;
  775. }
  776. static int
  777. qed_eth_pf_tx_queue_stop(struct qed_hwfn *p_hwfn, struct qed_queue_cid *p_cid)
  778. {
  779. struct qed_spq_entry *p_ent = NULL;
  780. struct qed_sp_init_data init_data;
  781. int rc;
  782. memset(&init_data, 0, sizeof(init_data));
  783. init_data.cid = p_cid->cid;
  784. init_data.opaque_fid = p_cid->opaque_fid;
  785. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  786. rc = qed_sp_init_request(p_hwfn, &p_ent,
  787. ETH_RAMROD_TX_QUEUE_STOP,
  788. PROTOCOLID_ETH, &init_data);
  789. if (rc)
  790. return rc;
  791. return qed_spq_post(p_hwfn, p_ent, NULL);
  792. }
  793. int qed_eth_tx_queue_stop(struct qed_hwfn *p_hwfn, void *p_handle)
  794. {
  795. struct qed_queue_cid *p_cid = (struct qed_queue_cid *)p_handle;
  796. int rc;
  797. if (IS_PF(p_hwfn->cdev))
  798. rc = qed_eth_pf_tx_queue_stop(p_hwfn, p_cid);
  799. else
  800. rc = qed_vf_pf_txq_stop(p_hwfn, p_cid);
  801. if (!rc)
  802. qed_eth_queue_cid_release(p_hwfn, p_cid);
  803. return rc;
  804. }
  805. static enum eth_filter_action qed_filter_action(enum qed_filter_opcode opcode)
  806. {
  807. enum eth_filter_action action = MAX_ETH_FILTER_ACTION;
  808. switch (opcode) {
  809. case QED_FILTER_ADD:
  810. action = ETH_FILTER_ACTION_ADD;
  811. break;
  812. case QED_FILTER_REMOVE:
  813. action = ETH_FILTER_ACTION_REMOVE;
  814. break;
  815. case QED_FILTER_FLUSH:
  816. action = ETH_FILTER_ACTION_REMOVE_ALL;
  817. break;
  818. default:
  819. action = MAX_ETH_FILTER_ACTION;
  820. }
  821. return action;
  822. }
  823. static void qed_set_fw_mac_addr(__le16 *fw_msb,
  824. __le16 *fw_mid,
  825. __le16 *fw_lsb,
  826. u8 *mac)
  827. {
  828. ((u8 *)fw_msb)[0] = mac[1];
  829. ((u8 *)fw_msb)[1] = mac[0];
  830. ((u8 *)fw_mid)[0] = mac[3];
  831. ((u8 *)fw_mid)[1] = mac[2];
  832. ((u8 *)fw_lsb)[0] = mac[5];
  833. ((u8 *)fw_lsb)[1] = mac[4];
  834. }
  835. static int
  836. qed_filter_ucast_common(struct qed_hwfn *p_hwfn,
  837. u16 opaque_fid,
  838. struct qed_filter_ucast *p_filter_cmd,
  839. struct vport_filter_update_ramrod_data **pp_ramrod,
  840. struct qed_spq_entry **pp_ent,
  841. enum spq_mode comp_mode,
  842. struct qed_spq_comp_cb *p_comp_data)
  843. {
  844. u8 vport_to_add_to = 0, vport_to_remove_from = 0;
  845. struct vport_filter_update_ramrod_data *p_ramrod;
  846. struct eth_filter_cmd *p_first_filter;
  847. struct eth_filter_cmd *p_second_filter;
  848. struct qed_sp_init_data init_data;
  849. enum eth_filter_action action;
  850. int rc;
  851. rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from,
  852. &vport_to_remove_from);
  853. if (rc)
  854. return rc;
  855. rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to,
  856. &vport_to_add_to);
  857. if (rc)
  858. return rc;
  859. /* Get SPQ entry */
  860. memset(&init_data, 0, sizeof(init_data));
  861. init_data.cid = qed_spq_get_cid(p_hwfn);
  862. init_data.opaque_fid = opaque_fid;
  863. init_data.comp_mode = comp_mode;
  864. init_data.p_comp_data = p_comp_data;
  865. rc = qed_sp_init_request(p_hwfn, pp_ent,
  866. ETH_RAMROD_FILTERS_UPDATE,
  867. PROTOCOLID_ETH, &init_data);
  868. if (rc)
  869. return rc;
  870. *pp_ramrod = &(*pp_ent)->ramrod.vport_filter_update;
  871. p_ramrod = *pp_ramrod;
  872. p_ramrod->filter_cmd_hdr.rx = p_filter_cmd->is_rx_filter ? 1 : 0;
  873. p_ramrod->filter_cmd_hdr.tx = p_filter_cmd->is_tx_filter ? 1 : 0;
  874. switch (p_filter_cmd->opcode) {
  875. case QED_FILTER_REPLACE:
  876. case QED_FILTER_MOVE:
  877. p_ramrod->filter_cmd_hdr.cmd_cnt = 2; break;
  878. default:
  879. p_ramrod->filter_cmd_hdr.cmd_cnt = 1; break;
  880. }
  881. p_first_filter = &p_ramrod->filter_cmds[0];
  882. p_second_filter = &p_ramrod->filter_cmds[1];
  883. switch (p_filter_cmd->type) {
  884. case QED_FILTER_MAC:
  885. p_first_filter->type = ETH_FILTER_TYPE_MAC; break;
  886. case QED_FILTER_VLAN:
  887. p_first_filter->type = ETH_FILTER_TYPE_VLAN; break;
  888. case QED_FILTER_MAC_VLAN:
  889. p_first_filter->type = ETH_FILTER_TYPE_PAIR; break;
  890. case QED_FILTER_INNER_MAC:
  891. p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC; break;
  892. case QED_FILTER_INNER_VLAN:
  893. p_first_filter->type = ETH_FILTER_TYPE_INNER_VLAN; break;
  894. case QED_FILTER_INNER_PAIR:
  895. p_first_filter->type = ETH_FILTER_TYPE_INNER_PAIR; break;
  896. case QED_FILTER_INNER_MAC_VNI_PAIR:
  897. p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR;
  898. break;
  899. case QED_FILTER_MAC_VNI_PAIR:
  900. p_first_filter->type = ETH_FILTER_TYPE_MAC_VNI_PAIR; break;
  901. case QED_FILTER_VNI:
  902. p_first_filter->type = ETH_FILTER_TYPE_VNI; break;
  903. }
  904. if ((p_first_filter->type == ETH_FILTER_TYPE_MAC) ||
  905. (p_first_filter->type == ETH_FILTER_TYPE_PAIR) ||
  906. (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC) ||
  907. (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR) ||
  908. (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) ||
  909. (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR)) {
  910. qed_set_fw_mac_addr(&p_first_filter->mac_msb,
  911. &p_first_filter->mac_mid,
  912. &p_first_filter->mac_lsb,
  913. (u8 *)p_filter_cmd->mac);
  914. }
  915. if ((p_first_filter->type == ETH_FILTER_TYPE_VLAN) ||
  916. (p_first_filter->type == ETH_FILTER_TYPE_PAIR) ||
  917. (p_first_filter->type == ETH_FILTER_TYPE_INNER_VLAN) ||
  918. (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR))
  919. p_first_filter->vlan_id = cpu_to_le16(p_filter_cmd->vlan);
  920. if ((p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) ||
  921. (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR) ||
  922. (p_first_filter->type == ETH_FILTER_TYPE_VNI))
  923. p_first_filter->vni = cpu_to_le32(p_filter_cmd->vni);
  924. if (p_filter_cmd->opcode == QED_FILTER_MOVE) {
  925. p_second_filter->type = p_first_filter->type;
  926. p_second_filter->mac_msb = p_first_filter->mac_msb;
  927. p_second_filter->mac_mid = p_first_filter->mac_mid;
  928. p_second_filter->mac_lsb = p_first_filter->mac_lsb;
  929. p_second_filter->vlan_id = p_first_filter->vlan_id;
  930. p_second_filter->vni = p_first_filter->vni;
  931. p_first_filter->action = ETH_FILTER_ACTION_REMOVE;
  932. p_first_filter->vport_id = vport_to_remove_from;
  933. p_second_filter->action = ETH_FILTER_ACTION_ADD;
  934. p_second_filter->vport_id = vport_to_add_to;
  935. } else if (p_filter_cmd->opcode == QED_FILTER_REPLACE) {
  936. p_first_filter->vport_id = vport_to_add_to;
  937. memcpy(p_second_filter, p_first_filter,
  938. sizeof(*p_second_filter));
  939. p_first_filter->action = ETH_FILTER_ACTION_REMOVE_ALL;
  940. p_second_filter->action = ETH_FILTER_ACTION_ADD;
  941. } else {
  942. action = qed_filter_action(p_filter_cmd->opcode);
  943. if (action == MAX_ETH_FILTER_ACTION) {
  944. DP_NOTICE(p_hwfn,
  945. "%d is not supported yet\n",
  946. p_filter_cmd->opcode);
  947. return -EINVAL;
  948. }
  949. p_first_filter->action = action;
  950. p_first_filter->vport_id = (p_filter_cmd->opcode ==
  951. QED_FILTER_REMOVE) ?
  952. vport_to_remove_from :
  953. vport_to_add_to;
  954. }
  955. return 0;
  956. }
  957. int qed_sp_eth_filter_ucast(struct qed_hwfn *p_hwfn,
  958. u16 opaque_fid,
  959. struct qed_filter_ucast *p_filter_cmd,
  960. enum spq_mode comp_mode,
  961. struct qed_spq_comp_cb *p_comp_data)
  962. {
  963. struct vport_filter_update_ramrod_data *p_ramrod = NULL;
  964. struct qed_spq_entry *p_ent = NULL;
  965. struct eth_filter_cmd_header *p_header;
  966. int rc;
  967. rc = qed_filter_ucast_common(p_hwfn, opaque_fid, p_filter_cmd,
  968. &p_ramrod, &p_ent,
  969. comp_mode, p_comp_data);
  970. if (rc) {
  971. DP_ERR(p_hwfn, "Uni. filter command failed %d\n", rc);
  972. return rc;
  973. }
  974. p_header = &p_ramrod->filter_cmd_hdr;
  975. p_header->assert_on_error = p_filter_cmd->assert_on_error;
  976. rc = qed_spq_post(p_hwfn, p_ent, NULL);
  977. if (rc) {
  978. DP_ERR(p_hwfn, "Unicast filter ADD command failed %d\n", rc);
  979. return rc;
  980. }
  981. DP_VERBOSE(p_hwfn, QED_MSG_SP,
  982. "Unicast filter configured, opcode = %s, type = %s, cmd_cnt = %d, is_rx_filter = %d, is_tx_filter = %d\n",
  983. (p_filter_cmd->opcode == QED_FILTER_ADD) ? "ADD" :
  984. ((p_filter_cmd->opcode == QED_FILTER_REMOVE) ?
  985. "REMOVE" :
  986. ((p_filter_cmd->opcode == QED_FILTER_MOVE) ?
  987. "MOVE" : "REPLACE")),
  988. (p_filter_cmd->type == QED_FILTER_MAC) ? "MAC" :
  989. ((p_filter_cmd->type == QED_FILTER_VLAN) ?
  990. "VLAN" : "MAC & VLAN"),
  991. p_ramrod->filter_cmd_hdr.cmd_cnt,
  992. p_filter_cmd->is_rx_filter,
  993. p_filter_cmd->is_tx_filter);
  994. DP_VERBOSE(p_hwfn, QED_MSG_SP,
  995. "vport_to_add_to = %d, vport_to_remove_from = %d, mac = %2x:%2x:%2x:%2x:%2x:%2x, vlan = %d\n",
  996. p_filter_cmd->vport_to_add_to,
  997. p_filter_cmd->vport_to_remove_from,
  998. p_filter_cmd->mac[0],
  999. p_filter_cmd->mac[1],
  1000. p_filter_cmd->mac[2],
  1001. p_filter_cmd->mac[3],
  1002. p_filter_cmd->mac[4],
  1003. p_filter_cmd->mac[5],
  1004. p_filter_cmd->vlan);
  1005. return 0;
  1006. }
  1007. /*******************************************************************************
  1008. * Description:
  1009. * Calculates crc 32 on a buffer
  1010. * Note: crc32_length MUST be aligned to 8
  1011. * Return:
  1012. ******************************************************************************/
  1013. static u32 qed_calc_crc32c(u8 *crc32_packet,
  1014. u32 crc32_length, u32 crc32_seed, u8 complement)
  1015. {
  1016. u32 byte = 0, bit = 0, crc32_result = crc32_seed;
  1017. u8 msb = 0, current_byte = 0;
  1018. if ((!crc32_packet) ||
  1019. (crc32_length == 0) ||
  1020. ((crc32_length % 8) != 0))
  1021. return crc32_result;
  1022. for (byte = 0; byte < crc32_length; byte++) {
  1023. current_byte = crc32_packet[byte];
  1024. for (bit = 0; bit < 8; bit++) {
  1025. msb = (u8)(crc32_result >> 31);
  1026. crc32_result = crc32_result << 1;
  1027. if (msb != (0x1 & (current_byte >> bit))) {
  1028. crc32_result = crc32_result ^ CRC32_POLY;
  1029. crc32_result |= 1; /*crc32_result[0] = 1;*/
  1030. }
  1031. }
  1032. }
  1033. return crc32_result;
  1034. }
  1035. static u32 qed_crc32c_le(u32 seed, u8 *mac, u32 len)
  1036. {
  1037. u32 packet_buf[2] = { 0 };
  1038. memcpy((u8 *)(&packet_buf[0]), &mac[0], 6);
  1039. return qed_calc_crc32c((u8 *)packet_buf, 8, seed, 0);
  1040. }
  1041. u8 qed_mcast_bin_from_mac(u8 *mac)
  1042. {
  1043. u32 crc = qed_crc32c_le(ETH_MULTICAST_BIN_FROM_MAC_SEED,
  1044. mac, ETH_ALEN);
  1045. return crc & 0xff;
  1046. }
  1047. static int
  1048. qed_sp_eth_filter_mcast(struct qed_hwfn *p_hwfn,
  1049. u16 opaque_fid,
  1050. struct qed_filter_mcast *p_filter_cmd,
  1051. enum spq_mode comp_mode,
  1052. struct qed_spq_comp_cb *p_comp_data)
  1053. {
  1054. unsigned long bins[ETH_MULTICAST_MAC_BINS_IN_REGS];
  1055. struct vport_update_ramrod_data *p_ramrod = NULL;
  1056. struct qed_spq_entry *p_ent = NULL;
  1057. struct qed_sp_init_data init_data;
  1058. u8 abs_vport_id = 0;
  1059. int rc, i;
  1060. if (p_filter_cmd->opcode == QED_FILTER_ADD)
  1061. rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to,
  1062. &abs_vport_id);
  1063. else
  1064. rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from,
  1065. &abs_vport_id);
  1066. if (rc)
  1067. return rc;
  1068. /* Get SPQ entry */
  1069. memset(&init_data, 0, sizeof(init_data));
  1070. init_data.cid = qed_spq_get_cid(p_hwfn);
  1071. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  1072. init_data.comp_mode = comp_mode;
  1073. init_data.p_comp_data = p_comp_data;
  1074. rc = qed_sp_init_request(p_hwfn, &p_ent,
  1075. ETH_RAMROD_VPORT_UPDATE,
  1076. PROTOCOLID_ETH, &init_data);
  1077. if (rc) {
  1078. DP_ERR(p_hwfn, "Multi-cast command failed %d\n", rc);
  1079. return rc;
  1080. }
  1081. p_ramrod = &p_ent->ramrod.vport_update;
  1082. p_ramrod->common.update_approx_mcast_flg = 1;
  1083. /* explicitly clear out the entire vector */
  1084. memset(&p_ramrod->approx_mcast.bins, 0,
  1085. sizeof(p_ramrod->approx_mcast.bins));
  1086. memset(bins, 0, sizeof(unsigned long) *
  1087. ETH_MULTICAST_MAC_BINS_IN_REGS);
  1088. /* filter ADD op is explicit set op and it removes
  1089. * any existing filters for the vport
  1090. */
  1091. if (p_filter_cmd->opcode == QED_FILTER_ADD) {
  1092. for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
  1093. u32 bit;
  1094. bit = qed_mcast_bin_from_mac(p_filter_cmd->mac[i]);
  1095. __set_bit(bit, bins);
  1096. }
  1097. /* Convert to correct endianity */
  1098. for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
  1099. struct vport_update_ramrod_mcast *p_ramrod_bins;
  1100. u32 *p_bins = (u32 *)bins;
  1101. p_ramrod_bins = &p_ramrod->approx_mcast;
  1102. p_ramrod_bins->bins[i] = cpu_to_le32(p_bins[i]);
  1103. }
  1104. }
  1105. p_ramrod->common.vport_id = abs_vport_id;
  1106. return qed_spq_post(p_hwfn, p_ent, NULL);
  1107. }
  1108. static int qed_filter_mcast_cmd(struct qed_dev *cdev,
  1109. struct qed_filter_mcast *p_filter_cmd,
  1110. enum spq_mode comp_mode,
  1111. struct qed_spq_comp_cb *p_comp_data)
  1112. {
  1113. int rc = 0;
  1114. int i;
  1115. /* only ADD and REMOVE operations are supported for multi-cast */
  1116. if ((p_filter_cmd->opcode != QED_FILTER_ADD &&
  1117. (p_filter_cmd->opcode != QED_FILTER_REMOVE)) ||
  1118. (p_filter_cmd->num_mc_addrs > QED_MAX_MC_ADDRS))
  1119. return -EINVAL;
  1120. for_each_hwfn(cdev, i) {
  1121. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  1122. u16 opaque_fid;
  1123. if (IS_VF(cdev)) {
  1124. qed_vf_pf_filter_mcast(p_hwfn, p_filter_cmd);
  1125. continue;
  1126. }
  1127. opaque_fid = p_hwfn->hw_info.opaque_fid;
  1128. rc = qed_sp_eth_filter_mcast(p_hwfn,
  1129. opaque_fid,
  1130. p_filter_cmd,
  1131. comp_mode, p_comp_data);
  1132. }
  1133. return rc;
  1134. }
  1135. static int qed_filter_ucast_cmd(struct qed_dev *cdev,
  1136. struct qed_filter_ucast *p_filter_cmd,
  1137. enum spq_mode comp_mode,
  1138. struct qed_spq_comp_cb *p_comp_data)
  1139. {
  1140. int rc = 0;
  1141. int i;
  1142. for_each_hwfn(cdev, i) {
  1143. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  1144. u16 opaque_fid;
  1145. if (IS_VF(cdev)) {
  1146. rc = qed_vf_pf_filter_ucast(p_hwfn, p_filter_cmd);
  1147. continue;
  1148. }
  1149. opaque_fid = p_hwfn->hw_info.opaque_fid;
  1150. rc = qed_sp_eth_filter_ucast(p_hwfn,
  1151. opaque_fid,
  1152. p_filter_cmd,
  1153. comp_mode, p_comp_data);
  1154. if (rc)
  1155. break;
  1156. }
  1157. return rc;
  1158. }
  1159. /* Statistics related code */
  1160. static void __qed_get_vport_pstats_addrlen(struct qed_hwfn *p_hwfn,
  1161. u32 *p_addr,
  1162. u32 *p_len, u16 statistics_bin)
  1163. {
  1164. if (IS_PF(p_hwfn->cdev)) {
  1165. *p_addr = BAR0_MAP_REG_PSDM_RAM +
  1166. PSTORM_QUEUE_STAT_OFFSET(statistics_bin);
  1167. *p_len = sizeof(struct eth_pstorm_per_queue_stat);
  1168. } else {
  1169. struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info;
  1170. struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
  1171. *p_addr = p_resp->pfdev_info.stats_info.pstats.address;
  1172. *p_len = p_resp->pfdev_info.stats_info.pstats.len;
  1173. }
  1174. }
  1175. static void __qed_get_vport_pstats(struct qed_hwfn *p_hwfn,
  1176. struct qed_ptt *p_ptt,
  1177. struct qed_eth_stats *p_stats,
  1178. u16 statistics_bin)
  1179. {
  1180. struct eth_pstorm_per_queue_stat pstats;
  1181. u32 pstats_addr = 0, pstats_len = 0;
  1182. __qed_get_vport_pstats_addrlen(p_hwfn, &pstats_addr, &pstats_len,
  1183. statistics_bin);
  1184. memset(&pstats, 0, sizeof(pstats));
  1185. qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, pstats_len);
  1186. p_stats->tx_ucast_bytes += HILO_64_REGPAIR(pstats.sent_ucast_bytes);
  1187. p_stats->tx_mcast_bytes += HILO_64_REGPAIR(pstats.sent_mcast_bytes);
  1188. p_stats->tx_bcast_bytes += HILO_64_REGPAIR(pstats.sent_bcast_bytes);
  1189. p_stats->tx_ucast_pkts += HILO_64_REGPAIR(pstats.sent_ucast_pkts);
  1190. p_stats->tx_mcast_pkts += HILO_64_REGPAIR(pstats.sent_mcast_pkts);
  1191. p_stats->tx_bcast_pkts += HILO_64_REGPAIR(pstats.sent_bcast_pkts);
  1192. p_stats->tx_err_drop_pkts += HILO_64_REGPAIR(pstats.error_drop_pkts);
  1193. }
  1194. static void __qed_get_vport_tstats(struct qed_hwfn *p_hwfn,
  1195. struct qed_ptt *p_ptt,
  1196. struct qed_eth_stats *p_stats,
  1197. u16 statistics_bin)
  1198. {
  1199. struct tstorm_per_port_stat tstats;
  1200. u32 tstats_addr, tstats_len;
  1201. if (IS_PF(p_hwfn->cdev)) {
  1202. tstats_addr = BAR0_MAP_REG_TSDM_RAM +
  1203. TSTORM_PORT_STAT_OFFSET(MFW_PORT(p_hwfn));
  1204. tstats_len = sizeof(struct tstorm_per_port_stat);
  1205. } else {
  1206. struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info;
  1207. struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
  1208. tstats_addr = p_resp->pfdev_info.stats_info.tstats.address;
  1209. tstats_len = p_resp->pfdev_info.stats_info.tstats.len;
  1210. }
  1211. memset(&tstats, 0, sizeof(tstats));
  1212. qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, tstats_len);
  1213. p_stats->mftag_filter_discards +=
  1214. HILO_64_REGPAIR(tstats.mftag_filter_discard);
  1215. p_stats->mac_filter_discards +=
  1216. HILO_64_REGPAIR(tstats.eth_mac_filter_discard);
  1217. }
  1218. static void __qed_get_vport_ustats_addrlen(struct qed_hwfn *p_hwfn,
  1219. u32 *p_addr,
  1220. u32 *p_len, u16 statistics_bin)
  1221. {
  1222. if (IS_PF(p_hwfn->cdev)) {
  1223. *p_addr = BAR0_MAP_REG_USDM_RAM +
  1224. USTORM_QUEUE_STAT_OFFSET(statistics_bin);
  1225. *p_len = sizeof(struct eth_ustorm_per_queue_stat);
  1226. } else {
  1227. struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info;
  1228. struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
  1229. *p_addr = p_resp->pfdev_info.stats_info.ustats.address;
  1230. *p_len = p_resp->pfdev_info.stats_info.ustats.len;
  1231. }
  1232. }
  1233. static void __qed_get_vport_ustats(struct qed_hwfn *p_hwfn,
  1234. struct qed_ptt *p_ptt,
  1235. struct qed_eth_stats *p_stats,
  1236. u16 statistics_bin)
  1237. {
  1238. struct eth_ustorm_per_queue_stat ustats;
  1239. u32 ustats_addr = 0, ustats_len = 0;
  1240. __qed_get_vport_ustats_addrlen(p_hwfn, &ustats_addr, &ustats_len,
  1241. statistics_bin);
  1242. memset(&ustats, 0, sizeof(ustats));
  1243. qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, ustats_len);
  1244. p_stats->rx_ucast_bytes += HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
  1245. p_stats->rx_mcast_bytes += HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
  1246. p_stats->rx_bcast_bytes += HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
  1247. p_stats->rx_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
  1248. p_stats->rx_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
  1249. p_stats->rx_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
  1250. }
  1251. static void __qed_get_vport_mstats_addrlen(struct qed_hwfn *p_hwfn,
  1252. u32 *p_addr,
  1253. u32 *p_len, u16 statistics_bin)
  1254. {
  1255. if (IS_PF(p_hwfn->cdev)) {
  1256. *p_addr = BAR0_MAP_REG_MSDM_RAM +
  1257. MSTORM_QUEUE_STAT_OFFSET(statistics_bin);
  1258. *p_len = sizeof(struct eth_mstorm_per_queue_stat);
  1259. } else {
  1260. struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info;
  1261. struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
  1262. *p_addr = p_resp->pfdev_info.stats_info.mstats.address;
  1263. *p_len = p_resp->pfdev_info.stats_info.mstats.len;
  1264. }
  1265. }
  1266. static void __qed_get_vport_mstats(struct qed_hwfn *p_hwfn,
  1267. struct qed_ptt *p_ptt,
  1268. struct qed_eth_stats *p_stats,
  1269. u16 statistics_bin)
  1270. {
  1271. struct eth_mstorm_per_queue_stat mstats;
  1272. u32 mstats_addr = 0, mstats_len = 0;
  1273. __qed_get_vport_mstats_addrlen(p_hwfn, &mstats_addr, &mstats_len,
  1274. statistics_bin);
  1275. memset(&mstats, 0, sizeof(mstats));
  1276. qed_memcpy_from(p_hwfn, p_ptt, &mstats, mstats_addr, mstats_len);
  1277. p_stats->no_buff_discards += HILO_64_REGPAIR(mstats.no_buff_discard);
  1278. p_stats->packet_too_big_discard +=
  1279. HILO_64_REGPAIR(mstats.packet_too_big_discard);
  1280. p_stats->ttl0_discard += HILO_64_REGPAIR(mstats.ttl0_discard);
  1281. p_stats->tpa_coalesced_pkts +=
  1282. HILO_64_REGPAIR(mstats.tpa_coalesced_pkts);
  1283. p_stats->tpa_coalesced_events +=
  1284. HILO_64_REGPAIR(mstats.tpa_coalesced_events);
  1285. p_stats->tpa_aborts_num += HILO_64_REGPAIR(mstats.tpa_aborts_num);
  1286. p_stats->tpa_coalesced_bytes +=
  1287. HILO_64_REGPAIR(mstats.tpa_coalesced_bytes);
  1288. }
  1289. static void __qed_get_vport_port_stats(struct qed_hwfn *p_hwfn,
  1290. struct qed_ptt *p_ptt,
  1291. struct qed_eth_stats *p_stats)
  1292. {
  1293. struct port_stats port_stats;
  1294. int j;
  1295. memset(&port_stats, 0, sizeof(port_stats));
  1296. qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
  1297. p_hwfn->mcp_info->port_addr +
  1298. offsetof(struct public_port, stats),
  1299. sizeof(port_stats));
  1300. p_stats->rx_64_byte_packets += port_stats.eth.r64;
  1301. p_stats->rx_65_to_127_byte_packets += port_stats.eth.r127;
  1302. p_stats->rx_128_to_255_byte_packets += port_stats.eth.r255;
  1303. p_stats->rx_256_to_511_byte_packets += port_stats.eth.r511;
  1304. p_stats->rx_512_to_1023_byte_packets += port_stats.eth.r1023;
  1305. p_stats->rx_1024_to_1518_byte_packets += port_stats.eth.r1518;
  1306. p_stats->rx_1519_to_1522_byte_packets += port_stats.eth.r1522;
  1307. p_stats->rx_1519_to_2047_byte_packets += port_stats.eth.r2047;
  1308. p_stats->rx_2048_to_4095_byte_packets += port_stats.eth.r4095;
  1309. p_stats->rx_4096_to_9216_byte_packets += port_stats.eth.r9216;
  1310. p_stats->rx_9217_to_16383_byte_packets += port_stats.eth.r16383;
  1311. p_stats->rx_crc_errors += port_stats.eth.rfcs;
  1312. p_stats->rx_mac_crtl_frames += port_stats.eth.rxcf;
  1313. p_stats->rx_pause_frames += port_stats.eth.rxpf;
  1314. p_stats->rx_pfc_frames += port_stats.eth.rxpp;
  1315. p_stats->rx_align_errors += port_stats.eth.raln;
  1316. p_stats->rx_carrier_errors += port_stats.eth.rfcr;
  1317. p_stats->rx_oversize_packets += port_stats.eth.rovr;
  1318. p_stats->rx_jabbers += port_stats.eth.rjbr;
  1319. p_stats->rx_undersize_packets += port_stats.eth.rund;
  1320. p_stats->rx_fragments += port_stats.eth.rfrg;
  1321. p_stats->tx_64_byte_packets += port_stats.eth.t64;
  1322. p_stats->tx_65_to_127_byte_packets += port_stats.eth.t127;
  1323. p_stats->tx_128_to_255_byte_packets += port_stats.eth.t255;
  1324. p_stats->tx_256_to_511_byte_packets += port_stats.eth.t511;
  1325. p_stats->tx_512_to_1023_byte_packets += port_stats.eth.t1023;
  1326. p_stats->tx_1024_to_1518_byte_packets += port_stats.eth.t1518;
  1327. p_stats->tx_1519_to_2047_byte_packets += port_stats.eth.t2047;
  1328. p_stats->tx_2048_to_4095_byte_packets += port_stats.eth.t4095;
  1329. p_stats->tx_4096_to_9216_byte_packets += port_stats.eth.t9216;
  1330. p_stats->tx_9217_to_16383_byte_packets += port_stats.eth.t16383;
  1331. p_stats->tx_pause_frames += port_stats.eth.txpf;
  1332. p_stats->tx_pfc_frames += port_stats.eth.txpp;
  1333. p_stats->tx_lpi_entry_count += port_stats.eth.tlpiec;
  1334. p_stats->tx_total_collisions += port_stats.eth.tncl;
  1335. p_stats->rx_mac_bytes += port_stats.eth.rbyte;
  1336. p_stats->rx_mac_uc_packets += port_stats.eth.rxuca;
  1337. p_stats->rx_mac_mc_packets += port_stats.eth.rxmca;
  1338. p_stats->rx_mac_bc_packets += port_stats.eth.rxbca;
  1339. p_stats->rx_mac_frames_ok += port_stats.eth.rxpok;
  1340. p_stats->tx_mac_bytes += port_stats.eth.tbyte;
  1341. p_stats->tx_mac_uc_packets += port_stats.eth.txuca;
  1342. p_stats->tx_mac_mc_packets += port_stats.eth.txmca;
  1343. p_stats->tx_mac_bc_packets += port_stats.eth.txbca;
  1344. p_stats->tx_mac_ctrl_frames += port_stats.eth.txcf;
  1345. for (j = 0; j < 8; j++) {
  1346. p_stats->brb_truncates += port_stats.brb.brb_truncate[j];
  1347. p_stats->brb_discards += port_stats.brb.brb_discard[j];
  1348. }
  1349. }
  1350. static void __qed_get_vport_stats(struct qed_hwfn *p_hwfn,
  1351. struct qed_ptt *p_ptt,
  1352. struct qed_eth_stats *stats,
  1353. u16 statistics_bin, bool b_get_port_stats)
  1354. {
  1355. __qed_get_vport_mstats(p_hwfn, p_ptt, stats, statistics_bin);
  1356. __qed_get_vport_ustats(p_hwfn, p_ptt, stats, statistics_bin);
  1357. __qed_get_vport_tstats(p_hwfn, p_ptt, stats, statistics_bin);
  1358. __qed_get_vport_pstats(p_hwfn, p_ptt, stats, statistics_bin);
  1359. if (b_get_port_stats && p_hwfn->mcp_info)
  1360. __qed_get_vport_port_stats(p_hwfn, p_ptt, stats);
  1361. }
  1362. static void _qed_get_vport_stats(struct qed_dev *cdev,
  1363. struct qed_eth_stats *stats)
  1364. {
  1365. u8 fw_vport = 0;
  1366. int i;
  1367. memset(stats, 0, sizeof(*stats));
  1368. for_each_hwfn(cdev, i) {
  1369. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  1370. struct qed_ptt *p_ptt = IS_PF(cdev) ? qed_ptt_acquire(p_hwfn)
  1371. : NULL;
  1372. if (IS_PF(cdev)) {
  1373. /* The main vport index is relative first */
  1374. if (qed_fw_vport(p_hwfn, 0, &fw_vport)) {
  1375. DP_ERR(p_hwfn, "No vport available!\n");
  1376. goto out;
  1377. }
  1378. }
  1379. if (IS_PF(cdev) && !p_ptt) {
  1380. DP_ERR(p_hwfn, "Failed to acquire ptt\n");
  1381. continue;
  1382. }
  1383. __qed_get_vport_stats(p_hwfn, p_ptt, stats, fw_vport,
  1384. IS_PF(cdev) ? true : false);
  1385. out:
  1386. if (IS_PF(cdev) && p_ptt)
  1387. qed_ptt_release(p_hwfn, p_ptt);
  1388. }
  1389. }
  1390. void qed_get_vport_stats(struct qed_dev *cdev, struct qed_eth_stats *stats)
  1391. {
  1392. u32 i;
  1393. if (!cdev) {
  1394. memset(stats, 0, sizeof(*stats));
  1395. return;
  1396. }
  1397. _qed_get_vport_stats(cdev, stats);
  1398. if (!cdev->reset_stats)
  1399. return;
  1400. /* Reduce the statistics baseline */
  1401. for (i = 0; i < sizeof(struct qed_eth_stats) / sizeof(u64); i++)
  1402. ((u64 *)stats)[i] -= ((u64 *)cdev->reset_stats)[i];
  1403. }
  1404. /* zeroes V-PORT specific portion of stats (Port stats remains untouched) */
  1405. void qed_reset_vport_stats(struct qed_dev *cdev)
  1406. {
  1407. int i;
  1408. for_each_hwfn(cdev, i) {
  1409. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  1410. struct eth_mstorm_per_queue_stat mstats;
  1411. struct eth_ustorm_per_queue_stat ustats;
  1412. struct eth_pstorm_per_queue_stat pstats;
  1413. struct qed_ptt *p_ptt = IS_PF(cdev) ? qed_ptt_acquire(p_hwfn)
  1414. : NULL;
  1415. u32 addr = 0, len = 0;
  1416. if (IS_PF(cdev) && !p_ptt) {
  1417. DP_ERR(p_hwfn, "Failed to acquire ptt\n");
  1418. continue;
  1419. }
  1420. memset(&mstats, 0, sizeof(mstats));
  1421. __qed_get_vport_mstats_addrlen(p_hwfn, &addr, &len, 0);
  1422. qed_memcpy_to(p_hwfn, p_ptt, addr, &mstats, len);
  1423. memset(&ustats, 0, sizeof(ustats));
  1424. __qed_get_vport_ustats_addrlen(p_hwfn, &addr, &len, 0);
  1425. qed_memcpy_to(p_hwfn, p_ptt, addr, &ustats, len);
  1426. memset(&pstats, 0, sizeof(pstats));
  1427. __qed_get_vport_pstats_addrlen(p_hwfn, &addr, &len, 0);
  1428. qed_memcpy_to(p_hwfn, p_ptt, addr, &pstats, len);
  1429. if (IS_PF(cdev))
  1430. qed_ptt_release(p_hwfn, p_ptt);
  1431. }
  1432. /* PORT statistics are not necessarily reset, so we need to
  1433. * read and create a baseline for future statistics.
  1434. */
  1435. if (!cdev->reset_stats)
  1436. DP_INFO(cdev, "Reset stats not allocated\n");
  1437. else
  1438. _qed_get_vport_stats(cdev, cdev->reset_stats);
  1439. }
  1440. static int qed_fill_eth_dev_info(struct qed_dev *cdev,
  1441. struct qed_dev_eth_info *info)
  1442. {
  1443. int i;
  1444. memset(info, 0, sizeof(*info));
  1445. info->num_tc = 1;
  1446. if (IS_PF(cdev)) {
  1447. int max_vf_vlan_filters = 0;
  1448. int max_vf_mac_filters = 0;
  1449. if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
  1450. for_each_hwfn(cdev, i)
  1451. info->num_queues +=
  1452. FEAT_NUM(&cdev->hwfns[i], QED_PF_L2_QUE);
  1453. if (cdev->int_params.fp_msix_cnt)
  1454. info->num_queues =
  1455. min_t(u8, info->num_queues,
  1456. cdev->int_params.fp_msix_cnt);
  1457. } else {
  1458. info->num_queues = cdev->num_hwfns;
  1459. }
  1460. if (IS_QED_SRIOV(cdev)) {
  1461. max_vf_vlan_filters = cdev->p_iov_info->total_vfs *
  1462. QED_ETH_VF_NUM_VLAN_FILTERS;
  1463. max_vf_mac_filters = cdev->p_iov_info->total_vfs *
  1464. QED_ETH_VF_NUM_MAC_FILTERS;
  1465. }
  1466. info->num_vlan_filters = RESC_NUM(QED_LEADING_HWFN(cdev),
  1467. QED_VLAN) -
  1468. max_vf_vlan_filters;
  1469. info->num_mac_filters = RESC_NUM(QED_LEADING_HWFN(cdev),
  1470. QED_MAC) -
  1471. max_vf_mac_filters;
  1472. ether_addr_copy(info->port_mac,
  1473. cdev->hwfns[0].hw_info.hw_mac_addr);
  1474. } else {
  1475. qed_vf_get_num_rxqs(QED_LEADING_HWFN(cdev), &info->num_queues);
  1476. if (cdev->num_hwfns > 1) {
  1477. u8 queues = 0;
  1478. qed_vf_get_num_rxqs(&cdev->hwfns[1], &queues);
  1479. info->num_queues += queues;
  1480. }
  1481. qed_vf_get_num_vlan_filters(&cdev->hwfns[0],
  1482. (u8 *)&info->num_vlan_filters);
  1483. qed_vf_get_num_mac_filters(&cdev->hwfns[0],
  1484. (u8 *)&info->num_mac_filters);
  1485. qed_vf_get_port_mac(&cdev->hwfns[0], info->port_mac);
  1486. info->is_legacy = !!cdev->hwfns[0].vf_iov_info->b_pre_fp_hsi;
  1487. }
  1488. qed_fill_dev_info(cdev, &info->common);
  1489. if (IS_VF(cdev))
  1490. memset(info->common.hw_mac, 0, ETH_ALEN);
  1491. return 0;
  1492. }
  1493. static void qed_register_eth_ops(struct qed_dev *cdev,
  1494. struct qed_eth_cb_ops *ops, void *cookie)
  1495. {
  1496. cdev->protocol_ops.eth = ops;
  1497. cdev->ops_cookie = cookie;
  1498. /* For VF, we start bulletin reading */
  1499. if (IS_VF(cdev))
  1500. qed_vf_start_iov_wq(cdev);
  1501. }
  1502. static bool qed_check_mac(struct qed_dev *cdev, u8 *mac)
  1503. {
  1504. if (IS_PF(cdev))
  1505. return true;
  1506. return qed_vf_check_mac(&cdev->hwfns[0], mac);
  1507. }
  1508. static int qed_start_vport(struct qed_dev *cdev,
  1509. struct qed_start_vport_params *params)
  1510. {
  1511. int rc, i;
  1512. for_each_hwfn(cdev, i) {
  1513. struct qed_sp_vport_start_params start = { 0 };
  1514. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  1515. start.tpa_mode = params->gro_enable ? QED_TPA_MODE_GRO :
  1516. QED_TPA_MODE_NONE;
  1517. start.remove_inner_vlan = params->remove_inner_vlan;
  1518. start.only_untagged = true; /* untagged only */
  1519. start.drop_ttl0 = params->drop_ttl0;
  1520. start.opaque_fid = p_hwfn->hw_info.opaque_fid;
  1521. start.concrete_fid = p_hwfn->hw_info.concrete_fid;
  1522. start.vport_id = params->vport_id;
  1523. start.max_buffers_per_cqe = 16;
  1524. start.mtu = params->mtu;
  1525. rc = qed_sp_vport_start(p_hwfn, &start);
  1526. if (rc) {
  1527. DP_ERR(cdev, "Failed to start VPORT\n");
  1528. return rc;
  1529. }
  1530. qed_hw_start_fastpath(p_hwfn);
  1531. DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
  1532. "Started V-PORT %d with MTU %d\n",
  1533. start.vport_id, start.mtu);
  1534. }
  1535. if (params->clear_stats)
  1536. qed_reset_vport_stats(cdev);
  1537. return 0;
  1538. }
  1539. static int qed_stop_vport(struct qed_dev *cdev, u8 vport_id)
  1540. {
  1541. int rc, i;
  1542. for_each_hwfn(cdev, i) {
  1543. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  1544. rc = qed_sp_vport_stop(p_hwfn,
  1545. p_hwfn->hw_info.opaque_fid, vport_id);
  1546. if (rc) {
  1547. DP_ERR(cdev, "Failed to stop VPORT\n");
  1548. return rc;
  1549. }
  1550. }
  1551. return 0;
  1552. }
  1553. static int qed_update_vport(struct qed_dev *cdev,
  1554. struct qed_update_vport_params *params)
  1555. {
  1556. struct qed_sp_vport_update_params sp_params;
  1557. struct qed_rss_params sp_rss_params;
  1558. int rc, i;
  1559. if (!cdev)
  1560. return -ENODEV;
  1561. memset(&sp_params, 0, sizeof(sp_params));
  1562. memset(&sp_rss_params, 0, sizeof(sp_rss_params));
  1563. /* Translate protocol params into sp params */
  1564. sp_params.vport_id = params->vport_id;
  1565. sp_params.update_vport_active_rx_flg = params->update_vport_active_flg;
  1566. sp_params.update_vport_active_tx_flg = params->update_vport_active_flg;
  1567. sp_params.vport_active_rx_flg = params->vport_active_flg;
  1568. sp_params.vport_active_tx_flg = params->vport_active_flg;
  1569. sp_params.update_tx_switching_flg = params->update_tx_switching_flg;
  1570. sp_params.tx_switching_flg = params->tx_switching_flg;
  1571. sp_params.accept_any_vlan = params->accept_any_vlan;
  1572. sp_params.update_accept_any_vlan_flg =
  1573. params->update_accept_any_vlan_flg;
  1574. /* RSS - is a bit tricky, since upper-layer isn't familiar with hwfns.
  1575. * We need to re-fix the rss values per engine for CMT.
  1576. */
  1577. if (cdev->num_hwfns > 1 && params->update_rss_flg) {
  1578. struct qed_update_vport_rss_params *rss = &params->rss_params;
  1579. int k, max = 0;
  1580. /* Find largest entry, since it's possible RSS needs to
  1581. * be disabled [in case only 1 queue per-hwfn]
  1582. */
  1583. for (k = 0; k < QED_RSS_IND_TABLE_SIZE; k++)
  1584. max = (max > rss->rss_ind_table[k]) ?
  1585. max : rss->rss_ind_table[k];
  1586. /* Either fix RSS values or disable RSS */
  1587. if (cdev->num_hwfns < max + 1) {
  1588. int divisor = (max + cdev->num_hwfns - 1) /
  1589. cdev->num_hwfns;
  1590. DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
  1591. "CMT - fixing RSS values (modulo %02x)\n",
  1592. divisor);
  1593. for (k = 0; k < QED_RSS_IND_TABLE_SIZE; k++)
  1594. rss->rss_ind_table[k] =
  1595. rss->rss_ind_table[k] % divisor;
  1596. } else {
  1597. DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
  1598. "CMT - 1 queue per-hwfn; Disabling RSS\n");
  1599. params->update_rss_flg = 0;
  1600. }
  1601. }
  1602. /* Now, update the RSS configuration for actual configuration */
  1603. if (params->update_rss_flg) {
  1604. sp_rss_params.update_rss_config = 1;
  1605. sp_rss_params.rss_enable = 1;
  1606. sp_rss_params.update_rss_capabilities = 1;
  1607. sp_rss_params.update_rss_ind_table = 1;
  1608. sp_rss_params.update_rss_key = 1;
  1609. sp_rss_params.rss_caps = params->rss_params.rss_caps;
  1610. sp_rss_params.rss_table_size_log = 7; /* 2^7 = 128 */
  1611. memcpy(sp_rss_params.rss_ind_table,
  1612. params->rss_params.rss_ind_table,
  1613. QED_RSS_IND_TABLE_SIZE * sizeof(u16));
  1614. memcpy(sp_rss_params.rss_key, params->rss_params.rss_key,
  1615. QED_RSS_KEY_SIZE * sizeof(u32));
  1616. sp_params.rss_params = &sp_rss_params;
  1617. }
  1618. for_each_hwfn(cdev, i) {
  1619. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  1620. sp_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
  1621. rc = qed_sp_vport_update(p_hwfn, &sp_params,
  1622. QED_SPQ_MODE_EBLOCK,
  1623. NULL);
  1624. if (rc) {
  1625. DP_ERR(cdev, "Failed to update VPORT\n");
  1626. return rc;
  1627. }
  1628. DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
  1629. "Updated V-PORT %d: active_flag %d [update %d]\n",
  1630. params->vport_id, params->vport_active_flg,
  1631. params->update_vport_active_flg);
  1632. }
  1633. return 0;
  1634. }
  1635. static int qed_start_rxq(struct qed_dev *cdev,
  1636. u8 rss_num,
  1637. struct qed_queue_start_common_params *p_params,
  1638. u16 bd_max_bytes,
  1639. dma_addr_t bd_chain_phys_addr,
  1640. dma_addr_t cqe_pbl_addr,
  1641. u16 cqe_pbl_size,
  1642. struct qed_rxq_start_ret_params *ret_params)
  1643. {
  1644. struct qed_hwfn *p_hwfn;
  1645. int rc, hwfn_index;
  1646. hwfn_index = rss_num % cdev->num_hwfns;
  1647. p_hwfn = &cdev->hwfns[hwfn_index];
  1648. p_params->queue_id = p_params->queue_id / cdev->num_hwfns;
  1649. p_params->stats_id = p_params->vport_id;
  1650. rc = qed_eth_rx_queue_start(p_hwfn,
  1651. p_hwfn->hw_info.opaque_fid,
  1652. p_params,
  1653. bd_max_bytes,
  1654. bd_chain_phys_addr,
  1655. cqe_pbl_addr, cqe_pbl_size, ret_params);
  1656. if (rc) {
  1657. DP_ERR(cdev, "Failed to start RXQ#%d\n", p_params->queue_id);
  1658. return rc;
  1659. }
  1660. DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
  1661. "Started RX-Q %d [rss_num %d] on V-PORT %d and SB %d\n",
  1662. p_params->queue_id, rss_num, p_params->vport_id,
  1663. p_params->sb);
  1664. return 0;
  1665. }
  1666. static int qed_stop_rxq(struct qed_dev *cdev, u8 rss_id, void *handle)
  1667. {
  1668. int rc, hwfn_index;
  1669. struct qed_hwfn *p_hwfn;
  1670. hwfn_index = rss_id % cdev->num_hwfns;
  1671. p_hwfn = &cdev->hwfns[hwfn_index];
  1672. rc = qed_eth_rx_queue_stop(p_hwfn, handle, false, false);
  1673. if (rc) {
  1674. DP_ERR(cdev, "Failed to stop RXQ#%02x\n", rss_id);
  1675. return rc;
  1676. }
  1677. return 0;
  1678. }
  1679. static int qed_start_txq(struct qed_dev *cdev,
  1680. u8 rss_num,
  1681. struct qed_queue_start_common_params *p_params,
  1682. dma_addr_t pbl_addr,
  1683. u16 pbl_size,
  1684. struct qed_txq_start_ret_params *ret_params)
  1685. {
  1686. struct qed_hwfn *p_hwfn;
  1687. int rc, hwfn_index;
  1688. hwfn_index = rss_num % cdev->num_hwfns;
  1689. p_hwfn = &cdev->hwfns[hwfn_index];
  1690. p_params->queue_id = p_params->queue_id / cdev->num_hwfns;
  1691. p_params->stats_id = p_params->vport_id;
  1692. rc = qed_eth_tx_queue_start(p_hwfn,
  1693. p_hwfn->hw_info.opaque_fid,
  1694. p_params, 0,
  1695. pbl_addr, pbl_size, ret_params);
  1696. if (rc) {
  1697. DP_ERR(cdev, "Failed to start TXQ#%d\n", p_params->queue_id);
  1698. return rc;
  1699. }
  1700. DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
  1701. "Started TX-Q %d [rss_num %d] on V-PORT %d and SB %d\n",
  1702. p_params->queue_id, rss_num, p_params->vport_id,
  1703. p_params->sb);
  1704. return 0;
  1705. }
  1706. #define QED_HW_STOP_RETRY_LIMIT (10)
  1707. static int qed_fastpath_stop(struct qed_dev *cdev)
  1708. {
  1709. qed_hw_stop_fastpath(cdev);
  1710. return 0;
  1711. }
  1712. static int qed_stop_txq(struct qed_dev *cdev, u8 rss_id, void *handle)
  1713. {
  1714. struct qed_hwfn *p_hwfn;
  1715. int rc, hwfn_index;
  1716. hwfn_index = rss_id % cdev->num_hwfns;
  1717. p_hwfn = &cdev->hwfns[hwfn_index];
  1718. rc = qed_eth_tx_queue_stop(p_hwfn, handle);
  1719. if (rc) {
  1720. DP_ERR(cdev, "Failed to stop TXQ#%02x\n", rss_id);
  1721. return rc;
  1722. }
  1723. return 0;
  1724. }
  1725. static int qed_tunn_configure(struct qed_dev *cdev,
  1726. struct qed_tunn_params *tunn_params)
  1727. {
  1728. struct qed_tunn_update_params tunn_info;
  1729. int i, rc;
  1730. if (IS_VF(cdev))
  1731. return 0;
  1732. memset(&tunn_info, 0, sizeof(tunn_info));
  1733. if (tunn_params->update_vxlan_port == 1) {
  1734. tunn_info.update_vxlan_udp_port = 1;
  1735. tunn_info.vxlan_udp_port = tunn_params->vxlan_port;
  1736. }
  1737. if (tunn_params->update_geneve_port == 1) {
  1738. tunn_info.update_geneve_udp_port = 1;
  1739. tunn_info.geneve_udp_port = tunn_params->geneve_port;
  1740. }
  1741. for_each_hwfn(cdev, i) {
  1742. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  1743. rc = qed_sp_pf_update_tunn_cfg(hwfn, &tunn_info,
  1744. QED_SPQ_MODE_EBLOCK, NULL);
  1745. if (rc)
  1746. return rc;
  1747. }
  1748. return 0;
  1749. }
  1750. static int qed_configure_filter_rx_mode(struct qed_dev *cdev,
  1751. enum qed_filter_rx_mode_type type)
  1752. {
  1753. struct qed_filter_accept_flags accept_flags;
  1754. memset(&accept_flags, 0, sizeof(accept_flags));
  1755. accept_flags.update_rx_mode_config = 1;
  1756. accept_flags.update_tx_mode_config = 1;
  1757. accept_flags.rx_accept_filter = QED_ACCEPT_UCAST_MATCHED |
  1758. QED_ACCEPT_MCAST_MATCHED |
  1759. QED_ACCEPT_BCAST;
  1760. accept_flags.tx_accept_filter = QED_ACCEPT_UCAST_MATCHED |
  1761. QED_ACCEPT_MCAST_MATCHED |
  1762. QED_ACCEPT_BCAST;
  1763. if (type == QED_FILTER_RX_MODE_TYPE_PROMISC)
  1764. accept_flags.rx_accept_filter |= QED_ACCEPT_UCAST_UNMATCHED |
  1765. QED_ACCEPT_MCAST_UNMATCHED;
  1766. else if (type == QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC)
  1767. accept_flags.rx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED;
  1768. return qed_filter_accept_cmd(cdev, 0, accept_flags, false, false,
  1769. QED_SPQ_MODE_CB, NULL);
  1770. }
  1771. static int qed_configure_filter_ucast(struct qed_dev *cdev,
  1772. struct qed_filter_ucast_params *params)
  1773. {
  1774. struct qed_filter_ucast ucast;
  1775. if (!params->vlan_valid && !params->mac_valid) {
  1776. DP_NOTICE(cdev,
  1777. "Tried configuring a unicast filter, but both MAC and VLAN are not set\n");
  1778. return -EINVAL;
  1779. }
  1780. memset(&ucast, 0, sizeof(ucast));
  1781. switch (params->type) {
  1782. case QED_FILTER_XCAST_TYPE_ADD:
  1783. ucast.opcode = QED_FILTER_ADD;
  1784. break;
  1785. case QED_FILTER_XCAST_TYPE_DEL:
  1786. ucast.opcode = QED_FILTER_REMOVE;
  1787. break;
  1788. case QED_FILTER_XCAST_TYPE_REPLACE:
  1789. ucast.opcode = QED_FILTER_REPLACE;
  1790. break;
  1791. default:
  1792. DP_NOTICE(cdev, "Unknown unicast filter type %d\n",
  1793. params->type);
  1794. }
  1795. if (params->vlan_valid && params->mac_valid) {
  1796. ucast.type = QED_FILTER_MAC_VLAN;
  1797. ether_addr_copy(ucast.mac, params->mac);
  1798. ucast.vlan = params->vlan;
  1799. } else if (params->mac_valid) {
  1800. ucast.type = QED_FILTER_MAC;
  1801. ether_addr_copy(ucast.mac, params->mac);
  1802. } else {
  1803. ucast.type = QED_FILTER_VLAN;
  1804. ucast.vlan = params->vlan;
  1805. }
  1806. ucast.is_rx_filter = true;
  1807. ucast.is_tx_filter = true;
  1808. return qed_filter_ucast_cmd(cdev, &ucast, QED_SPQ_MODE_CB, NULL);
  1809. }
  1810. static int qed_configure_filter_mcast(struct qed_dev *cdev,
  1811. struct qed_filter_mcast_params *params)
  1812. {
  1813. struct qed_filter_mcast mcast;
  1814. int i;
  1815. memset(&mcast, 0, sizeof(mcast));
  1816. switch (params->type) {
  1817. case QED_FILTER_XCAST_TYPE_ADD:
  1818. mcast.opcode = QED_FILTER_ADD;
  1819. break;
  1820. case QED_FILTER_XCAST_TYPE_DEL:
  1821. mcast.opcode = QED_FILTER_REMOVE;
  1822. break;
  1823. default:
  1824. DP_NOTICE(cdev, "Unknown multicast filter type %d\n",
  1825. params->type);
  1826. }
  1827. mcast.num_mc_addrs = params->num;
  1828. for (i = 0; i < mcast.num_mc_addrs; i++)
  1829. ether_addr_copy(mcast.mac[i], params->mac[i]);
  1830. return qed_filter_mcast_cmd(cdev, &mcast, QED_SPQ_MODE_CB, NULL);
  1831. }
  1832. static int qed_configure_filter(struct qed_dev *cdev,
  1833. struct qed_filter_params *params)
  1834. {
  1835. enum qed_filter_rx_mode_type accept_flags;
  1836. switch (params->type) {
  1837. case QED_FILTER_TYPE_UCAST:
  1838. return qed_configure_filter_ucast(cdev, &params->filter.ucast);
  1839. case QED_FILTER_TYPE_MCAST:
  1840. return qed_configure_filter_mcast(cdev, &params->filter.mcast);
  1841. case QED_FILTER_TYPE_RX_MODE:
  1842. accept_flags = params->filter.accept_flags;
  1843. return qed_configure_filter_rx_mode(cdev, accept_flags);
  1844. default:
  1845. DP_NOTICE(cdev, "Unknown filter type %d\n", (int)params->type);
  1846. return -EINVAL;
  1847. }
  1848. }
  1849. static int qed_fp_cqe_completion(struct qed_dev *dev,
  1850. u8 rss_id, struct eth_slow_path_rx_cqe *cqe)
  1851. {
  1852. return qed_eth_cqe_completion(&dev->hwfns[rss_id % dev->num_hwfns],
  1853. cqe);
  1854. }
  1855. #ifdef CONFIG_QED_SRIOV
  1856. extern const struct qed_iov_hv_ops qed_iov_ops_pass;
  1857. #endif
  1858. #ifdef CONFIG_DCB
  1859. extern const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass;
  1860. #endif
  1861. static const struct qed_eth_ops qed_eth_ops_pass = {
  1862. .common = &qed_common_ops_pass,
  1863. #ifdef CONFIG_QED_SRIOV
  1864. .iov = &qed_iov_ops_pass,
  1865. #endif
  1866. #ifdef CONFIG_DCB
  1867. .dcb = &qed_dcbnl_ops_pass,
  1868. #endif
  1869. .fill_dev_info = &qed_fill_eth_dev_info,
  1870. .register_ops = &qed_register_eth_ops,
  1871. .check_mac = &qed_check_mac,
  1872. .vport_start = &qed_start_vport,
  1873. .vport_stop = &qed_stop_vport,
  1874. .vport_update = &qed_update_vport,
  1875. .q_rx_start = &qed_start_rxq,
  1876. .q_rx_stop = &qed_stop_rxq,
  1877. .q_tx_start = &qed_start_txq,
  1878. .q_tx_stop = &qed_stop_txq,
  1879. .filter_config = &qed_configure_filter,
  1880. .fastpath_stop = &qed_fastpath_stop,
  1881. .eth_cqe_completion = &qed_fp_cqe_completion,
  1882. .get_vport_stats = &qed_get_vport_stats,
  1883. .tunn_config = &qed_tunn_configure,
  1884. };
  1885. const struct qed_eth_ops *qed_get_eth_ops(void)
  1886. {
  1887. return &qed_eth_ops_pass;
  1888. }
  1889. EXPORT_SYMBOL(qed_get_eth_ops);
  1890. void qed_put_eth_ops(void)
  1891. {
  1892. /* TODO - reference count for module? */
  1893. }
  1894. EXPORT_SYMBOL(qed_put_eth_ops);