bnxt_ethtool.c 57 KB

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  1. /* Broadcom NetXtreme-C/E network driver.
  2. *
  3. * Copyright (c) 2014-2016 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. */
  9. #include <linux/ctype.h>
  10. #include <linux/stringify.h>
  11. #include <linux/ethtool.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/pci.h>
  14. #include <linux/etherdevice.h>
  15. #include <linux/crc32.h>
  16. #include <linux/firmware.h>
  17. #include "bnxt_hsi.h"
  18. #include "bnxt.h"
  19. #include "bnxt_ethtool.h"
  20. #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
  21. #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
  22. #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
  23. #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  24. #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  25. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen);
  26. static u32 bnxt_get_msglevel(struct net_device *dev)
  27. {
  28. struct bnxt *bp = netdev_priv(dev);
  29. return bp->msg_enable;
  30. }
  31. static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  32. {
  33. struct bnxt *bp = netdev_priv(dev);
  34. bp->msg_enable = value;
  35. }
  36. static int bnxt_get_coalesce(struct net_device *dev,
  37. struct ethtool_coalesce *coal)
  38. {
  39. struct bnxt *bp = netdev_priv(dev);
  40. memset(coal, 0, sizeof(*coal));
  41. coal->rx_coalesce_usecs = bp->rx_coal_ticks;
  42. /* 2 completion records per rx packet */
  43. coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2;
  44. coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
  45. coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
  46. coal->tx_coalesce_usecs = bp->tx_coal_ticks;
  47. coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
  48. coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
  49. coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
  50. coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  51. return 0;
  52. }
  53. static int bnxt_set_coalesce(struct net_device *dev,
  54. struct ethtool_coalesce *coal)
  55. {
  56. struct bnxt *bp = netdev_priv(dev);
  57. bool update_stats = false;
  58. int rc = 0;
  59. bp->rx_coal_ticks = coal->rx_coalesce_usecs;
  60. /* 2 completion records per rx packet */
  61. bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2;
  62. bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  63. bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
  64. bp->tx_coal_ticks = coal->tx_coalesce_usecs;
  65. bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
  66. bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
  67. bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
  68. if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
  69. u32 stats_ticks = coal->stats_block_coalesce_usecs;
  70. stats_ticks = clamp_t(u32, stats_ticks,
  71. BNXT_MIN_STATS_COAL_TICKS,
  72. BNXT_MAX_STATS_COAL_TICKS);
  73. stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
  74. bp->stats_coal_ticks = stats_ticks;
  75. update_stats = true;
  76. }
  77. if (netif_running(dev)) {
  78. if (update_stats) {
  79. rc = bnxt_close_nic(bp, true, false);
  80. if (!rc)
  81. rc = bnxt_open_nic(bp, true, false);
  82. } else {
  83. rc = bnxt_hwrm_set_coal(bp);
  84. }
  85. }
  86. return rc;
  87. }
  88. #define BNXT_NUM_STATS 21
  89. #define BNXT_RX_STATS_ENTRY(counter) \
  90. { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
  91. #define BNXT_TX_STATS_ENTRY(counter) \
  92. { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
  93. static const struct {
  94. long offset;
  95. char string[ETH_GSTRING_LEN];
  96. } bnxt_port_stats_arr[] = {
  97. BNXT_RX_STATS_ENTRY(rx_64b_frames),
  98. BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
  99. BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
  100. BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
  101. BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
  102. BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
  103. BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
  104. BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
  105. BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
  106. BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
  107. BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
  108. BNXT_RX_STATS_ENTRY(rx_total_frames),
  109. BNXT_RX_STATS_ENTRY(rx_ucast_frames),
  110. BNXT_RX_STATS_ENTRY(rx_mcast_frames),
  111. BNXT_RX_STATS_ENTRY(rx_bcast_frames),
  112. BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
  113. BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
  114. BNXT_RX_STATS_ENTRY(rx_pause_frames),
  115. BNXT_RX_STATS_ENTRY(rx_pfc_frames),
  116. BNXT_RX_STATS_ENTRY(rx_align_err_frames),
  117. BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
  118. BNXT_RX_STATS_ENTRY(rx_jbr_frames),
  119. BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
  120. BNXT_RX_STATS_ENTRY(rx_tagged_frames),
  121. BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
  122. BNXT_RX_STATS_ENTRY(rx_good_frames),
  123. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
  124. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
  125. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
  126. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
  127. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
  128. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
  129. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
  130. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
  131. BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
  132. BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
  133. BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
  134. BNXT_RX_STATS_ENTRY(rx_bytes),
  135. BNXT_RX_STATS_ENTRY(rx_runt_bytes),
  136. BNXT_RX_STATS_ENTRY(rx_runt_frames),
  137. BNXT_TX_STATS_ENTRY(tx_64b_frames),
  138. BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
  139. BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
  140. BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
  141. BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
  142. BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
  143. BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
  144. BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
  145. BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
  146. BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
  147. BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
  148. BNXT_TX_STATS_ENTRY(tx_good_frames),
  149. BNXT_TX_STATS_ENTRY(tx_total_frames),
  150. BNXT_TX_STATS_ENTRY(tx_ucast_frames),
  151. BNXT_TX_STATS_ENTRY(tx_mcast_frames),
  152. BNXT_TX_STATS_ENTRY(tx_bcast_frames),
  153. BNXT_TX_STATS_ENTRY(tx_pause_frames),
  154. BNXT_TX_STATS_ENTRY(tx_pfc_frames),
  155. BNXT_TX_STATS_ENTRY(tx_jabber_frames),
  156. BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
  157. BNXT_TX_STATS_ENTRY(tx_err),
  158. BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
  159. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
  160. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
  161. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
  162. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
  163. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
  164. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
  165. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
  166. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
  167. BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
  168. BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
  169. BNXT_TX_STATS_ENTRY(tx_total_collisions),
  170. BNXT_TX_STATS_ENTRY(tx_bytes),
  171. };
  172. #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
  173. static int bnxt_get_sset_count(struct net_device *dev, int sset)
  174. {
  175. struct bnxt *bp = netdev_priv(dev);
  176. switch (sset) {
  177. case ETH_SS_STATS: {
  178. int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  179. if (bp->flags & BNXT_FLAG_PORT_STATS)
  180. num_stats += BNXT_NUM_PORT_STATS;
  181. return num_stats;
  182. }
  183. default:
  184. return -EOPNOTSUPP;
  185. }
  186. }
  187. static void bnxt_get_ethtool_stats(struct net_device *dev,
  188. struct ethtool_stats *stats, u64 *buf)
  189. {
  190. u32 i, j = 0;
  191. struct bnxt *bp = netdev_priv(dev);
  192. u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings;
  193. u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
  194. memset(buf, 0, buf_size);
  195. if (!bp->bnapi)
  196. return;
  197. for (i = 0; i < bp->cp_nr_rings; i++) {
  198. struct bnxt_napi *bnapi = bp->bnapi[i];
  199. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  200. __le64 *hw_stats = (__le64 *)cpr->hw_stats;
  201. int k;
  202. for (k = 0; k < stat_fields; j++, k++)
  203. buf[j] = le64_to_cpu(hw_stats[k]);
  204. buf[j++] = cpr->rx_l4_csum_errors;
  205. }
  206. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  207. __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
  208. for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
  209. buf[j] = le64_to_cpu(*(port_stats +
  210. bnxt_port_stats_arr[i].offset));
  211. }
  212. }
  213. }
  214. static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  215. {
  216. struct bnxt *bp = netdev_priv(dev);
  217. u32 i;
  218. switch (stringset) {
  219. /* The number of strings must match BNXT_NUM_STATS defined above. */
  220. case ETH_SS_STATS:
  221. for (i = 0; i < bp->cp_nr_rings; i++) {
  222. sprintf(buf, "[%d]: rx_ucast_packets", i);
  223. buf += ETH_GSTRING_LEN;
  224. sprintf(buf, "[%d]: rx_mcast_packets", i);
  225. buf += ETH_GSTRING_LEN;
  226. sprintf(buf, "[%d]: rx_bcast_packets", i);
  227. buf += ETH_GSTRING_LEN;
  228. sprintf(buf, "[%d]: rx_discards", i);
  229. buf += ETH_GSTRING_LEN;
  230. sprintf(buf, "[%d]: rx_drops", i);
  231. buf += ETH_GSTRING_LEN;
  232. sprintf(buf, "[%d]: rx_ucast_bytes", i);
  233. buf += ETH_GSTRING_LEN;
  234. sprintf(buf, "[%d]: rx_mcast_bytes", i);
  235. buf += ETH_GSTRING_LEN;
  236. sprintf(buf, "[%d]: rx_bcast_bytes", i);
  237. buf += ETH_GSTRING_LEN;
  238. sprintf(buf, "[%d]: tx_ucast_packets", i);
  239. buf += ETH_GSTRING_LEN;
  240. sprintf(buf, "[%d]: tx_mcast_packets", i);
  241. buf += ETH_GSTRING_LEN;
  242. sprintf(buf, "[%d]: tx_bcast_packets", i);
  243. buf += ETH_GSTRING_LEN;
  244. sprintf(buf, "[%d]: tx_discards", i);
  245. buf += ETH_GSTRING_LEN;
  246. sprintf(buf, "[%d]: tx_drops", i);
  247. buf += ETH_GSTRING_LEN;
  248. sprintf(buf, "[%d]: tx_ucast_bytes", i);
  249. buf += ETH_GSTRING_LEN;
  250. sprintf(buf, "[%d]: tx_mcast_bytes", i);
  251. buf += ETH_GSTRING_LEN;
  252. sprintf(buf, "[%d]: tx_bcast_bytes", i);
  253. buf += ETH_GSTRING_LEN;
  254. sprintf(buf, "[%d]: tpa_packets", i);
  255. buf += ETH_GSTRING_LEN;
  256. sprintf(buf, "[%d]: tpa_bytes", i);
  257. buf += ETH_GSTRING_LEN;
  258. sprintf(buf, "[%d]: tpa_events", i);
  259. buf += ETH_GSTRING_LEN;
  260. sprintf(buf, "[%d]: tpa_aborts", i);
  261. buf += ETH_GSTRING_LEN;
  262. sprintf(buf, "[%d]: rx_l4_csum_errors", i);
  263. buf += ETH_GSTRING_LEN;
  264. }
  265. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  266. for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
  267. strcpy(buf, bnxt_port_stats_arr[i].string);
  268. buf += ETH_GSTRING_LEN;
  269. }
  270. }
  271. break;
  272. default:
  273. netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
  274. stringset);
  275. break;
  276. }
  277. }
  278. static void bnxt_get_ringparam(struct net_device *dev,
  279. struct ethtool_ringparam *ering)
  280. {
  281. struct bnxt *bp = netdev_priv(dev);
  282. ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
  283. ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
  284. ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
  285. ering->rx_pending = bp->rx_ring_size;
  286. ering->rx_jumbo_pending = bp->rx_agg_ring_size;
  287. ering->tx_pending = bp->tx_ring_size;
  288. }
  289. static int bnxt_set_ringparam(struct net_device *dev,
  290. struct ethtool_ringparam *ering)
  291. {
  292. struct bnxt *bp = netdev_priv(dev);
  293. if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
  294. (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
  295. (ering->tx_pending <= MAX_SKB_FRAGS))
  296. return -EINVAL;
  297. if (netif_running(dev))
  298. bnxt_close_nic(bp, false, false);
  299. bp->rx_ring_size = ering->rx_pending;
  300. bp->tx_ring_size = ering->tx_pending;
  301. bnxt_set_ring_params(bp);
  302. if (netif_running(dev))
  303. return bnxt_open_nic(bp, false, false);
  304. return 0;
  305. }
  306. static void bnxt_get_channels(struct net_device *dev,
  307. struct ethtool_channels *channel)
  308. {
  309. struct bnxt *bp = netdev_priv(dev);
  310. int max_rx_rings, max_tx_rings, tcs;
  311. bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
  312. channel->max_combined = max_t(int, max_rx_rings, max_tx_rings);
  313. if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
  314. max_rx_rings = 0;
  315. max_tx_rings = 0;
  316. }
  317. tcs = netdev_get_num_tc(dev);
  318. if (tcs > 1)
  319. max_tx_rings /= tcs;
  320. channel->max_rx = max_rx_rings;
  321. channel->max_tx = max_tx_rings;
  322. channel->max_other = 0;
  323. if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
  324. channel->combined_count = bp->rx_nr_rings;
  325. if (BNXT_CHIP_TYPE_NITRO_A0(bp))
  326. channel->combined_count--;
  327. } else {
  328. if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
  329. channel->rx_count = bp->rx_nr_rings;
  330. channel->tx_count = bp->tx_nr_rings_per_tc;
  331. }
  332. }
  333. }
  334. static int bnxt_set_channels(struct net_device *dev,
  335. struct ethtool_channels *channel)
  336. {
  337. struct bnxt *bp = netdev_priv(dev);
  338. int max_rx_rings, max_tx_rings, tcs;
  339. u32 rc = 0;
  340. bool sh = false;
  341. if (channel->other_count)
  342. return -EINVAL;
  343. if (!channel->combined_count &&
  344. (!channel->rx_count || !channel->tx_count))
  345. return -EINVAL;
  346. if (channel->combined_count &&
  347. (channel->rx_count || channel->tx_count))
  348. return -EINVAL;
  349. if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
  350. channel->tx_count))
  351. return -EINVAL;
  352. if (channel->combined_count)
  353. sh = true;
  354. bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, sh);
  355. tcs = netdev_get_num_tc(dev);
  356. if (tcs > 1)
  357. max_tx_rings /= tcs;
  358. if (sh &&
  359. channel->combined_count > max_t(int, max_rx_rings, max_tx_rings))
  360. return -ENOMEM;
  361. if (!sh && (channel->rx_count > max_rx_rings ||
  362. channel->tx_count > max_tx_rings))
  363. return -ENOMEM;
  364. if (netif_running(dev)) {
  365. if (BNXT_PF(bp)) {
  366. /* TODO CHIMP_FW: Send message to all VF's
  367. * before PF unload
  368. */
  369. }
  370. rc = bnxt_close_nic(bp, true, false);
  371. if (rc) {
  372. netdev_err(bp->dev, "Set channel failure rc :%x\n",
  373. rc);
  374. return rc;
  375. }
  376. }
  377. if (sh) {
  378. bp->flags |= BNXT_FLAG_SHARED_RINGS;
  379. bp->rx_nr_rings = min_t(int, channel->combined_count,
  380. max_rx_rings);
  381. bp->tx_nr_rings_per_tc = min_t(int, channel->combined_count,
  382. max_tx_rings);
  383. } else {
  384. bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
  385. bp->rx_nr_rings = channel->rx_count;
  386. bp->tx_nr_rings_per_tc = channel->tx_count;
  387. }
  388. bp->tx_nr_rings = bp->tx_nr_rings_per_tc;
  389. if (tcs > 1)
  390. bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs;
  391. bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
  392. bp->tx_nr_rings + bp->rx_nr_rings;
  393. bp->num_stat_ctxs = bp->cp_nr_rings;
  394. /* After changing number of rx channels, update NTUPLE feature. */
  395. netdev_update_features(dev);
  396. if (netif_running(dev)) {
  397. rc = bnxt_open_nic(bp, true, false);
  398. if ((!rc) && BNXT_PF(bp)) {
  399. /* TODO CHIMP_FW: Send message to all VF's
  400. * to renable
  401. */
  402. }
  403. }
  404. return rc;
  405. }
  406. #ifdef CONFIG_RFS_ACCEL
  407. static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
  408. u32 *rule_locs)
  409. {
  410. int i, j = 0;
  411. cmd->data = bp->ntp_fltr_count;
  412. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  413. struct hlist_head *head;
  414. struct bnxt_ntuple_filter *fltr;
  415. head = &bp->ntp_fltr_hash_tbl[i];
  416. rcu_read_lock();
  417. hlist_for_each_entry_rcu(fltr, head, hash) {
  418. if (j == cmd->rule_cnt)
  419. break;
  420. rule_locs[j++] = fltr->sw_id;
  421. }
  422. rcu_read_unlock();
  423. if (j == cmd->rule_cnt)
  424. break;
  425. }
  426. cmd->rule_cnt = j;
  427. return 0;
  428. }
  429. static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  430. {
  431. struct ethtool_rx_flow_spec *fs =
  432. (struct ethtool_rx_flow_spec *)&cmd->fs;
  433. struct bnxt_ntuple_filter *fltr;
  434. struct flow_keys *fkeys;
  435. int i, rc = -EINVAL;
  436. if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
  437. return rc;
  438. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  439. struct hlist_head *head;
  440. head = &bp->ntp_fltr_hash_tbl[i];
  441. rcu_read_lock();
  442. hlist_for_each_entry_rcu(fltr, head, hash) {
  443. if (fltr->sw_id == fs->location)
  444. goto fltr_found;
  445. }
  446. rcu_read_unlock();
  447. }
  448. return rc;
  449. fltr_found:
  450. fkeys = &fltr->fkeys;
  451. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  452. fs->flow_type = TCP_V4_FLOW;
  453. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  454. fs->flow_type = UDP_V4_FLOW;
  455. else
  456. goto fltr_err;
  457. fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
  458. fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
  459. fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
  460. fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
  461. fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
  462. fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
  463. fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
  464. fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
  465. fs->ring_cookie = fltr->rxq;
  466. rc = 0;
  467. fltr_err:
  468. rcu_read_unlock();
  469. return rc;
  470. }
  471. #endif
  472. static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
  473. {
  474. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
  475. return RXH_IP_SRC | RXH_IP_DST;
  476. return 0;
  477. }
  478. static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
  479. {
  480. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
  481. return RXH_IP_SRC | RXH_IP_DST;
  482. return 0;
  483. }
  484. static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  485. {
  486. cmd->data = 0;
  487. switch (cmd->flow_type) {
  488. case TCP_V4_FLOW:
  489. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
  490. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  491. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  492. cmd->data |= get_ethtool_ipv4_rss(bp);
  493. break;
  494. case UDP_V4_FLOW:
  495. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
  496. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  497. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  498. /* fall through */
  499. case SCTP_V4_FLOW:
  500. case AH_ESP_V4_FLOW:
  501. case AH_V4_FLOW:
  502. case ESP_V4_FLOW:
  503. case IPV4_FLOW:
  504. cmd->data |= get_ethtool_ipv4_rss(bp);
  505. break;
  506. case TCP_V6_FLOW:
  507. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
  508. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  509. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  510. cmd->data |= get_ethtool_ipv6_rss(bp);
  511. break;
  512. case UDP_V6_FLOW:
  513. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
  514. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  515. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  516. /* fall through */
  517. case SCTP_V6_FLOW:
  518. case AH_ESP_V6_FLOW:
  519. case AH_V6_FLOW:
  520. case ESP_V6_FLOW:
  521. case IPV6_FLOW:
  522. cmd->data |= get_ethtool_ipv6_rss(bp);
  523. break;
  524. }
  525. return 0;
  526. }
  527. #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
  528. #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
  529. static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  530. {
  531. u32 rss_hash_cfg = bp->rss_hash_cfg;
  532. int tuple, rc = 0;
  533. if (cmd->data == RXH_4TUPLE)
  534. tuple = 4;
  535. else if (cmd->data == RXH_2TUPLE)
  536. tuple = 2;
  537. else if (!cmd->data)
  538. tuple = 0;
  539. else
  540. return -EINVAL;
  541. if (cmd->flow_type == TCP_V4_FLOW) {
  542. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  543. if (tuple == 4)
  544. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  545. } else if (cmd->flow_type == UDP_V4_FLOW) {
  546. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  547. return -EINVAL;
  548. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  549. if (tuple == 4)
  550. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  551. } else if (cmd->flow_type == TCP_V6_FLOW) {
  552. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  553. if (tuple == 4)
  554. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  555. } else if (cmd->flow_type == UDP_V6_FLOW) {
  556. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  557. return -EINVAL;
  558. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  559. if (tuple == 4)
  560. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  561. } else if (tuple == 4) {
  562. return -EINVAL;
  563. }
  564. switch (cmd->flow_type) {
  565. case TCP_V4_FLOW:
  566. case UDP_V4_FLOW:
  567. case SCTP_V4_FLOW:
  568. case AH_ESP_V4_FLOW:
  569. case AH_V4_FLOW:
  570. case ESP_V4_FLOW:
  571. case IPV4_FLOW:
  572. if (tuple == 2)
  573. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  574. else if (!tuple)
  575. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  576. break;
  577. case TCP_V6_FLOW:
  578. case UDP_V6_FLOW:
  579. case SCTP_V6_FLOW:
  580. case AH_ESP_V6_FLOW:
  581. case AH_V6_FLOW:
  582. case ESP_V6_FLOW:
  583. case IPV6_FLOW:
  584. if (tuple == 2)
  585. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  586. else if (!tuple)
  587. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  588. break;
  589. }
  590. if (bp->rss_hash_cfg == rss_hash_cfg)
  591. return 0;
  592. bp->rss_hash_cfg = rss_hash_cfg;
  593. if (netif_running(bp->dev)) {
  594. bnxt_close_nic(bp, false, false);
  595. rc = bnxt_open_nic(bp, false, false);
  596. }
  597. return rc;
  598. }
  599. static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
  600. u32 *rule_locs)
  601. {
  602. struct bnxt *bp = netdev_priv(dev);
  603. int rc = 0;
  604. switch (cmd->cmd) {
  605. #ifdef CONFIG_RFS_ACCEL
  606. case ETHTOOL_GRXRINGS:
  607. cmd->data = bp->rx_nr_rings;
  608. break;
  609. case ETHTOOL_GRXCLSRLCNT:
  610. cmd->rule_cnt = bp->ntp_fltr_count;
  611. cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
  612. break;
  613. case ETHTOOL_GRXCLSRLALL:
  614. rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
  615. break;
  616. case ETHTOOL_GRXCLSRULE:
  617. rc = bnxt_grxclsrule(bp, cmd);
  618. break;
  619. #endif
  620. case ETHTOOL_GRXFH:
  621. rc = bnxt_grxfh(bp, cmd);
  622. break;
  623. default:
  624. rc = -EOPNOTSUPP;
  625. break;
  626. }
  627. return rc;
  628. }
  629. static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
  630. {
  631. struct bnxt *bp = netdev_priv(dev);
  632. int rc;
  633. switch (cmd->cmd) {
  634. case ETHTOOL_SRXFH:
  635. rc = bnxt_srxfh(bp, cmd);
  636. break;
  637. default:
  638. rc = -EOPNOTSUPP;
  639. break;
  640. }
  641. return rc;
  642. }
  643. static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
  644. {
  645. return HW_HASH_INDEX_SIZE;
  646. }
  647. static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
  648. {
  649. return HW_HASH_KEY_SIZE;
  650. }
  651. static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
  652. u8 *hfunc)
  653. {
  654. struct bnxt *bp = netdev_priv(dev);
  655. struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
  656. int i = 0;
  657. if (hfunc)
  658. *hfunc = ETH_RSS_HASH_TOP;
  659. if (indir)
  660. for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
  661. indir[i] = le16_to_cpu(vnic->rss_table[i]);
  662. if (key)
  663. memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
  664. return 0;
  665. }
  666. static void bnxt_get_drvinfo(struct net_device *dev,
  667. struct ethtool_drvinfo *info)
  668. {
  669. struct bnxt *bp = netdev_priv(dev);
  670. char *pkglog;
  671. char *pkgver = NULL;
  672. pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
  673. if (pkglog)
  674. pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
  675. strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
  676. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  677. if (pkgver && *pkgver != 0 && isdigit(*pkgver))
  678. snprintf(info->fw_version, sizeof(info->fw_version) - 1,
  679. "%s pkg %s", bp->fw_ver_str, pkgver);
  680. else
  681. strlcpy(info->fw_version, bp->fw_ver_str,
  682. sizeof(info->fw_version));
  683. strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
  684. info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  685. info->testinfo_len = BNXT_NUM_TESTS(bp);
  686. /* TODO CHIMP_FW: eeprom dump details */
  687. info->eedump_len = 0;
  688. /* TODO CHIMP FW: reg dump details */
  689. info->regdump_len = 0;
  690. kfree(pkglog);
  691. }
  692. u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
  693. {
  694. u32 speed_mask = 0;
  695. /* TODO: support 25GB, 40GB, 50GB with different cable type */
  696. /* set the advertised speeds */
  697. if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
  698. speed_mask |= ADVERTISED_100baseT_Full;
  699. if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
  700. speed_mask |= ADVERTISED_1000baseT_Full;
  701. if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
  702. speed_mask |= ADVERTISED_2500baseX_Full;
  703. if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
  704. speed_mask |= ADVERTISED_10000baseT_Full;
  705. if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
  706. speed_mask |= ADVERTISED_40000baseCR4_Full;
  707. if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
  708. speed_mask |= ADVERTISED_Pause;
  709. else if (fw_pause & BNXT_LINK_PAUSE_TX)
  710. speed_mask |= ADVERTISED_Asym_Pause;
  711. else if (fw_pause & BNXT_LINK_PAUSE_RX)
  712. speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
  713. return speed_mask;
  714. }
  715. #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
  716. { \
  717. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
  718. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  719. 100baseT_Full); \
  720. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
  721. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  722. 1000baseT_Full); \
  723. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
  724. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  725. 10000baseT_Full); \
  726. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
  727. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  728. 25000baseCR_Full); \
  729. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
  730. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  731. 40000baseCR4_Full);\
  732. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
  733. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  734. 50000baseCR2_Full);\
  735. if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
  736. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  737. Pause); \
  738. if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
  739. ethtool_link_ksettings_add_link_mode( \
  740. lk_ksettings, name, Asym_Pause);\
  741. } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
  742. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  743. Asym_Pause); \
  744. } \
  745. }
  746. #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
  747. { \
  748. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  749. 100baseT_Full) || \
  750. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  751. 100baseT_Half)) \
  752. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
  753. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  754. 1000baseT_Full) || \
  755. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  756. 1000baseT_Half)) \
  757. (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
  758. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  759. 10000baseT_Full)) \
  760. (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
  761. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  762. 25000baseCR_Full)) \
  763. (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
  764. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  765. 40000baseCR4_Full)) \
  766. (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
  767. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  768. 50000baseCR2_Full)) \
  769. (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
  770. }
  771. static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
  772. struct ethtool_link_ksettings *lk_ksettings)
  773. {
  774. u16 fw_speeds = link_info->auto_link_speeds;
  775. u8 fw_pause = 0;
  776. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  777. fw_pause = link_info->auto_pause_setting;
  778. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
  779. }
  780. static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
  781. struct ethtool_link_ksettings *lk_ksettings)
  782. {
  783. u16 fw_speeds = link_info->lp_auto_link_speeds;
  784. u8 fw_pause = 0;
  785. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  786. fw_pause = link_info->lp_pause;
  787. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
  788. lp_advertising);
  789. }
  790. static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
  791. struct ethtool_link_ksettings *lk_ksettings)
  792. {
  793. u16 fw_speeds = link_info->support_speeds;
  794. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
  795. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
  796. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  797. Asym_Pause);
  798. if (link_info->support_auto_speeds)
  799. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  800. Autoneg);
  801. }
  802. u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
  803. {
  804. switch (fw_link_speed) {
  805. case BNXT_LINK_SPEED_100MB:
  806. return SPEED_100;
  807. case BNXT_LINK_SPEED_1GB:
  808. return SPEED_1000;
  809. case BNXT_LINK_SPEED_2_5GB:
  810. return SPEED_2500;
  811. case BNXT_LINK_SPEED_10GB:
  812. return SPEED_10000;
  813. case BNXT_LINK_SPEED_20GB:
  814. return SPEED_20000;
  815. case BNXT_LINK_SPEED_25GB:
  816. return SPEED_25000;
  817. case BNXT_LINK_SPEED_40GB:
  818. return SPEED_40000;
  819. case BNXT_LINK_SPEED_50GB:
  820. return SPEED_50000;
  821. default:
  822. return SPEED_UNKNOWN;
  823. }
  824. }
  825. static int bnxt_get_link_ksettings(struct net_device *dev,
  826. struct ethtool_link_ksettings *lk_ksettings)
  827. {
  828. struct bnxt *bp = netdev_priv(dev);
  829. struct bnxt_link_info *link_info = &bp->link_info;
  830. struct ethtool_link_settings *base = &lk_ksettings->base;
  831. u32 ethtool_speed;
  832. ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
  833. bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
  834. ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
  835. if (link_info->autoneg) {
  836. bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
  837. ethtool_link_ksettings_add_link_mode(lk_ksettings,
  838. advertising, Autoneg);
  839. base->autoneg = AUTONEG_ENABLE;
  840. if (link_info->phy_link_status == BNXT_LINK_LINK)
  841. bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
  842. ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
  843. if (!netif_carrier_ok(dev))
  844. base->duplex = DUPLEX_UNKNOWN;
  845. else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
  846. base->duplex = DUPLEX_FULL;
  847. else
  848. base->duplex = DUPLEX_HALF;
  849. } else {
  850. base->autoneg = AUTONEG_DISABLE;
  851. ethtool_speed =
  852. bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
  853. base->duplex = DUPLEX_HALF;
  854. if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
  855. base->duplex = DUPLEX_FULL;
  856. }
  857. base->speed = ethtool_speed;
  858. base->port = PORT_NONE;
  859. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  860. base->port = PORT_TP;
  861. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  862. TP);
  863. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  864. TP);
  865. } else {
  866. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  867. FIBRE);
  868. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  869. FIBRE);
  870. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
  871. base->port = PORT_DA;
  872. else if (link_info->media_type ==
  873. PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
  874. base->port = PORT_FIBRE;
  875. }
  876. base->phy_address = link_info->phy_addr;
  877. return 0;
  878. }
  879. static u32 bnxt_get_fw_speed(struct net_device *dev, u16 ethtool_speed)
  880. {
  881. struct bnxt *bp = netdev_priv(dev);
  882. struct bnxt_link_info *link_info = &bp->link_info;
  883. u16 support_spds = link_info->support_speeds;
  884. u32 fw_speed = 0;
  885. switch (ethtool_speed) {
  886. case SPEED_100:
  887. if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
  888. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
  889. break;
  890. case SPEED_1000:
  891. if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
  892. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
  893. break;
  894. case SPEED_2500:
  895. if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
  896. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
  897. break;
  898. case SPEED_10000:
  899. if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
  900. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
  901. break;
  902. case SPEED_20000:
  903. if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
  904. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
  905. break;
  906. case SPEED_25000:
  907. if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
  908. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
  909. break;
  910. case SPEED_40000:
  911. if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
  912. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
  913. break;
  914. case SPEED_50000:
  915. if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
  916. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
  917. break;
  918. default:
  919. netdev_err(dev, "unsupported speed!\n");
  920. break;
  921. }
  922. return fw_speed;
  923. }
  924. u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
  925. {
  926. u16 fw_speed_mask = 0;
  927. /* only support autoneg at speed 100, 1000, and 10000 */
  928. if (advertising & (ADVERTISED_100baseT_Full |
  929. ADVERTISED_100baseT_Half)) {
  930. fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
  931. }
  932. if (advertising & (ADVERTISED_1000baseT_Full |
  933. ADVERTISED_1000baseT_Half)) {
  934. fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
  935. }
  936. if (advertising & ADVERTISED_10000baseT_Full)
  937. fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
  938. if (advertising & ADVERTISED_40000baseCR4_Full)
  939. fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
  940. return fw_speed_mask;
  941. }
  942. static int bnxt_set_link_ksettings(struct net_device *dev,
  943. const struct ethtool_link_ksettings *lk_ksettings)
  944. {
  945. struct bnxt *bp = netdev_priv(dev);
  946. struct bnxt_link_info *link_info = &bp->link_info;
  947. const struct ethtool_link_settings *base = &lk_ksettings->base;
  948. u32 speed, fw_advertising = 0;
  949. bool set_pause = false;
  950. int rc = 0;
  951. if (!BNXT_SINGLE_PF(bp))
  952. return -EOPNOTSUPP;
  953. if (base->autoneg == AUTONEG_ENABLE) {
  954. BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
  955. advertising);
  956. link_info->autoneg |= BNXT_AUTONEG_SPEED;
  957. if (!fw_advertising)
  958. link_info->advertising = link_info->support_auto_speeds;
  959. else
  960. link_info->advertising = fw_advertising;
  961. /* any change to autoneg will cause link change, therefore the
  962. * driver should put back the original pause setting in autoneg
  963. */
  964. set_pause = true;
  965. } else {
  966. u16 fw_speed;
  967. u8 phy_type = link_info->phy_type;
  968. if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
  969. phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
  970. link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  971. netdev_err(dev, "10GBase-T devices must autoneg\n");
  972. rc = -EINVAL;
  973. goto set_setting_exit;
  974. }
  975. if (base->duplex == DUPLEX_HALF) {
  976. netdev_err(dev, "HALF DUPLEX is not supported!\n");
  977. rc = -EINVAL;
  978. goto set_setting_exit;
  979. }
  980. speed = base->speed;
  981. fw_speed = bnxt_get_fw_speed(dev, speed);
  982. if (!fw_speed) {
  983. rc = -EINVAL;
  984. goto set_setting_exit;
  985. }
  986. link_info->req_link_speed = fw_speed;
  987. link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
  988. link_info->autoneg = 0;
  989. link_info->advertising = 0;
  990. }
  991. if (netif_running(dev))
  992. rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
  993. set_setting_exit:
  994. return rc;
  995. }
  996. static void bnxt_get_pauseparam(struct net_device *dev,
  997. struct ethtool_pauseparam *epause)
  998. {
  999. struct bnxt *bp = netdev_priv(dev);
  1000. struct bnxt_link_info *link_info = &bp->link_info;
  1001. if (BNXT_VF(bp))
  1002. return;
  1003. epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
  1004. epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
  1005. epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
  1006. }
  1007. static int bnxt_set_pauseparam(struct net_device *dev,
  1008. struct ethtool_pauseparam *epause)
  1009. {
  1010. int rc = 0;
  1011. struct bnxt *bp = netdev_priv(dev);
  1012. struct bnxt_link_info *link_info = &bp->link_info;
  1013. if (!BNXT_SINGLE_PF(bp))
  1014. return -EOPNOTSUPP;
  1015. if (epause->autoneg) {
  1016. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1017. return -EINVAL;
  1018. link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
  1019. if (bp->hwrm_spec_code >= 0x10201)
  1020. link_info->req_flow_ctrl =
  1021. PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
  1022. } else {
  1023. /* when transition from auto pause to force pause,
  1024. * force a link change
  1025. */
  1026. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  1027. link_info->force_link_chng = true;
  1028. link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
  1029. link_info->req_flow_ctrl = 0;
  1030. }
  1031. if (epause->rx_pause)
  1032. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
  1033. if (epause->tx_pause)
  1034. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
  1035. if (netif_running(dev))
  1036. rc = bnxt_hwrm_set_pause(bp);
  1037. return rc;
  1038. }
  1039. static u32 bnxt_get_link(struct net_device *dev)
  1040. {
  1041. struct bnxt *bp = netdev_priv(dev);
  1042. /* TODO: handle MF, VF, driver close case */
  1043. return bp->link_info.link_up;
  1044. }
  1045. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1046. u16 ext, u16 *index, u32 *item_length,
  1047. u32 *data_length);
  1048. static int bnxt_flash_nvram(struct net_device *dev,
  1049. u16 dir_type,
  1050. u16 dir_ordinal,
  1051. u16 dir_ext,
  1052. u16 dir_attr,
  1053. const u8 *data,
  1054. size_t data_len)
  1055. {
  1056. struct bnxt *bp = netdev_priv(dev);
  1057. int rc;
  1058. struct hwrm_nvm_write_input req = {0};
  1059. dma_addr_t dma_handle;
  1060. u8 *kmem;
  1061. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
  1062. req.dir_type = cpu_to_le16(dir_type);
  1063. req.dir_ordinal = cpu_to_le16(dir_ordinal);
  1064. req.dir_ext = cpu_to_le16(dir_ext);
  1065. req.dir_attr = cpu_to_le16(dir_attr);
  1066. req.dir_data_length = cpu_to_le32(data_len);
  1067. kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
  1068. GFP_KERNEL);
  1069. if (!kmem) {
  1070. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1071. (unsigned)data_len);
  1072. return -ENOMEM;
  1073. }
  1074. memcpy(kmem, data, data_len);
  1075. req.host_src_addr = cpu_to_le64(dma_handle);
  1076. rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
  1077. dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
  1078. return rc;
  1079. }
  1080. static int bnxt_firmware_reset(struct net_device *dev,
  1081. u16 dir_type)
  1082. {
  1083. struct bnxt *bp = netdev_priv(dev);
  1084. struct hwrm_fw_reset_input req = {0};
  1085. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
  1086. /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */
  1087. /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
  1088. /* (e.g. when firmware isn't already running) */
  1089. switch (dir_type) {
  1090. case BNX_DIR_TYPE_CHIMP_PATCH:
  1091. case BNX_DIR_TYPE_BOOTCODE:
  1092. case BNX_DIR_TYPE_BOOTCODE_2:
  1093. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
  1094. /* Self-reset ChiMP upon next PCIe reset: */
  1095. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1096. break;
  1097. case BNX_DIR_TYPE_APE_FW:
  1098. case BNX_DIR_TYPE_APE_PATCH:
  1099. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
  1100. /* Self-reset APE upon next PCIe reset: */
  1101. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1102. break;
  1103. case BNX_DIR_TYPE_KONG_FW:
  1104. case BNX_DIR_TYPE_KONG_PATCH:
  1105. req.embedded_proc_type =
  1106. FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
  1107. break;
  1108. case BNX_DIR_TYPE_BONO_FW:
  1109. case BNX_DIR_TYPE_BONO_PATCH:
  1110. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
  1111. break;
  1112. default:
  1113. return -EINVAL;
  1114. }
  1115. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1116. }
  1117. static int bnxt_flash_firmware(struct net_device *dev,
  1118. u16 dir_type,
  1119. const u8 *fw_data,
  1120. size_t fw_size)
  1121. {
  1122. int rc = 0;
  1123. u16 code_type;
  1124. u32 stored_crc;
  1125. u32 calculated_crc;
  1126. struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
  1127. switch (dir_type) {
  1128. case BNX_DIR_TYPE_BOOTCODE:
  1129. case BNX_DIR_TYPE_BOOTCODE_2:
  1130. code_type = CODE_BOOT;
  1131. break;
  1132. case BNX_DIR_TYPE_CHIMP_PATCH:
  1133. code_type = CODE_CHIMP_PATCH;
  1134. break;
  1135. case BNX_DIR_TYPE_APE_FW:
  1136. code_type = CODE_MCTP_PASSTHRU;
  1137. break;
  1138. case BNX_DIR_TYPE_APE_PATCH:
  1139. code_type = CODE_APE_PATCH;
  1140. break;
  1141. case BNX_DIR_TYPE_KONG_FW:
  1142. code_type = CODE_KONG_FW;
  1143. break;
  1144. case BNX_DIR_TYPE_KONG_PATCH:
  1145. code_type = CODE_KONG_PATCH;
  1146. break;
  1147. case BNX_DIR_TYPE_BONO_FW:
  1148. code_type = CODE_BONO_FW;
  1149. break;
  1150. case BNX_DIR_TYPE_BONO_PATCH:
  1151. code_type = CODE_BONO_PATCH;
  1152. break;
  1153. default:
  1154. netdev_err(dev, "Unsupported directory entry type: %u\n",
  1155. dir_type);
  1156. return -EINVAL;
  1157. }
  1158. if (fw_size < sizeof(struct bnxt_fw_header)) {
  1159. netdev_err(dev, "Invalid firmware file size: %u\n",
  1160. (unsigned int)fw_size);
  1161. return -EINVAL;
  1162. }
  1163. if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
  1164. netdev_err(dev, "Invalid firmware signature: %08X\n",
  1165. le32_to_cpu(header->signature));
  1166. return -EINVAL;
  1167. }
  1168. if (header->code_type != code_type) {
  1169. netdev_err(dev, "Expected firmware type: %d, read: %d\n",
  1170. code_type, header->code_type);
  1171. return -EINVAL;
  1172. }
  1173. if (header->device != DEVICE_CUMULUS_FAMILY) {
  1174. netdev_err(dev, "Expected firmware device family %d, read: %d\n",
  1175. DEVICE_CUMULUS_FAMILY, header->device);
  1176. return -EINVAL;
  1177. }
  1178. /* Confirm the CRC32 checksum of the file: */
  1179. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1180. sizeof(stored_crc)));
  1181. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1182. if (calculated_crc != stored_crc) {
  1183. netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
  1184. (unsigned long)stored_crc,
  1185. (unsigned long)calculated_crc);
  1186. return -EINVAL;
  1187. }
  1188. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1189. 0, 0, fw_data, fw_size);
  1190. if (rc == 0) /* Firmware update successful */
  1191. rc = bnxt_firmware_reset(dev, dir_type);
  1192. return rc;
  1193. }
  1194. static int bnxt_flash_microcode(struct net_device *dev,
  1195. u16 dir_type,
  1196. const u8 *fw_data,
  1197. size_t fw_size)
  1198. {
  1199. struct bnxt_ucode_trailer *trailer;
  1200. u32 calculated_crc;
  1201. u32 stored_crc;
  1202. int rc = 0;
  1203. if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
  1204. netdev_err(dev, "Invalid microcode file size: %u\n",
  1205. (unsigned int)fw_size);
  1206. return -EINVAL;
  1207. }
  1208. trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
  1209. sizeof(*trailer)));
  1210. if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
  1211. netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
  1212. le32_to_cpu(trailer->sig));
  1213. return -EINVAL;
  1214. }
  1215. if (le16_to_cpu(trailer->dir_type) != dir_type) {
  1216. netdev_err(dev, "Expected microcode type: %d, read: %d\n",
  1217. dir_type, le16_to_cpu(trailer->dir_type));
  1218. return -EINVAL;
  1219. }
  1220. if (le16_to_cpu(trailer->trailer_length) <
  1221. sizeof(struct bnxt_ucode_trailer)) {
  1222. netdev_err(dev, "Invalid microcode trailer length: %d\n",
  1223. le16_to_cpu(trailer->trailer_length));
  1224. return -EINVAL;
  1225. }
  1226. /* Confirm the CRC32 checksum of the file: */
  1227. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1228. sizeof(stored_crc)));
  1229. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1230. if (calculated_crc != stored_crc) {
  1231. netdev_err(dev,
  1232. "CRC32 (%08lX) does not match calculated: %08lX\n",
  1233. (unsigned long)stored_crc,
  1234. (unsigned long)calculated_crc);
  1235. return -EINVAL;
  1236. }
  1237. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1238. 0, 0, fw_data, fw_size);
  1239. return rc;
  1240. }
  1241. static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
  1242. {
  1243. switch (dir_type) {
  1244. case BNX_DIR_TYPE_CHIMP_PATCH:
  1245. case BNX_DIR_TYPE_BOOTCODE:
  1246. case BNX_DIR_TYPE_BOOTCODE_2:
  1247. case BNX_DIR_TYPE_APE_FW:
  1248. case BNX_DIR_TYPE_APE_PATCH:
  1249. case BNX_DIR_TYPE_KONG_FW:
  1250. case BNX_DIR_TYPE_KONG_PATCH:
  1251. case BNX_DIR_TYPE_BONO_FW:
  1252. case BNX_DIR_TYPE_BONO_PATCH:
  1253. return true;
  1254. }
  1255. return false;
  1256. }
  1257. static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
  1258. {
  1259. switch (dir_type) {
  1260. case BNX_DIR_TYPE_AVS:
  1261. case BNX_DIR_TYPE_EXP_ROM_MBA:
  1262. case BNX_DIR_TYPE_PCIE:
  1263. case BNX_DIR_TYPE_TSCF_UCODE:
  1264. case BNX_DIR_TYPE_EXT_PHY:
  1265. case BNX_DIR_TYPE_CCM:
  1266. case BNX_DIR_TYPE_ISCSI_BOOT:
  1267. case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
  1268. case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
  1269. return true;
  1270. }
  1271. return false;
  1272. }
  1273. static bool bnxt_dir_type_is_executable(u16 dir_type)
  1274. {
  1275. return bnxt_dir_type_is_ape_bin_format(dir_type) ||
  1276. bnxt_dir_type_is_other_exec_format(dir_type);
  1277. }
  1278. static int bnxt_flash_firmware_from_file(struct net_device *dev,
  1279. u16 dir_type,
  1280. const char *filename)
  1281. {
  1282. const struct firmware *fw;
  1283. int rc;
  1284. rc = request_firmware(&fw, filename, &dev->dev);
  1285. if (rc != 0) {
  1286. netdev_err(dev, "Error %d requesting firmware file: %s\n",
  1287. rc, filename);
  1288. return rc;
  1289. }
  1290. if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
  1291. rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
  1292. else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
  1293. rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
  1294. else
  1295. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1296. 0, 0, fw->data, fw->size);
  1297. release_firmware(fw);
  1298. return rc;
  1299. }
  1300. static int bnxt_flash_package_from_file(struct net_device *dev,
  1301. char *filename, u32 install_type)
  1302. {
  1303. struct bnxt *bp = netdev_priv(dev);
  1304. struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
  1305. struct hwrm_nvm_install_update_input install = {0};
  1306. const struct firmware *fw;
  1307. u32 item_len;
  1308. u16 index;
  1309. int rc;
  1310. bnxt_hwrm_fw_set_time(bp);
  1311. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
  1312. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1313. &index, &item_len, NULL) != 0) {
  1314. netdev_err(dev, "PKG update area not created in nvram\n");
  1315. return -ENOBUFS;
  1316. }
  1317. rc = request_firmware(&fw, filename, &dev->dev);
  1318. if (rc != 0) {
  1319. netdev_err(dev, "PKG error %d requesting file: %s\n",
  1320. rc, filename);
  1321. return rc;
  1322. }
  1323. if (fw->size > item_len) {
  1324. netdev_err(dev, "PKG insufficient update area in nvram: %lu",
  1325. (unsigned long)fw->size);
  1326. rc = -EFBIG;
  1327. } else {
  1328. dma_addr_t dma_handle;
  1329. u8 *kmem;
  1330. struct hwrm_nvm_modify_input modify = {0};
  1331. bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
  1332. modify.dir_idx = cpu_to_le16(index);
  1333. modify.len = cpu_to_le32(fw->size);
  1334. kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
  1335. &dma_handle, GFP_KERNEL);
  1336. if (!kmem) {
  1337. netdev_err(dev,
  1338. "dma_alloc_coherent failure, length = %u\n",
  1339. (unsigned int)fw->size);
  1340. rc = -ENOMEM;
  1341. } else {
  1342. memcpy(kmem, fw->data, fw->size);
  1343. modify.host_src_addr = cpu_to_le64(dma_handle);
  1344. rc = hwrm_send_message(bp, &modify, sizeof(modify),
  1345. FLASH_PACKAGE_TIMEOUT);
  1346. dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
  1347. dma_handle);
  1348. }
  1349. }
  1350. release_firmware(fw);
  1351. if (rc)
  1352. return rc;
  1353. if ((install_type & 0xffff) == 0)
  1354. install_type >>= 16;
  1355. bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
  1356. install.install_type = cpu_to_le32(install_type);
  1357. rc = hwrm_send_message(bp, &install, sizeof(install),
  1358. INSTALL_PACKAGE_TIMEOUT);
  1359. if (rc)
  1360. return -EOPNOTSUPP;
  1361. if (resp->result) {
  1362. netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
  1363. (s8)resp->result, (int)resp->problem_item);
  1364. return -ENOPKG;
  1365. }
  1366. return 0;
  1367. }
  1368. static int bnxt_flash_device(struct net_device *dev,
  1369. struct ethtool_flash *flash)
  1370. {
  1371. if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
  1372. netdev_err(dev, "flashdev not supported from a virtual function\n");
  1373. return -EINVAL;
  1374. }
  1375. if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
  1376. flash->region > 0xffff)
  1377. return bnxt_flash_package_from_file(dev, flash->data,
  1378. flash->region);
  1379. return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
  1380. }
  1381. static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
  1382. {
  1383. struct bnxt *bp = netdev_priv(dev);
  1384. int rc;
  1385. struct hwrm_nvm_get_dir_info_input req = {0};
  1386. struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
  1387. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
  1388. mutex_lock(&bp->hwrm_cmd_lock);
  1389. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1390. if (!rc) {
  1391. *entries = le32_to_cpu(output->entries);
  1392. *length = le32_to_cpu(output->entry_length);
  1393. }
  1394. mutex_unlock(&bp->hwrm_cmd_lock);
  1395. return rc;
  1396. }
  1397. static int bnxt_get_eeprom_len(struct net_device *dev)
  1398. {
  1399. /* The -1 return value allows the entire 32-bit range of offsets to be
  1400. * passed via the ethtool command-line utility.
  1401. */
  1402. return -1;
  1403. }
  1404. static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
  1405. {
  1406. struct bnxt *bp = netdev_priv(dev);
  1407. int rc;
  1408. u32 dir_entries;
  1409. u32 entry_length;
  1410. u8 *buf;
  1411. size_t buflen;
  1412. dma_addr_t dma_handle;
  1413. struct hwrm_nvm_get_dir_entries_input req = {0};
  1414. rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
  1415. if (rc != 0)
  1416. return rc;
  1417. /* Insert 2 bytes of directory info (count and size of entries) */
  1418. if (len < 2)
  1419. return -EINVAL;
  1420. *data++ = dir_entries;
  1421. *data++ = entry_length;
  1422. len -= 2;
  1423. memset(data, 0xff, len);
  1424. buflen = dir_entries * entry_length;
  1425. buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
  1426. GFP_KERNEL);
  1427. if (!buf) {
  1428. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1429. (unsigned)buflen);
  1430. return -ENOMEM;
  1431. }
  1432. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
  1433. req.host_dest_addr = cpu_to_le64(dma_handle);
  1434. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1435. if (rc == 0)
  1436. memcpy(data, buf, len > buflen ? buflen : len);
  1437. dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
  1438. return rc;
  1439. }
  1440. static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
  1441. u32 length, u8 *data)
  1442. {
  1443. struct bnxt *bp = netdev_priv(dev);
  1444. int rc;
  1445. u8 *buf;
  1446. dma_addr_t dma_handle;
  1447. struct hwrm_nvm_read_input req = {0};
  1448. buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
  1449. GFP_KERNEL);
  1450. if (!buf) {
  1451. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1452. (unsigned)length);
  1453. return -ENOMEM;
  1454. }
  1455. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
  1456. req.host_dest_addr = cpu_to_le64(dma_handle);
  1457. req.dir_idx = cpu_to_le16(index);
  1458. req.offset = cpu_to_le32(offset);
  1459. req.len = cpu_to_le32(length);
  1460. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1461. if (rc == 0)
  1462. memcpy(data, buf, length);
  1463. dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
  1464. return rc;
  1465. }
  1466. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1467. u16 ext, u16 *index, u32 *item_length,
  1468. u32 *data_length)
  1469. {
  1470. struct bnxt *bp = netdev_priv(dev);
  1471. int rc;
  1472. struct hwrm_nvm_find_dir_entry_input req = {0};
  1473. struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
  1474. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
  1475. req.enables = 0;
  1476. req.dir_idx = 0;
  1477. req.dir_type = cpu_to_le16(type);
  1478. req.dir_ordinal = cpu_to_le16(ordinal);
  1479. req.dir_ext = cpu_to_le16(ext);
  1480. req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
  1481. rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1482. if (rc == 0) {
  1483. if (index)
  1484. *index = le16_to_cpu(output->dir_idx);
  1485. if (item_length)
  1486. *item_length = le32_to_cpu(output->dir_item_length);
  1487. if (data_length)
  1488. *data_length = le32_to_cpu(output->dir_data_length);
  1489. }
  1490. return rc;
  1491. }
  1492. static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
  1493. {
  1494. char *retval = NULL;
  1495. char *p;
  1496. char *value;
  1497. int field = 0;
  1498. if (datalen < 1)
  1499. return NULL;
  1500. /* null-terminate the log data (removing last '\n'): */
  1501. data[datalen - 1] = 0;
  1502. for (p = data; *p != 0; p++) {
  1503. field = 0;
  1504. retval = NULL;
  1505. while (*p != 0 && *p != '\n') {
  1506. value = p;
  1507. while (*p != 0 && *p != '\t' && *p != '\n')
  1508. p++;
  1509. if (field == desired_field)
  1510. retval = value;
  1511. if (*p != '\t')
  1512. break;
  1513. *p = 0;
  1514. field++;
  1515. p++;
  1516. }
  1517. if (*p == 0)
  1518. break;
  1519. *p = 0;
  1520. }
  1521. return retval;
  1522. }
  1523. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
  1524. {
  1525. u16 index = 0;
  1526. u32 datalen;
  1527. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
  1528. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1529. &index, NULL, &datalen) != 0)
  1530. return NULL;
  1531. memset(buf, 0, buflen);
  1532. if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
  1533. return NULL;
  1534. return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
  1535. datalen);
  1536. }
  1537. static int bnxt_get_eeprom(struct net_device *dev,
  1538. struct ethtool_eeprom *eeprom,
  1539. u8 *data)
  1540. {
  1541. u32 index;
  1542. u32 offset;
  1543. if (eeprom->offset == 0) /* special offset value to get directory */
  1544. return bnxt_get_nvram_directory(dev, eeprom->len, data);
  1545. index = eeprom->offset >> 24;
  1546. offset = eeprom->offset & 0xffffff;
  1547. if (index == 0) {
  1548. netdev_err(dev, "unsupported index value: %d\n", index);
  1549. return -EINVAL;
  1550. }
  1551. return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
  1552. }
  1553. static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
  1554. {
  1555. struct bnxt *bp = netdev_priv(dev);
  1556. struct hwrm_nvm_erase_dir_entry_input req = {0};
  1557. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
  1558. req.dir_idx = cpu_to_le16(index);
  1559. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1560. }
  1561. static int bnxt_set_eeprom(struct net_device *dev,
  1562. struct ethtool_eeprom *eeprom,
  1563. u8 *data)
  1564. {
  1565. struct bnxt *bp = netdev_priv(dev);
  1566. u8 index, dir_op;
  1567. u16 type, ext, ordinal, attr;
  1568. if (!BNXT_PF(bp)) {
  1569. netdev_err(dev, "NVM write not supported from a virtual function\n");
  1570. return -EINVAL;
  1571. }
  1572. type = eeprom->magic >> 16;
  1573. if (type == 0xffff) { /* special value for directory operations */
  1574. index = eeprom->magic & 0xff;
  1575. dir_op = eeprom->magic >> 8;
  1576. if (index == 0)
  1577. return -EINVAL;
  1578. switch (dir_op) {
  1579. case 0x0e: /* erase */
  1580. if (eeprom->offset != ~eeprom->magic)
  1581. return -EINVAL;
  1582. return bnxt_erase_nvram_directory(dev, index - 1);
  1583. default:
  1584. return -EINVAL;
  1585. }
  1586. }
  1587. /* Create or re-write an NVM item: */
  1588. if (bnxt_dir_type_is_executable(type) == true)
  1589. return -EOPNOTSUPP;
  1590. ext = eeprom->magic & 0xffff;
  1591. ordinal = eeprom->offset >> 16;
  1592. attr = eeprom->offset & 0xffff;
  1593. return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
  1594. eeprom->len);
  1595. }
  1596. static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
  1597. {
  1598. struct bnxt *bp = netdev_priv(dev);
  1599. struct ethtool_eee *eee = &bp->eee;
  1600. struct bnxt_link_info *link_info = &bp->link_info;
  1601. u32 advertising =
  1602. _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
  1603. int rc = 0;
  1604. if (!BNXT_SINGLE_PF(bp))
  1605. return -EOPNOTSUPP;
  1606. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1607. return -EOPNOTSUPP;
  1608. if (!edata->eee_enabled)
  1609. goto eee_ok;
  1610. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
  1611. netdev_warn(dev, "EEE requires autoneg\n");
  1612. return -EINVAL;
  1613. }
  1614. if (edata->tx_lpi_enabled) {
  1615. if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
  1616. edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
  1617. netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
  1618. bp->lpi_tmr_lo, bp->lpi_tmr_hi);
  1619. return -EINVAL;
  1620. } else if (!bp->lpi_tmr_hi) {
  1621. edata->tx_lpi_timer = eee->tx_lpi_timer;
  1622. }
  1623. }
  1624. if (!edata->advertised) {
  1625. edata->advertised = advertising & eee->supported;
  1626. } else if (edata->advertised & ~advertising) {
  1627. netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
  1628. edata->advertised, advertising);
  1629. return -EINVAL;
  1630. }
  1631. eee->advertised = edata->advertised;
  1632. eee->tx_lpi_enabled = edata->tx_lpi_enabled;
  1633. eee->tx_lpi_timer = edata->tx_lpi_timer;
  1634. eee_ok:
  1635. eee->eee_enabled = edata->eee_enabled;
  1636. if (netif_running(dev))
  1637. rc = bnxt_hwrm_set_link_setting(bp, false, true);
  1638. return rc;
  1639. }
  1640. static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
  1641. {
  1642. struct bnxt *bp = netdev_priv(dev);
  1643. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1644. return -EOPNOTSUPP;
  1645. *edata = bp->eee;
  1646. if (!bp->eee.eee_enabled) {
  1647. /* Preserve tx_lpi_timer so that the last value will be used
  1648. * by default when it is re-enabled.
  1649. */
  1650. edata->advertised = 0;
  1651. edata->tx_lpi_enabled = 0;
  1652. }
  1653. if (!bp->eee.eee_active)
  1654. edata->lp_advertised = 0;
  1655. return 0;
  1656. }
  1657. static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
  1658. u16 page_number, u16 start_addr,
  1659. u16 data_length, u8 *buf)
  1660. {
  1661. struct hwrm_port_phy_i2c_read_input req = {0};
  1662. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1663. int rc, byte_offset = 0;
  1664. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1665. req.i2c_slave_addr = i2c_addr;
  1666. req.page_number = cpu_to_le16(page_number);
  1667. req.port_id = cpu_to_le16(bp->pf.port_id);
  1668. do {
  1669. u16 xfer_size;
  1670. xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
  1671. data_length -= xfer_size;
  1672. req.page_offset = cpu_to_le16(start_addr + byte_offset);
  1673. req.data_length = xfer_size;
  1674. req.enables = cpu_to_le32(start_addr + byte_offset ?
  1675. PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
  1676. mutex_lock(&bp->hwrm_cmd_lock);
  1677. rc = _hwrm_send_message(bp, &req, sizeof(req),
  1678. HWRM_CMD_TIMEOUT);
  1679. if (!rc)
  1680. memcpy(buf + byte_offset, output->data, xfer_size);
  1681. mutex_unlock(&bp->hwrm_cmd_lock);
  1682. byte_offset += xfer_size;
  1683. } while (!rc && data_length > 0);
  1684. return rc;
  1685. }
  1686. static int bnxt_get_module_info(struct net_device *dev,
  1687. struct ethtool_modinfo *modinfo)
  1688. {
  1689. struct bnxt *bp = netdev_priv(dev);
  1690. struct hwrm_port_phy_i2c_read_input req = {0};
  1691. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1692. int rc;
  1693. /* No point in going further if phy status indicates
  1694. * module is not inserted or if it is powered down or
  1695. * if it is of type 10GBase-T
  1696. */
  1697. if (bp->link_info.module_status >
  1698. PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
  1699. return -EOPNOTSUPP;
  1700. /* This feature is not supported in older firmware versions */
  1701. if (bp->hwrm_spec_code < 0x10202)
  1702. return -EOPNOTSUPP;
  1703. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1704. req.i2c_slave_addr = I2C_DEV_ADDR_A0;
  1705. req.page_number = 0;
  1706. req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
  1707. req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
  1708. req.port_id = cpu_to_le16(bp->pf.port_id);
  1709. mutex_lock(&bp->hwrm_cmd_lock);
  1710. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1711. if (!rc) {
  1712. u32 module_id = le32_to_cpu(output->data[0]);
  1713. switch (module_id) {
  1714. case SFF_MODULE_ID_SFP:
  1715. modinfo->type = ETH_MODULE_SFF_8472;
  1716. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  1717. break;
  1718. case SFF_MODULE_ID_QSFP:
  1719. case SFF_MODULE_ID_QSFP_PLUS:
  1720. modinfo->type = ETH_MODULE_SFF_8436;
  1721. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  1722. break;
  1723. case SFF_MODULE_ID_QSFP28:
  1724. modinfo->type = ETH_MODULE_SFF_8636;
  1725. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  1726. break;
  1727. default:
  1728. rc = -EOPNOTSUPP;
  1729. break;
  1730. }
  1731. }
  1732. mutex_unlock(&bp->hwrm_cmd_lock);
  1733. return rc;
  1734. }
  1735. static int bnxt_get_module_eeprom(struct net_device *dev,
  1736. struct ethtool_eeprom *eeprom,
  1737. u8 *data)
  1738. {
  1739. struct bnxt *bp = netdev_priv(dev);
  1740. u16 start = eeprom->offset, length = eeprom->len;
  1741. int rc = 0;
  1742. memset(data, 0, eeprom->len);
  1743. /* Read A0 portion of the EEPROM */
  1744. if (start < ETH_MODULE_SFF_8436_LEN) {
  1745. if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
  1746. length = ETH_MODULE_SFF_8436_LEN - start;
  1747. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
  1748. start, length, data);
  1749. if (rc)
  1750. return rc;
  1751. start += length;
  1752. data += length;
  1753. length = eeprom->len - length;
  1754. }
  1755. /* Read A2 portion of the EEPROM */
  1756. if (length) {
  1757. start -= ETH_MODULE_SFF_8436_LEN;
  1758. bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start,
  1759. length, data);
  1760. }
  1761. return rc;
  1762. }
  1763. static int bnxt_nway_reset(struct net_device *dev)
  1764. {
  1765. int rc = 0;
  1766. struct bnxt *bp = netdev_priv(dev);
  1767. struct bnxt_link_info *link_info = &bp->link_info;
  1768. if (!BNXT_SINGLE_PF(bp))
  1769. return -EOPNOTSUPP;
  1770. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1771. return -EINVAL;
  1772. if (netif_running(dev))
  1773. rc = bnxt_hwrm_set_link_setting(bp, true, false);
  1774. return rc;
  1775. }
  1776. const struct ethtool_ops bnxt_ethtool_ops = {
  1777. .get_link_ksettings = bnxt_get_link_ksettings,
  1778. .set_link_ksettings = bnxt_set_link_ksettings,
  1779. .get_pauseparam = bnxt_get_pauseparam,
  1780. .set_pauseparam = bnxt_set_pauseparam,
  1781. .get_drvinfo = bnxt_get_drvinfo,
  1782. .get_coalesce = bnxt_get_coalesce,
  1783. .set_coalesce = bnxt_set_coalesce,
  1784. .get_msglevel = bnxt_get_msglevel,
  1785. .set_msglevel = bnxt_set_msglevel,
  1786. .get_sset_count = bnxt_get_sset_count,
  1787. .get_strings = bnxt_get_strings,
  1788. .get_ethtool_stats = bnxt_get_ethtool_stats,
  1789. .set_ringparam = bnxt_set_ringparam,
  1790. .get_ringparam = bnxt_get_ringparam,
  1791. .get_channels = bnxt_get_channels,
  1792. .set_channels = bnxt_set_channels,
  1793. .get_rxnfc = bnxt_get_rxnfc,
  1794. .set_rxnfc = bnxt_set_rxnfc,
  1795. .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
  1796. .get_rxfh_key_size = bnxt_get_rxfh_key_size,
  1797. .get_rxfh = bnxt_get_rxfh,
  1798. .flash_device = bnxt_flash_device,
  1799. .get_eeprom_len = bnxt_get_eeprom_len,
  1800. .get_eeprom = bnxt_get_eeprom,
  1801. .set_eeprom = bnxt_set_eeprom,
  1802. .get_link = bnxt_get_link,
  1803. .get_eee = bnxt_get_eee,
  1804. .set_eee = bnxt_set_eee,
  1805. .get_module_info = bnxt_get_module_info,
  1806. .get_module_eeprom = bnxt_get_module_eeprom,
  1807. .nway_reset = bnxt_nway_reset
  1808. };