xgbe-platform.c 19 KB

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  1. /*
  2. * AMD 10Gb Ethernet driver
  3. *
  4. * This file is available to you under your choice of the following two
  5. * licenses:
  6. *
  7. * License 1: GPLv2
  8. *
  9. * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
  10. *
  11. * This file is free software; you may copy, redistribute and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation, either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This file is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  23. *
  24. * This file incorporates work covered by the following copyright and
  25. * permission notice:
  26. * The Synopsys DWC ETHER XGMAC Software Driver and documentation
  27. * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  28. * Inc. unless otherwise expressly agreed to in writing between Synopsys
  29. * and you.
  30. *
  31. * The Software IS NOT an item of Licensed Software or Licensed Product
  32. * under any End User Software License Agreement or Agreement for Licensed
  33. * Product with Synopsys or any supplement thereto. Permission is hereby
  34. * granted, free of charge, to any person obtaining a copy of this software
  35. * annotated with this license and the Software, to deal in the Software
  36. * without restriction, including without limitation the rights to use,
  37. * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  38. * of the Software, and to permit persons to whom the Software is furnished
  39. * to do so, subject to the following conditions:
  40. *
  41. * The above copyright notice and this permission notice shall be included
  42. * in all copies or substantial portions of the Software.
  43. *
  44. * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
  45. * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  46. * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  47. * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
  48. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  49. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  50. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  51. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  52. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  53. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  54. * THE POSSIBILITY OF SUCH DAMAGE.
  55. *
  56. *
  57. * License 2: Modified BSD
  58. *
  59. * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
  60. * All rights reserved.
  61. *
  62. * Redistribution and use in source and binary forms, with or without
  63. * modification, are permitted provided that the following conditions are met:
  64. * * Redistributions of source code must retain the above copyright
  65. * notice, this list of conditions and the following disclaimer.
  66. * * Redistributions in binary form must reproduce the above copyright
  67. * notice, this list of conditions and the following disclaimer in the
  68. * documentation and/or other materials provided with the distribution.
  69. * * Neither the name of Advanced Micro Devices, Inc. nor the
  70. * names of its contributors may be used to endorse or promote products
  71. * derived from this software without specific prior written permission.
  72. *
  73. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  74. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  75. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  76. * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
  77. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  79. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  80. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  82. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83. *
  84. * This file incorporates work covered by the following copyright and
  85. * permission notice:
  86. * The Synopsys DWC ETHER XGMAC Software Driver and documentation
  87. * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  88. * Inc. unless otherwise expressly agreed to in writing between Synopsys
  89. * and you.
  90. *
  91. * The Software IS NOT an item of Licensed Software or Licensed Product
  92. * under any End User Software License Agreement or Agreement for Licensed
  93. * Product with Synopsys or any supplement thereto. Permission is hereby
  94. * granted, free of charge, to any person obtaining a copy of this software
  95. * annotated with this license and the Software, to deal in the Software
  96. * without restriction, including without limitation the rights to use,
  97. * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  98. * of the Software, and to permit persons to whom the Software is furnished
  99. * to do so, subject to the following conditions:
  100. *
  101. * The above copyright notice and this permission notice shall be included
  102. * in all copies or substantial portions of the Software.
  103. *
  104. * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
  105. * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  106. * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  107. * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
  108. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  109. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  110. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  111. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  112. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  113. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  114. * THE POSSIBILITY OF SUCH DAMAGE.
  115. */
  116. #include <linux/module.h>
  117. #include <linux/device.h>
  118. #include <linux/platform_device.h>
  119. #include <linux/spinlock.h>
  120. #include <linux/netdevice.h>
  121. #include <linux/etherdevice.h>
  122. #include <linux/io.h>
  123. #include <linux/of.h>
  124. #include <linux/of_net.h>
  125. #include <linux/of_address.h>
  126. #include <linux/of_platform.h>
  127. #include <linux/of_device.h>
  128. #include <linux/clk.h>
  129. #include <linux/property.h>
  130. #include <linux/acpi.h>
  131. #include <linux/mdio.h>
  132. #include "xgbe.h"
  133. #include "xgbe-common.h"
  134. #ifdef CONFIG_ACPI
  135. static const struct acpi_device_id xgbe_acpi_match[];
  136. static struct xgbe_version_data *xgbe_acpi_vdata(struct xgbe_prv_data *pdata)
  137. {
  138. const struct acpi_device_id *id;
  139. id = acpi_match_device(xgbe_acpi_match, pdata->dev);
  140. return id ? (struct xgbe_version_data *)id->driver_data : NULL;
  141. }
  142. static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
  143. {
  144. struct device *dev = pdata->dev;
  145. u32 property;
  146. int ret;
  147. /* Obtain the system clock setting */
  148. ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &property);
  149. if (ret) {
  150. dev_err(dev, "unable to obtain %s property\n",
  151. XGBE_ACPI_DMA_FREQ);
  152. return ret;
  153. }
  154. pdata->sysclk_rate = property;
  155. /* Obtain the PTP clock setting */
  156. ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &property);
  157. if (ret) {
  158. dev_err(dev, "unable to obtain %s property\n",
  159. XGBE_ACPI_PTP_FREQ);
  160. return ret;
  161. }
  162. pdata->ptpclk_rate = property;
  163. return 0;
  164. }
  165. #else /* CONFIG_ACPI */
  166. static struct xgbe_version_data *xgbe_acpi_vdata(struct xgbe_prv_data *pdata)
  167. {
  168. return NULL;
  169. }
  170. static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
  171. {
  172. return -EINVAL;
  173. }
  174. #endif /* CONFIG_ACPI */
  175. #ifdef CONFIG_OF
  176. static const struct of_device_id xgbe_of_match[];
  177. static struct xgbe_version_data *xgbe_of_vdata(struct xgbe_prv_data *pdata)
  178. {
  179. const struct of_device_id *id;
  180. id = of_match_device(xgbe_of_match, pdata->dev);
  181. return id ? (struct xgbe_version_data *)id->data : NULL;
  182. }
  183. static int xgbe_of_support(struct xgbe_prv_data *pdata)
  184. {
  185. struct device *dev = pdata->dev;
  186. /* Obtain the system clock setting */
  187. pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);
  188. if (IS_ERR(pdata->sysclk)) {
  189. dev_err(dev, "dma devm_clk_get failed\n");
  190. return PTR_ERR(pdata->sysclk);
  191. }
  192. pdata->sysclk_rate = clk_get_rate(pdata->sysclk);
  193. /* Obtain the PTP clock setting */
  194. pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);
  195. if (IS_ERR(pdata->ptpclk)) {
  196. dev_err(dev, "ptp devm_clk_get failed\n");
  197. return PTR_ERR(pdata->ptpclk);
  198. }
  199. pdata->ptpclk_rate = clk_get_rate(pdata->ptpclk);
  200. return 0;
  201. }
  202. static struct platform_device *xgbe_of_get_phy_pdev(struct xgbe_prv_data *pdata)
  203. {
  204. struct device *dev = pdata->dev;
  205. struct device_node *phy_node;
  206. struct platform_device *phy_pdev;
  207. phy_node = of_parse_phandle(dev->of_node, "phy-handle", 0);
  208. if (phy_node) {
  209. /* Old style device tree:
  210. * The XGBE and PHY resources are separate
  211. */
  212. phy_pdev = of_find_device_by_node(phy_node);
  213. of_node_put(phy_node);
  214. } else {
  215. /* New style device tree:
  216. * The XGBE and PHY resources are grouped together with
  217. * the PHY resources listed last
  218. */
  219. get_device(dev);
  220. phy_pdev = pdata->platdev;
  221. }
  222. return phy_pdev;
  223. }
  224. #else /* CONFIG_OF */
  225. static struct xgbe_version_data *xgbe_of_vdata(struct xgbe_prv_data *pdata)
  226. {
  227. return NULL;
  228. }
  229. static int xgbe_of_support(struct xgbe_prv_data *pdata)
  230. {
  231. return -EINVAL;
  232. }
  233. static struct platform_device *xgbe_of_get_phy_pdev(struct xgbe_prv_data *pdata)
  234. {
  235. return NULL;
  236. }
  237. #endif /* CONFIG_OF */
  238. static unsigned int xgbe_resource_count(struct platform_device *pdev,
  239. unsigned int type)
  240. {
  241. unsigned int count;
  242. int i;
  243. for (i = 0, count = 0; i < pdev->num_resources; i++) {
  244. struct resource *res = &pdev->resource[i];
  245. if (type == resource_type(res))
  246. count++;
  247. }
  248. return count;
  249. }
  250. static struct platform_device *xgbe_get_phy_pdev(struct xgbe_prv_data *pdata)
  251. {
  252. struct platform_device *phy_pdev;
  253. if (pdata->use_acpi) {
  254. get_device(pdata->dev);
  255. phy_pdev = pdata->platdev;
  256. } else {
  257. phy_pdev = xgbe_of_get_phy_pdev(pdata);
  258. }
  259. return phy_pdev;
  260. }
  261. static struct xgbe_version_data *xgbe_get_vdata(struct xgbe_prv_data *pdata)
  262. {
  263. return pdata->use_acpi ? xgbe_acpi_vdata(pdata)
  264. : xgbe_of_vdata(pdata);
  265. }
  266. static int xgbe_platform_probe(struct platform_device *pdev)
  267. {
  268. struct xgbe_prv_data *pdata;
  269. struct device *dev = &pdev->dev;
  270. struct platform_device *phy_pdev;
  271. struct resource *res;
  272. const char *phy_mode;
  273. unsigned int phy_memnum, phy_irqnum;
  274. unsigned int dma_irqnum, dma_irqend;
  275. enum dev_dma_attr attr;
  276. int ret;
  277. pdata = xgbe_alloc_pdata(dev);
  278. if (IS_ERR(pdata)) {
  279. ret = PTR_ERR(pdata);
  280. goto err_alloc;
  281. }
  282. pdata->platdev = pdev;
  283. pdata->adev = ACPI_COMPANION(dev);
  284. platform_set_drvdata(pdev, pdata);
  285. /* Check if we should use ACPI or DT */
  286. pdata->use_acpi = dev->of_node ? 0 : 1;
  287. /* Get the version data */
  288. pdata->vdata = xgbe_get_vdata(pdata);
  289. phy_pdev = xgbe_get_phy_pdev(pdata);
  290. if (!phy_pdev) {
  291. dev_err(dev, "unable to obtain phy device\n");
  292. ret = -EINVAL;
  293. goto err_phydev;
  294. }
  295. pdata->phy_platdev = phy_pdev;
  296. pdata->phy_dev = &phy_pdev->dev;
  297. if (pdev == phy_pdev) {
  298. /* New style device tree or ACPI:
  299. * The XGBE and PHY resources are grouped together with
  300. * the PHY resources listed last
  301. */
  302. phy_memnum = xgbe_resource_count(pdev, IORESOURCE_MEM) - 3;
  303. phy_irqnum = xgbe_resource_count(pdev, IORESOURCE_IRQ) - 1;
  304. dma_irqnum = 1;
  305. dma_irqend = phy_irqnum;
  306. } else {
  307. /* Old style device tree:
  308. * The XGBE and PHY resources are separate
  309. */
  310. phy_memnum = 0;
  311. phy_irqnum = 0;
  312. dma_irqnum = 1;
  313. dma_irqend = xgbe_resource_count(pdev, IORESOURCE_IRQ);
  314. }
  315. /* Obtain the mmio areas for the device */
  316. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  317. pdata->xgmac_regs = devm_ioremap_resource(dev, res);
  318. if (IS_ERR(pdata->xgmac_regs)) {
  319. dev_err(dev, "xgmac ioremap failed\n");
  320. ret = PTR_ERR(pdata->xgmac_regs);
  321. goto err_io;
  322. }
  323. if (netif_msg_probe(pdata))
  324. dev_dbg(dev, "xgmac_regs = %p\n", pdata->xgmac_regs);
  325. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  326. pdata->xpcs_regs = devm_ioremap_resource(dev, res);
  327. if (IS_ERR(pdata->xpcs_regs)) {
  328. dev_err(dev, "xpcs ioremap failed\n");
  329. ret = PTR_ERR(pdata->xpcs_regs);
  330. goto err_io;
  331. }
  332. if (netif_msg_probe(pdata))
  333. dev_dbg(dev, "xpcs_regs = %p\n", pdata->xpcs_regs);
  334. res = platform_get_resource(phy_pdev, IORESOURCE_MEM, phy_memnum++);
  335. pdata->rxtx_regs = devm_ioremap_resource(dev, res);
  336. if (IS_ERR(pdata->rxtx_regs)) {
  337. dev_err(dev, "rxtx ioremap failed\n");
  338. ret = PTR_ERR(pdata->rxtx_regs);
  339. goto err_io;
  340. }
  341. if (netif_msg_probe(pdata))
  342. dev_dbg(dev, "rxtx_regs = %p\n", pdata->rxtx_regs);
  343. res = platform_get_resource(phy_pdev, IORESOURCE_MEM, phy_memnum++);
  344. pdata->sir0_regs = devm_ioremap_resource(dev, res);
  345. if (IS_ERR(pdata->sir0_regs)) {
  346. dev_err(dev, "sir0 ioremap failed\n");
  347. ret = PTR_ERR(pdata->sir0_regs);
  348. goto err_io;
  349. }
  350. if (netif_msg_probe(pdata))
  351. dev_dbg(dev, "sir0_regs = %p\n", pdata->sir0_regs);
  352. res = platform_get_resource(phy_pdev, IORESOURCE_MEM, phy_memnum++);
  353. pdata->sir1_regs = devm_ioremap_resource(dev, res);
  354. if (IS_ERR(pdata->sir1_regs)) {
  355. dev_err(dev, "sir1 ioremap failed\n");
  356. ret = PTR_ERR(pdata->sir1_regs);
  357. goto err_io;
  358. }
  359. if (netif_msg_probe(pdata))
  360. dev_dbg(dev, "sir1_regs = %p\n", pdata->sir1_regs);
  361. /* Retrieve the MAC address */
  362. ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY,
  363. pdata->mac_addr,
  364. sizeof(pdata->mac_addr));
  365. if (ret || !is_valid_ether_addr(pdata->mac_addr)) {
  366. dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY);
  367. if (!ret)
  368. ret = -EINVAL;
  369. goto err_io;
  370. }
  371. /* Retrieve the PHY mode - it must be "xgmii" */
  372. ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY,
  373. &phy_mode);
  374. if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) {
  375. dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY);
  376. if (!ret)
  377. ret = -EINVAL;
  378. goto err_io;
  379. }
  380. pdata->phy_mode = PHY_INTERFACE_MODE_XGMII;
  381. /* Check for per channel interrupt support */
  382. if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY)) {
  383. pdata->per_channel_irq = 1;
  384. pdata->channel_irq_mode = XGBE_IRQ_MODE_EDGE;
  385. }
  386. /* Obtain device settings unique to ACPI/OF */
  387. if (pdata->use_acpi)
  388. ret = xgbe_acpi_support(pdata);
  389. else
  390. ret = xgbe_of_support(pdata);
  391. if (ret)
  392. goto err_io;
  393. /* Set the DMA coherency values */
  394. attr = device_get_dma_attr(dev);
  395. if (attr == DEV_DMA_NOT_SUPPORTED) {
  396. dev_err(dev, "DMA is not supported");
  397. ret = -ENODEV;
  398. goto err_io;
  399. }
  400. pdata->coherent = (attr == DEV_DMA_COHERENT);
  401. if (pdata->coherent) {
  402. pdata->axdomain = XGBE_DMA_OS_AXDOMAIN;
  403. pdata->arcache = XGBE_DMA_OS_ARCACHE;
  404. pdata->awcache = XGBE_DMA_OS_AWCACHE;
  405. } else {
  406. pdata->axdomain = XGBE_DMA_SYS_AXDOMAIN;
  407. pdata->arcache = XGBE_DMA_SYS_ARCACHE;
  408. pdata->awcache = XGBE_DMA_SYS_AWCACHE;
  409. }
  410. /* Set the maximum fifo amounts */
  411. pdata->tx_max_fifo_size = pdata->vdata->tx_max_fifo_size;
  412. pdata->rx_max_fifo_size = pdata->vdata->rx_max_fifo_size;
  413. /* Set the hardware channel and queue counts */
  414. xgbe_set_counts(pdata);
  415. /* Always have XGMAC and XPCS (auto-negotiation) interrupts */
  416. pdata->irq_count = 2;
  417. /* Get the device interrupt */
  418. ret = platform_get_irq(pdev, 0);
  419. if (ret < 0) {
  420. dev_err(dev, "platform_get_irq 0 failed\n");
  421. goto err_io;
  422. }
  423. pdata->dev_irq = ret;
  424. /* Get the per channel DMA interrupts */
  425. if (pdata->per_channel_irq) {
  426. unsigned int i, max = ARRAY_SIZE(pdata->channel_irq);
  427. for (i = 0; (i < max) && (dma_irqnum < dma_irqend); i++) {
  428. ret = platform_get_irq(pdata->platdev, dma_irqnum++);
  429. if (ret < 0) {
  430. netdev_err(pdata->netdev,
  431. "platform_get_irq %u failed\n",
  432. dma_irqnum - 1);
  433. goto err_io;
  434. }
  435. pdata->channel_irq[i] = ret;
  436. }
  437. pdata->channel_irq_count = max;
  438. pdata->irq_count += max;
  439. }
  440. /* Get the auto-negotiation interrupt */
  441. ret = platform_get_irq(phy_pdev, phy_irqnum++);
  442. if (ret < 0) {
  443. dev_err(dev, "platform_get_irq phy 0 failed\n");
  444. goto err_io;
  445. }
  446. pdata->an_irq = ret;
  447. /* Configure the netdev resource */
  448. ret = xgbe_config_netdev(pdata);
  449. if (ret)
  450. goto err_io;
  451. netdev_notice(pdata->netdev, "net device enabled\n");
  452. return 0;
  453. err_io:
  454. platform_device_put(phy_pdev);
  455. err_phydev:
  456. xgbe_free_pdata(pdata);
  457. err_alloc:
  458. dev_notice(dev, "net device not enabled\n");
  459. return ret;
  460. }
  461. static int xgbe_platform_remove(struct platform_device *pdev)
  462. {
  463. struct xgbe_prv_data *pdata = platform_get_drvdata(pdev);
  464. xgbe_deconfig_netdev(pdata);
  465. platform_device_put(pdata->phy_platdev);
  466. xgbe_free_pdata(pdata);
  467. return 0;
  468. }
  469. #ifdef CONFIG_PM_SLEEP
  470. static int xgbe_platform_suspend(struct device *dev)
  471. {
  472. struct xgbe_prv_data *pdata = dev_get_drvdata(dev);
  473. struct net_device *netdev = pdata->netdev;
  474. int ret = 0;
  475. DBGPR("-->xgbe_suspend\n");
  476. if (netif_running(netdev))
  477. ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT);
  478. pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);
  479. pdata->lpm_ctrl |= MDIO_CTRL1_LPOWER;
  480. XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl);
  481. DBGPR("<--xgbe_suspend\n");
  482. return ret;
  483. }
  484. static int xgbe_platform_resume(struct device *dev)
  485. {
  486. struct xgbe_prv_data *pdata = dev_get_drvdata(dev);
  487. struct net_device *netdev = pdata->netdev;
  488. int ret = 0;
  489. DBGPR("-->xgbe_resume\n");
  490. pdata->lpm_ctrl &= ~MDIO_CTRL1_LPOWER;
  491. XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl);
  492. if (netif_running(netdev)) {
  493. ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT);
  494. /* Schedule a restart in case the link or phy state changed
  495. * while we were powered down.
  496. */
  497. schedule_work(&pdata->restart_work);
  498. }
  499. DBGPR("<--xgbe_resume\n");
  500. return ret;
  501. }
  502. #endif /* CONFIG_PM_SLEEP */
  503. static const struct xgbe_version_data xgbe_v1 = {
  504. .init_function_ptrs_phy_impl = xgbe_init_function_ptrs_phy_v1,
  505. .xpcs_access = XGBE_XPCS_ACCESS_V1,
  506. .tx_max_fifo_size = 81920,
  507. .rx_max_fifo_size = 81920,
  508. .tx_tstamp_workaround = 1,
  509. };
  510. #ifdef CONFIG_ACPI
  511. static const struct acpi_device_id xgbe_acpi_match[] = {
  512. { .id = "AMDI8001",
  513. .driver_data = (kernel_ulong_t)&xgbe_v1 },
  514. {},
  515. };
  516. MODULE_DEVICE_TABLE(acpi, xgbe_acpi_match);
  517. #endif
  518. #ifdef CONFIG_OF
  519. static const struct of_device_id xgbe_of_match[] = {
  520. { .compatible = "amd,xgbe-seattle-v1a",
  521. .data = &xgbe_v1 },
  522. {},
  523. };
  524. MODULE_DEVICE_TABLE(of, xgbe_of_match);
  525. #endif
  526. static SIMPLE_DEV_PM_OPS(xgbe_platform_pm_ops,
  527. xgbe_platform_suspend, xgbe_platform_resume);
  528. static struct platform_driver xgbe_driver = {
  529. .driver = {
  530. .name = XGBE_DRV_NAME,
  531. #ifdef CONFIG_ACPI
  532. .acpi_match_table = xgbe_acpi_match,
  533. #endif
  534. #ifdef CONFIG_OF
  535. .of_match_table = xgbe_of_match,
  536. #endif
  537. .pm = &xgbe_platform_pm_ops,
  538. },
  539. .probe = xgbe_platform_probe,
  540. .remove = xgbe_platform_remove,
  541. };
  542. int xgbe_platform_init(void)
  543. {
  544. return platform_driver_register(&xgbe_driver);
  545. }
  546. void xgbe_platform_exit(void)
  547. {
  548. platform_driver_unregister(&xgbe_driver);
  549. }