b53_mmap.c 6.0 KB

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  1. /*
  2. * B53 register access through memory mapped registers
  3. *
  4. * Copyright (C) 2012-2013 Jonas Gorski <jogo@openwrt.org>
  5. *
  6. * Permission to use, copy, modify, and/or distribute this software for any
  7. * purpose with or without fee is hereby granted, provided that the above
  8. * copyright notice and this permission notice appear in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/io.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/platform_data/b53.h>
  23. #include "b53_priv.h"
  24. struct b53_mmap_priv {
  25. void __iomem *regs;
  26. };
  27. static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
  28. {
  29. u8 __iomem *regs = dev->priv;
  30. *val = readb(regs + (page << 8) + reg);
  31. return 0;
  32. }
  33. static int b53_mmap_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
  34. {
  35. u8 __iomem *regs = dev->priv;
  36. if (WARN_ON(reg % 2))
  37. return -EINVAL;
  38. if (dev->pdata && dev->pdata->big_endian)
  39. *val = ioread16be(regs + (page << 8) + reg);
  40. else
  41. *val = readw(regs + (page << 8) + reg);
  42. return 0;
  43. }
  44. static int b53_mmap_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
  45. {
  46. u8 __iomem *regs = dev->priv;
  47. if (WARN_ON(reg % 4))
  48. return -EINVAL;
  49. if (dev->pdata && dev->pdata->big_endian)
  50. *val = ioread32be(regs + (page << 8) + reg);
  51. else
  52. *val = readl(regs + (page << 8) + reg);
  53. return 0;
  54. }
  55. static int b53_mmap_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
  56. {
  57. u8 __iomem *regs = dev->priv;
  58. if (WARN_ON(reg % 2))
  59. return -EINVAL;
  60. if (reg % 4) {
  61. u16 lo;
  62. u32 hi;
  63. if (dev->pdata && dev->pdata->big_endian) {
  64. lo = ioread16be(regs + (page << 8) + reg);
  65. hi = ioread32be(regs + (page << 8) + reg + 2);
  66. } else {
  67. lo = readw(regs + (page << 8) + reg);
  68. hi = readl(regs + (page << 8) + reg + 2);
  69. }
  70. *val = ((u64)hi << 16) | lo;
  71. } else {
  72. u32 lo;
  73. u16 hi;
  74. if (dev->pdata && dev->pdata->big_endian) {
  75. lo = ioread32be(regs + (page << 8) + reg);
  76. hi = ioread16be(regs + (page << 8) + reg + 4);
  77. } else {
  78. lo = readl(regs + (page << 8) + reg);
  79. hi = readw(regs + (page << 8) + reg + 4);
  80. }
  81. *val = ((u64)hi << 32) | lo;
  82. }
  83. return 0;
  84. }
  85. static int b53_mmap_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
  86. {
  87. u8 __iomem *regs = dev->priv;
  88. u32 hi, lo;
  89. if (WARN_ON(reg % 4))
  90. return -EINVAL;
  91. if (dev->pdata && dev->pdata->big_endian) {
  92. lo = ioread32be(regs + (page << 8) + reg);
  93. hi = ioread32be(regs + (page << 8) + reg + 4);
  94. } else {
  95. lo = readl(regs + (page << 8) + reg);
  96. hi = readl(regs + (page << 8) + reg + 4);
  97. }
  98. *val = ((u64)hi << 32) | lo;
  99. return 0;
  100. }
  101. static int b53_mmap_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
  102. {
  103. u8 __iomem *regs = dev->priv;
  104. writeb(value, regs + (page << 8) + reg);
  105. return 0;
  106. }
  107. static int b53_mmap_write16(struct b53_device *dev, u8 page, u8 reg,
  108. u16 value)
  109. {
  110. u8 __iomem *regs = dev->priv;
  111. if (WARN_ON(reg % 2))
  112. return -EINVAL;
  113. if (dev->pdata && dev->pdata->big_endian)
  114. iowrite16be(value, regs + (page << 8) + reg);
  115. else
  116. writew(value, regs + (page << 8) + reg);
  117. return 0;
  118. }
  119. static int b53_mmap_write32(struct b53_device *dev, u8 page, u8 reg,
  120. u32 value)
  121. {
  122. u8 __iomem *regs = dev->priv;
  123. if (WARN_ON(reg % 4))
  124. return -EINVAL;
  125. if (dev->pdata && dev->pdata->big_endian)
  126. iowrite32be(value, regs + (page << 8) + reg);
  127. else
  128. writel(value, regs + (page << 8) + reg);
  129. return 0;
  130. }
  131. static int b53_mmap_write48(struct b53_device *dev, u8 page, u8 reg,
  132. u64 value)
  133. {
  134. if (WARN_ON(reg % 2))
  135. return -EINVAL;
  136. if (reg % 4) {
  137. u32 hi = (u32)(value >> 16);
  138. u16 lo = (u16)value;
  139. b53_mmap_write16(dev, page, reg, lo);
  140. b53_mmap_write32(dev, page, reg + 2, hi);
  141. } else {
  142. u16 hi = (u16)(value >> 32);
  143. u32 lo = (u32)value;
  144. b53_mmap_write32(dev, page, reg, lo);
  145. b53_mmap_write16(dev, page, reg + 4, hi);
  146. }
  147. return 0;
  148. }
  149. static int b53_mmap_write64(struct b53_device *dev, u8 page, u8 reg,
  150. u64 value)
  151. {
  152. u32 hi, lo;
  153. hi = upper_32_bits(value);
  154. lo = lower_32_bits(value);
  155. if (WARN_ON(reg % 4))
  156. return -EINVAL;
  157. b53_mmap_write32(dev, page, reg, lo);
  158. b53_mmap_write32(dev, page, reg + 4, hi);
  159. return 0;
  160. }
  161. static const struct b53_io_ops b53_mmap_ops = {
  162. .read8 = b53_mmap_read8,
  163. .read16 = b53_mmap_read16,
  164. .read32 = b53_mmap_read32,
  165. .read48 = b53_mmap_read48,
  166. .read64 = b53_mmap_read64,
  167. .write8 = b53_mmap_write8,
  168. .write16 = b53_mmap_write16,
  169. .write32 = b53_mmap_write32,
  170. .write48 = b53_mmap_write48,
  171. .write64 = b53_mmap_write64,
  172. };
  173. static int b53_mmap_probe(struct platform_device *pdev)
  174. {
  175. struct b53_platform_data *pdata = pdev->dev.platform_data;
  176. struct b53_device *dev;
  177. if (!pdata)
  178. return -EINVAL;
  179. dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, pdata->regs);
  180. if (!dev)
  181. return -ENOMEM;
  182. dev->pdata = pdata;
  183. platform_set_drvdata(pdev, dev);
  184. return b53_switch_register(dev);
  185. }
  186. static int b53_mmap_remove(struct platform_device *pdev)
  187. {
  188. struct b53_device *dev = platform_get_drvdata(pdev);
  189. if (dev)
  190. b53_switch_remove(dev);
  191. return 0;
  192. }
  193. static const struct of_device_id b53_mmap_of_table[] = {
  194. { .compatible = "brcm,bcm3384-switch" },
  195. { .compatible = "brcm,bcm6328-switch" },
  196. { .compatible = "brcm,bcm6368-switch" },
  197. { .compatible = "brcm,bcm63xx-switch" },
  198. { /* sentinel */ },
  199. };
  200. MODULE_DEVICE_TABLE(of, b53_mmap_of_table);
  201. static struct platform_driver b53_mmap_driver = {
  202. .probe = b53_mmap_probe,
  203. .remove = b53_mmap_remove,
  204. .driver = {
  205. .name = "b53-switch",
  206. .of_match_table = b53_mmap_of_table,
  207. },
  208. };
  209. module_platform_driver(b53_mmap_driver);
  210. MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
  211. MODULE_DESCRIPTION("B53 MMAP access driver");
  212. MODULE_LICENSE("Dual BSD/GPL");