sdhci-pci.h 2.9 KB

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  1. #ifndef __SDHCI_PCI_H
  2. #define __SDHCI_PCI_H
  3. /*
  4. * PCI device IDs
  5. */
  6. #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
  7. #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
  8. #define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14
  9. #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15
  10. #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
  11. #define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50
  12. #define PCI_DEVICE_ID_INTEL_BSW_EMMC 0x2294
  13. #define PCI_DEVICE_ID_INTEL_BSW_SDIO 0x2295
  14. #define PCI_DEVICE_ID_INTEL_BSW_SD 0x2296
  15. #define PCI_DEVICE_ID_INTEL_MRFLD_MMC 0x1190
  16. #define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9
  17. #define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa
  18. #define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb
  19. #define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5
  20. #define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6
  21. #define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7
  22. #define PCI_DEVICE_ID_INTEL_SPT_EMMC 0x9d2b
  23. #define PCI_DEVICE_ID_INTEL_SPT_SDIO 0x9d2c
  24. #define PCI_DEVICE_ID_INTEL_SPT_SD 0x9d2d
  25. #define PCI_DEVICE_ID_INTEL_DNV_EMMC 0x19db
  26. #define PCI_DEVICE_ID_INTEL_BXT_SD 0x0aca
  27. #define PCI_DEVICE_ID_INTEL_BXT_EMMC 0x0acc
  28. #define PCI_DEVICE_ID_INTEL_BXT_SDIO 0x0ad0
  29. #define PCI_DEVICE_ID_INTEL_BXTM_SD 0x1aca
  30. #define PCI_DEVICE_ID_INTEL_BXTM_EMMC 0x1acc
  31. #define PCI_DEVICE_ID_INTEL_BXTM_SDIO 0x1ad0
  32. #define PCI_DEVICE_ID_INTEL_APL_SD 0x5aca
  33. #define PCI_DEVICE_ID_INTEL_APL_EMMC 0x5acc
  34. #define PCI_DEVICE_ID_INTEL_APL_SDIO 0x5ad0
  35. #define PCI_DEVICE_ID_INTEL_GLK_SD 0x31ca
  36. #define PCI_DEVICE_ID_INTEL_GLK_EMMC 0x31cc
  37. #define PCI_DEVICE_ID_INTEL_GLK_SDIO 0x31d0
  38. /*
  39. * PCI registers
  40. */
  41. #define PCI_SDHCI_IFPIO 0x00
  42. #define PCI_SDHCI_IFDMA 0x01
  43. #define PCI_SDHCI_IFVENDOR 0x02
  44. #define PCI_SLOT_INFO 0x40 /* 8 bits */
  45. #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
  46. #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
  47. #define MAX_SLOTS 8
  48. struct sdhci_pci_chip;
  49. struct sdhci_pci_slot;
  50. struct sdhci_pci_fixes {
  51. unsigned int quirks;
  52. unsigned int quirks2;
  53. bool allow_runtime_pm;
  54. bool own_cd_for_runtime_pm;
  55. int (*probe) (struct sdhci_pci_chip *);
  56. int (*probe_slot) (struct sdhci_pci_slot *);
  57. void (*remove_slot) (struct sdhci_pci_slot *, int);
  58. int (*suspend) (struct sdhci_pci_chip *);
  59. int (*resume) (struct sdhci_pci_chip *);
  60. const struct sdhci_ops *ops;
  61. };
  62. struct sdhci_pci_slot {
  63. struct sdhci_pci_chip *chip;
  64. struct sdhci_host *host;
  65. struct sdhci_pci_data *data;
  66. int rst_n_gpio;
  67. int cd_gpio;
  68. int cd_irq;
  69. char *cd_con_id;
  70. int cd_idx;
  71. bool cd_override_level;
  72. void (*hw_reset)(struct sdhci_host *host);
  73. int (*select_drive_strength)(struct sdhci_host *host,
  74. struct mmc_card *card,
  75. unsigned int max_dtr, int host_drv,
  76. int card_drv, int *drv_type);
  77. };
  78. struct sdhci_pci_chip {
  79. struct pci_dev *pdev;
  80. unsigned int quirks;
  81. unsigned int quirks2;
  82. bool allow_runtime_pm;
  83. const struct sdhci_pci_fixes *fixes;
  84. int num_slots; /* Slots on controller */
  85. struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
  86. };
  87. #endif /* __SDHCI_PCI_H */