sdhci-acpi.c 14 KB

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  1. /*
  2. * Secure Digital Host Controller Interface ACPI driver.
  3. *
  4. * Copyright (c) 2012, Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program; if not, write to the Free Software Foundation, Inc.,
  17. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18. *
  19. */
  20. #include <linux/init.h>
  21. #include <linux/export.h>
  22. #include <linux/module.h>
  23. #include <linux/device.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/ioport.h>
  26. #include <linux/io.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/compiler.h>
  29. #include <linux/stddef.h>
  30. #include <linux/bitops.h>
  31. #include <linux/types.h>
  32. #include <linux/err.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/acpi.h>
  35. #include <linux/pm.h>
  36. #include <linux/pm_runtime.h>
  37. #include <linux/delay.h>
  38. #include <linux/mmc/host.h>
  39. #include <linux/mmc/pm.h>
  40. #include <linux/mmc/slot-gpio.h>
  41. #ifdef CONFIG_X86
  42. #include <asm/cpu_device_id.h>
  43. #include <asm/intel-family.h>
  44. #include <asm/iosf_mbi.h>
  45. #endif
  46. #include "sdhci.h"
  47. enum {
  48. SDHCI_ACPI_SD_CD = BIT(0),
  49. SDHCI_ACPI_RUNTIME_PM = BIT(1),
  50. SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
  51. };
  52. struct sdhci_acpi_chip {
  53. const struct sdhci_ops *ops;
  54. unsigned int quirks;
  55. unsigned int quirks2;
  56. unsigned long caps;
  57. unsigned int caps2;
  58. mmc_pm_flag_t pm_caps;
  59. };
  60. struct sdhci_acpi_slot {
  61. const struct sdhci_acpi_chip *chip;
  62. unsigned int quirks;
  63. unsigned int quirks2;
  64. unsigned long caps;
  65. unsigned int caps2;
  66. mmc_pm_flag_t pm_caps;
  67. unsigned int flags;
  68. int (*probe_slot)(struct platform_device *, const char *, const char *);
  69. int (*remove_slot)(struct platform_device *);
  70. };
  71. struct sdhci_acpi_host {
  72. struct sdhci_host *host;
  73. const struct sdhci_acpi_slot *slot;
  74. struct platform_device *pdev;
  75. bool use_runtime_pm;
  76. };
  77. static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
  78. {
  79. return c->slot && (c->slot->flags & flag);
  80. }
  81. static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
  82. {
  83. u8 reg;
  84. reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
  85. reg |= 0x10;
  86. sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
  87. /* For eMMC, minimum is 1us but give it 9us for good measure */
  88. udelay(9);
  89. reg &= ~0x10;
  90. sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
  91. /* For eMMC, minimum is 200us but give it 300us for good measure */
  92. usleep_range(300, 1000);
  93. }
  94. static const struct sdhci_ops sdhci_acpi_ops_dflt = {
  95. .set_clock = sdhci_set_clock,
  96. .set_bus_width = sdhci_set_bus_width,
  97. .reset = sdhci_reset,
  98. .set_uhs_signaling = sdhci_set_uhs_signaling,
  99. };
  100. static const struct sdhci_ops sdhci_acpi_ops_int = {
  101. .set_clock = sdhci_set_clock,
  102. .set_bus_width = sdhci_set_bus_width,
  103. .reset = sdhci_reset,
  104. .set_uhs_signaling = sdhci_set_uhs_signaling,
  105. .hw_reset = sdhci_acpi_int_hw_reset,
  106. };
  107. static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
  108. .ops = &sdhci_acpi_ops_int,
  109. };
  110. #ifdef CONFIG_X86
  111. static bool sdhci_acpi_byt(void)
  112. {
  113. static const struct x86_cpu_id byt[] = {
  114. { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
  115. {}
  116. };
  117. return x86_match_cpu(byt);
  118. }
  119. #define BYT_IOSF_SCCEP 0x63
  120. #define BYT_IOSF_OCP_NETCTRL0 0x1078
  121. #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
  122. static void sdhci_acpi_byt_setting(struct device *dev)
  123. {
  124. u32 val = 0;
  125. if (!sdhci_acpi_byt())
  126. return;
  127. if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
  128. &val)) {
  129. dev_err(dev, "%s read error\n", __func__);
  130. return;
  131. }
  132. if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
  133. return;
  134. val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
  135. if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
  136. val)) {
  137. dev_err(dev, "%s write error\n", __func__);
  138. return;
  139. }
  140. dev_dbg(dev, "%s completed\n", __func__);
  141. }
  142. static bool sdhci_acpi_byt_defer(struct device *dev)
  143. {
  144. if (!sdhci_acpi_byt())
  145. return false;
  146. if (!iosf_mbi_available())
  147. return true;
  148. sdhci_acpi_byt_setting(dev);
  149. return false;
  150. }
  151. #else
  152. static inline void sdhci_acpi_byt_setting(struct device *dev)
  153. {
  154. }
  155. static inline bool sdhci_acpi_byt_defer(struct device *dev)
  156. {
  157. return false;
  158. }
  159. #endif
  160. static int bxt_get_cd(struct mmc_host *mmc)
  161. {
  162. int gpio_cd = mmc_gpio_get_cd(mmc);
  163. struct sdhci_host *host = mmc_priv(mmc);
  164. unsigned long flags;
  165. int ret = 0;
  166. if (!gpio_cd)
  167. return 0;
  168. spin_lock_irqsave(&host->lock, flags);
  169. if (host->flags & SDHCI_DEVICE_DEAD)
  170. goto out;
  171. ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
  172. out:
  173. spin_unlock_irqrestore(&host->lock, flags);
  174. return ret;
  175. }
  176. static int sdhci_acpi_emmc_probe_slot(struct platform_device *pdev,
  177. const char *hid, const char *uid)
  178. {
  179. struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
  180. struct sdhci_host *host;
  181. if (!c || !c->host)
  182. return 0;
  183. host = c->host;
  184. /* Platform specific code during emmc probe slot goes here */
  185. if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
  186. sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
  187. sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
  188. host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
  189. return 0;
  190. }
  191. static int sdhci_acpi_sdio_probe_slot(struct platform_device *pdev,
  192. const char *hid, const char *uid)
  193. {
  194. struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
  195. struct sdhci_host *host;
  196. if (!c || !c->host)
  197. return 0;
  198. host = c->host;
  199. /* Platform specific code during sdio probe slot goes here */
  200. return 0;
  201. }
  202. static int sdhci_acpi_sd_probe_slot(struct platform_device *pdev,
  203. const char *hid, const char *uid)
  204. {
  205. struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
  206. struct sdhci_host *host;
  207. if (!c || !c->host || !c->slot)
  208. return 0;
  209. host = c->host;
  210. /* Platform specific code during sd probe slot goes here */
  211. if (hid && !strcmp(hid, "80865ACA")) {
  212. host->mmc_host_ops.get_cd = bxt_get_cd;
  213. host->mmc->caps |= MMC_CAP_AGGRESSIVE_PM;
  214. }
  215. return 0;
  216. }
  217. static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
  218. .chip = &sdhci_acpi_chip_int,
  219. .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
  220. MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
  221. MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
  222. .caps2 = MMC_CAP2_HC_ERASE_SZ,
  223. .flags = SDHCI_ACPI_RUNTIME_PM,
  224. .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  225. .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
  226. SDHCI_QUIRK2_STOP_WITH_TC |
  227. SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
  228. .probe_slot = sdhci_acpi_emmc_probe_slot,
  229. };
  230. static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
  231. .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
  232. SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  233. .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
  234. .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
  235. MMC_CAP_WAIT_WHILE_BUSY,
  236. .flags = SDHCI_ACPI_RUNTIME_PM,
  237. .pm_caps = MMC_PM_KEEP_POWER,
  238. .probe_slot = sdhci_acpi_sdio_probe_slot,
  239. };
  240. static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
  241. .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
  242. SDHCI_ACPI_RUNTIME_PM,
  243. .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  244. .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
  245. SDHCI_QUIRK2_STOP_WITH_TC,
  246. .caps = MMC_CAP_WAIT_WHILE_BUSY,
  247. .probe_slot = sdhci_acpi_sd_probe_slot,
  248. };
  249. static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
  250. .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
  251. .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
  252. .caps = MMC_CAP_NONREMOVABLE,
  253. };
  254. static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
  255. .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
  256. .caps = MMC_CAP_NONREMOVABLE,
  257. };
  258. struct sdhci_acpi_uid_slot {
  259. const char *hid;
  260. const char *uid;
  261. const struct sdhci_acpi_slot *slot;
  262. };
  263. static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
  264. { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
  265. { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
  266. { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
  267. { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
  268. { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
  269. { "80860F14" , "3" , &sdhci_acpi_slot_int_sd },
  270. { "80860F16" , NULL, &sdhci_acpi_slot_int_sd },
  271. { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio },
  272. { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd },
  273. { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio },
  274. { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio },
  275. { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio },
  276. { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd },
  277. { "PNP0D40" },
  278. { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
  279. { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
  280. { },
  281. };
  282. static const struct acpi_device_id sdhci_acpi_ids[] = {
  283. { "80865ACA" },
  284. { "80865ACC" },
  285. { "80865AD0" },
  286. { "80860F14" },
  287. { "80860F16" },
  288. { "INT33BB" },
  289. { "INT33C6" },
  290. { "INT3436" },
  291. { "INT344D" },
  292. { "PNP0D40" },
  293. { "QCOM8051" },
  294. { "QCOM8052" },
  295. { },
  296. };
  297. MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
  298. static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid,
  299. const char *uid)
  300. {
  301. const struct sdhci_acpi_uid_slot *u;
  302. for (u = sdhci_acpi_uids; u->hid; u++) {
  303. if (strcmp(u->hid, hid))
  304. continue;
  305. if (!u->uid)
  306. return u->slot;
  307. if (uid && !strcmp(u->uid, uid))
  308. return u->slot;
  309. }
  310. return NULL;
  311. }
  312. static int sdhci_acpi_probe(struct platform_device *pdev)
  313. {
  314. struct device *dev = &pdev->dev;
  315. acpi_handle handle = ACPI_HANDLE(dev);
  316. struct acpi_device *device, *child;
  317. struct sdhci_acpi_host *c;
  318. struct sdhci_host *host;
  319. struct resource *iomem;
  320. resource_size_t len;
  321. const char *hid;
  322. const char *uid;
  323. int err;
  324. if (acpi_bus_get_device(handle, &device))
  325. return -ENODEV;
  326. /* Power on the SDHCI controller and its children */
  327. acpi_device_fix_up_power(device);
  328. list_for_each_entry(child, &device->children, node)
  329. if (child->status.present && child->status.enabled)
  330. acpi_device_fix_up_power(child);
  331. if (acpi_bus_get_status(device) || !device->status.present)
  332. return -ENODEV;
  333. if (sdhci_acpi_byt_defer(dev))
  334. return -EPROBE_DEFER;
  335. hid = acpi_device_hid(device);
  336. uid = device->pnp.unique_id;
  337. iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  338. if (!iomem)
  339. return -ENOMEM;
  340. len = resource_size(iomem);
  341. if (len < 0x100)
  342. dev_err(dev, "Invalid iomem size!\n");
  343. if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
  344. return -ENOMEM;
  345. host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host));
  346. if (IS_ERR(host))
  347. return PTR_ERR(host);
  348. c = sdhci_priv(host);
  349. c->host = host;
  350. c->slot = sdhci_acpi_get_slot(hid, uid);
  351. c->pdev = pdev;
  352. c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
  353. platform_set_drvdata(pdev, c);
  354. host->hw_name = "ACPI";
  355. host->ops = &sdhci_acpi_ops_dflt;
  356. host->irq = platform_get_irq(pdev, 0);
  357. host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
  358. resource_size(iomem));
  359. if (host->ioaddr == NULL) {
  360. err = -ENOMEM;
  361. goto err_free;
  362. }
  363. if (c->slot) {
  364. if (c->slot->probe_slot) {
  365. err = c->slot->probe_slot(pdev, hid, uid);
  366. if (err)
  367. goto err_free;
  368. }
  369. if (c->slot->chip) {
  370. host->ops = c->slot->chip->ops;
  371. host->quirks |= c->slot->chip->quirks;
  372. host->quirks2 |= c->slot->chip->quirks2;
  373. host->mmc->caps |= c->slot->chip->caps;
  374. host->mmc->caps2 |= c->slot->chip->caps2;
  375. host->mmc->pm_caps |= c->slot->chip->pm_caps;
  376. }
  377. host->quirks |= c->slot->quirks;
  378. host->quirks2 |= c->slot->quirks2;
  379. host->mmc->caps |= c->slot->caps;
  380. host->mmc->caps2 |= c->slot->caps2;
  381. host->mmc->pm_caps |= c->slot->pm_caps;
  382. }
  383. host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
  384. if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
  385. bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
  386. if (mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL)) {
  387. dev_warn(dev, "failed to setup card detect gpio\n");
  388. c->use_runtime_pm = false;
  389. }
  390. }
  391. err = sdhci_add_host(host);
  392. if (err)
  393. goto err_free;
  394. if (c->use_runtime_pm) {
  395. pm_runtime_set_active(dev);
  396. pm_suspend_ignore_children(dev, 1);
  397. pm_runtime_set_autosuspend_delay(dev, 50);
  398. pm_runtime_use_autosuspend(dev);
  399. pm_runtime_enable(dev);
  400. }
  401. device_enable_async_suspend(dev);
  402. return 0;
  403. err_free:
  404. sdhci_free_host(c->host);
  405. return err;
  406. }
  407. static int sdhci_acpi_remove(struct platform_device *pdev)
  408. {
  409. struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
  410. struct device *dev = &pdev->dev;
  411. int dead;
  412. if (c->use_runtime_pm) {
  413. pm_runtime_get_sync(dev);
  414. pm_runtime_disable(dev);
  415. pm_runtime_put_noidle(dev);
  416. }
  417. if (c->slot && c->slot->remove_slot)
  418. c->slot->remove_slot(pdev);
  419. dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
  420. sdhci_remove_host(c->host, dead);
  421. sdhci_free_host(c->host);
  422. return 0;
  423. }
  424. #ifdef CONFIG_PM_SLEEP
  425. static int sdhci_acpi_suspend(struct device *dev)
  426. {
  427. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  428. return sdhci_suspend_host(c->host);
  429. }
  430. static int sdhci_acpi_resume(struct device *dev)
  431. {
  432. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  433. sdhci_acpi_byt_setting(&c->pdev->dev);
  434. return sdhci_resume_host(c->host);
  435. }
  436. #endif
  437. #ifdef CONFIG_PM
  438. static int sdhci_acpi_runtime_suspend(struct device *dev)
  439. {
  440. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  441. return sdhci_runtime_suspend_host(c->host);
  442. }
  443. static int sdhci_acpi_runtime_resume(struct device *dev)
  444. {
  445. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  446. sdhci_acpi_byt_setting(&c->pdev->dev);
  447. return sdhci_runtime_resume_host(c->host);
  448. }
  449. #endif
  450. static const struct dev_pm_ops sdhci_acpi_pm_ops = {
  451. SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
  452. SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
  453. sdhci_acpi_runtime_resume, NULL)
  454. };
  455. static struct platform_driver sdhci_acpi_driver = {
  456. .driver = {
  457. .name = "sdhci-acpi",
  458. .acpi_match_table = sdhci_acpi_ids,
  459. .pm = &sdhci_acpi_pm_ops,
  460. },
  461. .probe = sdhci_acpi_probe,
  462. .remove = sdhci_acpi_remove,
  463. };
  464. module_platform_driver(sdhci_acpi_driver);
  465. MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
  466. MODULE_AUTHOR("Adrian Hunter");
  467. MODULE_LICENSE("GPL v2");