em28xx-core.c 28 KB

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  1. /*
  2. em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
  3. Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
  4. Markus Rechberger <mrechberger@gmail.com>
  5. Mauro Carvalho Chehab <mchehab@infradead.org>
  6. Sascha Sommer <saschasommer@freenet.de>
  7. Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com>
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include "em28xx.h"
  21. #include <linux/init.h>
  22. #include <linux/jiffies.h>
  23. #include <linux/list.h>
  24. #include <linux/module.h>
  25. #include <linux/slab.h>
  26. #include <linux/usb.h>
  27. #include <linux/vmalloc.h>
  28. #include <sound/ac97_codec.h>
  29. #include <media/v4l2-common.h>
  30. #define DRIVER_AUTHOR "Ludovico Cavedon <cavedon@sssup.it>, " \
  31. "Markus Rechberger <mrechberger@gmail.com>, " \
  32. "Mauro Carvalho Chehab <mchehab@infradead.org>, " \
  33. "Sascha Sommer <saschasommer@freenet.de>"
  34. MODULE_AUTHOR(DRIVER_AUTHOR);
  35. MODULE_DESCRIPTION(DRIVER_DESC);
  36. MODULE_LICENSE("GPL");
  37. MODULE_VERSION(EM28XX_VERSION);
  38. /* #define ENABLE_DEBUG_ISOC_FRAMES */
  39. static unsigned int core_debug;
  40. module_param(core_debug, int, 0644);
  41. MODULE_PARM_DESC(core_debug, "enable debug messages [core and isoc]");
  42. #define em28xx_coredbg(fmt, arg...) do { \
  43. if (core_debug) \
  44. dev_printk(KERN_DEBUG, &dev->intf->dev, \
  45. "core: %s: " fmt, __func__, ## arg); \
  46. } while (0)
  47. static unsigned int reg_debug;
  48. module_param(reg_debug, int, 0644);
  49. MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
  50. #define em28xx_regdbg(fmt, arg...) do { \
  51. if (reg_debug) \
  52. dev_printk(KERN_DEBUG, &dev->intf->dev, \
  53. "reg: %s: " fmt, __func__, ## arg); \
  54. } while (0)
  55. /* FIXME: don't abuse core_debug */
  56. #define em28xx_isocdbg(fmt, arg...) do { \
  57. if (core_debug) \
  58. dev_printk(KERN_DEBUG, &dev->intf->dev, \
  59. "core: %s: " fmt, __func__, ## arg); \
  60. } while (0)
  61. /*
  62. * em28xx_read_reg_req()
  63. * reads data from the usb device specifying bRequest
  64. */
  65. int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
  66. char *buf, int len)
  67. {
  68. int ret;
  69. struct usb_device *udev = interface_to_usbdev(dev->intf);
  70. int pipe = usb_rcvctrlpipe(udev, 0);
  71. if (dev->disconnected)
  72. return -ENODEV;
  73. if (len > URB_MAX_CTRL_SIZE)
  74. return -EINVAL;
  75. em28xx_regdbg("(pipe 0x%08x): IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
  76. pipe, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  77. req, 0, 0,
  78. reg & 0xff, reg >> 8,
  79. len & 0xff, len >> 8);
  80. mutex_lock(&dev->ctrl_urb_lock);
  81. ret = usb_control_msg(udev, pipe, req,
  82. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  83. 0x0000, reg, dev->urb_buf, len, HZ);
  84. if (ret < 0) {
  85. em28xx_regdbg("(pipe 0x%08x): IN: %02x %02x %02x %02x %02x %02x %02x %02x failed\n",
  86. pipe, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  87. req, 0, 0,
  88. reg & 0xff, reg >> 8,
  89. len & 0xff, len >> 8);
  90. mutex_unlock(&dev->ctrl_urb_lock);
  91. return usb_translate_errors(ret);
  92. }
  93. if (len)
  94. memcpy(buf, dev->urb_buf, len);
  95. mutex_unlock(&dev->ctrl_urb_lock);
  96. em28xx_regdbg("(pipe 0x%08x): IN: %02x %02x %02x %02x %02x %02x %02x %02x failed <<< %*ph\n",
  97. pipe, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  98. req, 0, 0,
  99. reg & 0xff, reg >> 8,
  100. len & 0xff, len >> 8, len, buf);
  101. return ret;
  102. }
  103. /*
  104. * em28xx_read_reg_req()
  105. * reads data from the usb device specifying bRequest
  106. */
  107. int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
  108. {
  109. int ret;
  110. u8 val;
  111. ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
  112. if (ret < 0)
  113. return ret;
  114. return val;
  115. }
  116. int em28xx_read_reg(struct em28xx *dev, u16 reg)
  117. {
  118. return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
  119. }
  120. EXPORT_SYMBOL_GPL(em28xx_read_reg);
  121. /*
  122. * em28xx_write_regs_req()
  123. * sends data to the usb device, specifying bRequest
  124. */
  125. int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
  126. int len)
  127. {
  128. int ret;
  129. struct usb_device *udev = interface_to_usbdev(dev->intf);
  130. int pipe = usb_sndctrlpipe(udev, 0);
  131. if (dev->disconnected)
  132. return -ENODEV;
  133. if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
  134. return -EINVAL;
  135. em28xx_regdbg("(pipe 0x%08x): OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>> %*ph\n",
  136. pipe,
  137. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  138. req, 0, 0,
  139. reg & 0xff, reg >> 8,
  140. len & 0xff, len >> 8, len, buf);
  141. mutex_lock(&dev->ctrl_urb_lock);
  142. memcpy(dev->urb_buf, buf, len);
  143. ret = usb_control_msg(udev, pipe, req,
  144. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  145. 0x0000, reg, dev->urb_buf, len, HZ);
  146. mutex_unlock(&dev->ctrl_urb_lock);
  147. if (ret < 0)
  148. return usb_translate_errors(ret);
  149. if (dev->wait_after_write)
  150. msleep(dev->wait_after_write);
  151. return ret;
  152. }
  153. int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
  154. {
  155. return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
  156. }
  157. EXPORT_SYMBOL_GPL(em28xx_write_regs);
  158. /* Write a single register */
  159. int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
  160. {
  161. return em28xx_write_regs(dev, reg, &val, 1);
  162. }
  163. EXPORT_SYMBOL_GPL(em28xx_write_reg);
  164. /*
  165. * em28xx_write_reg_bits()
  166. * sets only some bits (specified by bitmask) of a register, by first reading
  167. * the actual value
  168. */
  169. int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
  170. u8 bitmask)
  171. {
  172. int oldval;
  173. u8 newval;
  174. oldval = em28xx_read_reg(dev, reg);
  175. if (oldval < 0)
  176. return oldval;
  177. newval = (((u8)oldval) & ~bitmask) | (val & bitmask);
  178. return em28xx_write_regs(dev, reg, &newval, 1);
  179. }
  180. EXPORT_SYMBOL_GPL(em28xx_write_reg_bits);
  181. /*
  182. * em28xx_toggle_reg_bits()
  183. * toggles/inverts the bits (specified by bitmask) of a register
  184. */
  185. int em28xx_toggle_reg_bits(struct em28xx *dev, u16 reg, u8 bitmask)
  186. {
  187. int oldval;
  188. u8 newval;
  189. oldval = em28xx_read_reg(dev, reg);
  190. if (oldval < 0)
  191. return oldval;
  192. newval = (~oldval & bitmask) | (oldval & ~bitmask);
  193. return em28xx_write_reg(dev, reg, newval);
  194. }
  195. EXPORT_SYMBOL_GPL(em28xx_toggle_reg_bits);
  196. /*
  197. * em28xx_is_ac97_ready()
  198. * Checks if ac97 is ready
  199. */
  200. static int em28xx_is_ac97_ready(struct em28xx *dev)
  201. {
  202. unsigned long timeout = jiffies + msecs_to_jiffies(EM28XX_AC97_XFER_TIMEOUT);
  203. int ret;
  204. /* Wait up to 50 ms for AC97 command to complete */
  205. while (time_is_after_jiffies(timeout)) {
  206. ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
  207. if (ret < 0)
  208. return ret;
  209. if (!(ret & 0x01))
  210. return 0;
  211. msleep(5);
  212. }
  213. dev_warn(&dev->intf->dev,
  214. "AC97 command still being executed: not handled properly!\n");
  215. return -EBUSY;
  216. }
  217. /*
  218. * em28xx_read_ac97()
  219. * write a 16 bit value to the specified AC97 address (LSB first!)
  220. */
  221. int em28xx_read_ac97(struct em28xx *dev, u8 reg)
  222. {
  223. int ret;
  224. u8 addr = (reg & 0x7f) | 0x80;
  225. __le16 val;
  226. ret = em28xx_is_ac97_ready(dev);
  227. if (ret < 0)
  228. return ret;
  229. ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
  230. if (ret < 0)
  231. return ret;
  232. ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
  233. (u8 *)&val, sizeof(val));
  234. if (ret < 0)
  235. return ret;
  236. return le16_to_cpu(val);
  237. }
  238. EXPORT_SYMBOL_GPL(em28xx_read_ac97);
  239. /*
  240. * em28xx_write_ac97()
  241. * write a 16 bit value to the specified AC97 address (LSB first!)
  242. */
  243. int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
  244. {
  245. int ret;
  246. u8 addr = reg & 0x7f;
  247. __le16 value;
  248. value = cpu_to_le16(val);
  249. ret = em28xx_is_ac97_ready(dev);
  250. if (ret < 0)
  251. return ret;
  252. ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *)&value, 2);
  253. if (ret < 0)
  254. return ret;
  255. ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
  256. if (ret < 0)
  257. return ret;
  258. return 0;
  259. }
  260. EXPORT_SYMBOL_GPL(em28xx_write_ac97);
  261. struct em28xx_vol_itable {
  262. enum em28xx_amux mux;
  263. u8 reg;
  264. };
  265. static struct em28xx_vol_itable inputs[] = {
  266. { EM28XX_AMUX_VIDEO, AC97_VIDEO },
  267. { EM28XX_AMUX_LINE_IN, AC97_LINE },
  268. { EM28XX_AMUX_PHONE, AC97_PHONE },
  269. { EM28XX_AMUX_MIC, AC97_MIC },
  270. { EM28XX_AMUX_CD, AC97_CD },
  271. { EM28XX_AMUX_AUX, AC97_AUX },
  272. { EM28XX_AMUX_PCM_OUT, AC97_PCM },
  273. };
  274. static int set_ac97_input(struct em28xx *dev)
  275. {
  276. int ret, i;
  277. enum em28xx_amux amux = dev->ctl_ainput;
  278. /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
  279. em28xx should point to LINE IN, while AC97 should use VIDEO
  280. */
  281. if (amux == EM28XX_AMUX_VIDEO2)
  282. amux = EM28XX_AMUX_VIDEO;
  283. /* Mute all entres but the one that were selected */
  284. for (i = 0; i < ARRAY_SIZE(inputs); i++) {
  285. if (amux == inputs[i].mux)
  286. ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
  287. else
  288. ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
  289. if (ret < 0)
  290. dev_warn(&dev->intf->dev,
  291. "couldn't setup AC97 register %d\n",
  292. inputs[i].reg);
  293. }
  294. return 0;
  295. }
  296. static int em28xx_set_audio_source(struct em28xx *dev)
  297. {
  298. int ret;
  299. u8 input;
  300. if (dev->board.is_em2800) {
  301. if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
  302. input = EM2800_AUDIO_SRC_TUNER;
  303. else
  304. input = EM2800_AUDIO_SRC_LINE;
  305. ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
  306. if (ret < 0)
  307. return ret;
  308. }
  309. if (dev->board.has_msp34xx)
  310. input = EM28XX_AUDIO_SRC_TUNER;
  311. else {
  312. switch (dev->ctl_ainput) {
  313. case EM28XX_AMUX_VIDEO:
  314. input = EM28XX_AUDIO_SRC_TUNER;
  315. break;
  316. default:
  317. input = EM28XX_AUDIO_SRC_LINE;
  318. break;
  319. }
  320. }
  321. if (dev->board.mute_gpio && dev->mute)
  322. em28xx_gpio_set(dev, dev->board.mute_gpio);
  323. else
  324. em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
  325. ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
  326. if (ret < 0)
  327. return ret;
  328. msleep(5);
  329. switch (dev->audio_mode.ac97) {
  330. case EM28XX_NO_AC97:
  331. break;
  332. default:
  333. ret = set_ac97_input(dev);
  334. }
  335. return ret;
  336. }
  337. struct em28xx_vol_otable {
  338. enum em28xx_aout mux;
  339. u8 reg;
  340. };
  341. static const struct em28xx_vol_otable outputs[] = {
  342. { EM28XX_AOUT_MASTER, AC97_MASTER },
  343. { EM28XX_AOUT_LINE, AC97_HEADPHONE },
  344. { EM28XX_AOUT_MONO, AC97_MASTER_MONO },
  345. { EM28XX_AOUT_LFE, AC97_CENTER_LFE_MASTER },
  346. { EM28XX_AOUT_SURR, AC97_SURROUND_MASTER },
  347. };
  348. int em28xx_audio_analog_set(struct em28xx *dev)
  349. {
  350. int ret, i;
  351. u8 xclk;
  352. if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE)
  353. return 0;
  354. /* It is assumed that all devices use master volume for output.
  355. It would be possible to use also line output.
  356. */
  357. if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
  358. /* Mute all outputs */
  359. for (i = 0; i < ARRAY_SIZE(outputs); i++) {
  360. ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
  361. if (ret < 0)
  362. dev_warn(&dev->intf->dev,
  363. "couldn't setup AC97 register %d\n",
  364. outputs[i].reg);
  365. }
  366. }
  367. xclk = dev->board.xclk & 0x7f;
  368. if (!dev->mute)
  369. xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
  370. ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
  371. if (ret < 0)
  372. return ret;
  373. msleep(10);
  374. /* Selects the proper audio input */
  375. ret = em28xx_set_audio_source(dev);
  376. /* Sets volume */
  377. if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
  378. int vol;
  379. em28xx_write_ac97(dev, AC97_POWERDOWN, 0x4200);
  380. em28xx_write_ac97(dev, AC97_EXTENDED_STATUS, 0x0031);
  381. em28xx_write_ac97(dev, AC97_PCM_LR_ADC_RATE, 0xbb80);
  382. /* LSB: left channel - both channels with the same level */
  383. vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
  384. /* Mute device, if needed */
  385. if (dev->mute)
  386. vol |= 0x8000;
  387. /* Sets volume */
  388. for (i = 0; i < ARRAY_SIZE(outputs); i++) {
  389. if (dev->ctl_aoutput & outputs[i].mux)
  390. ret = em28xx_write_ac97(dev, outputs[i].reg,
  391. vol);
  392. if (ret < 0)
  393. dev_warn(&dev->intf->dev,
  394. "couldn't setup AC97 register %d\n",
  395. outputs[i].reg);
  396. }
  397. if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
  398. int sel = ac97_return_record_select(dev->ctl_aoutput);
  399. /* Use the same input for both left and right
  400. channels */
  401. sel |= (sel << 8);
  402. em28xx_write_ac97(dev, AC97_REC_SEL, sel);
  403. }
  404. }
  405. return ret;
  406. }
  407. EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
  408. int em28xx_audio_setup(struct em28xx *dev)
  409. {
  410. int vid1, vid2, feat, cfg;
  411. u32 vid = 0;
  412. u8 i2s_samplerates;
  413. if (dev->chip_id == CHIP_ID_EM2870 ||
  414. dev->chip_id == CHIP_ID_EM2874 ||
  415. dev->chip_id == CHIP_ID_EM28174 ||
  416. dev->chip_id == CHIP_ID_EM28178) {
  417. /* Digital only device - don't load any alsa module */
  418. dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
  419. dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
  420. return 0;
  421. }
  422. /* See how this device is configured */
  423. cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
  424. dev_info(&dev->intf->dev, "Config register raw data: 0x%02x\n", cfg);
  425. if (cfg < 0) { /* Register read error */
  426. /* Be conservative */
  427. dev->int_audio_type = EM28XX_INT_AUDIO_AC97;
  428. } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
  429. /* The device doesn't have vendor audio at all */
  430. dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
  431. dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
  432. return 0;
  433. } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
  434. dev->int_audio_type = EM28XX_INT_AUDIO_I2S;
  435. if (dev->chip_id < CHIP_ID_EM2860 &&
  436. (cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
  437. EM2820_CHIPCFG_I2S_1_SAMPRATE)
  438. i2s_samplerates = 1;
  439. else if (dev->chip_id >= CHIP_ID_EM2860 &&
  440. (cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
  441. EM2860_CHIPCFG_I2S_5_SAMPRATES)
  442. i2s_samplerates = 5;
  443. else
  444. i2s_samplerates = 3;
  445. dev_info(&dev->intf->dev, "I2S Audio (%d sample rate(s))\n",
  446. i2s_samplerates);
  447. /* Skip the code that does AC97 vendor detection */
  448. dev->audio_mode.ac97 = EM28XX_NO_AC97;
  449. goto init_audio;
  450. } else {
  451. dev->int_audio_type = EM28XX_INT_AUDIO_AC97;
  452. }
  453. dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
  454. vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
  455. if (vid1 < 0) {
  456. /*
  457. * Device likely doesn't support AC97
  458. * Note: (some) em2800 devices without eeprom reports 0x91 on
  459. * CHIPCFG register, even not having an AC97 chip
  460. */
  461. dev_warn(&dev->intf->dev,
  462. "AC97 chip type couldn't be determined\n");
  463. dev->audio_mode.ac97 = EM28XX_NO_AC97;
  464. if (dev->usb_audio_type == EM28XX_USB_AUDIO_VENDOR)
  465. dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
  466. dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
  467. goto init_audio;
  468. }
  469. vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
  470. if (vid2 < 0)
  471. goto init_audio;
  472. vid = vid1 << 16 | vid2;
  473. dev_warn(&dev->intf->dev, "AC97 vendor ID = 0x%08x\n", vid);
  474. feat = em28xx_read_ac97(dev, AC97_RESET);
  475. if (feat < 0)
  476. goto init_audio;
  477. dev_warn(&dev->intf->dev, "AC97 features = 0x%04x\n", feat);
  478. /* Try to identify what audio processor we have */
  479. if (((vid == 0xffffffff) || (vid == 0x83847650)) && (feat == 0x6a90))
  480. dev->audio_mode.ac97 = EM28XX_AC97_EM202;
  481. else if ((vid >> 8) == 0x838476)
  482. dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
  483. init_audio:
  484. /* Reports detected AC97 processor */
  485. switch (dev->audio_mode.ac97) {
  486. case EM28XX_NO_AC97:
  487. dev_info(&dev->intf->dev, "No AC97 audio processor\n");
  488. break;
  489. case EM28XX_AC97_EM202:
  490. dev_info(&dev->intf->dev,
  491. "Empia 202 AC97 audio processor detected\n");
  492. break;
  493. case EM28XX_AC97_SIGMATEL:
  494. dev_info(&dev->intf->dev,
  495. "Sigmatel audio processor detected (stac 97%02x)\n",
  496. vid & 0xff);
  497. break;
  498. case EM28XX_AC97_OTHER:
  499. dev_warn(&dev->intf->dev,
  500. "Unknown AC97 audio processor detected!\n");
  501. break;
  502. default:
  503. break;
  504. }
  505. return em28xx_audio_analog_set(dev);
  506. }
  507. EXPORT_SYMBOL_GPL(em28xx_audio_setup);
  508. const struct em28xx_led *em28xx_find_led(struct em28xx *dev,
  509. enum em28xx_led_role role)
  510. {
  511. if (dev->board.leds) {
  512. u8 k = 0;
  513. while (dev->board.leds[k].role >= 0 &&
  514. dev->board.leds[k].role < EM28XX_NUM_LED_ROLES) {
  515. if (dev->board.leds[k].role == role)
  516. return &dev->board.leds[k];
  517. k++;
  518. }
  519. }
  520. return NULL;
  521. }
  522. EXPORT_SYMBOL_GPL(em28xx_find_led);
  523. int em28xx_capture_start(struct em28xx *dev, int start)
  524. {
  525. int rc;
  526. const struct em28xx_led *led = NULL;
  527. if (dev->chip_id == CHIP_ID_EM2874 ||
  528. dev->chip_id == CHIP_ID_EM2884 ||
  529. dev->chip_id == CHIP_ID_EM28174 ||
  530. dev->chip_id == CHIP_ID_EM28178) {
  531. /* The Transport Stream Enable Register moved in em2874 */
  532. rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
  533. start ?
  534. EM2874_TS1_CAPTURE_ENABLE : 0x00,
  535. EM2874_TS1_CAPTURE_ENABLE);
  536. } else {
  537. /* FIXME: which is the best order? */
  538. /* video registers are sampled by VREF */
  539. rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
  540. start ? 0x10 : 0x00, 0x10);
  541. if (rc < 0)
  542. return rc;
  543. if (start) {
  544. if (dev->board.is_webcam)
  545. rc = em28xx_write_reg(dev, 0x13, 0x0c);
  546. /* Enable video capture */
  547. rc = em28xx_write_reg(dev, 0x48, 0x00);
  548. if (rc < 0)
  549. return rc;
  550. if (dev->mode == EM28XX_ANALOG_MODE)
  551. rc = em28xx_write_reg(dev,
  552. EM28XX_R12_VINENABLE,
  553. 0x67);
  554. else
  555. rc = em28xx_write_reg(dev,
  556. EM28XX_R12_VINENABLE,
  557. 0x37);
  558. if (rc < 0)
  559. return rc;
  560. msleep(6);
  561. } else {
  562. /* disable video capture */
  563. rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
  564. }
  565. }
  566. if (dev->mode == EM28XX_ANALOG_MODE)
  567. led = em28xx_find_led(dev, EM28XX_LED_ANALOG_CAPTURING);
  568. else
  569. led = em28xx_find_led(dev, EM28XX_LED_DIGITAL_CAPTURING);
  570. if (led)
  571. em28xx_write_reg_bits(dev, led->gpio_reg,
  572. (!start ^ led->inverted) ?
  573. ~led->gpio_mask : led->gpio_mask,
  574. led->gpio_mask);
  575. return rc;
  576. }
  577. int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
  578. {
  579. int rc = 0;
  580. if (!gpio)
  581. return rc;
  582. if (dev->mode != EM28XX_SUSPEND) {
  583. em28xx_write_reg(dev, 0x48, 0x00);
  584. if (dev->mode == EM28XX_ANALOG_MODE)
  585. em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
  586. else
  587. em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
  588. msleep(6);
  589. }
  590. /* Send GPIO reset sequences specified at board entry */
  591. while (gpio->sleep >= 0) {
  592. if (gpio->reg >= 0) {
  593. rc = em28xx_write_reg_bits(dev,
  594. gpio->reg,
  595. gpio->val,
  596. gpio->mask);
  597. if (rc < 0)
  598. return rc;
  599. }
  600. if (gpio->sleep > 0)
  601. msleep(gpio->sleep);
  602. gpio++;
  603. }
  604. return rc;
  605. }
  606. EXPORT_SYMBOL_GPL(em28xx_gpio_set);
  607. int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
  608. {
  609. if (dev->mode == set_mode)
  610. return 0;
  611. if (set_mode == EM28XX_SUSPEND) {
  612. dev->mode = set_mode;
  613. /* FIXME: add suspend support for ac97 */
  614. return em28xx_gpio_set(dev, dev->board.suspend_gpio);
  615. }
  616. dev->mode = set_mode;
  617. if (dev->mode == EM28XX_DIGITAL_MODE)
  618. return em28xx_gpio_set(dev, dev->board.dvb_gpio);
  619. else
  620. return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
  621. }
  622. EXPORT_SYMBOL_GPL(em28xx_set_mode);
  623. /* ------------------------------------------------------------------
  624. URB control
  625. ------------------------------------------------------------------*/
  626. /*
  627. * URB completion handler for isoc/bulk transfers
  628. */
  629. static void em28xx_irq_callback(struct urb *urb)
  630. {
  631. struct em28xx *dev = urb->context;
  632. int i;
  633. switch (urb->status) {
  634. case 0: /* success */
  635. case -ETIMEDOUT: /* NAK */
  636. break;
  637. case -ECONNRESET: /* kill */
  638. case -ENOENT:
  639. case -ESHUTDOWN:
  640. return;
  641. default: /* error */
  642. em28xx_isocdbg("urb completition error %d.\n", urb->status);
  643. break;
  644. }
  645. /* Copy data from URB */
  646. spin_lock(&dev->slock);
  647. dev->usb_ctl.urb_data_copy(dev, urb);
  648. spin_unlock(&dev->slock);
  649. /* Reset urb buffers */
  650. for (i = 0; i < urb->number_of_packets; i++) {
  651. /* isoc only (bulk: number_of_packets = 0) */
  652. urb->iso_frame_desc[i].status = 0;
  653. urb->iso_frame_desc[i].actual_length = 0;
  654. }
  655. urb->status = 0;
  656. urb->status = usb_submit_urb(urb, GFP_ATOMIC);
  657. if (urb->status) {
  658. em28xx_isocdbg("urb resubmit failed (error=%i)\n",
  659. urb->status);
  660. }
  661. }
  662. /*
  663. * Stop and Deallocate URBs
  664. */
  665. void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode)
  666. {
  667. struct urb *urb;
  668. struct em28xx_usb_bufs *usb_bufs;
  669. struct usb_device *udev = interface_to_usbdev(dev->intf);
  670. int i;
  671. em28xx_isocdbg("em28xx: called em28xx_uninit_usb_xfer in mode %d\n",
  672. mode);
  673. if (mode == EM28XX_DIGITAL_MODE)
  674. usb_bufs = &dev->usb_ctl.digital_bufs;
  675. else
  676. usb_bufs = &dev->usb_ctl.analog_bufs;
  677. for (i = 0; i < usb_bufs->num_bufs; i++) {
  678. urb = usb_bufs->urb[i];
  679. if (urb) {
  680. if (!irqs_disabled())
  681. usb_kill_urb(urb);
  682. else
  683. usb_unlink_urb(urb);
  684. if (usb_bufs->transfer_buffer[i]) {
  685. usb_free_coherent(udev,
  686. urb->transfer_buffer_length,
  687. usb_bufs->transfer_buffer[i],
  688. urb->transfer_dma);
  689. }
  690. usb_free_urb(urb);
  691. usb_bufs->urb[i] = NULL;
  692. }
  693. usb_bufs->transfer_buffer[i] = NULL;
  694. }
  695. kfree(usb_bufs->urb);
  696. kfree(usb_bufs->transfer_buffer);
  697. usb_bufs->urb = NULL;
  698. usb_bufs->transfer_buffer = NULL;
  699. usb_bufs->num_bufs = 0;
  700. em28xx_capture_start(dev, 0);
  701. }
  702. EXPORT_SYMBOL_GPL(em28xx_uninit_usb_xfer);
  703. /*
  704. * Stop URBs
  705. */
  706. void em28xx_stop_urbs(struct em28xx *dev)
  707. {
  708. int i;
  709. struct urb *urb;
  710. struct em28xx_usb_bufs *isoc_bufs = &dev->usb_ctl.digital_bufs;
  711. em28xx_isocdbg("em28xx: called em28xx_stop_urbs\n");
  712. for (i = 0; i < isoc_bufs->num_bufs; i++) {
  713. urb = isoc_bufs->urb[i];
  714. if (urb) {
  715. if (!irqs_disabled())
  716. usb_kill_urb(urb);
  717. else
  718. usb_unlink_urb(urb);
  719. }
  720. }
  721. em28xx_capture_start(dev, 0);
  722. }
  723. EXPORT_SYMBOL_GPL(em28xx_stop_urbs);
  724. /*
  725. * Allocate URBs
  726. */
  727. int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk,
  728. int num_bufs, int max_pkt_size, int packet_multiplier)
  729. {
  730. struct em28xx_usb_bufs *usb_bufs;
  731. struct urb *urb;
  732. struct usb_device *udev = interface_to_usbdev(dev->intf);
  733. int i;
  734. int sb_size, pipe;
  735. int j, k;
  736. em28xx_isocdbg("em28xx: called em28xx_alloc_isoc in mode %d\n", mode);
  737. /* Check mode and if we have an endpoint for the selected
  738. transfer type, select buffer */
  739. if (mode == EM28XX_DIGITAL_MODE) {
  740. if ((xfer_bulk && !dev->dvb_ep_bulk) ||
  741. (!xfer_bulk && !dev->dvb_ep_isoc)) {
  742. dev_err(&dev->intf->dev,
  743. "no endpoint for DVB mode and transfer type %d\n",
  744. xfer_bulk > 0);
  745. return -EINVAL;
  746. }
  747. usb_bufs = &dev->usb_ctl.digital_bufs;
  748. } else if (mode == EM28XX_ANALOG_MODE) {
  749. if ((xfer_bulk && !dev->analog_ep_bulk) ||
  750. (!xfer_bulk && !dev->analog_ep_isoc)) {
  751. dev_err(&dev->intf->dev,
  752. "no endpoint for analog mode and transfer type %d\n",
  753. xfer_bulk > 0);
  754. return -EINVAL;
  755. }
  756. usb_bufs = &dev->usb_ctl.analog_bufs;
  757. } else {
  758. dev_err(&dev->intf->dev, "invalid mode selected\n");
  759. return -EINVAL;
  760. }
  761. /* De-allocates all pending stuff */
  762. em28xx_uninit_usb_xfer(dev, mode);
  763. usb_bufs->num_bufs = num_bufs;
  764. usb_bufs->urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
  765. if (!usb_bufs->urb)
  766. return -ENOMEM;
  767. usb_bufs->transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
  768. GFP_KERNEL);
  769. if (!usb_bufs->transfer_buffer) {
  770. kfree(usb_bufs->urb);
  771. return -ENOMEM;
  772. }
  773. usb_bufs->max_pkt_size = max_pkt_size;
  774. if (xfer_bulk)
  775. usb_bufs->num_packets = 0;
  776. else
  777. usb_bufs->num_packets = packet_multiplier;
  778. dev->usb_ctl.vid_buf = NULL;
  779. dev->usb_ctl.vbi_buf = NULL;
  780. sb_size = packet_multiplier * usb_bufs->max_pkt_size;
  781. /* allocate urbs and transfer buffers */
  782. for (i = 0; i < usb_bufs->num_bufs; i++) {
  783. urb = usb_alloc_urb(usb_bufs->num_packets, GFP_KERNEL);
  784. if (!urb) {
  785. em28xx_uninit_usb_xfer(dev, mode);
  786. return -ENOMEM;
  787. }
  788. usb_bufs->urb[i] = urb;
  789. usb_bufs->transfer_buffer[i] = usb_alloc_coherent(udev,
  790. sb_size, GFP_KERNEL, &urb->transfer_dma);
  791. if (!usb_bufs->transfer_buffer[i]) {
  792. dev_err(&dev->intf->dev,
  793. "unable to allocate %i bytes for transfer buffer %i%s\n",
  794. sb_size, i,
  795. in_interrupt() ? " while in int" : "");
  796. em28xx_uninit_usb_xfer(dev, mode);
  797. return -ENOMEM;
  798. }
  799. memset(usb_bufs->transfer_buffer[i], 0, sb_size);
  800. if (xfer_bulk) { /* bulk */
  801. pipe = usb_rcvbulkpipe(udev,
  802. mode == EM28XX_ANALOG_MODE ?
  803. dev->analog_ep_bulk :
  804. dev->dvb_ep_bulk);
  805. usb_fill_bulk_urb(urb, udev, pipe,
  806. usb_bufs->transfer_buffer[i], sb_size,
  807. em28xx_irq_callback, dev);
  808. urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
  809. } else { /* isoc */
  810. pipe = usb_rcvisocpipe(udev,
  811. mode == EM28XX_ANALOG_MODE ?
  812. dev->analog_ep_isoc :
  813. dev->dvb_ep_isoc);
  814. usb_fill_int_urb(urb, udev, pipe,
  815. usb_bufs->transfer_buffer[i], sb_size,
  816. em28xx_irq_callback, dev, 1);
  817. urb->transfer_flags = URB_ISO_ASAP |
  818. URB_NO_TRANSFER_DMA_MAP;
  819. k = 0;
  820. for (j = 0; j < usb_bufs->num_packets; j++) {
  821. urb->iso_frame_desc[j].offset = k;
  822. urb->iso_frame_desc[j].length =
  823. usb_bufs->max_pkt_size;
  824. k += usb_bufs->max_pkt_size;
  825. }
  826. }
  827. urb->number_of_packets = usb_bufs->num_packets;
  828. }
  829. return 0;
  830. }
  831. EXPORT_SYMBOL_GPL(em28xx_alloc_urbs);
  832. /*
  833. * Allocate URBs and start IRQ
  834. */
  835. int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode,
  836. int xfer_bulk, int num_bufs, int max_pkt_size,
  837. int packet_multiplier,
  838. int (*urb_data_copy)(struct em28xx *dev, struct urb *urb))
  839. {
  840. struct em28xx_dmaqueue *dma_q = &dev->vidq;
  841. struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
  842. struct em28xx_usb_bufs *usb_bufs;
  843. struct usb_device *udev = interface_to_usbdev(dev->intf);
  844. int i;
  845. int rc;
  846. int alloc;
  847. em28xx_isocdbg("em28xx: called em28xx_init_usb_xfer in mode %d\n",
  848. mode);
  849. dev->usb_ctl.urb_data_copy = urb_data_copy;
  850. if (mode == EM28XX_DIGITAL_MODE) {
  851. usb_bufs = &dev->usb_ctl.digital_bufs;
  852. /* no need to free/alloc usb buffers in digital mode */
  853. alloc = 0;
  854. } else {
  855. usb_bufs = &dev->usb_ctl.analog_bufs;
  856. alloc = 1;
  857. }
  858. if (alloc) {
  859. rc = em28xx_alloc_urbs(dev, mode, xfer_bulk, num_bufs,
  860. max_pkt_size, packet_multiplier);
  861. if (rc)
  862. return rc;
  863. }
  864. if (xfer_bulk) {
  865. rc = usb_clear_halt(udev, usb_bufs->urb[0]->pipe);
  866. if (rc < 0) {
  867. dev_err(&dev->intf->dev,
  868. "failed to clear USB bulk endpoint stall/halt condition (error=%i)\n",
  869. rc);
  870. em28xx_uninit_usb_xfer(dev, mode);
  871. return rc;
  872. }
  873. }
  874. init_waitqueue_head(&dma_q->wq);
  875. init_waitqueue_head(&vbi_dma_q->wq);
  876. em28xx_capture_start(dev, 1);
  877. /* submit urbs and enables IRQ */
  878. for (i = 0; i < usb_bufs->num_bufs; i++) {
  879. rc = usb_submit_urb(usb_bufs->urb[i], GFP_ATOMIC);
  880. if (rc) {
  881. dev_err(&dev->intf->dev,
  882. "submit of urb %i failed (error=%i)\n", i, rc);
  883. em28xx_uninit_usb_xfer(dev, mode);
  884. return rc;
  885. }
  886. }
  887. return 0;
  888. }
  889. EXPORT_SYMBOL_GPL(em28xx_init_usb_xfer);
  890. /*
  891. * Device control list
  892. */
  893. static LIST_HEAD(em28xx_devlist);
  894. static DEFINE_MUTEX(em28xx_devlist_mutex);
  895. /*
  896. * Extension interface
  897. */
  898. static LIST_HEAD(em28xx_extension_devlist);
  899. int em28xx_register_extension(struct em28xx_ops *ops)
  900. {
  901. struct em28xx *dev = NULL;
  902. mutex_lock(&em28xx_devlist_mutex);
  903. list_add_tail(&ops->next, &em28xx_extension_devlist);
  904. list_for_each_entry(dev, &em28xx_devlist, devlist) {
  905. ops->init(dev);
  906. }
  907. mutex_unlock(&em28xx_devlist_mutex);
  908. pr_info("em28xx: Registered (%s) extension\n", ops->name);
  909. return 0;
  910. }
  911. EXPORT_SYMBOL(em28xx_register_extension);
  912. void em28xx_unregister_extension(struct em28xx_ops *ops)
  913. {
  914. struct em28xx *dev = NULL;
  915. mutex_lock(&em28xx_devlist_mutex);
  916. list_for_each_entry(dev, &em28xx_devlist, devlist) {
  917. ops->fini(dev);
  918. }
  919. list_del(&ops->next);
  920. mutex_unlock(&em28xx_devlist_mutex);
  921. pr_info("em28xx: Removed (%s) extension\n", ops->name);
  922. }
  923. EXPORT_SYMBOL(em28xx_unregister_extension);
  924. void em28xx_init_extension(struct em28xx *dev)
  925. {
  926. const struct em28xx_ops *ops = NULL;
  927. mutex_lock(&em28xx_devlist_mutex);
  928. list_add_tail(&dev->devlist, &em28xx_devlist);
  929. list_for_each_entry(ops, &em28xx_extension_devlist, next) {
  930. if (ops->init)
  931. ops->init(dev);
  932. }
  933. mutex_unlock(&em28xx_devlist_mutex);
  934. }
  935. void em28xx_close_extension(struct em28xx *dev)
  936. {
  937. const struct em28xx_ops *ops = NULL;
  938. mutex_lock(&em28xx_devlist_mutex);
  939. list_for_each_entry(ops, &em28xx_extension_devlist, next) {
  940. if (ops->fini)
  941. ops->fini(dev);
  942. }
  943. list_del(&dev->devlist);
  944. mutex_unlock(&em28xx_devlist_mutex);
  945. }
  946. int em28xx_suspend_extension(struct em28xx *dev)
  947. {
  948. const struct em28xx_ops *ops = NULL;
  949. dev_info(&dev->intf->dev, "Suspending extensions\n");
  950. mutex_lock(&em28xx_devlist_mutex);
  951. list_for_each_entry(ops, &em28xx_extension_devlist, next) {
  952. if (ops->suspend)
  953. ops->suspend(dev);
  954. }
  955. mutex_unlock(&em28xx_devlist_mutex);
  956. return 0;
  957. }
  958. int em28xx_resume_extension(struct em28xx *dev)
  959. {
  960. const struct em28xx_ops *ops = NULL;
  961. dev_info(&dev->intf->dev, "Resuming extensions\n");
  962. mutex_lock(&em28xx_devlist_mutex);
  963. list_for_each_entry(ops, &em28xx_extension_devlist, next) {
  964. if (ops->resume)
  965. ops->resume(dev);
  966. }
  967. mutex_unlock(&em28xx_devlist_mutex);
  968. return 0;
  969. }