ite-cir.c 46 KB

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  1. /*
  2. * Driver for ITE Tech Inc. IT8712F/IT8512 CIR
  3. *
  4. * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation; either version 2 of the
  9. * License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
  19. * USA.
  20. *
  21. * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the
  22. * skeleton provided by the nuvoton-cir driver.
  23. *
  24. * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues
  25. * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus
  26. * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards
  27. * <jimbo-lirc@edwardsclan.net>.
  28. *
  29. * The lirc_ite8709 driver was written by Grégory Lardière
  30. * <spmf2004-lirc@yahoo.fr> in 2008.
  31. */
  32. #include <linux/kernel.h>
  33. #include <linux/module.h>
  34. #include <linux/pnp.h>
  35. #include <linux/io.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/sched.h>
  38. #include <linux/delay.h>
  39. #include <linux/slab.h>
  40. #include <linux/input.h>
  41. #include <linux/bitops.h>
  42. #include <media/rc-core.h>
  43. #include <linux/pci_ids.h>
  44. #include "ite-cir.h"
  45. /* module parameters */
  46. /* debug level */
  47. static int debug;
  48. module_param(debug, int, S_IRUGO | S_IWUSR);
  49. MODULE_PARM_DESC(debug, "Enable debugging output");
  50. /* low limit for RX carrier freq, Hz, 0 for no RX demodulation */
  51. static int rx_low_carrier_freq;
  52. module_param(rx_low_carrier_freq, int, S_IRUGO | S_IWUSR);
  53. MODULE_PARM_DESC(rx_low_carrier_freq, "Override low RX carrier frequency, Hz, 0 for no RX demodulation");
  54. /* high limit for RX carrier freq, Hz, 0 for no RX demodulation */
  55. static int rx_high_carrier_freq;
  56. module_param(rx_high_carrier_freq, int, S_IRUGO | S_IWUSR);
  57. MODULE_PARM_DESC(rx_high_carrier_freq, "Override high RX carrier frequency, Hz, 0 for no RX demodulation");
  58. /* override tx carrier frequency */
  59. static int tx_carrier_freq;
  60. module_param(tx_carrier_freq, int, S_IRUGO | S_IWUSR);
  61. MODULE_PARM_DESC(tx_carrier_freq, "Override TX carrier frequency, Hz");
  62. /* override tx duty cycle */
  63. static int tx_duty_cycle;
  64. module_param(tx_duty_cycle, int, S_IRUGO | S_IWUSR);
  65. MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100");
  66. /* override default sample period */
  67. static long sample_period;
  68. module_param(sample_period, long, S_IRUGO | S_IWUSR);
  69. MODULE_PARM_DESC(sample_period, "Override carrier sample period, us");
  70. /* override detected model id */
  71. static int model_number = -1;
  72. module_param(model_number, int, S_IRUGO | S_IWUSR);
  73. MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect");
  74. /* HW-independent code functions */
  75. /* check whether carrier frequency is high frequency */
  76. static inline bool ite_is_high_carrier_freq(unsigned int freq)
  77. {
  78. return freq >= ITE_HCF_MIN_CARRIER_FREQ;
  79. }
  80. /* get the bits required to program the carrier frequency in CFQ bits,
  81. * unshifted */
  82. static u8 ite_get_carrier_freq_bits(unsigned int freq)
  83. {
  84. if (ite_is_high_carrier_freq(freq)) {
  85. if (freq < 425000)
  86. return ITE_CFQ_400;
  87. else if (freq < 465000)
  88. return ITE_CFQ_450;
  89. else if (freq < 490000)
  90. return ITE_CFQ_480;
  91. else
  92. return ITE_CFQ_500;
  93. } else {
  94. /* trim to limits */
  95. if (freq < ITE_LCF_MIN_CARRIER_FREQ)
  96. freq = ITE_LCF_MIN_CARRIER_FREQ;
  97. if (freq > ITE_LCF_MAX_CARRIER_FREQ)
  98. freq = ITE_LCF_MAX_CARRIER_FREQ;
  99. /* convert to kHz and subtract the base freq */
  100. freq =
  101. DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ,
  102. 1000);
  103. return (u8) freq;
  104. }
  105. }
  106. /* get the bits required to program the pulse with in TXMPW */
  107. static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle)
  108. {
  109. unsigned long period_ns, on_ns;
  110. /* sanitize freq into range */
  111. if (freq < ITE_LCF_MIN_CARRIER_FREQ)
  112. freq = ITE_LCF_MIN_CARRIER_FREQ;
  113. if (freq > ITE_HCF_MAX_CARRIER_FREQ)
  114. freq = ITE_HCF_MAX_CARRIER_FREQ;
  115. period_ns = 1000000000UL / freq;
  116. on_ns = period_ns * duty_cycle / 100;
  117. if (ite_is_high_carrier_freq(freq)) {
  118. if (on_ns < 750)
  119. return ITE_TXMPW_A;
  120. else if (on_ns < 850)
  121. return ITE_TXMPW_B;
  122. else if (on_ns < 950)
  123. return ITE_TXMPW_C;
  124. else if (on_ns < 1080)
  125. return ITE_TXMPW_D;
  126. else
  127. return ITE_TXMPW_E;
  128. } else {
  129. if (on_ns < 6500)
  130. return ITE_TXMPW_A;
  131. else if (on_ns < 7850)
  132. return ITE_TXMPW_B;
  133. else if (on_ns < 9650)
  134. return ITE_TXMPW_C;
  135. else if (on_ns < 11950)
  136. return ITE_TXMPW_D;
  137. else
  138. return ITE_TXMPW_E;
  139. }
  140. }
  141. /* decode raw bytes as received by the hardware, and push them to the ir-core
  142. * layer */
  143. static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int
  144. length)
  145. {
  146. u32 sample_period;
  147. unsigned long *ldata;
  148. unsigned int next_one, next_zero, size;
  149. DEFINE_IR_RAW_EVENT(ev);
  150. if (length == 0)
  151. return;
  152. sample_period = dev->params.sample_period;
  153. ldata = (unsigned long *)data;
  154. size = length << 3;
  155. next_one = find_next_bit_le(ldata, size, 0);
  156. if (next_one > 0) {
  157. ev.pulse = true;
  158. ev.duration =
  159. ITE_BITS_TO_NS(next_one, sample_period);
  160. ir_raw_event_store_with_filter(dev->rdev, &ev);
  161. }
  162. while (next_one < size) {
  163. next_zero = find_next_zero_bit_le(ldata, size, next_one + 1);
  164. ev.pulse = false;
  165. ev.duration = ITE_BITS_TO_NS(next_zero - next_one, sample_period);
  166. ir_raw_event_store_with_filter(dev->rdev, &ev);
  167. if (next_zero < size) {
  168. next_one =
  169. find_next_bit_le(ldata,
  170. size,
  171. next_zero + 1);
  172. ev.pulse = true;
  173. ev.duration =
  174. ITE_BITS_TO_NS(next_one - next_zero,
  175. sample_period);
  176. ir_raw_event_store_with_filter
  177. (dev->rdev, &ev);
  178. } else
  179. next_one = size;
  180. }
  181. ir_raw_event_handle(dev->rdev);
  182. ite_dbg_verbose("decoded %d bytes.", length);
  183. }
  184. /* set all the rx/tx carrier parameters; this must be called with the device
  185. * spinlock held */
  186. static void ite_set_carrier_params(struct ite_dev *dev)
  187. {
  188. unsigned int freq, low_freq, high_freq;
  189. int allowance;
  190. bool use_demodulator;
  191. bool for_tx = dev->transmitting;
  192. ite_dbg("%s called", __func__);
  193. if (for_tx) {
  194. /* we don't need no stinking calculations */
  195. freq = dev->params.tx_carrier_freq;
  196. allowance = ITE_RXDCR_DEFAULT;
  197. use_demodulator = false;
  198. } else {
  199. low_freq = dev->params.rx_low_carrier_freq;
  200. high_freq = dev->params.rx_high_carrier_freq;
  201. if (low_freq == 0) {
  202. /* don't demodulate */
  203. freq =
  204. ITE_DEFAULT_CARRIER_FREQ;
  205. allowance = ITE_RXDCR_DEFAULT;
  206. use_demodulator = false;
  207. } else {
  208. /* calculate the middle freq */
  209. freq = (low_freq + high_freq) / 2;
  210. /* calculate the allowance */
  211. allowance =
  212. DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq),
  213. ITE_RXDCR_PER_10000_STEP
  214. * (high_freq + low_freq));
  215. if (allowance < 1)
  216. allowance = 1;
  217. if (allowance > ITE_RXDCR_MAX)
  218. allowance = ITE_RXDCR_MAX;
  219. use_demodulator = true;
  220. }
  221. }
  222. /* set the carrier parameters in a device-dependent way */
  223. dev->params.set_carrier_params(dev, ite_is_high_carrier_freq(freq),
  224. use_demodulator, ite_get_carrier_freq_bits(freq), allowance,
  225. ite_get_pulse_width_bits(freq, dev->params.tx_duty_cycle));
  226. }
  227. /* interrupt service routine for incoming and outgoing CIR data */
  228. static irqreturn_t ite_cir_isr(int irq, void *data)
  229. {
  230. struct ite_dev *dev = data;
  231. unsigned long flags;
  232. irqreturn_t ret = IRQ_RETVAL(IRQ_NONE);
  233. u8 rx_buf[ITE_RX_FIFO_LEN];
  234. int rx_bytes;
  235. int iflags;
  236. ite_dbg_verbose("%s firing", __func__);
  237. /* grab the spinlock */
  238. spin_lock_irqsave(&dev->lock, flags);
  239. /* read the interrupt flags */
  240. iflags = dev->params.get_irq_causes(dev);
  241. /* check for the receive interrupt */
  242. if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) {
  243. /* read the FIFO bytes */
  244. rx_bytes =
  245. dev->params.get_rx_bytes(dev, rx_buf,
  246. ITE_RX_FIFO_LEN);
  247. if (rx_bytes > 0) {
  248. /* drop the spinlock, since the ir-core layer
  249. * may call us back again through
  250. * ite_s_idle() */
  251. spin_unlock_irqrestore(&dev->
  252. lock,
  253. flags);
  254. /* decode the data we've just received */
  255. ite_decode_bytes(dev, rx_buf,
  256. rx_bytes);
  257. /* reacquire the spinlock */
  258. spin_lock_irqsave(&dev->lock,
  259. flags);
  260. /* mark the interrupt as serviced */
  261. ret = IRQ_RETVAL(IRQ_HANDLED);
  262. }
  263. } else if (iflags & ITE_IRQ_TX_FIFO) {
  264. /* FIFO space available interrupt */
  265. ite_dbg_verbose("got interrupt for TX FIFO");
  266. /* wake any sleeping transmitter */
  267. wake_up_interruptible(&dev->tx_queue);
  268. /* mark the interrupt as serviced */
  269. ret = IRQ_RETVAL(IRQ_HANDLED);
  270. }
  271. /* drop the spinlock */
  272. spin_unlock_irqrestore(&dev->lock, flags);
  273. ite_dbg_verbose("%s done returning %d", __func__, (int)ret);
  274. return ret;
  275. }
  276. /* set the rx carrier freq range, guess it's in Hz... */
  277. static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32
  278. carrier_high)
  279. {
  280. unsigned long flags;
  281. struct ite_dev *dev = rcdev->priv;
  282. spin_lock_irqsave(&dev->lock, flags);
  283. dev->params.rx_low_carrier_freq = carrier_low;
  284. dev->params.rx_high_carrier_freq = carrier_high;
  285. ite_set_carrier_params(dev);
  286. spin_unlock_irqrestore(&dev->lock, flags);
  287. return 0;
  288. }
  289. /* set the tx carrier freq, guess it's in Hz... */
  290. static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier)
  291. {
  292. unsigned long flags;
  293. struct ite_dev *dev = rcdev->priv;
  294. spin_lock_irqsave(&dev->lock, flags);
  295. dev->params.tx_carrier_freq = carrier;
  296. ite_set_carrier_params(dev);
  297. spin_unlock_irqrestore(&dev->lock, flags);
  298. return 0;
  299. }
  300. /* set the tx duty cycle by controlling the pulse width */
  301. static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle)
  302. {
  303. unsigned long flags;
  304. struct ite_dev *dev = rcdev->priv;
  305. spin_lock_irqsave(&dev->lock, flags);
  306. dev->params.tx_duty_cycle = duty_cycle;
  307. ite_set_carrier_params(dev);
  308. spin_unlock_irqrestore(&dev->lock, flags);
  309. return 0;
  310. }
  311. /* transmit out IR pulses; what you get here is a batch of alternating
  312. * pulse/space/pulse/space lengths that we should write out completely through
  313. * the FIFO, blocking on a full FIFO */
  314. static int ite_tx_ir(struct rc_dev *rcdev, unsigned *txbuf, unsigned n)
  315. {
  316. unsigned long flags;
  317. struct ite_dev *dev = rcdev->priv;
  318. bool is_pulse = false;
  319. int remaining_us, fifo_avail, fifo_remaining, last_idx = 0;
  320. int max_rle_us, next_rle_us;
  321. int ret = n;
  322. u8 last_sent[ITE_TX_FIFO_LEN];
  323. u8 val;
  324. ite_dbg("%s called", __func__);
  325. /* clear the array just in case */
  326. memset(last_sent, 0, ARRAY_SIZE(last_sent));
  327. spin_lock_irqsave(&dev->lock, flags);
  328. /* let everybody know we're now transmitting */
  329. dev->transmitting = true;
  330. /* and set the carrier values for transmission */
  331. ite_set_carrier_params(dev);
  332. /* calculate how much time we can send in one byte */
  333. max_rle_us =
  334. (ITE_BAUDRATE_DIVISOR * dev->params.sample_period *
  335. ITE_TX_MAX_RLE) / 1000;
  336. /* disable the receiver */
  337. dev->params.disable_rx(dev);
  338. /* this is where we'll begin filling in the FIFO, until it's full.
  339. * then we'll just activate the interrupt, wait for it to wake us up
  340. * again, disable it, continue filling the FIFO... until everything
  341. * has been pushed out */
  342. fifo_avail =
  343. ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
  344. while (n > 0 && dev->in_use) {
  345. /* transmit the next sample */
  346. is_pulse = !is_pulse;
  347. remaining_us = *(txbuf++);
  348. n--;
  349. ite_dbg("%s: %ld",
  350. ((is_pulse) ? "pulse" : "space"),
  351. (long int)
  352. remaining_us);
  353. /* repeat while the pulse is non-zero length */
  354. while (remaining_us > 0 && dev->in_use) {
  355. if (remaining_us > max_rle_us)
  356. next_rle_us = max_rle_us;
  357. else
  358. next_rle_us = remaining_us;
  359. remaining_us -= next_rle_us;
  360. /* check what's the length we have to pump out */
  361. val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us;
  362. /* put it into the sent buffer */
  363. last_sent[last_idx++] = val;
  364. last_idx &= (ITE_TX_FIFO_LEN);
  365. /* encode it for 7 bits */
  366. val = (val - 1) & ITE_TX_RLE_MASK;
  367. /* take into account pulse/space prefix */
  368. if (is_pulse)
  369. val |= ITE_TX_PULSE;
  370. else
  371. val |= ITE_TX_SPACE;
  372. /*
  373. * if we get to 0 available, read again, just in case
  374. * some other slot got freed
  375. */
  376. if (fifo_avail <= 0)
  377. fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
  378. /* if it's still full */
  379. if (fifo_avail <= 0) {
  380. /* enable the tx interrupt */
  381. dev->params.
  382. enable_tx_interrupt(dev);
  383. /* drop the spinlock */
  384. spin_unlock_irqrestore(&dev->lock, flags);
  385. /* wait for the FIFO to empty enough */
  386. wait_event_interruptible(dev->tx_queue, (fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev)) >= 8);
  387. /* get the spinlock again */
  388. spin_lock_irqsave(&dev->lock, flags);
  389. /* disable the tx interrupt again. */
  390. dev->params.
  391. disable_tx_interrupt(dev);
  392. }
  393. /* now send the byte through the FIFO */
  394. dev->params.put_tx_byte(dev, val);
  395. fifo_avail--;
  396. }
  397. }
  398. /* wait and don't return until the whole FIFO has been sent out;
  399. * otherwise we could configure the RX carrier params instead of the
  400. * TX ones while the transmission is still being performed! */
  401. fifo_remaining = dev->params.get_tx_used_slots(dev);
  402. remaining_us = 0;
  403. while (fifo_remaining > 0) {
  404. fifo_remaining--;
  405. last_idx--;
  406. last_idx &= (ITE_TX_FIFO_LEN - 1);
  407. remaining_us += last_sent[last_idx];
  408. }
  409. remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE);
  410. /* drop the spinlock while we sleep */
  411. spin_unlock_irqrestore(&dev->lock, flags);
  412. /* sleep remaining_us microseconds */
  413. mdelay(DIV_ROUND_UP(remaining_us, 1000));
  414. /* reacquire the spinlock */
  415. spin_lock_irqsave(&dev->lock, flags);
  416. /* now we're not transmitting anymore */
  417. dev->transmitting = false;
  418. /* and set the carrier values for reception */
  419. ite_set_carrier_params(dev);
  420. /* reenable the receiver */
  421. if (dev->in_use)
  422. dev->params.enable_rx(dev);
  423. /* notify transmission end */
  424. wake_up_interruptible(&dev->tx_ended);
  425. spin_unlock_irqrestore(&dev->lock, flags);
  426. return ret;
  427. }
  428. /* idle the receiver if needed */
  429. static void ite_s_idle(struct rc_dev *rcdev, bool enable)
  430. {
  431. unsigned long flags;
  432. struct ite_dev *dev = rcdev->priv;
  433. ite_dbg("%s called", __func__);
  434. if (enable) {
  435. spin_lock_irqsave(&dev->lock, flags);
  436. dev->params.idle_rx(dev);
  437. spin_unlock_irqrestore(&dev->lock, flags);
  438. }
  439. }
  440. /* IT8712F HW-specific functions */
  441. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  442. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  443. * */
  444. static int it87_get_irq_causes(struct ite_dev *dev)
  445. {
  446. u8 iflags;
  447. int ret = 0;
  448. ite_dbg("%s called", __func__);
  449. /* read the interrupt flags */
  450. iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II;
  451. switch (iflags) {
  452. case IT87_II_RXDS:
  453. ret = ITE_IRQ_RX_FIFO;
  454. break;
  455. case IT87_II_RXFO:
  456. ret = ITE_IRQ_RX_FIFO_OVERRUN;
  457. break;
  458. case IT87_II_TXLDL:
  459. ret = ITE_IRQ_TX_FIFO;
  460. break;
  461. }
  462. return ret;
  463. }
  464. /* set the carrier parameters; to be called with the spinlock held */
  465. static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq,
  466. bool use_demodulator,
  467. u8 carrier_freq_bits, u8 allowance_bits,
  468. u8 pulse_width_bits)
  469. {
  470. u8 val;
  471. ite_dbg("%s called", __func__);
  472. /* program the RCR register */
  473. val = inb(dev->cir_addr + IT87_RCR)
  474. & ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR);
  475. if (high_freq)
  476. val |= IT87_HCFS;
  477. if (use_demodulator)
  478. val |= IT87_RXEND;
  479. val |= allowance_bits;
  480. outb(val, dev->cir_addr + IT87_RCR);
  481. /* program the TCR2 register */
  482. outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits,
  483. dev->cir_addr + IT87_TCR2);
  484. }
  485. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  486. * held */
  487. static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  488. {
  489. int fifo, read = 0;
  490. ite_dbg("%s called", __func__);
  491. /* read how many bytes are still in the FIFO */
  492. fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC;
  493. while (fifo > 0 && buf_size > 0) {
  494. *(buf++) = inb(dev->cir_addr + IT87_DR);
  495. fifo--;
  496. read++;
  497. buf_size--;
  498. }
  499. return read;
  500. }
  501. /* return how many bytes are still in the FIFO; this will be called
  502. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  503. * empty; let's expect this won't be a problem */
  504. static int it87_get_tx_used_slots(struct ite_dev *dev)
  505. {
  506. ite_dbg("%s called", __func__);
  507. return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC;
  508. }
  509. /* put a byte to the TX fifo; this should be called with the spinlock held */
  510. static void it87_put_tx_byte(struct ite_dev *dev, u8 value)
  511. {
  512. outb(value, dev->cir_addr + IT87_DR);
  513. }
  514. /* idle the receiver so that we won't receive samples until another
  515. pulse is detected; this must be called with the device spinlock held */
  516. static void it87_idle_rx(struct ite_dev *dev)
  517. {
  518. ite_dbg("%s called", __func__);
  519. /* disable streaming by clearing RXACT writing it as 1 */
  520. outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT,
  521. dev->cir_addr + IT87_RCR);
  522. /* clear the FIFO */
  523. outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR,
  524. dev->cir_addr + IT87_TCR1);
  525. }
  526. /* disable the receiver; this must be called with the device spinlock held */
  527. static void it87_disable_rx(struct ite_dev *dev)
  528. {
  529. ite_dbg("%s called", __func__);
  530. /* disable the receiver interrupts */
  531. outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE),
  532. dev->cir_addr + IT87_IER);
  533. /* disable the receiver */
  534. outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN,
  535. dev->cir_addr + IT87_RCR);
  536. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  537. * in the previous outb() call) */
  538. it87_idle_rx(dev);
  539. }
  540. /* enable the receiver; this must be called with the device spinlock held */
  541. static void it87_enable_rx(struct ite_dev *dev)
  542. {
  543. ite_dbg("%s called", __func__);
  544. /* enable the receiver by setting RXEN */
  545. outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN,
  546. dev->cir_addr + IT87_RCR);
  547. /* just prepare it to idle for the next reception */
  548. it87_idle_rx(dev);
  549. /* enable the receiver interrupts and master enable flag */
  550. outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC,
  551. dev->cir_addr + IT87_IER);
  552. }
  553. /* disable the transmitter interrupt; this must be called with the device
  554. * spinlock held */
  555. static void it87_disable_tx_interrupt(struct ite_dev *dev)
  556. {
  557. ite_dbg("%s called", __func__);
  558. /* disable the transmitter interrupts */
  559. outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE,
  560. dev->cir_addr + IT87_IER);
  561. }
  562. /* enable the transmitter interrupt; this must be called with the device
  563. * spinlock held */
  564. static void it87_enable_tx_interrupt(struct ite_dev *dev)
  565. {
  566. ite_dbg("%s called", __func__);
  567. /* enable the transmitter interrupts and master enable flag */
  568. outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC,
  569. dev->cir_addr + IT87_IER);
  570. }
  571. /* disable the device; this must be called with the device spinlock held */
  572. static void it87_disable(struct ite_dev *dev)
  573. {
  574. ite_dbg("%s called", __func__);
  575. /* clear out all interrupt enable flags */
  576. outb(inb(dev->cir_addr + IT87_IER) &
  577. ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE),
  578. dev->cir_addr + IT87_IER);
  579. /* disable the receiver */
  580. it87_disable_rx(dev);
  581. /* erase the FIFO */
  582. outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1),
  583. dev->cir_addr + IT87_TCR1);
  584. }
  585. /* initialize the hardware */
  586. static void it87_init_hardware(struct ite_dev *dev)
  587. {
  588. ite_dbg("%s called", __func__);
  589. /* enable just the baud rate divisor register,
  590. disabling all the interrupts at the same time */
  591. outb((inb(dev->cir_addr + IT87_IER) &
  592. ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR,
  593. dev->cir_addr + IT87_IER);
  594. /* write out the baud rate divisor */
  595. outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR);
  596. outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR);
  597. /* disable the baud rate divisor register again */
  598. outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR,
  599. dev->cir_addr + IT87_IER);
  600. /* program the RCR register defaults */
  601. outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR);
  602. /* program the TCR1 register */
  603. outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE
  604. | IT87_FIFOTL_DEFAULT | IT87_FIFOCLR,
  605. dev->cir_addr + IT87_TCR1);
  606. /* program the carrier parameters */
  607. ite_set_carrier_params(dev);
  608. }
  609. /* IT8512F on ITE8708 HW-specific functions */
  610. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  611. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  612. * */
  613. static int it8708_get_irq_causes(struct ite_dev *dev)
  614. {
  615. u8 iflags;
  616. int ret = 0;
  617. ite_dbg("%s called", __func__);
  618. /* read the interrupt flags */
  619. iflags = inb(dev->cir_addr + IT8708_C0IIR);
  620. if (iflags & IT85_TLDLI)
  621. ret |= ITE_IRQ_TX_FIFO;
  622. if (iflags & IT85_RDAI)
  623. ret |= ITE_IRQ_RX_FIFO;
  624. if (iflags & IT85_RFOI)
  625. ret |= ITE_IRQ_RX_FIFO_OVERRUN;
  626. return ret;
  627. }
  628. /* set the carrier parameters; to be called with the spinlock held */
  629. static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq,
  630. bool use_demodulator,
  631. u8 carrier_freq_bits, u8 allowance_bits,
  632. u8 pulse_width_bits)
  633. {
  634. u8 val;
  635. ite_dbg("%s called", __func__);
  636. /* program the C0CFR register, with HRAE=1 */
  637. outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
  638. dev->cir_addr + IT8708_BANKSEL);
  639. val = (inb(dev->cir_addr + IT8708_C0CFR)
  640. & ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits;
  641. if (high_freq)
  642. val |= IT85_HCFS;
  643. outb(val, dev->cir_addr + IT8708_C0CFR);
  644. outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
  645. dev->cir_addr + IT8708_BANKSEL);
  646. /* program the C0RCR register */
  647. val = inb(dev->cir_addr + IT8708_C0RCR)
  648. & ~(IT85_RXEND | IT85_RXDCR);
  649. if (use_demodulator)
  650. val |= IT85_RXEND;
  651. val |= allowance_bits;
  652. outb(val, dev->cir_addr + IT8708_C0RCR);
  653. /* program the C0TCR register */
  654. val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW;
  655. val |= pulse_width_bits;
  656. outb(val, dev->cir_addr + IT8708_C0TCR);
  657. }
  658. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  659. * held */
  660. static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  661. {
  662. int fifo, read = 0;
  663. ite_dbg("%s called", __func__);
  664. /* read how many bytes are still in the FIFO */
  665. fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC;
  666. while (fifo > 0 && buf_size > 0) {
  667. *(buf++) = inb(dev->cir_addr + IT8708_C0DR);
  668. fifo--;
  669. read++;
  670. buf_size--;
  671. }
  672. return read;
  673. }
  674. /* return how many bytes are still in the FIFO; this will be called
  675. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  676. * empty; let's expect this won't be a problem */
  677. static int it8708_get_tx_used_slots(struct ite_dev *dev)
  678. {
  679. ite_dbg("%s called", __func__);
  680. return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC;
  681. }
  682. /* put a byte to the TX fifo; this should be called with the spinlock held */
  683. static void it8708_put_tx_byte(struct ite_dev *dev, u8 value)
  684. {
  685. outb(value, dev->cir_addr + IT8708_C0DR);
  686. }
  687. /* idle the receiver so that we won't receive samples until another
  688. pulse is detected; this must be called with the device spinlock held */
  689. static void it8708_idle_rx(struct ite_dev *dev)
  690. {
  691. ite_dbg("%s called", __func__);
  692. /* disable streaming by clearing RXACT writing it as 1 */
  693. outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT,
  694. dev->cir_addr + IT8708_C0RCR);
  695. /* clear the FIFO */
  696. outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR,
  697. dev->cir_addr + IT8708_C0MSTCR);
  698. }
  699. /* disable the receiver; this must be called with the device spinlock held */
  700. static void it8708_disable_rx(struct ite_dev *dev)
  701. {
  702. ite_dbg("%s called", __func__);
  703. /* disable the receiver interrupts */
  704. outb(inb(dev->cir_addr + IT8708_C0IER) &
  705. ~(IT85_RDAIE | IT85_RFOIE),
  706. dev->cir_addr + IT8708_C0IER);
  707. /* disable the receiver */
  708. outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN,
  709. dev->cir_addr + IT8708_C0RCR);
  710. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  711. * in the previous outb() call) */
  712. it8708_idle_rx(dev);
  713. }
  714. /* enable the receiver; this must be called with the device spinlock held */
  715. static void it8708_enable_rx(struct ite_dev *dev)
  716. {
  717. ite_dbg("%s called", __func__);
  718. /* enable the receiver by setting RXEN */
  719. outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN,
  720. dev->cir_addr + IT8708_C0RCR);
  721. /* just prepare it to idle for the next reception */
  722. it8708_idle_rx(dev);
  723. /* enable the receiver interrupts and master enable flag */
  724. outb(inb(dev->cir_addr + IT8708_C0IER)
  725. |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
  726. dev->cir_addr + IT8708_C0IER);
  727. }
  728. /* disable the transmitter interrupt; this must be called with the device
  729. * spinlock held */
  730. static void it8708_disable_tx_interrupt(struct ite_dev *dev)
  731. {
  732. ite_dbg("%s called", __func__);
  733. /* disable the transmitter interrupts */
  734. outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE,
  735. dev->cir_addr + IT8708_C0IER);
  736. }
  737. /* enable the transmitter interrupt; this must be called with the device
  738. * spinlock held */
  739. static void it8708_enable_tx_interrupt(struct ite_dev *dev)
  740. {
  741. ite_dbg("%s called", __func__);
  742. /* enable the transmitter interrupts and master enable flag */
  743. outb(inb(dev->cir_addr + IT8708_C0IER)
  744. |IT85_TLDLIE | IT85_IEC,
  745. dev->cir_addr + IT8708_C0IER);
  746. }
  747. /* disable the device; this must be called with the device spinlock held */
  748. static void it8708_disable(struct ite_dev *dev)
  749. {
  750. ite_dbg("%s called", __func__);
  751. /* clear out all interrupt enable flags */
  752. outb(inb(dev->cir_addr + IT8708_C0IER) &
  753. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  754. dev->cir_addr + IT8708_C0IER);
  755. /* disable the receiver */
  756. it8708_disable_rx(dev);
  757. /* erase the FIFO */
  758. outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR),
  759. dev->cir_addr + IT8708_C0MSTCR);
  760. }
  761. /* initialize the hardware */
  762. static void it8708_init_hardware(struct ite_dev *dev)
  763. {
  764. ite_dbg("%s called", __func__);
  765. /* disable all the interrupts */
  766. outb(inb(dev->cir_addr + IT8708_C0IER) &
  767. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  768. dev->cir_addr + IT8708_C0IER);
  769. /* program the baud rate divisor */
  770. outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
  771. dev->cir_addr + IT8708_BANKSEL);
  772. outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR);
  773. outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
  774. dev->cir_addr + IT8708_C0BDHR);
  775. outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
  776. dev->cir_addr + IT8708_BANKSEL);
  777. /* program the C0MSTCR register defaults */
  778. outb((inb(dev->cir_addr + IT8708_C0MSTCR) &
  779. ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL |
  780. IT85_FIFOCLR | IT85_RESET)) |
  781. IT85_FIFOTL_DEFAULT,
  782. dev->cir_addr + IT8708_C0MSTCR);
  783. /* program the C0RCR register defaults */
  784. outb((inb(dev->cir_addr + IT8708_C0RCR) &
  785. ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND |
  786. IT85_RXACT | IT85_RXDCR)) |
  787. ITE_RXDCR_DEFAULT,
  788. dev->cir_addr + IT8708_C0RCR);
  789. /* program the C0TCR register defaults */
  790. outb((inb(dev->cir_addr + IT8708_C0TCR) &
  791. ~(IT85_TXMPM | IT85_TXMPW))
  792. |IT85_TXRLE | IT85_TXENDF |
  793. IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT,
  794. dev->cir_addr + IT8708_C0TCR);
  795. /* program the carrier parameters */
  796. ite_set_carrier_params(dev);
  797. }
  798. /* IT8512F on ITE8709 HW-specific functions */
  799. /* read a byte from the SRAM module */
  800. static inline u8 it8709_rm(struct ite_dev *dev, int index)
  801. {
  802. outb(index, dev->cir_addr + IT8709_RAM_IDX);
  803. return inb(dev->cir_addr + IT8709_RAM_VAL);
  804. }
  805. /* write a byte to the SRAM module */
  806. static inline void it8709_wm(struct ite_dev *dev, u8 val, int index)
  807. {
  808. outb(index, dev->cir_addr + IT8709_RAM_IDX);
  809. outb(val, dev->cir_addr + IT8709_RAM_VAL);
  810. }
  811. static void it8709_wait(struct ite_dev *dev)
  812. {
  813. int i = 0;
  814. /*
  815. * loop until device tells it's ready to continue
  816. * iterations count is usually ~750 but can sometimes achieve 13000
  817. */
  818. for (i = 0; i < 15000; i++) {
  819. udelay(2);
  820. if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE)
  821. break;
  822. }
  823. }
  824. /* read the value of a CIR register */
  825. static u8 it8709_rr(struct ite_dev *dev, int index)
  826. {
  827. /* just wait in case the previous access was a write */
  828. it8709_wait(dev);
  829. it8709_wm(dev, index, IT8709_REG_IDX);
  830. it8709_wm(dev, IT8709_READ, IT8709_MODE);
  831. /* wait for the read data to be available */
  832. it8709_wait(dev);
  833. /* return the read value */
  834. return it8709_rm(dev, IT8709_REG_VAL);
  835. }
  836. /* write the value of a CIR register */
  837. static void it8709_wr(struct ite_dev *dev, u8 val, int index)
  838. {
  839. /* we wait before writing, and not afterwards, since this allows us to
  840. * pipeline the host CPU with the microcontroller */
  841. it8709_wait(dev);
  842. it8709_wm(dev, val, IT8709_REG_VAL);
  843. it8709_wm(dev, index, IT8709_REG_IDX);
  844. it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
  845. }
  846. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  847. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  848. * */
  849. static int it8709_get_irq_causes(struct ite_dev *dev)
  850. {
  851. u8 iflags;
  852. int ret = 0;
  853. ite_dbg("%s called", __func__);
  854. /* read the interrupt flags */
  855. iflags = it8709_rm(dev, IT8709_IIR);
  856. if (iflags & IT85_TLDLI)
  857. ret |= ITE_IRQ_TX_FIFO;
  858. if (iflags & IT85_RDAI)
  859. ret |= ITE_IRQ_RX_FIFO;
  860. if (iflags & IT85_RFOI)
  861. ret |= ITE_IRQ_RX_FIFO_OVERRUN;
  862. return ret;
  863. }
  864. /* set the carrier parameters; to be called with the spinlock held */
  865. static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq,
  866. bool use_demodulator,
  867. u8 carrier_freq_bits, u8 allowance_bits,
  868. u8 pulse_width_bits)
  869. {
  870. u8 val;
  871. ite_dbg("%s called", __func__);
  872. val = (it8709_rr(dev, IT85_C0CFR)
  873. &~(IT85_HCFS | IT85_CFQ)) |
  874. carrier_freq_bits;
  875. if (high_freq)
  876. val |= IT85_HCFS;
  877. it8709_wr(dev, val, IT85_C0CFR);
  878. /* program the C0RCR register */
  879. val = it8709_rr(dev, IT85_C0RCR)
  880. & ~(IT85_RXEND | IT85_RXDCR);
  881. if (use_demodulator)
  882. val |= IT85_RXEND;
  883. val |= allowance_bits;
  884. it8709_wr(dev, val, IT85_C0RCR);
  885. /* program the C0TCR register */
  886. val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW;
  887. val |= pulse_width_bits;
  888. it8709_wr(dev, val, IT85_C0TCR);
  889. }
  890. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  891. * held */
  892. static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  893. {
  894. int fifo, read = 0;
  895. ite_dbg("%s called", __func__);
  896. /* read how many bytes are still in the FIFO */
  897. fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC;
  898. while (fifo > 0 && buf_size > 0) {
  899. *(buf++) = it8709_rm(dev, IT8709_FIFO + read);
  900. fifo--;
  901. read++;
  902. buf_size--;
  903. }
  904. /* 'clear' the FIFO by setting the writing index to 0; this is
  905. * completely bound to be racy, but we can't help it, since it's a
  906. * limitation of the protocol */
  907. it8709_wm(dev, 0, IT8709_RFSR);
  908. return read;
  909. }
  910. /* return how many bytes are still in the FIFO; this will be called
  911. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  912. * empty; let's expect this won't be a problem */
  913. static int it8709_get_tx_used_slots(struct ite_dev *dev)
  914. {
  915. ite_dbg("%s called", __func__);
  916. return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC;
  917. }
  918. /* put a byte to the TX fifo; this should be called with the spinlock held */
  919. static void it8709_put_tx_byte(struct ite_dev *dev, u8 value)
  920. {
  921. it8709_wr(dev, value, IT85_C0DR);
  922. }
  923. /* idle the receiver so that we won't receive samples until another
  924. pulse is detected; this must be called with the device spinlock held */
  925. static void it8709_idle_rx(struct ite_dev *dev)
  926. {
  927. ite_dbg("%s called", __func__);
  928. /* disable streaming by clearing RXACT writing it as 1 */
  929. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT,
  930. IT85_C0RCR);
  931. /* clear the FIFO */
  932. it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR,
  933. IT85_C0MSTCR);
  934. }
  935. /* disable the receiver; this must be called with the device spinlock held */
  936. static void it8709_disable_rx(struct ite_dev *dev)
  937. {
  938. ite_dbg("%s called", __func__);
  939. /* disable the receiver interrupts */
  940. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  941. ~(IT85_RDAIE | IT85_RFOIE),
  942. IT85_C0IER);
  943. /* disable the receiver */
  944. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN,
  945. IT85_C0RCR);
  946. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  947. * in the previous it8709_wr(dev, ) call) */
  948. it8709_idle_rx(dev);
  949. }
  950. /* enable the receiver; this must be called with the device spinlock held */
  951. static void it8709_enable_rx(struct ite_dev *dev)
  952. {
  953. ite_dbg("%s called", __func__);
  954. /* enable the receiver by setting RXEN */
  955. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN,
  956. IT85_C0RCR);
  957. /* just prepare it to idle for the next reception */
  958. it8709_idle_rx(dev);
  959. /* enable the receiver interrupts and master enable flag */
  960. it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
  961. |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
  962. IT85_C0IER);
  963. }
  964. /* disable the transmitter interrupt; this must be called with the device
  965. * spinlock held */
  966. static void it8709_disable_tx_interrupt(struct ite_dev *dev)
  967. {
  968. ite_dbg("%s called", __func__);
  969. /* disable the transmitter interrupts */
  970. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE,
  971. IT85_C0IER);
  972. }
  973. /* enable the transmitter interrupt; this must be called with the device
  974. * spinlock held */
  975. static void it8709_enable_tx_interrupt(struct ite_dev *dev)
  976. {
  977. ite_dbg("%s called", __func__);
  978. /* enable the transmitter interrupts and master enable flag */
  979. it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
  980. |IT85_TLDLIE | IT85_IEC,
  981. IT85_C0IER);
  982. }
  983. /* disable the device; this must be called with the device spinlock held */
  984. static void it8709_disable(struct ite_dev *dev)
  985. {
  986. ite_dbg("%s called", __func__);
  987. /* clear out all interrupt enable flags */
  988. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  989. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  990. IT85_C0IER);
  991. /* disable the receiver */
  992. it8709_disable_rx(dev);
  993. /* erase the FIFO */
  994. it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR),
  995. IT85_C0MSTCR);
  996. }
  997. /* initialize the hardware */
  998. static void it8709_init_hardware(struct ite_dev *dev)
  999. {
  1000. ite_dbg("%s called", __func__);
  1001. /* disable all the interrupts */
  1002. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  1003. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  1004. IT85_C0IER);
  1005. /* program the baud rate divisor */
  1006. it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR);
  1007. it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
  1008. IT85_C0BDHR);
  1009. /* program the C0MSTCR register defaults */
  1010. it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) &
  1011. ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL
  1012. | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT,
  1013. IT85_C0MSTCR);
  1014. /* program the C0RCR register defaults */
  1015. it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) &
  1016. ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT
  1017. | IT85_RXDCR)) | ITE_RXDCR_DEFAULT,
  1018. IT85_C0RCR);
  1019. /* program the C0TCR register defaults */
  1020. it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW))
  1021. | IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT
  1022. | IT85_TXMPW_DEFAULT,
  1023. IT85_C0TCR);
  1024. /* program the carrier parameters */
  1025. ite_set_carrier_params(dev);
  1026. }
  1027. /* generic hardware setup/teardown code */
  1028. /* activate the device for use */
  1029. static int ite_open(struct rc_dev *rcdev)
  1030. {
  1031. struct ite_dev *dev = rcdev->priv;
  1032. unsigned long flags;
  1033. ite_dbg("%s called", __func__);
  1034. spin_lock_irqsave(&dev->lock, flags);
  1035. dev->in_use = true;
  1036. /* enable the receiver */
  1037. dev->params.enable_rx(dev);
  1038. spin_unlock_irqrestore(&dev->lock, flags);
  1039. return 0;
  1040. }
  1041. /* deactivate the device for use */
  1042. static void ite_close(struct rc_dev *rcdev)
  1043. {
  1044. struct ite_dev *dev = rcdev->priv;
  1045. unsigned long flags;
  1046. ite_dbg("%s called", __func__);
  1047. spin_lock_irqsave(&dev->lock, flags);
  1048. dev->in_use = false;
  1049. /* wait for any transmission to end */
  1050. spin_unlock_irqrestore(&dev->lock, flags);
  1051. wait_event_interruptible(dev->tx_ended, !dev->transmitting);
  1052. spin_lock_irqsave(&dev->lock, flags);
  1053. dev->params.disable(dev);
  1054. spin_unlock_irqrestore(&dev->lock, flags);
  1055. }
  1056. /* supported models and their parameters */
  1057. static const struct ite_dev_params ite_dev_descs[] = {
  1058. { /* 0: ITE8704 */
  1059. .model = "ITE8704 CIR transceiver",
  1060. .io_region_size = IT87_IOREG_LENGTH,
  1061. .io_rsrc_no = 0,
  1062. .hw_tx_capable = true,
  1063. .sample_period = (u32) (1000000000ULL / 115200),
  1064. .tx_carrier_freq = 38000,
  1065. .tx_duty_cycle = 33,
  1066. .rx_low_carrier_freq = 0,
  1067. .rx_high_carrier_freq = 0,
  1068. /* operations */
  1069. .get_irq_causes = it87_get_irq_causes,
  1070. .enable_rx = it87_enable_rx,
  1071. .idle_rx = it87_idle_rx,
  1072. .disable_rx = it87_idle_rx,
  1073. .get_rx_bytes = it87_get_rx_bytes,
  1074. .enable_tx_interrupt = it87_enable_tx_interrupt,
  1075. .disable_tx_interrupt = it87_disable_tx_interrupt,
  1076. .get_tx_used_slots = it87_get_tx_used_slots,
  1077. .put_tx_byte = it87_put_tx_byte,
  1078. .disable = it87_disable,
  1079. .init_hardware = it87_init_hardware,
  1080. .set_carrier_params = it87_set_carrier_params,
  1081. },
  1082. { /* 1: ITE8713 */
  1083. .model = "ITE8713 CIR transceiver",
  1084. .io_region_size = IT87_IOREG_LENGTH,
  1085. .io_rsrc_no = 0,
  1086. .hw_tx_capable = true,
  1087. .sample_period = (u32) (1000000000ULL / 115200),
  1088. .tx_carrier_freq = 38000,
  1089. .tx_duty_cycle = 33,
  1090. .rx_low_carrier_freq = 0,
  1091. .rx_high_carrier_freq = 0,
  1092. /* operations */
  1093. .get_irq_causes = it87_get_irq_causes,
  1094. .enable_rx = it87_enable_rx,
  1095. .idle_rx = it87_idle_rx,
  1096. .disable_rx = it87_idle_rx,
  1097. .get_rx_bytes = it87_get_rx_bytes,
  1098. .enable_tx_interrupt = it87_enable_tx_interrupt,
  1099. .disable_tx_interrupt = it87_disable_tx_interrupt,
  1100. .get_tx_used_slots = it87_get_tx_used_slots,
  1101. .put_tx_byte = it87_put_tx_byte,
  1102. .disable = it87_disable,
  1103. .init_hardware = it87_init_hardware,
  1104. .set_carrier_params = it87_set_carrier_params,
  1105. },
  1106. { /* 2: ITE8708 */
  1107. .model = "ITE8708 CIR transceiver",
  1108. .io_region_size = IT8708_IOREG_LENGTH,
  1109. .io_rsrc_no = 0,
  1110. .hw_tx_capable = true,
  1111. .sample_period = (u32) (1000000000ULL / 115200),
  1112. .tx_carrier_freq = 38000,
  1113. .tx_duty_cycle = 33,
  1114. .rx_low_carrier_freq = 0,
  1115. .rx_high_carrier_freq = 0,
  1116. /* operations */
  1117. .get_irq_causes = it8708_get_irq_causes,
  1118. .enable_rx = it8708_enable_rx,
  1119. .idle_rx = it8708_idle_rx,
  1120. .disable_rx = it8708_idle_rx,
  1121. .get_rx_bytes = it8708_get_rx_bytes,
  1122. .enable_tx_interrupt = it8708_enable_tx_interrupt,
  1123. .disable_tx_interrupt =
  1124. it8708_disable_tx_interrupt,
  1125. .get_tx_used_slots = it8708_get_tx_used_slots,
  1126. .put_tx_byte = it8708_put_tx_byte,
  1127. .disable = it8708_disable,
  1128. .init_hardware = it8708_init_hardware,
  1129. .set_carrier_params = it8708_set_carrier_params,
  1130. },
  1131. { /* 3: ITE8709 */
  1132. .model = "ITE8709 CIR transceiver",
  1133. .io_region_size = IT8709_IOREG_LENGTH,
  1134. .io_rsrc_no = 2,
  1135. .hw_tx_capable = true,
  1136. .sample_period = (u32) (1000000000ULL / 115200),
  1137. .tx_carrier_freq = 38000,
  1138. .tx_duty_cycle = 33,
  1139. .rx_low_carrier_freq = 0,
  1140. .rx_high_carrier_freq = 0,
  1141. /* operations */
  1142. .get_irq_causes = it8709_get_irq_causes,
  1143. .enable_rx = it8709_enable_rx,
  1144. .idle_rx = it8709_idle_rx,
  1145. .disable_rx = it8709_idle_rx,
  1146. .get_rx_bytes = it8709_get_rx_bytes,
  1147. .enable_tx_interrupt = it8709_enable_tx_interrupt,
  1148. .disable_tx_interrupt =
  1149. it8709_disable_tx_interrupt,
  1150. .get_tx_used_slots = it8709_get_tx_used_slots,
  1151. .put_tx_byte = it8709_put_tx_byte,
  1152. .disable = it8709_disable,
  1153. .init_hardware = it8709_init_hardware,
  1154. .set_carrier_params = it8709_set_carrier_params,
  1155. },
  1156. };
  1157. static const struct pnp_device_id ite_ids[] = {
  1158. {"ITE8704", 0}, /* Default model */
  1159. {"ITE8713", 1}, /* CIR found in EEEBox 1501U */
  1160. {"ITE8708", 2}, /* Bridged IT8512 */
  1161. {"ITE8709", 3}, /* SRAM-Bridged IT8512 */
  1162. {"", 0},
  1163. };
  1164. /* allocate memory, probe hardware, and initialize everything */
  1165. static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
  1166. *dev_id)
  1167. {
  1168. const struct ite_dev_params *dev_desc = NULL;
  1169. struct ite_dev *itdev = NULL;
  1170. struct rc_dev *rdev = NULL;
  1171. int ret = -ENOMEM;
  1172. int model_no;
  1173. int io_rsrc_no;
  1174. ite_dbg("%s called", __func__);
  1175. itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL);
  1176. if (!itdev)
  1177. return ret;
  1178. /* input device for IR remote (and tx) */
  1179. rdev = rc_allocate_device();
  1180. if (!rdev)
  1181. goto exit_free_dev_rdev;
  1182. itdev->rdev = rdev;
  1183. ret = -ENODEV;
  1184. /* get the model number */
  1185. model_no = (int)dev_id->driver_data;
  1186. ite_pr(KERN_NOTICE, "Auto-detected model: %s\n",
  1187. ite_dev_descs[model_no].model);
  1188. if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) {
  1189. model_no = model_number;
  1190. ite_pr(KERN_NOTICE, "The model has been fixed by a module parameter.");
  1191. }
  1192. ite_pr(KERN_NOTICE, "Using model: %s\n", ite_dev_descs[model_no].model);
  1193. /* get the description for the device */
  1194. dev_desc = &ite_dev_descs[model_no];
  1195. io_rsrc_no = dev_desc->io_rsrc_no;
  1196. /* validate pnp resources */
  1197. if (!pnp_port_valid(pdev, io_rsrc_no) ||
  1198. pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) {
  1199. dev_err(&pdev->dev, "IR PNP Port not valid!\n");
  1200. goto exit_free_dev_rdev;
  1201. }
  1202. if (!pnp_irq_valid(pdev, 0)) {
  1203. dev_err(&pdev->dev, "PNP IRQ not valid!\n");
  1204. goto exit_free_dev_rdev;
  1205. }
  1206. /* store resource values */
  1207. itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no);
  1208. itdev->cir_irq = pnp_irq(pdev, 0);
  1209. /* initialize spinlocks */
  1210. spin_lock_init(&itdev->lock);
  1211. /* initialize raw event */
  1212. init_ir_raw_event(&itdev->rawir);
  1213. /* set driver data into the pnp device */
  1214. pnp_set_drvdata(pdev, itdev);
  1215. itdev->pdev = pdev;
  1216. /* initialize waitqueues for transmission */
  1217. init_waitqueue_head(&itdev->tx_queue);
  1218. init_waitqueue_head(&itdev->tx_ended);
  1219. /* copy model-specific parameters */
  1220. itdev->params = *dev_desc;
  1221. /* apply any overrides */
  1222. if (sample_period > 0)
  1223. itdev->params.sample_period = sample_period;
  1224. if (tx_carrier_freq > 0)
  1225. itdev->params.tx_carrier_freq = tx_carrier_freq;
  1226. if (tx_duty_cycle > 0 && tx_duty_cycle <= 100)
  1227. itdev->params.tx_duty_cycle = tx_duty_cycle;
  1228. if (rx_low_carrier_freq > 0)
  1229. itdev->params.rx_low_carrier_freq = rx_low_carrier_freq;
  1230. if (rx_high_carrier_freq > 0)
  1231. itdev->params.rx_high_carrier_freq = rx_high_carrier_freq;
  1232. /* print out parameters */
  1233. ite_pr(KERN_NOTICE, "TX-capable: %d\n", (int)
  1234. itdev->params.hw_tx_capable);
  1235. ite_pr(KERN_NOTICE, "Sample period (ns): %ld\n", (long)
  1236. itdev->params.sample_period);
  1237. ite_pr(KERN_NOTICE, "TX carrier frequency (Hz): %d\n", (int)
  1238. itdev->params.tx_carrier_freq);
  1239. ite_pr(KERN_NOTICE, "TX duty cycle (%%): %d\n", (int)
  1240. itdev->params.tx_duty_cycle);
  1241. ite_pr(KERN_NOTICE, "RX low carrier frequency (Hz): %d\n", (int)
  1242. itdev->params.rx_low_carrier_freq);
  1243. ite_pr(KERN_NOTICE, "RX high carrier frequency (Hz): %d\n", (int)
  1244. itdev->params.rx_high_carrier_freq);
  1245. /* set up hardware initial state */
  1246. itdev->params.init_hardware(itdev);
  1247. /* set up ir-core props */
  1248. rdev->priv = itdev;
  1249. rdev->driver_type = RC_DRIVER_IR_RAW;
  1250. rdev->allowed_protocols = RC_BIT_ALL;
  1251. rdev->open = ite_open;
  1252. rdev->close = ite_close;
  1253. rdev->s_idle = ite_s_idle;
  1254. rdev->s_rx_carrier_range = ite_set_rx_carrier_range;
  1255. rdev->min_timeout = ITE_MIN_IDLE_TIMEOUT;
  1256. rdev->max_timeout = ITE_MAX_IDLE_TIMEOUT;
  1257. rdev->timeout = ITE_IDLE_TIMEOUT;
  1258. rdev->rx_resolution = ITE_BAUDRATE_DIVISOR *
  1259. itdev->params.sample_period;
  1260. rdev->tx_resolution = ITE_BAUDRATE_DIVISOR *
  1261. itdev->params.sample_period;
  1262. /* set up transmitter related values if needed */
  1263. if (itdev->params.hw_tx_capable) {
  1264. rdev->tx_ir = ite_tx_ir;
  1265. rdev->s_tx_carrier = ite_set_tx_carrier;
  1266. rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle;
  1267. }
  1268. rdev->input_name = dev_desc->model;
  1269. rdev->input_id.bustype = BUS_HOST;
  1270. rdev->input_id.vendor = PCI_VENDOR_ID_ITE;
  1271. rdev->input_id.product = 0;
  1272. rdev->input_id.version = 0;
  1273. rdev->driver_name = ITE_DRIVER_NAME;
  1274. rdev->map_name = RC_MAP_RC6_MCE;
  1275. ret = rc_register_device(rdev);
  1276. if (ret)
  1277. goto exit_free_dev_rdev;
  1278. ret = -EBUSY;
  1279. /* now claim resources */
  1280. if (!request_region(itdev->cir_addr,
  1281. dev_desc->io_region_size, ITE_DRIVER_NAME))
  1282. goto exit_unregister_device;
  1283. if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED,
  1284. ITE_DRIVER_NAME, (void *)itdev))
  1285. goto exit_release_cir_addr;
  1286. ite_pr(KERN_NOTICE, "driver has been successfully loaded\n");
  1287. return 0;
  1288. exit_release_cir_addr:
  1289. release_region(itdev->cir_addr, itdev->params.io_region_size);
  1290. exit_unregister_device:
  1291. rc_unregister_device(rdev);
  1292. rdev = NULL;
  1293. exit_free_dev_rdev:
  1294. rc_free_device(rdev);
  1295. kfree(itdev);
  1296. return ret;
  1297. }
  1298. static void ite_remove(struct pnp_dev *pdev)
  1299. {
  1300. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1301. unsigned long flags;
  1302. ite_dbg("%s called", __func__);
  1303. spin_lock_irqsave(&dev->lock, flags);
  1304. /* disable hardware */
  1305. dev->params.disable(dev);
  1306. spin_unlock_irqrestore(&dev->lock, flags);
  1307. /* free resources */
  1308. free_irq(dev->cir_irq, dev);
  1309. release_region(dev->cir_addr, dev->params.io_region_size);
  1310. rc_unregister_device(dev->rdev);
  1311. kfree(dev);
  1312. }
  1313. static int ite_suspend(struct pnp_dev *pdev, pm_message_t state)
  1314. {
  1315. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1316. unsigned long flags;
  1317. ite_dbg("%s called", __func__);
  1318. /* wait for any transmission to end */
  1319. wait_event_interruptible(dev->tx_ended, !dev->transmitting);
  1320. spin_lock_irqsave(&dev->lock, flags);
  1321. /* disable all interrupts */
  1322. dev->params.disable(dev);
  1323. spin_unlock_irqrestore(&dev->lock, flags);
  1324. return 0;
  1325. }
  1326. static int ite_resume(struct pnp_dev *pdev)
  1327. {
  1328. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1329. unsigned long flags;
  1330. ite_dbg("%s called", __func__);
  1331. spin_lock_irqsave(&dev->lock, flags);
  1332. /* reinitialize hardware config registers */
  1333. dev->params.init_hardware(dev);
  1334. /* enable the receiver */
  1335. dev->params.enable_rx(dev);
  1336. spin_unlock_irqrestore(&dev->lock, flags);
  1337. return 0;
  1338. }
  1339. static void ite_shutdown(struct pnp_dev *pdev)
  1340. {
  1341. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1342. unsigned long flags;
  1343. ite_dbg("%s called", __func__);
  1344. spin_lock_irqsave(&dev->lock, flags);
  1345. /* disable all interrupts */
  1346. dev->params.disable(dev);
  1347. spin_unlock_irqrestore(&dev->lock, flags);
  1348. }
  1349. static struct pnp_driver ite_driver = {
  1350. .name = ITE_DRIVER_NAME,
  1351. .id_table = ite_ids,
  1352. .probe = ite_probe,
  1353. .remove = ite_remove,
  1354. .suspend = ite_suspend,
  1355. .resume = ite_resume,
  1356. .shutdown = ite_shutdown,
  1357. };
  1358. MODULE_DEVICE_TABLE(pnp, ite_ids);
  1359. MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver");
  1360. MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>");
  1361. MODULE_LICENSE("GPL");
  1362. module_pnp_driver(ite_driver);