mtk_vcodec_dec_drv.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394
  1. /*
  2. * Copyright (c) 2016 MediaTek Inc.
  3. * Author: PC Chen <pc.chen@mediatek.com>
  4. * Tiffany Lin <tiffany.lin@mediatek.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/slab.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/irq.h>
  18. #include <linux/module.h>
  19. #include <linux/of_device.h>
  20. #include <linux/of.h>
  21. #include <media/v4l2-event.h>
  22. #include <media/v4l2-mem2mem.h>
  23. #include <media/videobuf2-dma-contig.h>
  24. #include "mtk_vcodec_drv.h"
  25. #include "mtk_vcodec_dec.h"
  26. #include "mtk_vcodec_dec_pm.h"
  27. #include "mtk_vcodec_intr.h"
  28. #include "mtk_vcodec_util.h"
  29. #include "mtk_vpu.h"
  30. #define VDEC_HW_ACTIVE 0x10
  31. #define VDEC_IRQ_CFG 0x11
  32. #define VDEC_IRQ_CLR 0x10
  33. #define VDEC_IRQ_CFG_REG 0xa4
  34. module_param(mtk_v4l2_dbg_level, int, 0644);
  35. module_param(mtk_vcodec_dbg, bool, 0644);
  36. /* Wake up context wait_queue */
  37. static void wake_up_ctx(struct mtk_vcodec_ctx *ctx)
  38. {
  39. ctx->int_cond = 1;
  40. wake_up_interruptible(&ctx->queue);
  41. }
  42. static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv)
  43. {
  44. struct mtk_vcodec_dev *dev = priv;
  45. struct mtk_vcodec_ctx *ctx;
  46. u32 cg_status = 0;
  47. unsigned int dec_done_status = 0;
  48. void __iomem *vdec_misc_addr = dev->reg_base[VDEC_MISC] +
  49. VDEC_IRQ_CFG_REG;
  50. ctx = mtk_vcodec_get_curr_ctx(dev);
  51. /* check if HW active or not */
  52. cg_status = readl(dev->reg_base[0]);
  53. if ((cg_status & VDEC_HW_ACTIVE) != 0) {
  54. mtk_v4l2_err("DEC ISR, VDEC active is not 0x0 (0x%08x)",
  55. cg_status);
  56. return IRQ_HANDLED;
  57. }
  58. dec_done_status = readl(vdec_misc_addr);
  59. ctx->irq_status = dec_done_status;
  60. if ((dec_done_status & MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) !=
  61. MTK_VDEC_IRQ_STATUS_DEC_SUCCESS)
  62. return IRQ_HANDLED;
  63. /* clear interrupt */
  64. writel((readl(vdec_misc_addr) | VDEC_IRQ_CFG),
  65. dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG);
  66. writel((readl(vdec_misc_addr) & ~VDEC_IRQ_CLR),
  67. dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG);
  68. wake_up_ctx(ctx);
  69. mtk_v4l2_debug(3,
  70. "mtk_vcodec_dec_irq_handler :wake up ctx %d, dec_done_status=%x",
  71. ctx->id, dec_done_status);
  72. return IRQ_HANDLED;
  73. }
  74. static void mtk_vcodec_dec_reset_handler(void *priv)
  75. {
  76. struct mtk_vcodec_dev *dev = priv;
  77. struct mtk_vcodec_ctx *ctx;
  78. mtk_v4l2_err("Watchdog timeout!!");
  79. mutex_lock(&dev->dev_mutex);
  80. list_for_each_entry(ctx, &dev->ctx_list, list) {
  81. ctx->state = MTK_STATE_ABORT;
  82. mtk_v4l2_debug(0, "[%d] Change to state MTK_STATE_ERROR",
  83. ctx->id);
  84. }
  85. mutex_unlock(&dev->dev_mutex);
  86. }
  87. static int fops_vcodec_open(struct file *file)
  88. {
  89. struct mtk_vcodec_dev *dev = video_drvdata(file);
  90. struct mtk_vcodec_ctx *ctx = NULL;
  91. int ret = 0;
  92. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  93. if (!ctx)
  94. return -ENOMEM;
  95. mutex_lock(&dev->dev_mutex);
  96. ctx->id = dev->id_counter++;
  97. v4l2_fh_init(&ctx->fh, video_devdata(file));
  98. file->private_data = &ctx->fh;
  99. v4l2_fh_add(&ctx->fh);
  100. INIT_LIST_HEAD(&ctx->list);
  101. ctx->dev = dev;
  102. init_waitqueue_head(&ctx->queue);
  103. mutex_init(&ctx->lock);
  104. ctx->type = MTK_INST_DECODER;
  105. ret = mtk_vcodec_dec_ctrls_setup(ctx);
  106. if (ret) {
  107. mtk_v4l2_err("Failed to setup mt vcodec controls");
  108. goto err_ctrls_setup;
  109. }
  110. ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev_dec, ctx,
  111. &mtk_vcodec_dec_queue_init);
  112. if (IS_ERR((__force void *)ctx->m2m_ctx)) {
  113. ret = PTR_ERR((__force void *)ctx->m2m_ctx);
  114. mtk_v4l2_err("Failed to v4l2_m2m_ctx_init() (%d)",
  115. ret);
  116. goto err_m2m_ctx_init;
  117. }
  118. mtk_vcodec_dec_set_default_params(ctx);
  119. if (v4l2_fh_is_singular(&ctx->fh)) {
  120. mtk_vcodec_dec_pw_on(&dev->pm);
  121. /*
  122. * vpu_load_firmware checks if it was loaded already and
  123. * does nothing in that case
  124. */
  125. ret = vpu_load_firmware(dev->vpu_plat_dev);
  126. if (ret < 0) {
  127. /*
  128. * Return 0 if downloading firmware successfully,
  129. * otherwise it is failed
  130. */
  131. mtk_v4l2_err("vpu_load_firmware failed!");
  132. goto err_load_fw;
  133. }
  134. dev->dec_capability =
  135. vpu_get_vdec_hw_capa(dev->vpu_plat_dev);
  136. mtk_v4l2_debug(0, "decoder capability %x", dev->dec_capability);
  137. }
  138. list_add(&ctx->list, &dev->ctx_list);
  139. mutex_unlock(&dev->dev_mutex);
  140. mtk_v4l2_debug(0, "%s decoder [%d]", dev_name(&dev->plat_dev->dev),
  141. ctx->id);
  142. return ret;
  143. /* Deinit when failure occurred */
  144. err_load_fw:
  145. v4l2_m2m_ctx_release(ctx->m2m_ctx);
  146. err_m2m_ctx_init:
  147. v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
  148. err_ctrls_setup:
  149. v4l2_fh_del(&ctx->fh);
  150. v4l2_fh_exit(&ctx->fh);
  151. kfree(ctx);
  152. mutex_unlock(&dev->dev_mutex);
  153. return ret;
  154. }
  155. static int fops_vcodec_release(struct file *file)
  156. {
  157. struct mtk_vcodec_dev *dev = video_drvdata(file);
  158. struct mtk_vcodec_ctx *ctx = fh_to_ctx(file->private_data);
  159. mtk_v4l2_debug(0, "[%d] decoder", ctx->id);
  160. mutex_lock(&dev->dev_mutex);
  161. /*
  162. * Call v4l2_m2m_ctx_release before mtk_vcodec_dec_release. First, it
  163. * makes sure the worker thread is not running after vdec_if_deinit.
  164. * Second, the decoder will be flushed and all the buffers will be
  165. * returned in stop_streaming.
  166. */
  167. v4l2_m2m_ctx_release(ctx->m2m_ctx);
  168. mtk_vcodec_dec_release(ctx);
  169. if (v4l2_fh_is_singular(&ctx->fh))
  170. mtk_vcodec_dec_pw_off(&dev->pm);
  171. v4l2_fh_del(&ctx->fh);
  172. v4l2_fh_exit(&ctx->fh);
  173. v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
  174. list_del_init(&ctx->list);
  175. kfree(ctx);
  176. mutex_unlock(&dev->dev_mutex);
  177. return 0;
  178. }
  179. static const struct v4l2_file_operations mtk_vcodec_fops = {
  180. .owner = THIS_MODULE,
  181. .open = fops_vcodec_open,
  182. .release = fops_vcodec_release,
  183. .poll = v4l2_m2m_fop_poll,
  184. .unlocked_ioctl = video_ioctl2,
  185. .mmap = v4l2_m2m_fop_mmap,
  186. };
  187. static int mtk_vcodec_probe(struct platform_device *pdev)
  188. {
  189. struct mtk_vcodec_dev *dev;
  190. struct video_device *vfd_dec;
  191. struct resource *res;
  192. int i, ret;
  193. dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
  194. if (!dev)
  195. return -ENOMEM;
  196. INIT_LIST_HEAD(&dev->ctx_list);
  197. dev->plat_dev = pdev;
  198. dev->vpu_plat_dev = vpu_get_plat_device(dev->plat_dev);
  199. if (dev->vpu_plat_dev == NULL) {
  200. mtk_v4l2_err("[VPU] vpu device in not ready");
  201. return -EPROBE_DEFER;
  202. }
  203. vpu_wdt_reg_handler(dev->vpu_plat_dev, mtk_vcodec_dec_reset_handler,
  204. dev, VPU_RST_DEC);
  205. ret = mtk_vcodec_init_dec_pm(dev);
  206. if (ret < 0) {
  207. dev_err(&pdev->dev, "Failed to get mt vcodec clock source");
  208. return ret;
  209. }
  210. for (i = 0; i < NUM_MAX_VDEC_REG_BASE; i++) {
  211. res = platform_get_resource(pdev, IORESOURCE_MEM, i);
  212. if (res == NULL) {
  213. dev_err(&pdev->dev, "get memory resource failed.");
  214. ret = -ENXIO;
  215. goto err_res;
  216. }
  217. dev->reg_base[i] = devm_ioremap_resource(&pdev->dev, res);
  218. if (IS_ERR((__force void *)dev->reg_base[i])) {
  219. ret = PTR_ERR((__force void *)dev->reg_base[i]);
  220. goto err_res;
  221. }
  222. mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]);
  223. }
  224. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  225. if (res == NULL) {
  226. dev_err(&pdev->dev, "failed to get irq resource");
  227. ret = -ENOENT;
  228. goto err_res;
  229. }
  230. dev->dec_irq = platform_get_irq(pdev, 0);
  231. ret = devm_request_irq(&pdev->dev, dev->dec_irq,
  232. mtk_vcodec_dec_irq_handler, 0, pdev->name, dev);
  233. if (ret) {
  234. dev_err(&pdev->dev, "Failed to install dev->dec_irq %d (%d)",
  235. dev->dec_irq,
  236. ret);
  237. goto err_res;
  238. }
  239. disable_irq(dev->dec_irq);
  240. mutex_init(&dev->dec_mutex);
  241. mutex_init(&dev->dev_mutex);
  242. spin_lock_init(&dev->irqlock);
  243. snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), "%s",
  244. "[/MTK_V4L2_VDEC]");
  245. ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
  246. if (ret) {
  247. mtk_v4l2_err("v4l2_device_register err=%d", ret);
  248. goto err_res;
  249. }
  250. init_waitqueue_head(&dev->queue);
  251. vfd_dec = video_device_alloc();
  252. if (!vfd_dec) {
  253. mtk_v4l2_err("Failed to allocate video device");
  254. ret = -ENOMEM;
  255. goto err_dec_alloc;
  256. }
  257. vfd_dec->fops = &mtk_vcodec_fops;
  258. vfd_dec->ioctl_ops = &mtk_vdec_ioctl_ops;
  259. vfd_dec->release = video_device_release;
  260. vfd_dec->lock = &dev->dev_mutex;
  261. vfd_dec->v4l2_dev = &dev->v4l2_dev;
  262. vfd_dec->vfl_dir = VFL_DIR_M2M;
  263. vfd_dec->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE |
  264. V4L2_CAP_STREAMING;
  265. snprintf(vfd_dec->name, sizeof(vfd_dec->name), "%s",
  266. MTK_VCODEC_DEC_NAME);
  267. video_set_drvdata(vfd_dec, dev);
  268. dev->vfd_dec = vfd_dec;
  269. platform_set_drvdata(pdev, dev);
  270. dev->m2m_dev_dec = v4l2_m2m_init(&mtk_vdec_m2m_ops);
  271. if (IS_ERR((__force void *)dev->m2m_dev_dec)) {
  272. mtk_v4l2_err("Failed to init mem2mem dec device");
  273. ret = PTR_ERR((__force void *)dev->m2m_dev_dec);
  274. goto err_dec_mem_init;
  275. }
  276. dev->decode_workqueue =
  277. alloc_ordered_workqueue(MTK_VCODEC_DEC_NAME,
  278. WQ_MEM_RECLAIM | WQ_FREEZABLE);
  279. if (!dev->decode_workqueue) {
  280. mtk_v4l2_err("Failed to create decode workqueue");
  281. ret = -EINVAL;
  282. goto err_event_workq;
  283. }
  284. ret = video_register_device(vfd_dec, VFL_TYPE_GRABBER, 0);
  285. if (ret) {
  286. mtk_v4l2_err("Failed to register video device");
  287. goto err_dec_reg;
  288. }
  289. mtk_v4l2_debug(0, "decoder registered as /dev/video%d",
  290. vfd_dec->num);
  291. return 0;
  292. err_dec_reg:
  293. destroy_workqueue(dev->decode_workqueue);
  294. err_event_workq:
  295. v4l2_m2m_release(dev->m2m_dev_dec);
  296. err_dec_mem_init:
  297. video_unregister_device(vfd_dec);
  298. err_dec_alloc:
  299. v4l2_device_unregister(&dev->v4l2_dev);
  300. err_res:
  301. mtk_vcodec_release_dec_pm(dev);
  302. return ret;
  303. }
  304. static const struct of_device_id mtk_vcodec_match[] = {
  305. {.compatible = "mediatek,mt8173-vcodec-dec",},
  306. {},
  307. };
  308. MODULE_DEVICE_TABLE(of, mtk_vcodec_match);
  309. static int mtk_vcodec_dec_remove(struct platform_device *pdev)
  310. {
  311. struct mtk_vcodec_dev *dev = platform_get_drvdata(pdev);
  312. flush_workqueue(dev->decode_workqueue);
  313. destroy_workqueue(dev->decode_workqueue);
  314. if (dev->m2m_dev_dec)
  315. v4l2_m2m_release(dev->m2m_dev_dec);
  316. if (dev->vfd_dec)
  317. video_unregister_device(dev->vfd_dec);
  318. v4l2_device_unregister(&dev->v4l2_dev);
  319. mtk_vcodec_release_dec_pm(dev);
  320. return 0;
  321. }
  322. static struct platform_driver mtk_vcodec_dec_driver = {
  323. .probe = mtk_vcodec_probe,
  324. .remove = mtk_vcodec_dec_remove,
  325. .driver = {
  326. .name = MTK_VCODEC_DEC_NAME,
  327. .of_match_table = mtk_vcodec_match,
  328. },
  329. };
  330. module_platform_driver(mtk_vcodec_dec_driver);
  331. MODULE_LICENSE("GPL v2");
  332. MODULE_DESCRIPTION("Mediatek video codec V4L2 decoder driver");