fimc-capture.c 50 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910
  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-v4l2.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "common.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. #include "media-dev.h"
  31. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  32. {
  33. struct fimc_source_info *si = &fimc->vid_cap.source_config;
  34. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  35. int ret;
  36. unsigned long flags;
  37. if (ctx == NULL || ctx->s_frame.fmt == NULL)
  38. return -EINVAL;
  39. if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
  40. ret = fimc_hw_camblk_cfg_writeback(fimc);
  41. if (ret < 0)
  42. return ret;
  43. }
  44. spin_lock_irqsave(&fimc->slock, flags);
  45. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  46. fimc_set_yuv_order(ctx);
  47. fimc_hw_set_camera_polarity(fimc, si);
  48. fimc_hw_set_camera_type(fimc, si);
  49. fimc_hw_set_camera_source(fimc, si);
  50. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  51. ret = fimc_set_scaler_info(ctx);
  52. if (!ret) {
  53. fimc_hw_set_input_path(ctx);
  54. fimc_hw_set_prescaler(ctx);
  55. fimc_hw_set_mainscaler(ctx);
  56. fimc_hw_set_target_format(ctx);
  57. fimc_hw_set_rotation(ctx);
  58. fimc_hw_set_effect(ctx);
  59. fimc_hw_set_output_path(ctx);
  60. fimc_hw_set_out_dma(ctx);
  61. if (fimc->drv_data->alpha_color)
  62. fimc_hw_set_rgb_alpha(ctx);
  63. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  64. }
  65. spin_unlock_irqrestore(&fimc->slock, flags);
  66. return ret;
  67. }
  68. /*
  69. * Reinitialize the driver so it is ready to start the streaming again.
  70. * Set fimc->state to indicate stream off and the hardware shut down state.
  71. * If not suspending (@suspend is false), return any buffers to videobuf2.
  72. * Otherwise put any owned buffers onto the pending buffers queue, so they
  73. * can be re-spun when the device is being resumed. Also perform FIMC
  74. * software reset and disable streaming on the whole pipeline if required.
  75. */
  76. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  77. {
  78. struct fimc_vid_cap *cap = &fimc->vid_cap;
  79. struct fimc_vid_buffer *buf;
  80. unsigned long flags;
  81. bool streaming;
  82. spin_lock_irqsave(&fimc->slock, flags);
  83. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  84. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  85. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  86. if (suspend)
  87. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  88. else
  89. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  90. /* Release unused buffers */
  91. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  92. buf = fimc_pending_queue_pop(cap);
  93. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  94. }
  95. /* If suspending put unused buffers onto pending queue */
  96. while (!list_empty(&cap->active_buf_q)) {
  97. buf = fimc_active_queue_pop(cap);
  98. if (suspend)
  99. fimc_pending_queue_add(cap, buf);
  100. else
  101. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  102. }
  103. fimc_hw_reset(fimc);
  104. cap->buf_index = 0;
  105. spin_unlock_irqrestore(&fimc->slock, flags);
  106. if (streaming)
  107. return fimc_pipeline_call(&cap->ve, set_stream, 0);
  108. else
  109. return 0;
  110. }
  111. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  112. {
  113. unsigned long flags;
  114. if (!fimc_capture_active(fimc))
  115. return 0;
  116. spin_lock_irqsave(&fimc->slock, flags);
  117. set_bit(ST_CAPT_SHUT, &fimc->state);
  118. fimc_deactivate_capture(fimc);
  119. spin_unlock_irqrestore(&fimc->slock, flags);
  120. wait_event_timeout(fimc->irq_queue,
  121. !test_bit(ST_CAPT_SHUT, &fimc->state),
  122. (2*HZ/10)); /* 200 ms */
  123. return fimc_capture_state_cleanup(fimc, suspend);
  124. }
  125. /**
  126. * fimc_capture_config_update - apply the camera interface configuration
  127. *
  128. * To be called from within the interrupt handler with fimc.slock
  129. * spinlock held. It updates the camera pixel crop, rotation and
  130. * image flip in H/W.
  131. */
  132. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  133. {
  134. struct fimc_dev *fimc = ctx->fimc_dev;
  135. int ret;
  136. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  137. ret = fimc_set_scaler_info(ctx);
  138. if (ret)
  139. return ret;
  140. fimc_hw_set_prescaler(ctx);
  141. fimc_hw_set_mainscaler(ctx);
  142. fimc_hw_set_target_format(ctx);
  143. fimc_hw_set_rotation(ctx);
  144. fimc_hw_set_effect(ctx);
  145. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  146. fimc_hw_set_out_dma(ctx);
  147. if (fimc->drv_data->alpha_color)
  148. fimc_hw_set_rgb_alpha(ctx);
  149. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  150. return ret;
  151. }
  152. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  153. {
  154. struct fimc_vid_cap *cap = &fimc->vid_cap;
  155. struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);
  156. struct v4l2_subdev *csis = p->subdevs[IDX_CSIS];
  157. struct fimc_frame *f = &cap->ctx->d_frame;
  158. struct fimc_vid_buffer *v_buf;
  159. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  160. wake_up(&fimc->irq_queue);
  161. goto done;
  162. }
  163. if (!list_empty(&cap->active_buf_q) &&
  164. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  165. v_buf = fimc_active_queue_pop(cap);
  166. v_buf->vb.vb2_buf.timestamp = ktime_get_ns();
  167. v_buf->vb.sequence = cap->frame_count++;
  168. vb2_buffer_done(&v_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
  169. }
  170. if (!list_empty(&cap->pending_buf_q)) {
  171. v_buf = fimc_pending_queue_pop(cap);
  172. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  173. v_buf->index = cap->buf_index;
  174. /* Move the buffer to the capture active queue */
  175. fimc_active_queue_add(cap, v_buf);
  176. dbg("next frame: %d, done frame: %d",
  177. fimc_hw_get_frame_index(fimc), v_buf->index);
  178. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  179. cap->buf_index = 0;
  180. }
  181. /*
  182. * Set up a buffer at MIPI-CSIS if current image format
  183. * requires the frame embedded data capture.
  184. */
  185. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  186. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  187. unsigned int size = f->payload[plane];
  188. s32 index = fimc_hw_get_frame_index(fimc);
  189. void *vaddr;
  190. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  191. if (v_buf->index != index)
  192. continue;
  193. vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane);
  194. v4l2_subdev_call(csis, video, s_rx_buffer,
  195. vaddr, &size);
  196. break;
  197. }
  198. }
  199. if (cap->active_buf_cnt == 0) {
  200. if (deq_buf)
  201. clear_bit(ST_CAPT_RUN, &fimc->state);
  202. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  203. cap->buf_index = 0;
  204. } else {
  205. set_bit(ST_CAPT_RUN, &fimc->state);
  206. }
  207. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  208. fimc_capture_config_update(cap->ctx);
  209. done:
  210. if (cap->active_buf_cnt == 1) {
  211. fimc_deactivate_capture(fimc);
  212. clear_bit(ST_CAPT_STREAM, &fimc->state);
  213. }
  214. dbg("frame: %d, active_buf_cnt: %d",
  215. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  216. }
  217. static int start_streaming(struct vb2_queue *q, unsigned int count)
  218. {
  219. struct fimc_ctx *ctx = q->drv_priv;
  220. struct fimc_dev *fimc = ctx->fimc_dev;
  221. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  222. int min_bufs;
  223. int ret;
  224. vid_cap->frame_count = 0;
  225. ret = fimc_capture_hw_init(fimc);
  226. if (ret) {
  227. fimc_capture_state_cleanup(fimc, false);
  228. return ret;
  229. }
  230. set_bit(ST_CAPT_PEND, &fimc->state);
  231. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  232. if (vid_cap->active_buf_cnt >= min_bufs &&
  233. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  234. fimc_activate_capture(ctx);
  235. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  236. return fimc_pipeline_call(&vid_cap->ve, set_stream, 1);
  237. }
  238. return 0;
  239. }
  240. static void stop_streaming(struct vb2_queue *q)
  241. {
  242. struct fimc_ctx *ctx = q->drv_priv;
  243. struct fimc_dev *fimc = ctx->fimc_dev;
  244. if (!fimc_capture_active(fimc))
  245. return;
  246. fimc_stop_capture(fimc, false);
  247. }
  248. int fimc_capture_suspend(struct fimc_dev *fimc)
  249. {
  250. bool suspend = fimc_capture_busy(fimc);
  251. int ret = fimc_stop_capture(fimc, suspend);
  252. if (ret)
  253. return ret;
  254. return fimc_pipeline_call(&fimc->vid_cap.ve, close);
  255. }
  256. static void buffer_queue(struct vb2_buffer *vb);
  257. int fimc_capture_resume(struct fimc_dev *fimc)
  258. {
  259. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  260. struct exynos_video_entity *ve = &vid_cap->ve;
  261. struct fimc_vid_buffer *buf;
  262. int i;
  263. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  264. return 0;
  265. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  266. vid_cap->buf_index = 0;
  267. fimc_pipeline_call(ve, open, &ve->vdev.entity, false);
  268. fimc_capture_hw_init(fimc);
  269. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  270. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  271. if (list_empty(&vid_cap->pending_buf_q))
  272. break;
  273. buf = fimc_pending_queue_pop(vid_cap);
  274. buffer_queue(&buf->vb.vb2_buf);
  275. }
  276. return 0;
  277. }
  278. static int queue_setup(struct vb2_queue *vq,
  279. unsigned int *num_buffers, unsigned int *num_planes,
  280. unsigned int sizes[], struct device *alloc_devs[])
  281. {
  282. struct fimc_ctx *ctx = vq->drv_priv;
  283. struct fimc_frame *frame = &ctx->d_frame;
  284. struct fimc_fmt *fmt = frame->fmt;
  285. unsigned long wh = frame->f_width * frame->f_height;
  286. int i;
  287. if (fmt == NULL)
  288. return -EINVAL;
  289. if (*num_planes) {
  290. if (*num_planes != fmt->memplanes)
  291. return -EINVAL;
  292. for (i = 0; i < *num_planes; i++)
  293. if (sizes[i] < (wh * fmt->depth[i]) / 8)
  294. return -EINVAL;
  295. return 0;
  296. }
  297. *num_planes = fmt->memplanes;
  298. for (i = 0; i < fmt->memplanes; i++) {
  299. unsigned int size = (wh * fmt->depth[i]) / 8;
  300. if (fimc_fmt_is_user_defined(fmt->color))
  301. sizes[i] = frame->payload[i];
  302. else
  303. sizes[i] = max_t(u32, size, frame->payload[i]);
  304. }
  305. return 0;
  306. }
  307. static int buffer_prepare(struct vb2_buffer *vb)
  308. {
  309. struct vb2_queue *vq = vb->vb2_queue;
  310. struct fimc_ctx *ctx = vq->drv_priv;
  311. int i;
  312. if (ctx->d_frame.fmt == NULL)
  313. return -EINVAL;
  314. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  315. unsigned long size = ctx->d_frame.payload[i];
  316. if (vb2_plane_size(vb, i) < size) {
  317. v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
  318. "User buffer too small (%ld < %ld)\n",
  319. vb2_plane_size(vb, i), size);
  320. return -EINVAL;
  321. }
  322. vb2_set_plane_payload(vb, i, size);
  323. }
  324. return 0;
  325. }
  326. static void buffer_queue(struct vb2_buffer *vb)
  327. {
  328. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  329. struct fimc_vid_buffer *buf
  330. = container_of(vbuf, struct fimc_vid_buffer, vb);
  331. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  332. struct fimc_dev *fimc = ctx->fimc_dev;
  333. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  334. struct exynos_video_entity *ve = &vid_cap->ve;
  335. unsigned long flags;
  336. int min_bufs;
  337. spin_lock_irqsave(&fimc->slock, flags);
  338. fimc_prepare_addr(ctx, &buf->vb.vb2_buf, &ctx->d_frame, &buf->paddr);
  339. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  340. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  341. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  342. /* Setup the buffer directly for processing. */
  343. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  344. vid_cap->buf_index;
  345. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  346. buf->index = vid_cap->buf_index;
  347. fimc_active_queue_add(vid_cap, buf);
  348. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  349. vid_cap->buf_index = 0;
  350. } else {
  351. fimc_pending_queue_add(vid_cap, buf);
  352. }
  353. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  354. if (vb2_is_streaming(&vid_cap->vbq) &&
  355. vid_cap->active_buf_cnt >= min_bufs &&
  356. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  357. int ret;
  358. fimc_activate_capture(ctx);
  359. spin_unlock_irqrestore(&fimc->slock, flags);
  360. if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  361. return;
  362. ret = fimc_pipeline_call(ve, set_stream, 1);
  363. if (ret < 0)
  364. v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
  365. return;
  366. }
  367. spin_unlock_irqrestore(&fimc->slock, flags);
  368. }
  369. static const struct vb2_ops fimc_capture_qops = {
  370. .queue_setup = queue_setup,
  371. .buf_prepare = buffer_prepare,
  372. .buf_queue = buffer_queue,
  373. .wait_prepare = vb2_ops_wait_prepare,
  374. .wait_finish = vb2_ops_wait_finish,
  375. .start_streaming = start_streaming,
  376. .stop_streaming = stop_streaming,
  377. };
  378. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  379. static int fimc_capture_open(struct file *file)
  380. {
  381. struct fimc_dev *fimc = video_drvdata(file);
  382. struct fimc_vid_cap *vc = &fimc->vid_cap;
  383. struct exynos_video_entity *ve = &vc->ve;
  384. int ret = -EBUSY;
  385. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  386. mutex_lock(&fimc->lock);
  387. if (fimc_m2m_active(fimc))
  388. goto unlock;
  389. set_bit(ST_CAPT_BUSY, &fimc->state);
  390. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  391. if (ret < 0)
  392. goto unlock;
  393. ret = v4l2_fh_open(file);
  394. if (ret) {
  395. pm_runtime_put_sync(&fimc->pdev->dev);
  396. goto unlock;
  397. }
  398. if (v4l2_fh_is_singular_file(file)) {
  399. fimc_md_graph_lock(ve);
  400. ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true);
  401. if (ret == 0 && vc->user_subdev_api && vc->inh_sensor_ctrls) {
  402. /*
  403. * Recreate controls of the the video node to drop
  404. * any controls inherited from the sensor subdev.
  405. */
  406. fimc_ctrls_delete(vc->ctx);
  407. ret = fimc_ctrls_create(vc->ctx);
  408. if (ret == 0)
  409. vc->inh_sensor_ctrls = false;
  410. }
  411. if (ret == 0)
  412. ve->vdev.entity.use_count++;
  413. fimc_md_graph_unlock(ve);
  414. if (ret == 0)
  415. ret = fimc_capture_set_default_format(fimc);
  416. if (ret < 0) {
  417. clear_bit(ST_CAPT_BUSY, &fimc->state);
  418. pm_runtime_put_sync(&fimc->pdev->dev);
  419. v4l2_fh_release(file);
  420. }
  421. }
  422. unlock:
  423. mutex_unlock(&fimc->lock);
  424. return ret;
  425. }
  426. static int fimc_capture_release(struct file *file)
  427. {
  428. struct fimc_dev *fimc = video_drvdata(file);
  429. struct fimc_vid_cap *vc = &fimc->vid_cap;
  430. bool close = v4l2_fh_is_singular_file(file);
  431. int ret;
  432. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  433. mutex_lock(&fimc->lock);
  434. if (close && vc->streaming) {
  435. media_entity_pipeline_stop(&vc->ve.vdev.entity);
  436. vc->streaming = false;
  437. }
  438. ret = _vb2_fop_release(file, NULL);
  439. if (close) {
  440. clear_bit(ST_CAPT_BUSY, &fimc->state);
  441. fimc_pipeline_call(&vc->ve, close);
  442. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  443. fimc_md_graph_lock(&vc->ve);
  444. vc->ve.vdev.entity.use_count--;
  445. fimc_md_graph_unlock(&vc->ve);
  446. }
  447. pm_runtime_put_sync(&fimc->pdev->dev);
  448. mutex_unlock(&fimc->lock);
  449. return ret;
  450. }
  451. static const struct v4l2_file_operations fimc_capture_fops = {
  452. .owner = THIS_MODULE,
  453. .open = fimc_capture_open,
  454. .release = fimc_capture_release,
  455. .poll = vb2_fop_poll,
  456. .unlocked_ioctl = video_ioctl2,
  457. .mmap = vb2_fop_mmap,
  458. };
  459. /*
  460. * Format and crop negotiation helpers
  461. */
  462. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  463. u32 *width, u32 *height,
  464. u32 *code, u32 *fourcc, int pad)
  465. {
  466. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  467. struct fimc_dev *fimc = ctx->fimc_dev;
  468. const struct fimc_variant *var = fimc->variant;
  469. const struct fimc_pix_limit *pl = var->pix_limit;
  470. struct fimc_frame *dst = &ctx->d_frame;
  471. u32 depth, min_w, max_w, min_h, align_h = 3;
  472. u32 mask = FMT_FLAGS_CAM;
  473. struct fimc_fmt *ffmt;
  474. /* Conversion from/to JPEG or User Defined format is not supported */
  475. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  476. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  477. *code = ctx->s_frame.fmt->mbus_code;
  478. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
  479. mask |= FMT_FLAGS_M2M;
  480. if (pad == FIMC_SD_PAD_SINK_FIFO)
  481. mask = FMT_FLAGS_WRITEBACK;
  482. ffmt = fimc_find_format(fourcc, code, mask, 0);
  483. if (WARN_ON(!ffmt))
  484. return NULL;
  485. if (code)
  486. *code = ffmt->mbus_code;
  487. if (fourcc)
  488. *fourcc = ffmt->fourcc;
  489. if (pad != FIMC_SD_PAD_SOURCE) {
  490. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  491. pl->scaler_dis_w : pl->scaler_en_w;
  492. /* Apply the camera input interface pixel constraints */
  493. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  494. height, max_t(u32, *height, 32),
  495. FIMC_CAMIF_MAX_HEIGHT,
  496. fimc_fmt_is_user_defined(ffmt->color) ?
  497. 3 : 1,
  498. 0);
  499. return ffmt;
  500. }
  501. /* Can't scale or crop in transparent (JPEG) transfer mode */
  502. if (fimc_fmt_is_user_defined(ffmt->color)) {
  503. *width = ctx->s_frame.f_width;
  504. *height = ctx->s_frame.f_height;
  505. return ffmt;
  506. }
  507. /* Apply the scaler and the output DMA constraints */
  508. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  509. if (ctx->state & FIMC_COMPOSE) {
  510. min_w = dst->offs_h + dst->width;
  511. min_h = dst->offs_v + dst->height;
  512. } else {
  513. min_w = var->min_out_pixsize;
  514. min_h = var->min_out_pixsize;
  515. }
  516. if (var->min_vsize_align == 1 && !rotation)
  517. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  518. depth = fimc_get_format_depth(ffmt);
  519. v4l_bound_align_image(width, min_w, max_w,
  520. ffs(var->min_out_pixsize) - 1,
  521. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  522. align_h,
  523. 64/(ALIGN(depth, 8)));
  524. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  525. pad, code ? *code : 0, *width, *height,
  526. dst->f_width, dst->f_height);
  527. return ffmt;
  528. }
  529. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  530. struct v4l2_rect *r,
  531. int target)
  532. {
  533. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  534. struct fimc_dev *fimc = ctx->fimc_dev;
  535. const struct fimc_variant *var = fimc->variant;
  536. const struct fimc_pix_limit *pl = var->pix_limit;
  537. struct fimc_frame *sink = &ctx->s_frame;
  538. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  539. u32 align_sz = 0, align_h = 4;
  540. u32 max_sc_h, max_sc_v;
  541. /* In JPEG transparent transfer mode cropping is not supported */
  542. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  543. r->width = sink->f_width;
  544. r->height = sink->f_height;
  545. r->left = r->top = 0;
  546. return;
  547. }
  548. if (target == V4L2_SEL_TGT_COMPOSE) {
  549. if (ctx->rotation != 90 && ctx->rotation != 270)
  550. align_h = 1;
  551. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  552. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  553. min_sz = var->min_out_pixsize;
  554. } else {
  555. u32 depth = fimc_get_format_depth(sink->fmt);
  556. align_sz = 64/ALIGN(depth, 8);
  557. min_sz = var->min_inp_pixsize;
  558. min_w = min_h = min_sz;
  559. max_sc_h = max_sc_v = 1;
  560. }
  561. /*
  562. * For the compose rectangle the following constraints must be met:
  563. * - it must fit in the sink pad format rectangle (f_width/f_height);
  564. * - maximum downscaling ratio is 64;
  565. * - maximum crop size depends if the rotator is used or not;
  566. * - the sink pad format width/height must be 4 multiple of the
  567. * prescaler ratios determined by sink pad size and source pad crop,
  568. * the prescaler ratio is returned by fimc_get_scaler_factor().
  569. */
  570. max_w = min_t(u32,
  571. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  572. rotate ? sink->f_height : sink->f_width);
  573. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  574. if (target == V4L2_SEL_TGT_COMPOSE) {
  575. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  576. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  577. if (rotate) {
  578. swap(max_sc_h, max_sc_v);
  579. swap(min_w, min_h);
  580. }
  581. }
  582. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  583. &r->height, min_h, max_h, align_h,
  584. align_sz);
  585. /* Adjust left/top if crop/compose rectangle is out of bounds */
  586. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  587. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  588. r->left = round_down(r->left, var->hor_offs_align);
  589. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  590. target, r->left, r->top, r->width, r->height,
  591. sink->f_width, sink->f_height);
  592. }
  593. /*
  594. * The video node ioctl operations
  595. */
  596. static int fimc_cap_querycap(struct file *file, void *priv,
  597. struct v4l2_capability *cap)
  598. {
  599. struct fimc_dev *fimc = video_drvdata(file);
  600. __fimc_vidioc_querycap(&fimc->pdev->dev, cap, V4L2_CAP_STREAMING |
  601. V4L2_CAP_VIDEO_CAPTURE_MPLANE);
  602. return 0;
  603. }
  604. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  605. struct v4l2_fmtdesc *f)
  606. {
  607. struct fimc_fmt *fmt;
  608. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  609. f->index);
  610. if (!fmt)
  611. return -EINVAL;
  612. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  613. f->pixelformat = fmt->fourcc;
  614. if (fmt->fourcc == MEDIA_BUS_FMT_JPEG_1X8)
  615. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  616. return 0;
  617. }
  618. static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
  619. {
  620. struct media_pad *pad = &me->pads[0];
  621. while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
  622. pad = media_entity_remote_pad(pad);
  623. if (!pad)
  624. break;
  625. me = pad->entity;
  626. pad = &me->pads[0];
  627. }
  628. return me;
  629. }
  630. /**
  631. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  632. * elements
  633. * @ctx: FIMC capture context
  634. * @tfmt: media bus format to try/set on subdevs
  635. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  636. * @set: true to set format on subdevs, false to try only
  637. */
  638. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  639. struct v4l2_mbus_framefmt *tfmt,
  640. struct fimc_fmt **fmt_id,
  641. bool set)
  642. {
  643. struct fimc_dev *fimc = ctx->fimc_dev;
  644. struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);
  645. struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
  646. struct v4l2_subdev_format sfmt;
  647. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  648. struct media_entity *me;
  649. struct fimc_fmt *ffmt;
  650. struct media_pad *pad;
  651. int ret, i = 1;
  652. u32 fcc;
  653. if (WARN_ON(!sd || !tfmt))
  654. return -EINVAL;
  655. memset(&sfmt, 0, sizeof(sfmt));
  656. sfmt.format = *tfmt;
  657. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  658. me = fimc_pipeline_get_head(&sd->entity);
  659. while (1) {
  660. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  661. FMT_FLAGS_CAM, i++);
  662. if (ffmt == NULL) {
  663. /*
  664. * Notify user-space if common pixel code for
  665. * host and sensor does not exist.
  666. */
  667. return -EINVAL;
  668. }
  669. mf->code = tfmt->code = ffmt->mbus_code;
  670. /* set format on all pipeline subdevs */
  671. while (me != &fimc->vid_cap.subdev.entity) {
  672. sd = media_entity_to_v4l2_subdev(me);
  673. sfmt.pad = 0;
  674. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  675. if (ret)
  676. return ret;
  677. if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
  678. sfmt.pad = me->num_pads - 1;
  679. mf->code = tfmt->code;
  680. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
  681. &sfmt);
  682. if (ret)
  683. return ret;
  684. }
  685. pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
  686. if (!pad)
  687. return -EINVAL;
  688. me = pad->entity;
  689. }
  690. if (mf->code != tfmt->code)
  691. continue;
  692. fcc = ffmt->fourcc;
  693. tfmt->width = mf->width;
  694. tfmt->height = mf->height;
  695. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  696. NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
  697. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  698. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  699. if (ffmt && ffmt->mbus_code)
  700. mf->code = ffmt->mbus_code;
  701. if (mf->width != tfmt->width || mf->height != tfmt->height)
  702. continue;
  703. tfmt->code = mf->code;
  704. break;
  705. }
  706. if (fmt_id && ffmt)
  707. *fmt_id = ffmt;
  708. *tfmt = *mf;
  709. return 0;
  710. }
  711. /**
  712. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  713. * @sensor: pointer to the sensor subdev
  714. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  715. * @try: true to set the frame parameters, false to query only
  716. *
  717. * This function is used by this driver only for compressed/blob data formats.
  718. */
  719. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  720. struct v4l2_plane_pix_format *plane_fmt,
  721. unsigned int num_planes, bool try)
  722. {
  723. struct v4l2_mbus_frame_desc fd;
  724. int i, ret;
  725. int pad;
  726. for (i = 0; i < num_planes; i++)
  727. fd.entry[i].length = plane_fmt[i].sizeimage;
  728. pad = sensor->entity.num_pads - 1;
  729. if (try)
  730. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
  731. else
  732. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
  733. if (ret < 0)
  734. return ret;
  735. if (num_planes != fd.num_entries)
  736. return -EINVAL;
  737. for (i = 0; i < num_planes; i++)
  738. plane_fmt[i].sizeimage = fd.entry[i].length;
  739. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  740. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  741. fd.entry[0].length);
  742. return -EINVAL;
  743. }
  744. return 0;
  745. }
  746. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  747. struct v4l2_format *f)
  748. {
  749. struct fimc_dev *fimc = video_drvdata(file);
  750. __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
  751. return 0;
  752. }
  753. /*
  754. * Try or set format on the fimc.X.capture video node and additionally
  755. * on the whole pipeline if @try is false.
  756. * Locking: the caller must _not_ hold the graph mutex.
  757. */
  758. static int __video_try_or_set_format(struct fimc_dev *fimc,
  759. struct v4l2_format *f, bool try,
  760. struct fimc_fmt **inp_fmt,
  761. struct fimc_fmt **out_fmt)
  762. {
  763. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  764. struct fimc_vid_cap *vc = &fimc->vid_cap;
  765. struct exynos_video_entity *ve = &vc->ve;
  766. struct fimc_ctx *ctx = vc->ctx;
  767. unsigned int width = 0, height = 0;
  768. int ret = 0;
  769. /* Pre-configure format at the camera input interface, for JPEG only */
  770. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  771. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  772. NULL, &pix->pixelformat,
  773. FIMC_SD_PAD_SINK_CAM);
  774. if (try) {
  775. width = pix->width;
  776. height = pix->height;
  777. } else {
  778. ctx->s_frame.f_width = pix->width;
  779. ctx->s_frame.f_height = pix->height;
  780. }
  781. }
  782. /* Try the format at the scaler and the DMA output */
  783. *out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  784. NULL, &pix->pixelformat,
  785. FIMC_SD_PAD_SOURCE);
  786. if (*out_fmt == NULL)
  787. return -EINVAL;
  788. /* Restore image width/height for JPEG (no resizing supported). */
  789. if (try && fimc_jpeg_fourcc(pix->pixelformat)) {
  790. pix->width = width;
  791. pix->height = height;
  792. }
  793. /* Try to match format at the host and the sensor */
  794. if (!vc->user_subdev_api) {
  795. struct v4l2_mbus_framefmt mbus_fmt;
  796. struct v4l2_mbus_framefmt *mf;
  797. mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt;
  798. mf->code = (*out_fmt)->mbus_code;
  799. mf->width = pix->width;
  800. mf->height = pix->height;
  801. fimc_md_graph_lock(ve);
  802. ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try);
  803. fimc_md_graph_unlock(ve);
  804. if (ret < 0)
  805. return ret;
  806. pix->width = mf->width;
  807. pix->height = mf->height;
  808. }
  809. fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix);
  810. if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) {
  811. struct v4l2_subdev *sensor;
  812. fimc_md_graph_lock(ve);
  813. sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
  814. if (sensor)
  815. fimc_get_sensor_frame_desc(sensor, pix->plane_fmt,
  816. (*out_fmt)->memplanes, try);
  817. else
  818. ret = -EPIPE;
  819. fimc_md_graph_unlock(ve);
  820. }
  821. return ret;
  822. }
  823. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  824. struct v4l2_format *f)
  825. {
  826. struct fimc_dev *fimc = video_drvdata(file);
  827. struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL;
  828. return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt);
  829. }
  830. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  831. enum fimc_color_fmt color)
  832. {
  833. bool jpeg = fimc_fmt_is_user_defined(color);
  834. ctx->scaler.enabled = !jpeg;
  835. fimc_ctrls_activate(ctx, !jpeg);
  836. if (jpeg)
  837. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  838. else
  839. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  840. }
  841. static int __fimc_capture_set_format(struct fimc_dev *fimc,
  842. struct v4l2_format *f)
  843. {
  844. struct fimc_vid_cap *vc = &fimc->vid_cap;
  845. struct fimc_ctx *ctx = vc->ctx;
  846. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  847. struct fimc_frame *ff = &ctx->d_frame;
  848. struct fimc_fmt *inp_fmt = NULL;
  849. int ret, i;
  850. if (vb2_is_busy(&fimc->vid_cap.vbq))
  851. return -EBUSY;
  852. ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt);
  853. if (ret < 0)
  854. return ret;
  855. /* Update RGB Alpha control state and value range */
  856. fimc_alpha_ctrl_update(ctx);
  857. for (i = 0; i < ff->fmt->memplanes; i++) {
  858. ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
  859. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  860. }
  861. set_frame_bounds(ff, pix->width, pix->height);
  862. /* Reset the composition rectangle if not yet configured */
  863. if (!(ctx->state & FIMC_COMPOSE))
  864. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  865. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  866. /* Reset cropping and set format at the camera interface input */
  867. if (!vc->user_subdev_api) {
  868. ctx->s_frame.fmt = inp_fmt;
  869. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  870. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  871. }
  872. return ret;
  873. }
  874. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  875. struct v4l2_format *f)
  876. {
  877. struct fimc_dev *fimc = video_drvdata(file);
  878. return __fimc_capture_set_format(fimc, f);
  879. }
  880. static int fimc_cap_enum_input(struct file *file, void *priv,
  881. struct v4l2_input *i)
  882. {
  883. struct fimc_dev *fimc = video_drvdata(file);
  884. struct exynos_video_entity *ve = &fimc->vid_cap.ve;
  885. struct v4l2_subdev *sd;
  886. if (i->index != 0)
  887. return -EINVAL;
  888. i->type = V4L2_INPUT_TYPE_CAMERA;
  889. fimc_md_graph_lock(ve);
  890. sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
  891. fimc_md_graph_unlock(ve);
  892. if (sd)
  893. strlcpy(i->name, sd->name, sizeof(i->name));
  894. return 0;
  895. }
  896. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  897. {
  898. return i == 0 ? i : -EINVAL;
  899. }
  900. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  901. {
  902. *i = 0;
  903. return 0;
  904. }
  905. /**
  906. * fimc_pipeline_validate - check for formats inconsistencies
  907. * between source and sink pad of each link
  908. *
  909. * Return 0 if all formats match or -EPIPE otherwise.
  910. */
  911. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  912. {
  913. struct v4l2_subdev_format sink_fmt, src_fmt;
  914. struct fimc_vid_cap *vc = &fimc->vid_cap;
  915. struct v4l2_subdev *sd = &vc->subdev;
  916. struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);
  917. struct media_pad *sink_pad, *src_pad;
  918. int i, ret;
  919. while (1) {
  920. /*
  921. * Find current entity sink pad and any remote sink pad linked
  922. * to it. We stop if there is no sink pad in current entity or
  923. * it is not linked to any other remote entity.
  924. */
  925. src_pad = NULL;
  926. for (i = 0; i < sd->entity.num_pads; i++) {
  927. struct media_pad *p = &sd->entity.pads[i];
  928. if (p->flags & MEDIA_PAD_FL_SINK) {
  929. sink_pad = p;
  930. src_pad = media_entity_remote_pad(sink_pad);
  931. if (src_pad)
  932. break;
  933. }
  934. }
  935. if (!src_pad || !is_media_entity_v4l2_subdev(src_pad->entity))
  936. break;
  937. /* Don't call FIMC subdev operation to avoid nested locking */
  938. if (sd == &vc->subdev) {
  939. struct fimc_frame *ff = &vc->ctx->s_frame;
  940. sink_fmt.format.width = ff->f_width;
  941. sink_fmt.format.height = ff->f_height;
  942. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  943. } else {
  944. sink_fmt.pad = sink_pad->index;
  945. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  946. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  947. if (ret < 0 && ret != -ENOIOCTLCMD)
  948. return -EPIPE;
  949. }
  950. /* Retrieve format at the source pad */
  951. sd = media_entity_to_v4l2_subdev(src_pad->entity);
  952. src_fmt.pad = src_pad->index;
  953. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  954. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  955. if (ret < 0 && ret != -ENOIOCTLCMD)
  956. return -EPIPE;
  957. if (src_fmt.format.width != sink_fmt.format.width ||
  958. src_fmt.format.height != sink_fmt.format.height ||
  959. src_fmt.format.code != sink_fmt.format.code)
  960. return -EPIPE;
  961. if (sd == p->subdevs[IDX_SENSOR] &&
  962. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  963. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  964. struct fimc_frame *frame = &vc->ctx->d_frame;
  965. unsigned int i;
  966. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  967. frame->fmt->memplanes,
  968. false);
  969. if (ret < 0)
  970. return -EPIPE;
  971. for (i = 0; i < frame->fmt->memplanes; i++)
  972. if (frame->payload[i] < plane_fmt[i].sizeimage)
  973. return -EPIPE;
  974. }
  975. }
  976. return 0;
  977. }
  978. static int fimc_cap_streamon(struct file *file, void *priv,
  979. enum v4l2_buf_type type)
  980. {
  981. struct fimc_dev *fimc = video_drvdata(file);
  982. struct fimc_vid_cap *vc = &fimc->vid_cap;
  983. struct media_entity *entity = &vc->ve.vdev.entity;
  984. struct fimc_source_info *si = NULL;
  985. struct v4l2_subdev *sd;
  986. int ret;
  987. if (fimc_capture_active(fimc))
  988. return -EBUSY;
  989. ret = media_entity_pipeline_start(entity, &vc->ve.pipe->mp);
  990. if (ret < 0)
  991. return ret;
  992. sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);
  993. if (sd)
  994. si = v4l2_get_subdev_hostdata(sd);
  995. if (si == NULL) {
  996. ret = -EPIPE;
  997. goto err_p_stop;
  998. }
  999. /*
  1000. * Save configuration data related to currently attached image
  1001. * sensor or other data source, e.g. FIMC-IS.
  1002. */
  1003. vc->source_config = *si;
  1004. if (vc->input == GRP_ID_FIMC_IS)
  1005. vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  1006. if (vc->user_subdev_api) {
  1007. ret = fimc_pipeline_validate(fimc);
  1008. if (ret < 0)
  1009. goto err_p_stop;
  1010. }
  1011. ret = vb2_ioctl_streamon(file, priv, type);
  1012. if (!ret) {
  1013. vc->streaming = true;
  1014. return ret;
  1015. }
  1016. err_p_stop:
  1017. media_entity_pipeline_stop(entity);
  1018. return ret;
  1019. }
  1020. static int fimc_cap_streamoff(struct file *file, void *priv,
  1021. enum v4l2_buf_type type)
  1022. {
  1023. struct fimc_dev *fimc = video_drvdata(file);
  1024. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1025. int ret;
  1026. ret = vb2_ioctl_streamoff(file, priv, type);
  1027. if (ret < 0)
  1028. return ret;
  1029. media_entity_pipeline_stop(&vc->ve.vdev.entity);
  1030. vc->streaming = false;
  1031. return 0;
  1032. }
  1033. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1034. struct v4l2_requestbuffers *reqbufs)
  1035. {
  1036. struct fimc_dev *fimc = video_drvdata(file);
  1037. int ret;
  1038. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  1039. if (!ret)
  1040. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1041. return ret;
  1042. }
  1043. static int fimc_cap_g_selection(struct file *file, void *fh,
  1044. struct v4l2_selection *s)
  1045. {
  1046. struct fimc_dev *fimc = video_drvdata(file);
  1047. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1048. struct fimc_frame *f = &ctx->s_frame;
  1049. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1050. return -EINVAL;
  1051. switch (s->target) {
  1052. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1053. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1054. f = &ctx->d_frame;
  1055. case V4L2_SEL_TGT_CROP_BOUNDS:
  1056. case V4L2_SEL_TGT_CROP_DEFAULT:
  1057. s->r.left = 0;
  1058. s->r.top = 0;
  1059. s->r.width = f->o_width;
  1060. s->r.height = f->o_height;
  1061. return 0;
  1062. case V4L2_SEL_TGT_COMPOSE:
  1063. f = &ctx->d_frame;
  1064. case V4L2_SEL_TGT_CROP:
  1065. s->r.left = f->offs_h;
  1066. s->r.top = f->offs_v;
  1067. s->r.width = f->width;
  1068. s->r.height = f->height;
  1069. return 0;
  1070. }
  1071. return -EINVAL;
  1072. }
  1073. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1074. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1075. {
  1076. if (a->left < b->left || a->top < b->top)
  1077. return 0;
  1078. if (a->left + a->width > b->left + b->width)
  1079. return 0;
  1080. if (a->top + a->height > b->top + b->height)
  1081. return 0;
  1082. return 1;
  1083. }
  1084. static int fimc_cap_s_selection(struct file *file, void *fh,
  1085. struct v4l2_selection *s)
  1086. {
  1087. struct fimc_dev *fimc = video_drvdata(file);
  1088. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1089. struct v4l2_rect rect = s->r;
  1090. struct fimc_frame *f;
  1091. unsigned long flags;
  1092. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1093. return -EINVAL;
  1094. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1095. f = &ctx->d_frame;
  1096. else if (s->target == V4L2_SEL_TGT_CROP)
  1097. f = &ctx->s_frame;
  1098. else
  1099. return -EINVAL;
  1100. fimc_capture_try_selection(ctx, &rect, s->target);
  1101. if (s->flags & V4L2_SEL_FLAG_LE &&
  1102. !enclosed_rectangle(&rect, &s->r))
  1103. return -ERANGE;
  1104. if (s->flags & V4L2_SEL_FLAG_GE &&
  1105. !enclosed_rectangle(&s->r, &rect))
  1106. return -ERANGE;
  1107. s->r = rect;
  1108. spin_lock_irqsave(&fimc->slock, flags);
  1109. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1110. s->r.height);
  1111. spin_unlock_irqrestore(&fimc->slock, flags);
  1112. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1113. return 0;
  1114. }
  1115. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1116. .vidioc_querycap = fimc_cap_querycap,
  1117. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1118. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1119. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1120. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1121. .vidioc_reqbufs = fimc_cap_reqbufs,
  1122. .vidioc_querybuf = vb2_ioctl_querybuf,
  1123. .vidioc_qbuf = vb2_ioctl_qbuf,
  1124. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1125. .vidioc_expbuf = vb2_ioctl_expbuf,
  1126. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1127. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1128. .vidioc_streamon = fimc_cap_streamon,
  1129. .vidioc_streamoff = fimc_cap_streamoff,
  1130. .vidioc_g_selection = fimc_cap_g_selection,
  1131. .vidioc_s_selection = fimc_cap_s_selection,
  1132. .vidioc_enum_input = fimc_cap_enum_input,
  1133. .vidioc_s_input = fimc_cap_s_input,
  1134. .vidioc_g_input = fimc_cap_g_input,
  1135. };
  1136. /* Capture subdev media entity operations */
  1137. static int fimc_link_setup(struct media_entity *entity,
  1138. const struct media_pad *local,
  1139. const struct media_pad *remote, u32 flags)
  1140. {
  1141. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1142. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1143. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1144. struct v4l2_subdev *sensor;
  1145. if (!is_media_entity_v4l2_subdev(remote->entity))
  1146. return -EINVAL;
  1147. if (WARN_ON(fimc == NULL))
  1148. return 0;
  1149. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1150. local->entity->name, remote->entity->name, flags,
  1151. fimc->vid_cap.input);
  1152. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1153. fimc->vid_cap.input = 0;
  1154. return 0;
  1155. }
  1156. if (vc->input != 0)
  1157. return -EBUSY;
  1158. vc->input = sd->grp_id;
  1159. if (vc->user_subdev_api || vc->inh_sensor_ctrls)
  1160. return 0;
  1161. /* Inherit V4L2 controls from the image sensor subdev. */
  1162. sensor = fimc_find_remote_sensor(&vc->subdev.entity);
  1163. if (sensor == NULL)
  1164. return 0;
  1165. return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
  1166. sensor->ctrl_handler, NULL);
  1167. }
  1168. static const struct media_entity_operations fimc_sd_media_ops = {
  1169. .link_setup = fimc_link_setup,
  1170. };
  1171. /**
  1172. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1173. * @sd: pointer to a subdev generating the notification
  1174. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1175. * @arg: pointer to an u32 type integer that stores the frame payload value
  1176. *
  1177. * The End Of Frame notification sent by sensor subdev in its still capture
  1178. * mode. If there is only a single VSYNC generated by the sensor at the
  1179. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1180. * (end of frame) interrupt. And this notification is used to complete the
  1181. * frame capture and returning a buffer to user-space. Subdev drivers should
  1182. * call this notification from their last 'End of frame capture' interrupt.
  1183. */
  1184. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1185. void *arg)
  1186. {
  1187. struct fimc_source_info *si;
  1188. struct fimc_vid_buffer *buf;
  1189. struct fimc_md *fmd;
  1190. struct fimc_dev *fimc;
  1191. unsigned long flags;
  1192. if (sd == NULL)
  1193. return;
  1194. si = v4l2_get_subdev_hostdata(sd);
  1195. fmd = entity_to_fimc_mdev(&sd->entity);
  1196. spin_lock_irqsave(&fmd->slock, flags);
  1197. fimc = si ? source_to_sensor_info(si)->host : NULL;
  1198. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1199. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1200. unsigned long irq_flags;
  1201. spin_lock_irqsave(&fimc->slock, irq_flags);
  1202. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1203. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1204. struct fimc_vid_buffer, list);
  1205. vb2_set_plane_payload(&buf->vb.vb2_buf, 0,
  1206. *((u32 *)arg));
  1207. }
  1208. fimc_capture_irq_handler(fimc, 1);
  1209. fimc_deactivate_capture(fimc);
  1210. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1211. }
  1212. spin_unlock_irqrestore(&fmd->slock, flags);
  1213. }
  1214. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1215. struct v4l2_subdev_pad_config *cfg,
  1216. struct v4l2_subdev_mbus_code_enum *code)
  1217. {
  1218. struct fimc_fmt *fmt;
  1219. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1220. if (!fmt)
  1221. return -EINVAL;
  1222. code->code = fmt->mbus_code;
  1223. return 0;
  1224. }
  1225. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1226. struct v4l2_subdev_pad_config *cfg,
  1227. struct v4l2_subdev_format *fmt)
  1228. {
  1229. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1230. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1231. struct fimc_frame *ff = &ctx->s_frame;
  1232. struct v4l2_mbus_framefmt *mf;
  1233. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1234. mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  1235. fmt->format = *mf;
  1236. return 0;
  1237. }
  1238. mf = &fmt->format;
  1239. mutex_lock(&fimc->lock);
  1240. switch (fmt->pad) {
  1241. case FIMC_SD_PAD_SOURCE:
  1242. if (!WARN_ON(ff->fmt == NULL))
  1243. mf->code = ff->fmt->mbus_code;
  1244. /* Sink pads crop rectangle size */
  1245. mf->width = ff->width;
  1246. mf->height = ff->height;
  1247. break;
  1248. case FIMC_SD_PAD_SINK_FIFO:
  1249. *mf = fimc->vid_cap.wb_fmt;
  1250. break;
  1251. case FIMC_SD_PAD_SINK_CAM:
  1252. default:
  1253. *mf = fimc->vid_cap.ci_fmt;
  1254. break;
  1255. }
  1256. mutex_unlock(&fimc->lock);
  1257. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1258. return 0;
  1259. }
  1260. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1261. struct v4l2_subdev_pad_config *cfg,
  1262. struct v4l2_subdev_format *fmt)
  1263. {
  1264. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1265. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1266. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1267. struct fimc_ctx *ctx = vc->ctx;
  1268. struct fimc_frame *ff;
  1269. struct fimc_fmt *ffmt;
  1270. dbg("pad%d: code: 0x%x, %dx%d",
  1271. fmt->pad, mf->code, mf->width, mf->height);
  1272. if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
  1273. return -EBUSY;
  1274. mutex_lock(&fimc->lock);
  1275. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1276. &mf->code, NULL, fmt->pad);
  1277. mutex_unlock(&fimc->lock);
  1278. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1279. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1280. mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  1281. *mf = fmt->format;
  1282. return 0;
  1283. }
  1284. /* There must be a bug in the driver if this happens */
  1285. if (WARN_ON(ffmt == NULL))
  1286. return -EINVAL;
  1287. /* Update RGB Alpha control state and value range */
  1288. fimc_alpha_ctrl_update(ctx);
  1289. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1290. if (fmt->pad == FIMC_SD_PAD_SOURCE) {
  1291. ff = &ctx->d_frame;
  1292. /* Sink pads crop rectangle size */
  1293. mf->width = ctx->s_frame.width;
  1294. mf->height = ctx->s_frame.height;
  1295. } else {
  1296. ff = &ctx->s_frame;
  1297. }
  1298. mutex_lock(&fimc->lock);
  1299. set_frame_bounds(ff, mf->width, mf->height);
  1300. if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
  1301. vc->wb_fmt = *mf;
  1302. else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
  1303. vc->ci_fmt = *mf;
  1304. ff->fmt = ffmt;
  1305. /* Reset the crop rectangle if required. */
  1306. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1307. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1308. if (fmt->pad != FIMC_SD_PAD_SOURCE)
  1309. ctx->state &= ~FIMC_COMPOSE;
  1310. mutex_unlock(&fimc->lock);
  1311. return 0;
  1312. }
  1313. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1314. struct v4l2_subdev_pad_config *cfg,
  1315. struct v4l2_subdev_selection *sel)
  1316. {
  1317. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1318. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1319. struct fimc_frame *f = &ctx->s_frame;
  1320. struct v4l2_rect *r = &sel->r;
  1321. struct v4l2_rect *try_sel;
  1322. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1323. return -EINVAL;
  1324. mutex_lock(&fimc->lock);
  1325. switch (sel->target) {
  1326. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1327. f = &ctx->d_frame;
  1328. case V4L2_SEL_TGT_CROP_BOUNDS:
  1329. r->width = f->o_width;
  1330. r->height = f->o_height;
  1331. r->left = 0;
  1332. r->top = 0;
  1333. mutex_unlock(&fimc->lock);
  1334. return 0;
  1335. case V4L2_SEL_TGT_CROP:
  1336. try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  1337. break;
  1338. case V4L2_SEL_TGT_COMPOSE:
  1339. try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
  1340. f = &ctx->d_frame;
  1341. break;
  1342. default:
  1343. mutex_unlock(&fimc->lock);
  1344. return -EINVAL;
  1345. }
  1346. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1347. sel->r = *try_sel;
  1348. } else {
  1349. r->left = f->offs_h;
  1350. r->top = f->offs_v;
  1351. r->width = f->width;
  1352. r->height = f->height;
  1353. }
  1354. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1355. sel->pad, r->left, r->top, r->width, r->height,
  1356. f->f_width, f->f_height);
  1357. mutex_unlock(&fimc->lock);
  1358. return 0;
  1359. }
  1360. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1361. struct v4l2_subdev_pad_config *cfg,
  1362. struct v4l2_subdev_selection *sel)
  1363. {
  1364. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1365. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1366. struct fimc_frame *f = &ctx->s_frame;
  1367. struct v4l2_rect *r = &sel->r;
  1368. struct v4l2_rect *try_sel;
  1369. unsigned long flags;
  1370. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1371. return -EINVAL;
  1372. mutex_lock(&fimc->lock);
  1373. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1374. switch (sel->target) {
  1375. case V4L2_SEL_TGT_CROP:
  1376. try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  1377. break;
  1378. case V4L2_SEL_TGT_COMPOSE:
  1379. try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
  1380. f = &ctx->d_frame;
  1381. break;
  1382. default:
  1383. mutex_unlock(&fimc->lock);
  1384. return -EINVAL;
  1385. }
  1386. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1387. *try_sel = sel->r;
  1388. } else {
  1389. spin_lock_irqsave(&fimc->slock, flags);
  1390. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1391. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1392. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1393. ctx->state |= FIMC_COMPOSE;
  1394. spin_unlock_irqrestore(&fimc->slock, flags);
  1395. }
  1396. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1397. r->width, r->height);
  1398. mutex_unlock(&fimc->lock);
  1399. return 0;
  1400. }
  1401. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1402. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1403. .get_selection = fimc_subdev_get_selection,
  1404. .set_selection = fimc_subdev_set_selection,
  1405. .get_fmt = fimc_subdev_get_fmt,
  1406. .set_fmt = fimc_subdev_set_fmt,
  1407. };
  1408. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1409. .pad = &fimc_subdev_pad_ops,
  1410. };
  1411. /* Set default format at the sensor and host interface */
  1412. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1413. {
  1414. struct v4l2_format fmt = {
  1415. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1416. .fmt.pix_mp = {
  1417. .width = FIMC_DEFAULT_WIDTH,
  1418. .height = FIMC_DEFAULT_HEIGHT,
  1419. .pixelformat = V4L2_PIX_FMT_YUYV,
  1420. .field = V4L2_FIELD_NONE,
  1421. .colorspace = V4L2_COLORSPACE_JPEG,
  1422. },
  1423. };
  1424. return __fimc_capture_set_format(fimc, &fmt);
  1425. }
  1426. /* fimc->lock must be already initialized */
  1427. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1428. struct v4l2_device *v4l2_dev)
  1429. {
  1430. struct video_device *vfd = &fimc->vid_cap.ve.vdev;
  1431. struct vb2_queue *q = &fimc->vid_cap.vbq;
  1432. struct fimc_ctx *ctx;
  1433. struct fimc_vid_cap *vid_cap;
  1434. struct fimc_fmt *fmt;
  1435. int ret = -ENOMEM;
  1436. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1437. if (!ctx)
  1438. return -ENOMEM;
  1439. ctx->fimc_dev = fimc;
  1440. ctx->in_path = FIMC_IO_CAMERA;
  1441. ctx->out_path = FIMC_IO_DMA;
  1442. ctx->state = FIMC_CTX_CAP;
  1443. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1444. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1445. memset(vfd, 0, sizeof(*vfd));
  1446. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1447. vfd->fops = &fimc_capture_fops;
  1448. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1449. vfd->v4l2_dev = v4l2_dev;
  1450. vfd->minor = -1;
  1451. vfd->release = video_device_release_empty;
  1452. vfd->queue = q;
  1453. vfd->lock = &fimc->lock;
  1454. video_set_drvdata(vfd, fimc);
  1455. vid_cap = &fimc->vid_cap;
  1456. vid_cap->active_buf_cnt = 0;
  1457. vid_cap->reqbufs_count = 0;
  1458. vid_cap->ctx = ctx;
  1459. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1460. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1461. memset(q, 0, sizeof(*q));
  1462. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1463. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1464. q->drv_priv = ctx;
  1465. q->ops = &fimc_capture_qops;
  1466. q->mem_ops = &vb2_dma_contig_memops;
  1467. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1468. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1469. q->lock = &fimc->lock;
  1470. q->dev = &fimc->pdev->dev;
  1471. ret = vb2_queue_init(q);
  1472. if (ret)
  1473. goto err_free_ctx;
  1474. /* Default format configuration */
  1475. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1476. vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH;
  1477. vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT;
  1478. vid_cap->ci_fmt.code = fmt->mbus_code;
  1479. ctx->s_frame.width = FIMC_DEFAULT_WIDTH;
  1480. ctx->s_frame.height = FIMC_DEFAULT_HEIGHT;
  1481. ctx->s_frame.fmt = fmt;
  1482. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0);
  1483. vid_cap->wb_fmt = vid_cap->ci_fmt;
  1484. vid_cap->wb_fmt.code = fmt->mbus_code;
  1485. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1486. vfd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
  1487. ret = media_entity_pads_init(&vfd->entity, 1, &vid_cap->vd_pad);
  1488. if (ret)
  1489. goto err_free_ctx;
  1490. ret = fimc_ctrls_create(ctx);
  1491. if (ret)
  1492. goto err_me_cleanup;
  1493. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1494. if (ret)
  1495. goto err_ctrl_free;
  1496. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1497. vfd->name, video_device_node_name(vfd));
  1498. vfd->ctrl_handler = &ctx->ctrls.handler;
  1499. return 0;
  1500. err_ctrl_free:
  1501. fimc_ctrls_delete(ctx);
  1502. err_me_cleanup:
  1503. media_entity_cleanup(&vfd->entity);
  1504. err_free_ctx:
  1505. kfree(ctx);
  1506. return ret;
  1507. }
  1508. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1509. {
  1510. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1511. int ret;
  1512. if (fimc == NULL)
  1513. return -ENXIO;
  1514. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1515. if (ret)
  1516. return ret;
  1517. fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);
  1518. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1519. if (ret) {
  1520. fimc_unregister_m2m_device(fimc);
  1521. fimc->vid_cap.ve.pipe = NULL;
  1522. }
  1523. return ret;
  1524. }
  1525. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1526. {
  1527. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1528. struct video_device *vdev;
  1529. if (fimc == NULL)
  1530. return;
  1531. mutex_lock(&fimc->lock);
  1532. fimc_unregister_m2m_device(fimc);
  1533. vdev = &fimc->vid_cap.ve.vdev;
  1534. if (video_is_registered(vdev)) {
  1535. video_unregister_device(vdev);
  1536. media_entity_cleanup(&vdev->entity);
  1537. fimc_ctrls_delete(fimc->vid_cap.ctx);
  1538. fimc->vid_cap.ve.pipe = NULL;
  1539. }
  1540. kfree(fimc->vid_cap.ctx);
  1541. fimc->vid_cap.ctx = NULL;
  1542. mutex_unlock(&fimc->lock);
  1543. }
  1544. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1545. .registered = fimc_capture_subdev_registered,
  1546. .unregistered = fimc_capture_subdev_unregistered,
  1547. };
  1548. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1549. {
  1550. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1551. int ret;
  1552. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1553. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1554. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
  1555. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
  1556. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
  1557. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1558. ret = media_entity_pads_init(&sd->entity, FIMC_SD_PADS_NUM,
  1559. fimc->vid_cap.sd_pads);
  1560. if (ret)
  1561. return ret;
  1562. sd->entity.ops = &fimc_sd_media_ops;
  1563. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1564. v4l2_set_subdevdata(sd, fimc);
  1565. return 0;
  1566. }
  1567. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1568. {
  1569. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1570. v4l2_device_unregister_subdev(sd);
  1571. media_entity_cleanup(&sd->entity);
  1572. v4l2_set_subdevdata(sd, NULL);
  1573. }