saa7164-core.c 41 KB

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  1. /*
  2. * Driver for the NXP SAA7164 PCIe bridge
  3. *
  4. * Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/kmod.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/delay.h>
  30. #include <asm/div64.h>
  31. #ifdef CONFIG_PROC_FS
  32. #include <linux/proc_fs.h>
  33. #endif
  34. #include "saa7164.h"
  35. MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
  36. MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
  37. MODULE_LICENSE("GPL");
  38. /*
  39. * 1 Basic
  40. * 2
  41. * 4 i2c
  42. * 8 api
  43. * 16 cmd
  44. * 32 bus
  45. */
  46. unsigned int saa_debug;
  47. module_param_named(debug, saa_debug, int, 0644);
  48. MODULE_PARM_DESC(debug, "enable debug messages");
  49. static unsigned int fw_debug;
  50. module_param(fw_debug, int, 0644);
  51. MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2");
  52. unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
  53. module_param(encoder_buffers, int, 0644);
  54. MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
  55. unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS;
  56. module_param(vbi_buffers, int, 0644);
  57. MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64");
  58. unsigned int waitsecs = 10;
  59. module_param(waitsecs, int, 0644);
  60. MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
  61. static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
  62. module_param_array(card, int, NULL, 0444);
  63. MODULE_PARM_DESC(card, "card type");
  64. static unsigned int print_histogram = 64;
  65. module_param(print_histogram, int, 0644);
  66. MODULE_PARM_DESC(print_histogram, "print histogram values once");
  67. unsigned int crc_checking = 1;
  68. module_param(crc_checking, int, 0644);
  69. MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
  70. static unsigned int guard_checking = 1;
  71. module_param(guard_checking, int, 0644);
  72. MODULE_PARM_DESC(guard_checking,
  73. "enable dma sanity checking for buffer overruns");
  74. static bool enable_msi = true;
  75. module_param(enable_msi, bool, 0444);
  76. MODULE_PARM_DESC(enable_msi,
  77. "enable the use of an msi interrupt if available");
  78. static unsigned int saa7164_devcount;
  79. static DEFINE_MUTEX(devlist);
  80. LIST_HEAD(saa7164_devlist);
  81. #define INT_SIZE 16
  82. static void saa7164_pack_verifier(struct saa7164_buffer *buf)
  83. {
  84. u8 *p = (u8 *)buf->cpu;
  85. int i;
  86. for (i = 0; i < buf->actual_size; i += 2048) {
  87. if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) ||
  88. (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) {
  89. printk(KERN_ERR "No pack at 0x%x\n", i);
  90. #if 0
  91. print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
  92. p + 1, 32, false);
  93. #endif
  94. }
  95. }
  96. }
  97. #define FIXED_VIDEO_PID 0xf1
  98. #define FIXED_AUDIO_PID 0xf2
  99. static void saa7164_ts_verifier(struct saa7164_buffer *buf)
  100. {
  101. struct saa7164_port *port = buf->port;
  102. u32 i;
  103. u8 cc, a;
  104. u16 pid;
  105. u8 *bufcpu = (u8 *)buf->cpu;
  106. port->sync_errors = 0;
  107. port->v_cc_errors = 0;
  108. port->a_cc_errors = 0;
  109. for (i = 0; i < buf->actual_size; i += 188) {
  110. if (*(bufcpu + i) != 0x47)
  111. port->sync_errors++;
  112. /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */
  113. pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2);
  114. cc = *(bufcpu + i + 3) & 0x0f;
  115. if (pid == FIXED_VIDEO_PID) {
  116. a = ((port->last_v_cc + 1) & 0x0f);
  117. if (a != cc) {
  118. printk(KERN_ERR "video cc last = %x current = %x i = %d\n",
  119. port->last_v_cc, cc, i);
  120. port->v_cc_errors++;
  121. }
  122. port->last_v_cc = cc;
  123. } else
  124. if (pid == FIXED_AUDIO_PID) {
  125. a = ((port->last_a_cc + 1) & 0x0f);
  126. if (a != cc) {
  127. printk(KERN_ERR "audio cc last = %x current = %x i = %d\n",
  128. port->last_a_cc, cc, i);
  129. port->a_cc_errors++;
  130. }
  131. port->last_a_cc = cc;
  132. }
  133. }
  134. /* Only report errors if we've been through this function atleast
  135. * once already and the cached cc values are primed. First time through
  136. * always generates errors.
  137. */
  138. if (port->v_cc_errors && (port->done_first_interrupt > 1))
  139. printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
  140. if (port->a_cc_errors && (port->done_first_interrupt > 1))
  141. printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
  142. if (port->sync_errors && (port->done_first_interrupt > 1))
  143. printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
  144. if (port->done_first_interrupt == 1)
  145. port->done_first_interrupt++;
  146. }
  147. static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
  148. {
  149. int i;
  150. memset(hg, 0, sizeof(struct saa7164_histogram));
  151. strcpy(hg->name, name);
  152. /* First 30ms x 1ms */
  153. for (i = 0; i < 30; i++)
  154. hg->counter1[0 + i].val = i;
  155. /* 30 - 200ms x 10ms */
  156. for (i = 0; i < 18; i++)
  157. hg->counter1[30 + i].val = 30 + (i * 10);
  158. /* 200 - 2000ms x 100ms */
  159. for (i = 0; i < 15; i++)
  160. hg->counter1[48 + i].val = 200 + (i * 200);
  161. /* Catch all massive value (2secs) */
  162. hg->counter1[55].val = 2000;
  163. /* Catch all massive value (4secs) */
  164. hg->counter1[56].val = 4000;
  165. /* Catch all massive value (8secs) */
  166. hg->counter1[57].val = 8000;
  167. /* Catch all massive value (15secs) */
  168. hg->counter1[58].val = 15000;
  169. /* Catch all massive value (30secs) */
  170. hg->counter1[59].val = 30000;
  171. /* Catch all massive value (60secs) */
  172. hg->counter1[60].val = 60000;
  173. /* Catch all massive value (5mins) */
  174. hg->counter1[61].val = 300000;
  175. /* Catch all massive value (15mins) */
  176. hg->counter1[62].val = 900000;
  177. /* Catch all massive values (1hr) */
  178. hg->counter1[63].val = 3600000;
  179. }
  180. void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
  181. {
  182. int i;
  183. for (i = 0; i < 64; i++) {
  184. if (val <= hg->counter1[i].val) {
  185. hg->counter1[i].count++;
  186. hg->counter1[i].update_time = jiffies;
  187. break;
  188. }
  189. }
  190. }
  191. static void saa7164_histogram_print(struct saa7164_port *port,
  192. struct saa7164_histogram *hg)
  193. {
  194. u32 entries = 0;
  195. int i;
  196. printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
  197. for (i = 0; i < 64; i++) {
  198. if (hg->counter1[i].count == 0)
  199. continue;
  200. printk(KERN_ERR " %4d %12d %Ld\n",
  201. hg->counter1[i].val,
  202. hg->counter1[i].count,
  203. hg->counter1[i].update_time);
  204. entries++;
  205. }
  206. printk(KERN_ERR "Total: %d\n", entries);
  207. }
  208. static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
  209. {
  210. struct saa7164_dev *dev = port->dev;
  211. struct saa7164_buffer *buf = NULL;
  212. struct saa7164_user_buffer *ubuf = NULL;
  213. struct list_head *c, *n;
  214. int i = 0;
  215. u8 *p;
  216. mutex_lock(&port->dmaqueue_lock);
  217. list_for_each_safe(c, n, &port->dmaqueue.list) {
  218. buf = list_entry(c, struct saa7164_buffer, list);
  219. if (i++ > port->hwcfg.buffercount) {
  220. printk(KERN_ERR "%s() illegal i count %d\n",
  221. __func__, i);
  222. break;
  223. }
  224. if (buf->idx == bufnr) {
  225. /* Found the buffer, deal with it */
  226. dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr);
  227. if (crc_checking) {
  228. /* Throw a new checksum on the dma buffer */
  229. buf->crc = crc32(0, buf->cpu, buf->actual_size);
  230. }
  231. if (guard_checking) {
  232. p = (u8 *)buf->cpu;
  233. if ((*(p + buf->actual_size + 0) != 0xff) ||
  234. (*(p + buf->actual_size + 1) != 0xff) ||
  235. (*(p + buf->actual_size + 2) != 0xff) ||
  236. (*(p + buf->actual_size + 3) != 0xff) ||
  237. (*(p + buf->actual_size + 0x10) != 0xff) ||
  238. (*(p + buf->actual_size + 0x11) != 0xff) ||
  239. (*(p + buf->actual_size + 0x12) != 0xff) ||
  240. (*(p + buf->actual_size + 0x13) != 0xff)) {
  241. printk(KERN_ERR "%s() buf %p guard buffer breach\n",
  242. __func__, buf);
  243. #if 0
  244. print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
  245. p + buf->actual_size - 32, 64, false);
  246. #endif
  247. }
  248. }
  249. if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) {
  250. /* Validate the incoming buffer content */
  251. if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
  252. saa7164_ts_verifier(buf);
  253. else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
  254. saa7164_pack_verifier(buf);
  255. }
  256. /* find a free user buffer and clone to it */
  257. if (!list_empty(&port->list_buf_free.list)) {
  258. /* Pull the first buffer from the used list */
  259. ubuf = list_first_entry(&port->list_buf_free.list,
  260. struct saa7164_user_buffer, list);
  261. if (buf->actual_size <= ubuf->actual_size) {
  262. memcpy(ubuf->data, buf->cpu, ubuf->actual_size);
  263. if (crc_checking) {
  264. /* Throw a new checksum on the read buffer */
  265. ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
  266. }
  267. /* Requeue the buffer on the free list */
  268. ubuf->pos = 0;
  269. list_move_tail(&ubuf->list,
  270. &port->list_buf_used.list);
  271. /* Flag any userland waiters */
  272. wake_up_interruptible(&port->wait_read);
  273. } else {
  274. printk(KERN_ERR "buf %p bufsize fails match\n", buf);
  275. }
  276. } else
  277. printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
  278. /* Ensure offset into buffer remains 0, fill buffer
  279. * with known bad data. We check for this data at a later point
  280. * in time. */
  281. saa7164_buffer_zero_offsets(port, bufnr);
  282. memset(buf->cpu, 0xff, buf->pci_size);
  283. if (crc_checking) {
  284. /* Throw yet aanother new checksum on the dma buffer */
  285. buf->crc = crc32(0, buf->cpu, buf->actual_size);
  286. }
  287. break;
  288. }
  289. }
  290. mutex_unlock(&port->dmaqueue_lock);
  291. }
  292. static void saa7164_work_enchandler(struct work_struct *w)
  293. {
  294. struct saa7164_port *port =
  295. container_of(w, struct saa7164_port, workenc);
  296. struct saa7164_dev *dev = port->dev;
  297. u32 wp, mcb, rp, cnt = 0;
  298. port->last_svc_msecs_diff = port->last_svc_msecs;
  299. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  300. port->last_svc_msecs_diff = port->last_svc_msecs -
  301. port->last_svc_msecs_diff;
  302. saa7164_histogram_update(&port->svc_interval,
  303. port->last_svc_msecs_diff);
  304. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  305. port->last_irq_msecs;
  306. saa7164_histogram_update(&port->irq_svc_interval,
  307. port->last_irq_svc_msecs_diff);
  308. dprintk(DBGLVL_IRQ,
  309. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  310. __func__,
  311. port->last_svc_msecs_diff,
  312. port->last_irq_svc_msecs_diff,
  313. port->last_svc_wp,
  314. port->last_svc_rp
  315. );
  316. /* Current write position */
  317. wp = saa7164_readl(port->bufcounter);
  318. if (wp > (port->hwcfg.buffercount - 1)) {
  319. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  320. return;
  321. }
  322. /* Most current complete buffer */
  323. if (wp == 0)
  324. mcb = (port->hwcfg.buffercount - 1);
  325. else
  326. mcb = wp - 1;
  327. while (1) {
  328. if (port->done_first_interrupt == 0) {
  329. port->done_first_interrupt++;
  330. rp = mcb;
  331. } else
  332. rp = (port->last_svc_rp + 1) % 8;
  333. if (rp > (port->hwcfg.buffercount - 1)) {
  334. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  335. break;
  336. }
  337. saa7164_work_enchandler_helper(port, rp);
  338. port->last_svc_rp = rp;
  339. cnt++;
  340. if (rp == mcb)
  341. break;
  342. }
  343. /* TODO: Convert this into a /proc/saa7164 style readable file */
  344. if (print_histogram == port->nr) {
  345. saa7164_histogram_print(port, &port->irq_interval);
  346. saa7164_histogram_print(port, &port->svc_interval);
  347. saa7164_histogram_print(port, &port->irq_svc_interval);
  348. saa7164_histogram_print(port, &port->read_interval);
  349. saa7164_histogram_print(port, &port->poll_interval);
  350. /* TODO: fix this to preserve any previous state */
  351. print_histogram = 64 + port->nr;
  352. }
  353. }
  354. static void saa7164_work_vbihandler(struct work_struct *w)
  355. {
  356. struct saa7164_port *port =
  357. container_of(w, struct saa7164_port, workenc);
  358. struct saa7164_dev *dev = port->dev;
  359. u32 wp, mcb, rp, cnt = 0;
  360. port->last_svc_msecs_diff = port->last_svc_msecs;
  361. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  362. port->last_svc_msecs_diff = port->last_svc_msecs -
  363. port->last_svc_msecs_diff;
  364. saa7164_histogram_update(&port->svc_interval,
  365. port->last_svc_msecs_diff);
  366. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  367. port->last_irq_msecs;
  368. saa7164_histogram_update(&port->irq_svc_interval,
  369. port->last_irq_svc_msecs_diff);
  370. dprintk(DBGLVL_IRQ,
  371. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  372. __func__,
  373. port->last_svc_msecs_diff,
  374. port->last_irq_svc_msecs_diff,
  375. port->last_svc_wp,
  376. port->last_svc_rp
  377. );
  378. /* Current write position */
  379. wp = saa7164_readl(port->bufcounter);
  380. if (wp > (port->hwcfg.buffercount - 1)) {
  381. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  382. return;
  383. }
  384. /* Most current complete buffer */
  385. if (wp == 0)
  386. mcb = (port->hwcfg.buffercount - 1);
  387. else
  388. mcb = wp - 1;
  389. while (1) {
  390. if (port->done_first_interrupt == 0) {
  391. port->done_first_interrupt++;
  392. rp = mcb;
  393. } else
  394. rp = (port->last_svc_rp + 1) % 8;
  395. if (rp > (port->hwcfg.buffercount - 1)) {
  396. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  397. break;
  398. }
  399. saa7164_work_enchandler_helper(port, rp);
  400. port->last_svc_rp = rp;
  401. cnt++;
  402. if (rp == mcb)
  403. break;
  404. }
  405. /* TODO: Convert this into a /proc/saa7164 style readable file */
  406. if (print_histogram == port->nr) {
  407. saa7164_histogram_print(port, &port->irq_interval);
  408. saa7164_histogram_print(port, &port->svc_interval);
  409. saa7164_histogram_print(port, &port->irq_svc_interval);
  410. saa7164_histogram_print(port, &port->read_interval);
  411. saa7164_histogram_print(port, &port->poll_interval);
  412. /* TODO: fix this to preserve any previous state */
  413. print_histogram = 64 + port->nr;
  414. }
  415. }
  416. static void saa7164_work_cmdhandler(struct work_struct *w)
  417. {
  418. struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
  419. /* Wake up any complete commands */
  420. saa7164_irq_dequeue(dev);
  421. }
  422. static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
  423. {
  424. struct saa7164_port *port = buf->port;
  425. /* Feed the transport payload into the kernel demux */
  426. dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
  427. SAA7164_TS_NUMBER_OF_LINES);
  428. }
  429. static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port)
  430. {
  431. struct saa7164_dev *dev = port->dev;
  432. /* Store old time */
  433. port->last_irq_msecs_diff = port->last_irq_msecs;
  434. /* Collect new stats */
  435. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  436. /* Calculate stats */
  437. port->last_irq_msecs_diff = port->last_irq_msecs -
  438. port->last_irq_msecs_diff;
  439. saa7164_histogram_update(&port->irq_interval,
  440. port->last_irq_msecs_diff);
  441. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
  442. port->last_irq_msecs_diff);
  443. /* Tis calls the vbi irq handler */
  444. schedule_work(&port->workenc);
  445. return 0;
  446. }
  447. static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
  448. {
  449. struct saa7164_dev *dev = port->dev;
  450. /* Store old time */
  451. port->last_irq_msecs_diff = port->last_irq_msecs;
  452. /* Collect new stats */
  453. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  454. /* Calculate stats */
  455. port->last_irq_msecs_diff = port->last_irq_msecs -
  456. port->last_irq_msecs_diff;
  457. saa7164_histogram_update(&port->irq_interval,
  458. port->last_irq_msecs_diff);
  459. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
  460. port->last_irq_msecs_diff);
  461. schedule_work(&port->workenc);
  462. return 0;
  463. }
  464. static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
  465. {
  466. struct saa7164_dev *dev = port->dev;
  467. struct saa7164_buffer *buf;
  468. struct list_head *c, *n;
  469. int wp, i = 0, rp;
  470. /* Find the current write point from the hardware */
  471. wp = saa7164_readl(port->bufcounter);
  472. if (wp > (port->hwcfg.buffercount - 1))
  473. BUG();
  474. /* Find the previous buffer to the current write point */
  475. if (wp == 0)
  476. rp = (port->hwcfg.buffercount - 1);
  477. else
  478. rp = wp - 1;
  479. /* Lookup the WP in the buffer list */
  480. /* TODO: turn this into a worker thread */
  481. list_for_each_safe(c, n, &port->dmaqueue.list) {
  482. buf = list_entry(c, struct saa7164_buffer, list);
  483. if (i++ > port->hwcfg.buffercount)
  484. BUG();
  485. if (buf->idx == rp) {
  486. /* Found the buffer, deal with it */
  487. dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
  488. __func__, wp, rp);
  489. saa7164_buffer_deliver(buf);
  490. break;
  491. }
  492. }
  493. return 0;
  494. }
  495. /* Primary IRQ handler and dispatch mechanism */
  496. static irqreturn_t saa7164_irq(int irq, void *dev_id)
  497. {
  498. struct saa7164_dev *dev = dev_id;
  499. struct saa7164_port *porta, *portb, *portc, *portd, *porte, *portf;
  500. u32 intid, intstat[INT_SIZE/4];
  501. int i, handled = 0, bit;
  502. if (dev == NULL) {
  503. printk(KERN_ERR "%s() No device specified\n", __func__);
  504. handled = 0;
  505. goto out;
  506. }
  507. porta = &dev->ports[SAA7164_PORT_TS1];
  508. portb = &dev->ports[SAA7164_PORT_TS2];
  509. portc = &dev->ports[SAA7164_PORT_ENC1];
  510. portd = &dev->ports[SAA7164_PORT_ENC2];
  511. porte = &dev->ports[SAA7164_PORT_VBI1];
  512. portf = &dev->ports[SAA7164_PORT_VBI2];
  513. /* Check that the hardware is accessible. If the status bytes are
  514. * 0xFF then the device is not accessible, the the IRQ belongs
  515. * to another driver.
  516. * 4 x u32 interrupt registers.
  517. */
  518. for (i = 0; i < INT_SIZE/4; i++) {
  519. /* TODO: Convert into saa7164_readl() */
  520. /* Read the 4 hardware interrupt registers */
  521. intstat[i] = saa7164_readl(dev->int_status + (i * 4));
  522. if (intstat[i])
  523. handled = 1;
  524. }
  525. if (handled == 0)
  526. goto out;
  527. /* For each of the HW interrupt registers */
  528. for (i = 0; i < INT_SIZE/4; i++) {
  529. if (intstat[i]) {
  530. /* Each function of the board has it's own interruptid.
  531. * Find the function that triggered then call
  532. * it's handler.
  533. */
  534. for (bit = 0; bit < 32; bit++) {
  535. if (((intstat[i] >> bit) & 0x00000001) == 0)
  536. continue;
  537. /* Calculate the interrupt id (0x00 to 0x7f) */
  538. intid = (i * 32) + bit;
  539. if (intid == dev->intfdesc.bInterruptId) {
  540. /* A response to an cmd/api call */
  541. schedule_work(&dev->workcmd);
  542. } else if (intid == porta->hwcfg.interruptid) {
  543. /* Transport path 1 */
  544. saa7164_irq_ts(porta);
  545. } else if (intid == portb->hwcfg.interruptid) {
  546. /* Transport path 2 */
  547. saa7164_irq_ts(portb);
  548. } else if (intid == portc->hwcfg.interruptid) {
  549. /* Encoder path 1 */
  550. saa7164_irq_encoder(portc);
  551. } else if (intid == portd->hwcfg.interruptid) {
  552. /* Encoder path 2 */
  553. saa7164_irq_encoder(portd);
  554. } else if (intid == porte->hwcfg.interruptid) {
  555. /* VBI path 1 */
  556. saa7164_irq_vbi(porte);
  557. } else if (intid == portf->hwcfg.interruptid) {
  558. /* VBI path 2 */
  559. saa7164_irq_vbi(portf);
  560. } else {
  561. /* Find the function */
  562. dprintk(DBGLVL_IRQ,
  563. "%s() unhandled interrupt reg 0x%x bit 0x%x intid = 0x%x\n",
  564. __func__, i, bit, intid);
  565. }
  566. }
  567. /* Ack it */
  568. saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
  569. }
  570. }
  571. out:
  572. return IRQ_RETVAL(handled);
  573. }
  574. void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
  575. {
  576. struct saa7164_fw_status *s = &dev->fw_status;
  577. dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
  578. dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
  579. dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
  580. dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
  581. dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
  582. dev->fw_status.remainheap =
  583. saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
  584. dprintk(1, "Firmware status:\n");
  585. dprintk(1, " .status = 0x%08x\n", s->status);
  586. dprintk(1, " .mode = 0x%08x\n", s->mode);
  587. dprintk(1, " .spec = 0x%08x\n", s->spec);
  588. dprintk(1, " .inst = 0x%08x\n", s->inst);
  589. dprintk(1, " .cpuload = 0x%08x\n", s->cpuload);
  590. dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
  591. }
  592. u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
  593. {
  594. u32 reg;
  595. reg = saa7164_readl(SAA_DEVICE_VERSION);
  596. dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
  597. (reg & 0x0000fc00) >> 10,
  598. (reg & 0x000003e0) >> 5,
  599. (reg & 0x0000001f),
  600. (reg & 0xffff0000) >> 16,
  601. reg);
  602. return reg;
  603. }
  604. /* TODO: Debugging func, remove */
  605. void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
  606. {
  607. int i;
  608. dprintk(1, "--------------------> 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  609. for (i = 0; i < 0x100; i += 16)
  610. dprintk(1, "region0[0x%08x] = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
  611. i,
  612. (u8)saa7164_readb(addr + i + 0),
  613. (u8)saa7164_readb(addr + i + 1),
  614. (u8)saa7164_readb(addr + i + 2),
  615. (u8)saa7164_readb(addr + i + 3),
  616. (u8)saa7164_readb(addr + i + 4),
  617. (u8)saa7164_readb(addr + i + 5),
  618. (u8)saa7164_readb(addr + i + 6),
  619. (u8)saa7164_readb(addr + i + 7),
  620. (u8)saa7164_readb(addr + i + 8),
  621. (u8)saa7164_readb(addr + i + 9),
  622. (u8)saa7164_readb(addr + i + 10),
  623. (u8)saa7164_readb(addr + i + 11),
  624. (u8)saa7164_readb(addr + i + 12),
  625. (u8)saa7164_readb(addr + i + 13),
  626. (u8)saa7164_readb(addr + i + 14),
  627. (u8)saa7164_readb(addr + i + 15)
  628. );
  629. }
  630. static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
  631. {
  632. dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n",
  633. &dev->hwdesc, (u32)sizeof(struct tmComResHWDescr));
  634. dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
  635. dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
  636. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  637. dev->hwdesc.bDescriptorSubtype);
  638. dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
  639. dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
  640. dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
  641. dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
  642. dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
  643. dev->hwdesc.dwDeviceRegistersLocation);
  644. dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
  645. dev->hwdesc.dwHostMemoryRegion);
  646. dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
  647. dev->hwdesc.dwHostMemoryRegionSize);
  648. dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
  649. dev->hwdesc.dwHostHibernatMemRegion);
  650. dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
  651. dev->hwdesc.dwHostHibernatMemRegionSize);
  652. }
  653. static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
  654. {
  655. dprintk(1, "@0x%p intfdesc sizeof(struct tmComResInterfaceDescr) = %d bytes\n",
  656. &dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr));
  657. dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
  658. dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
  659. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  660. dev->intfdesc.bDescriptorSubtype);
  661. dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
  662. dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
  663. dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
  664. dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
  665. dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
  666. dprintk(1, " .bDebugInterruptId = 0x%x\n",
  667. dev->intfdesc.bDebugInterruptId);
  668. dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
  669. }
  670. static void saa7164_dump_busdesc(struct saa7164_dev *dev)
  671. {
  672. dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n",
  673. &dev->busdesc, (u32)sizeof(struct tmComResBusDescr));
  674. dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing);
  675. dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing);
  676. dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite);
  677. dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead);
  678. dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
  679. dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead);
  680. }
  681. /* Much of the hardware configuration and PCI registers are configured
  682. * dynamically depending on firmware. We have to cache some initial
  683. * structures then use these to locate other important structures
  684. * from PCI space.
  685. */
  686. static void saa7164_get_descriptors(struct saa7164_dev *dev)
  687. {
  688. memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr));
  689. memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr),
  690. sizeof(struct tmComResInterfaceDescr));
  691. memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
  692. sizeof(struct tmComResBusDescr));
  693. if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) {
  694. printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n");
  695. printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
  696. (u32)sizeof(struct tmComResHWDescr));
  697. } else
  698. saa7164_dump_hwdesc(dev);
  699. if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) {
  700. printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n");
  701. printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
  702. (u32)sizeof(struct tmComResInterfaceDescr));
  703. } else
  704. saa7164_dump_intfdesc(dev);
  705. saa7164_dump_busdesc(dev);
  706. }
  707. static int saa7164_pci_quirks(struct saa7164_dev *dev)
  708. {
  709. return 0;
  710. }
  711. static int get_resources(struct saa7164_dev *dev)
  712. {
  713. if (request_mem_region(pci_resource_start(dev->pci, 0),
  714. pci_resource_len(dev->pci, 0), dev->name)) {
  715. if (request_mem_region(pci_resource_start(dev->pci, 2),
  716. pci_resource_len(dev->pci, 2), dev->name))
  717. return 0;
  718. }
  719. printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
  720. dev->name,
  721. (u64)pci_resource_start(dev->pci, 0),
  722. (u64)pci_resource_start(dev->pci, 2));
  723. return -EBUSY;
  724. }
  725. static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
  726. {
  727. struct saa7164_port *port = NULL;
  728. if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
  729. BUG();
  730. port = &dev->ports[portnr];
  731. port->dev = dev;
  732. port->nr = portnr;
  733. if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
  734. port->type = SAA7164_MPEG_DVB;
  735. else
  736. if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) {
  737. port->type = SAA7164_MPEG_ENCODER;
  738. /* We need a deferred interrupt handler for cmd handling */
  739. INIT_WORK(&port->workenc, saa7164_work_enchandler);
  740. } else if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) {
  741. port->type = SAA7164_MPEG_VBI;
  742. /* We need a deferred interrupt handler for cmd handling */
  743. INIT_WORK(&port->workenc, saa7164_work_vbihandler);
  744. } else
  745. BUG();
  746. /* Init all the critical resources */
  747. mutex_init(&port->dvb.lock);
  748. INIT_LIST_HEAD(&port->dmaqueue.list);
  749. mutex_init(&port->dmaqueue_lock);
  750. INIT_LIST_HEAD(&port->list_buf_used.list);
  751. INIT_LIST_HEAD(&port->list_buf_free.list);
  752. init_waitqueue_head(&port->wait_read);
  753. saa7164_histogram_reset(&port->irq_interval, "irq intervals");
  754. saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
  755. saa7164_histogram_reset(&port->irq_svc_interval,
  756. "irq to deferred intervals");
  757. saa7164_histogram_reset(&port->read_interval,
  758. "encoder/vbi read() intervals");
  759. saa7164_histogram_reset(&port->poll_interval,
  760. "encoder/vbi poll() intervals");
  761. return 0;
  762. }
  763. static int saa7164_dev_setup(struct saa7164_dev *dev)
  764. {
  765. int i;
  766. mutex_init(&dev->lock);
  767. atomic_inc(&dev->refcount);
  768. dev->nr = saa7164_devcount++;
  769. snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr);
  770. mutex_lock(&devlist);
  771. list_add_tail(&dev->devlist, &saa7164_devlist);
  772. mutex_unlock(&devlist);
  773. /* board config */
  774. dev->board = UNSET;
  775. if (card[dev->nr] < saa7164_bcount)
  776. dev->board = card[dev->nr];
  777. for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++)
  778. if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
  779. dev->pci->subsystem_device ==
  780. saa7164_subids[i].subdevice)
  781. dev->board = saa7164_subids[i].card;
  782. if (UNSET == dev->board) {
  783. dev->board = SAA7164_BOARD_UNKNOWN;
  784. saa7164_card_list(dev);
  785. }
  786. dev->pci_bus = dev->pci->bus->number;
  787. dev->pci_slot = PCI_SLOT(dev->pci->devfn);
  788. /* I2C Defaults / setup */
  789. dev->i2c_bus[0].dev = dev;
  790. dev->i2c_bus[0].nr = 0;
  791. dev->i2c_bus[1].dev = dev;
  792. dev->i2c_bus[1].nr = 1;
  793. dev->i2c_bus[2].dev = dev;
  794. dev->i2c_bus[2].nr = 2;
  795. /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
  796. saa7164_port_init(dev, SAA7164_PORT_TS1);
  797. saa7164_port_init(dev, SAA7164_PORT_TS2);
  798. saa7164_port_init(dev, SAA7164_PORT_ENC1);
  799. saa7164_port_init(dev, SAA7164_PORT_ENC2);
  800. saa7164_port_init(dev, SAA7164_PORT_VBI1);
  801. saa7164_port_init(dev, SAA7164_PORT_VBI2);
  802. if (get_resources(dev) < 0) {
  803. printk(KERN_ERR "CORE %s No more PCIe resources for subsystem: %04x:%04x\n",
  804. dev->name, dev->pci->subsystem_vendor,
  805. dev->pci->subsystem_device);
  806. saa7164_devcount--;
  807. return -ENODEV;
  808. }
  809. /* PCI/e allocations */
  810. dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
  811. pci_resource_len(dev->pci, 0));
  812. dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
  813. pci_resource_len(dev->pci, 2));
  814. dev->bmmio = (u8 __iomem *)dev->lmmio;
  815. dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
  816. /* Inerrupt and ack register locations offset of bmmio */
  817. dev->int_status = 0x183000 + 0xf80;
  818. dev->int_ack = 0x183000 + 0xf90;
  819. printk(KERN_INFO
  820. "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
  821. dev->name, dev->pci->subsystem_vendor,
  822. dev->pci->subsystem_device, saa7164_boards[dev->board].name,
  823. dev->board, card[dev->nr] == dev->board ?
  824. "insmod option" : "autodetected");
  825. saa7164_pci_quirks(dev);
  826. return 0;
  827. }
  828. static void saa7164_dev_unregister(struct saa7164_dev *dev)
  829. {
  830. dprintk(1, "%s()\n", __func__);
  831. release_mem_region(pci_resource_start(dev->pci, 0),
  832. pci_resource_len(dev->pci, 0));
  833. release_mem_region(pci_resource_start(dev->pci, 2),
  834. pci_resource_len(dev->pci, 2));
  835. if (!atomic_dec_and_test(&dev->refcount))
  836. return;
  837. iounmap(dev->lmmio);
  838. iounmap(dev->lmmio2);
  839. return;
  840. }
  841. #ifdef CONFIG_PROC_FS
  842. static int saa7164_proc_show(struct seq_file *m, void *v)
  843. {
  844. struct saa7164_dev *dev;
  845. struct tmComResBusInfo *b;
  846. struct list_head *list;
  847. int i, c;
  848. if (saa7164_devcount == 0)
  849. return 0;
  850. list_for_each(list, &saa7164_devlist) {
  851. dev = list_entry(list, struct saa7164_dev, devlist);
  852. seq_printf(m, "%s = %p\n", dev->name, dev);
  853. /* Lock the bus from any other access */
  854. b = &dev->bus;
  855. mutex_lock(&b->lock);
  856. seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n",
  857. b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos));
  858. seq_printf(m, " .m_pdwSetReadPos = 0x%x (0x%08x)\n",
  859. b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos));
  860. seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n",
  861. b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos));
  862. seq_printf(m, " .m_pdwGetReadPos = 0x%x (0x%08x)\n",
  863. b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos));
  864. c = 0;
  865. seq_printf(m, "\n Set Ring:\n");
  866. seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  867. for (i = 0; i < b->m_dwSizeSetRing; i++) {
  868. if (c == 0)
  869. seq_printf(m, " %04x:", i);
  870. seq_printf(m, " %02x", readb(b->m_pdwSetRing + i));
  871. if (++c == 16) {
  872. seq_printf(m, "\n");
  873. c = 0;
  874. }
  875. }
  876. c = 0;
  877. seq_printf(m, "\n Get Ring:\n");
  878. seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  879. for (i = 0; i < b->m_dwSizeGetRing; i++) {
  880. if (c == 0)
  881. seq_printf(m, " %04x:", i);
  882. seq_printf(m, " %02x", readb(b->m_pdwGetRing + i));
  883. if (++c == 16) {
  884. seq_printf(m, "\n");
  885. c = 0;
  886. }
  887. }
  888. mutex_unlock(&b->lock);
  889. }
  890. return 0;
  891. }
  892. static int saa7164_proc_open(struct inode *inode, struct file *filp)
  893. {
  894. return single_open(filp, saa7164_proc_show, NULL);
  895. }
  896. static const struct file_operations saa7164_proc_fops = {
  897. .open = saa7164_proc_open,
  898. .read = seq_read,
  899. .llseek = seq_lseek,
  900. .release = single_release,
  901. };
  902. static int saa7164_proc_create(void)
  903. {
  904. struct proc_dir_entry *pe;
  905. pe = proc_create("saa7164", S_IRUGO, NULL, &saa7164_proc_fops);
  906. if (!pe)
  907. return -ENOMEM;
  908. return 0;
  909. }
  910. #endif
  911. static int saa7164_thread_function(void *data)
  912. {
  913. struct saa7164_dev *dev = data;
  914. struct tmFwInfoStruct fwinfo;
  915. u64 last_poll_time = 0;
  916. dprintk(DBGLVL_THR, "thread started\n");
  917. set_freezable();
  918. while (1) {
  919. msleep_interruptible(100);
  920. if (kthread_should_stop())
  921. break;
  922. try_to_freeze();
  923. dprintk(DBGLVL_THR, "thread running\n");
  924. /* Dump the firmware debug message to console */
  925. /* Polling this costs us 1-2% of the arm CPU */
  926. /* convert this into a respnde to interrupt 0x7a */
  927. saa7164_api_collect_debug(dev);
  928. /* Monitor CPU load every 1 second */
  929. if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) {
  930. saa7164_api_get_load_info(dev, &fwinfo);
  931. last_poll_time = jiffies_to_msecs(jiffies);
  932. }
  933. }
  934. dprintk(DBGLVL_THR, "thread exiting\n");
  935. return 0;
  936. }
  937. static bool saa7164_enable_msi(struct pci_dev *pci_dev, struct saa7164_dev *dev)
  938. {
  939. int err;
  940. if (!enable_msi) {
  941. printk(KERN_WARNING "%s() MSI disabled by module parameter 'enable_msi'"
  942. , __func__);
  943. return false;
  944. }
  945. err = pci_enable_msi(pci_dev);
  946. if (err) {
  947. printk(KERN_ERR "%s() Failed to enable MSI interrupt. Falling back to a shared IRQ\n",
  948. __func__);
  949. return false;
  950. }
  951. /* no error - so request an msi interrupt */
  952. err = request_irq(pci_dev->irq, saa7164_irq, 0,
  953. dev->name, dev);
  954. if (err) {
  955. /* fall back to legacy interrupt */
  956. printk(KERN_ERR "%s() Failed to get an MSI interrupt. Falling back to a shared IRQ\n",
  957. __func__);
  958. pci_disable_msi(pci_dev);
  959. return false;
  960. }
  961. return true;
  962. }
  963. static int saa7164_initdev(struct pci_dev *pci_dev,
  964. const struct pci_device_id *pci_id)
  965. {
  966. struct saa7164_dev *dev;
  967. int err, i;
  968. u32 version;
  969. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  970. if (NULL == dev)
  971. return -ENOMEM;
  972. err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev);
  973. if (err < 0) {
  974. dev_err(&pci_dev->dev, "v4l2_device_register failed\n");
  975. goto fail_free;
  976. }
  977. /* pci init */
  978. dev->pci = pci_dev;
  979. if (pci_enable_device(pci_dev)) {
  980. err = -EIO;
  981. goto fail_free;
  982. }
  983. if (saa7164_dev_setup(dev) < 0) {
  984. err = -EINVAL;
  985. goto fail_free;
  986. }
  987. /* print pci info */
  988. dev->pci_rev = pci_dev->revision;
  989. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  990. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
  991. dev->name,
  992. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  993. dev->pci_lat,
  994. (unsigned long long)pci_resource_start(pci_dev, 0));
  995. pci_set_master(pci_dev);
  996. /* TODO */
  997. err = pci_set_dma_mask(pci_dev, 0xffffffff);
  998. if (err) {
  999. printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
  1000. goto fail_irq;
  1001. }
  1002. /* irq bit */
  1003. if (saa7164_enable_msi(pci_dev, dev)) {
  1004. dev->msi = true;
  1005. } else {
  1006. /* if we have an error (i.e. we don't have an interrupt)
  1007. or msi is not enabled - fallback to shared interrupt */
  1008. err = request_irq(pci_dev->irq, saa7164_irq,
  1009. IRQF_SHARED, dev->name, dev);
  1010. if (err < 0) {
  1011. printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
  1012. pci_dev->irq);
  1013. err = -EIO;
  1014. goto fail_irq;
  1015. }
  1016. }
  1017. pci_set_drvdata(pci_dev, dev);
  1018. /* Init the internal command list */
  1019. for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
  1020. dev->cmds[i].seqno = i;
  1021. dev->cmds[i].inuse = 0;
  1022. mutex_init(&dev->cmds[i].lock);
  1023. init_waitqueue_head(&dev->cmds[i].wait);
  1024. }
  1025. /* We need a deferred interrupt handler for cmd handling */
  1026. INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
  1027. /* Only load the firmware if we know the board */
  1028. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  1029. err = saa7164_downloadfirmware(dev);
  1030. if (err < 0) {
  1031. printk(KERN_ERR
  1032. "Failed to boot firmware, no features registered\n");
  1033. goto fail_fw;
  1034. }
  1035. saa7164_get_descriptors(dev);
  1036. saa7164_dumpregs(dev, 0);
  1037. saa7164_getcurrentfirmwareversion(dev);
  1038. saa7164_getfirmwarestatus(dev);
  1039. err = saa7164_bus_setup(dev);
  1040. if (err < 0)
  1041. printk(KERN_ERR
  1042. "Failed to setup the bus, will continue\n");
  1043. saa7164_bus_dump(dev);
  1044. /* Ping the running firmware via the command bus and get the
  1045. * firmware version, this checks the bus is running OK.
  1046. */
  1047. version = 0;
  1048. if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
  1049. dprintk(1, "Bus is operating correctly using version %d.%d.%d.%d (0x%x)\n",
  1050. (version & 0x0000fc00) >> 10,
  1051. (version & 0x000003e0) >> 5,
  1052. (version & 0x0000001f),
  1053. (version & 0xffff0000) >> 16,
  1054. version);
  1055. else
  1056. printk(KERN_ERR
  1057. "Failed to communicate with the firmware\n");
  1058. /* Bring up the I2C buses */
  1059. saa7164_i2c_register(&dev->i2c_bus[0]);
  1060. saa7164_i2c_register(&dev->i2c_bus[1]);
  1061. saa7164_i2c_register(&dev->i2c_bus[2]);
  1062. saa7164_gpio_setup(dev);
  1063. saa7164_card_setup(dev);
  1064. /* Parse the dynamic device configuration, find various
  1065. * media endpoints (MPEG, WMV, PS, TS) and cache their
  1066. * configuration details into the driver, so we can
  1067. * reference them later during simething_register() func,
  1068. * interrupt handlers, deferred work handlers etc.
  1069. */
  1070. saa7164_api_enum_subdevs(dev);
  1071. /* Begin to create the video sub-systems and register funcs */
  1072. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
  1073. if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) {
  1074. printk(KERN_ERR "%s() Failed to register dvb adapters on porta\n",
  1075. __func__);
  1076. }
  1077. }
  1078. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
  1079. if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) {
  1080. printk(KERN_ERR"%s() Failed to register dvb adapters on portb\n",
  1081. __func__);
  1082. }
  1083. }
  1084. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
  1085. if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) {
  1086. printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
  1087. __func__);
  1088. }
  1089. }
  1090. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
  1091. if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) {
  1092. printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
  1093. __func__);
  1094. }
  1095. }
  1096. if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) {
  1097. if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) {
  1098. printk(KERN_ERR"%s() Failed to register vbi device\n",
  1099. __func__);
  1100. }
  1101. }
  1102. if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) {
  1103. if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) {
  1104. printk(KERN_ERR"%s() Failed to register vbi device\n",
  1105. __func__);
  1106. }
  1107. }
  1108. saa7164_api_set_debug(dev, fw_debug);
  1109. if (fw_debug) {
  1110. dev->kthread = kthread_run(saa7164_thread_function, dev,
  1111. "saa7164 debug");
  1112. if (IS_ERR(dev->kthread)) {
  1113. dev->kthread = NULL;
  1114. printk(KERN_ERR "%s() Failed to create debug kernel thread\n",
  1115. __func__);
  1116. }
  1117. }
  1118. } /* != BOARD_UNKNOWN */
  1119. else
  1120. printk(KERN_ERR "%s() Unsupported board detected, registering without firmware\n",
  1121. __func__);
  1122. dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
  1123. dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
  1124. fail_fw:
  1125. return 0;
  1126. fail_irq:
  1127. saa7164_dev_unregister(dev);
  1128. fail_free:
  1129. v4l2_device_unregister(&dev->v4l2_dev);
  1130. kfree(dev);
  1131. return err;
  1132. }
  1133. static void saa7164_shutdown(struct saa7164_dev *dev)
  1134. {
  1135. dprintk(1, "%s()\n", __func__);
  1136. }
  1137. static void saa7164_finidev(struct pci_dev *pci_dev)
  1138. {
  1139. struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
  1140. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  1141. if (fw_debug && dev->kthread) {
  1142. kthread_stop(dev->kthread);
  1143. dev->kthread = NULL;
  1144. }
  1145. if (dev->firmwareloaded)
  1146. saa7164_api_set_debug(dev, 0x00);
  1147. }
  1148. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1149. &dev->ports[SAA7164_PORT_ENC1].irq_interval);
  1150. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1151. &dev->ports[SAA7164_PORT_ENC1].svc_interval);
  1152. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1153. &dev->ports[SAA7164_PORT_ENC1].irq_svc_interval);
  1154. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1155. &dev->ports[SAA7164_PORT_ENC1].read_interval);
  1156. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1157. &dev->ports[SAA7164_PORT_ENC1].poll_interval);
  1158. saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1],
  1159. &dev->ports[SAA7164_PORT_VBI1].read_interval);
  1160. saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2],
  1161. &dev->ports[SAA7164_PORT_VBI2].poll_interval);
  1162. saa7164_shutdown(dev);
  1163. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
  1164. saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]);
  1165. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
  1166. saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]);
  1167. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
  1168. saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]);
  1169. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
  1170. saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]);
  1171. if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI)
  1172. saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]);
  1173. if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI)
  1174. saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]);
  1175. saa7164_i2c_unregister(&dev->i2c_bus[0]);
  1176. saa7164_i2c_unregister(&dev->i2c_bus[1]);
  1177. saa7164_i2c_unregister(&dev->i2c_bus[2]);
  1178. /* unregister stuff */
  1179. free_irq(pci_dev->irq, dev);
  1180. if (dev->msi) {
  1181. pci_disable_msi(pci_dev);
  1182. dev->msi = false;
  1183. }
  1184. pci_disable_device(pci_dev);
  1185. mutex_lock(&devlist);
  1186. list_del(&dev->devlist);
  1187. mutex_unlock(&devlist);
  1188. saa7164_dev_unregister(dev);
  1189. v4l2_device_unregister(&dev->v4l2_dev);
  1190. kfree(dev);
  1191. }
  1192. static struct pci_device_id saa7164_pci_tbl[] = {
  1193. {
  1194. /* SAA7164 */
  1195. .vendor = 0x1131,
  1196. .device = 0x7164,
  1197. .subvendor = PCI_ANY_ID,
  1198. .subdevice = PCI_ANY_ID,
  1199. }, {
  1200. /* --- end of list --- */
  1201. }
  1202. };
  1203. MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
  1204. static struct pci_driver saa7164_pci_driver = {
  1205. .name = "saa7164",
  1206. .id_table = saa7164_pci_tbl,
  1207. .probe = saa7164_initdev,
  1208. .remove = saa7164_finidev,
  1209. /* TODO */
  1210. .suspend = NULL,
  1211. .resume = NULL,
  1212. };
  1213. static int __init saa7164_init(void)
  1214. {
  1215. printk(KERN_INFO "saa7164 driver loaded\n");
  1216. #ifdef CONFIG_PROC_FS
  1217. saa7164_proc_create();
  1218. #endif
  1219. return pci_register_driver(&saa7164_pci_driver);
  1220. }
  1221. static void __exit saa7164_fini(void)
  1222. {
  1223. #ifdef CONFIG_PROC_FS
  1224. remove_proc_entry("saa7164", NULL);
  1225. #endif
  1226. pci_unregister_driver(&saa7164_pci_driver);
  1227. }
  1228. module_init(saa7164_init);
  1229. module_exit(saa7164_fini);