imx6ul_tsc.c 14 KB

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  1. /*
  2. * Freescale i.MX6UL touchscreen controller driver
  3. *
  4. * Copyright (C) 2015 Freescale Semiconductor, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/errno.h>
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/gpio/consumer.h>
  14. #include <linux/input.h>
  15. #include <linux/slab.h>
  16. #include <linux/completion.h>
  17. #include <linux/delay.h>
  18. #include <linux/of.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include <linux/log2.h>
  24. /* ADC configuration registers field define */
  25. #define ADC_AIEN (0x1 << 7)
  26. #define ADC_CONV_DISABLE 0x1F
  27. #define ADC_AVGE (0x1 << 5)
  28. #define ADC_CAL (0x1 << 7)
  29. #define ADC_CALF 0x2
  30. #define ADC_12BIT_MODE (0x2 << 2)
  31. #define ADC_CONV_MODE_MASK (0x3 << 2)
  32. #define ADC_IPG_CLK 0x00
  33. #define ADC_INPUT_CLK_MASK 0x3
  34. #define ADC_CLK_DIV_8 (0x03 << 5)
  35. #define ADC_CLK_DIV_MASK (0x3 << 5)
  36. #define ADC_SHORT_SAMPLE_MODE (0x0 << 4)
  37. #define ADC_SAMPLE_MODE_MASK (0x1 << 4)
  38. #define ADC_HARDWARE_TRIGGER (0x1 << 13)
  39. #define ADC_AVGS_SHIFT 14
  40. #define ADC_AVGS_MASK (0x3 << 14)
  41. #define SELECT_CHANNEL_4 0x04
  42. #define SELECT_CHANNEL_1 0x01
  43. #define DISABLE_CONVERSION_INT (0x0 << 7)
  44. /* ADC registers */
  45. #define REG_ADC_HC0 0x00
  46. #define REG_ADC_HC1 0x04
  47. #define REG_ADC_HC2 0x08
  48. #define REG_ADC_HC3 0x0C
  49. #define REG_ADC_HC4 0x10
  50. #define REG_ADC_HS 0x14
  51. #define REG_ADC_R0 0x18
  52. #define REG_ADC_CFG 0x2C
  53. #define REG_ADC_GC 0x30
  54. #define REG_ADC_GS 0x34
  55. #define ADC_TIMEOUT msecs_to_jiffies(100)
  56. /* TSC registers */
  57. #define REG_TSC_BASIC_SETING 0x00
  58. #define REG_TSC_PRE_CHARGE_TIME 0x10
  59. #define REG_TSC_FLOW_CONTROL 0x20
  60. #define REG_TSC_MEASURE_VALUE 0x30
  61. #define REG_TSC_INT_EN 0x40
  62. #define REG_TSC_INT_SIG_EN 0x50
  63. #define REG_TSC_INT_STATUS 0x60
  64. #define REG_TSC_DEBUG_MODE 0x70
  65. #define REG_TSC_DEBUG_MODE2 0x80
  66. /* TSC configuration registers field define */
  67. #define DETECT_4_WIRE_MODE (0x0 << 4)
  68. #define AUTO_MEASURE 0x1
  69. #define MEASURE_SIGNAL 0x1
  70. #define DETECT_SIGNAL (0x1 << 4)
  71. #define VALID_SIGNAL (0x1 << 8)
  72. #define MEASURE_INT_EN 0x1
  73. #define MEASURE_SIG_EN 0x1
  74. #define VALID_SIG_EN (0x1 << 8)
  75. #define DE_GLITCH_2 (0x2 << 29)
  76. #define START_SENSE (0x1 << 12)
  77. #define TSC_DISABLE (0x1 << 16)
  78. #define DETECT_MODE 0x2
  79. struct imx6ul_tsc {
  80. struct device *dev;
  81. struct input_dev *input;
  82. void __iomem *tsc_regs;
  83. void __iomem *adc_regs;
  84. struct clk *tsc_clk;
  85. struct clk *adc_clk;
  86. struct gpio_desc *xnur_gpio;
  87. u32 measure_delay_time;
  88. u32 pre_charge_time;
  89. bool average_enable;
  90. u32 average_select;
  91. struct completion completion;
  92. };
  93. /*
  94. * TSC module need ADC to get the measure value. So
  95. * before config TSC, we should initialize ADC module.
  96. */
  97. static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
  98. {
  99. u32 adc_hc = 0;
  100. u32 adc_gc;
  101. u32 adc_gs;
  102. u32 adc_cfg;
  103. unsigned long timeout;
  104. reinit_completion(&tsc->completion);
  105. adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
  106. adc_cfg &= ~(ADC_CONV_MODE_MASK | ADC_INPUT_CLK_MASK);
  107. adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
  108. adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE_MASK);
  109. adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
  110. if (tsc->average_enable) {
  111. adc_cfg &= ~ADC_AVGS_MASK;
  112. adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT;
  113. }
  114. adc_cfg &= ~ADC_HARDWARE_TRIGGER;
  115. writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
  116. /* enable calibration interrupt */
  117. adc_hc |= ADC_AIEN;
  118. adc_hc |= ADC_CONV_DISABLE;
  119. writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
  120. /* start ADC calibration */
  121. adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
  122. adc_gc |= ADC_CAL;
  123. if (tsc->average_enable)
  124. adc_gc |= ADC_AVGE;
  125. writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
  126. timeout = wait_for_completion_timeout
  127. (&tsc->completion, ADC_TIMEOUT);
  128. if (timeout == 0) {
  129. dev_err(tsc->dev, "Timeout for adc calibration\n");
  130. return -ETIMEDOUT;
  131. }
  132. adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
  133. if (adc_gs & ADC_CALF) {
  134. dev_err(tsc->dev, "ADC calibration failed\n");
  135. return -EINVAL;
  136. }
  137. /* TSC need the ADC work in hardware trigger */
  138. adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
  139. adc_cfg |= ADC_HARDWARE_TRIGGER;
  140. writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
  141. return 0;
  142. }
  143. /*
  144. * This is a TSC workaround. Currently TSC misconnect two
  145. * ADC channels, this function remap channel configure for
  146. * hardware trigger.
  147. */
  148. static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
  149. {
  150. u32 adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4;
  151. adc_hc0 = DISABLE_CONVERSION_INT;
  152. writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
  153. adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4;
  154. writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
  155. adc_hc2 = DISABLE_CONVERSION_INT;
  156. writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
  157. adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1;
  158. writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
  159. adc_hc4 = DISABLE_CONVERSION_INT;
  160. writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
  161. }
  162. /*
  163. * TSC setting, confige the pre-charge time and measure delay time.
  164. * different touch screen may need different pre-charge time and
  165. * measure delay time.
  166. */
  167. static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
  168. {
  169. u32 basic_setting = 0;
  170. u32 start;
  171. basic_setting |= tsc->measure_delay_time << 8;
  172. basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
  173. writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
  174. writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
  175. writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
  176. writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
  177. writel(MEASURE_SIG_EN | VALID_SIG_EN,
  178. tsc->tsc_regs + REG_TSC_INT_SIG_EN);
  179. /* start sense detection */
  180. start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  181. start |= START_SENSE;
  182. start &= ~TSC_DISABLE;
  183. writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  184. }
  185. static int imx6ul_tsc_init(struct imx6ul_tsc *tsc)
  186. {
  187. int err;
  188. err = imx6ul_adc_init(tsc);
  189. if (err)
  190. return err;
  191. imx6ul_tsc_channel_config(tsc);
  192. imx6ul_tsc_set(tsc);
  193. return 0;
  194. }
  195. static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc)
  196. {
  197. u32 tsc_flow;
  198. u32 adc_cfg;
  199. /* TSC controller enters to idle status */
  200. tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  201. tsc_flow |= TSC_DISABLE;
  202. writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  203. /* ADC controller enters to stop mode */
  204. adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
  205. adc_cfg |= ADC_CONV_DISABLE;
  206. writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0);
  207. }
  208. /* Delay some time (max 2ms), wait the pre-charge done. */
  209. static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
  210. {
  211. unsigned long timeout = jiffies + msecs_to_jiffies(2);
  212. u32 state_machine;
  213. u32 debug_mode2;
  214. do {
  215. if (time_after(jiffies, timeout))
  216. return false;
  217. usleep_range(200, 400);
  218. debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
  219. state_machine = (debug_mode2 >> 20) & 0x7;
  220. } while (state_machine != DETECT_MODE);
  221. usleep_range(200, 400);
  222. return true;
  223. }
  224. static irqreturn_t tsc_irq_fn(int irq, void *dev_id)
  225. {
  226. struct imx6ul_tsc *tsc = dev_id;
  227. u32 status;
  228. u32 value;
  229. u32 x, y;
  230. u32 start;
  231. status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
  232. /* write 1 to clear the bit measure-signal */
  233. writel(MEASURE_SIGNAL | DETECT_SIGNAL,
  234. tsc->tsc_regs + REG_TSC_INT_STATUS);
  235. /* It's a HW self-clean bit. Set this bit and start sense detection */
  236. start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  237. start |= START_SENSE;
  238. writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  239. if (status & MEASURE_SIGNAL) {
  240. value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
  241. x = (value >> 16) & 0x0fff;
  242. y = value & 0x0fff;
  243. /*
  244. * In detect mode, we can get the xnur gpio value,
  245. * otherwise assume contact is stiull active.
  246. */
  247. if (!tsc_wait_detect_mode(tsc) ||
  248. gpiod_get_value_cansleep(tsc->xnur_gpio)) {
  249. input_report_key(tsc->input, BTN_TOUCH, 1);
  250. input_report_abs(tsc->input, ABS_X, x);
  251. input_report_abs(tsc->input, ABS_Y, y);
  252. } else {
  253. input_report_key(tsc->input, BTN_TOUCH, 0);
  254. }
  255. input_sync(tsc->input);
  256. }
  257. return IRQ_HANDLED;
  258. }
  259. static irqreturn_t adc_irq_fn(int irq, void *dev_id)
  260. {
  261. struct imx6ul_tsc *tsc = dev_id;
  262. u32 coco;
  263. u32 value;
  264. coco = readl(tsc->adc_regs + REG_ADC_HS);
  265. if (coco & 0x01) {
  266. value = readl(tsc->adc_regs + REG_ADC_R0);
  267. complete(&tsc->completion);
  268. }
  269. return IRQ_HANDLED;
  270. }
  271. static int imx6ul_tsc_open(struct input_dev *input_dev)
  272. {
  273. struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
  274. int err;
  275. err = clk_prepare_enable(tsc->adc_clk);
  276. if (err) {
  277. dev_err(tsc->dev,
  278. "Could not prepare or enable the adc clock: %d\n",
  279. err);
  280. return err;
  281. }
  282. err = clk_prepare_enable(tsc->tsc_clk);
  283. if (err) {
  284. dev_err(tsc->dev,
  285. "Could not prepare or enable the tsc clock: %d\n",
  286. err);
  287. clk_disable_unprepare(tsc->adc_clk);
  288. return err;
  289. }
  290. return imx6ul_tsc_init(tsc);
  291. }
  292. static void imx6ul_tsc_close(struct input_dev *input_dev)
  293. {
  294. struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
  295. imx6ul_tsc_disable(tsc);
  296. clk_disable_unprepare(tsc->tsc_clk);
  297. clk_disable_unprepare(tsc->adc_clk);
  298. }
  299. static int imx6ul_tsc_probe(struct platform_device *pdev)
  300. {
  301. struct device_node *np = pdev->dev.of_node;
  302. struct imx6ul_tsc *tsc;
  303. struct input_dev *input_dev;
  304. struct resource *tsc_mem;
  305. struct resource *adc_mem;
  306. int err;
  307. int tsc_irq;
  308. int adc_irq;
  309. u32 average_samples;
  310. tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL);
  311. if (!tsc)
  312. return -ENOMEM;
  313. input_dev = devm_input_allocate_device(&pdev->dev);
  314. if (!input_dev)
  315. return -ENOMEM;
  316. input_dev->name = "iMX6UL Touchscreen Controller";
  317. input_dev->id.bustype = BUS_HOST;
  318. input_dev->open = imx6ul_tsc_open;
  319. input_dev->close = imx6ul_tsc_close;
  320. input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
  321. input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0);
  322. input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0);
  323. input_set_drvdata(input_dev, tsc);
  324. tsc->dev = &pdev->dev;
  325. tsc->input = input_dev;
  326. init_completion(&tsc->completion);
  327. tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN);
  328. if (IS_ERR(tsc->xnur_gpio)) {
  329. err = PTR_ERR(tsc->xnur_gpio);
  330. dev_err(&pdev->dev,
  331. "failed to request GPIO tsc_X- (xnur): %d\n", err);
  332. return err;
  333. }
  334. tsc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  335. tsc->tsc_regs = devm_ioremap_resource(&pdev->dev, tsc_mem);
  336. if (IS_ERR(tsc->tsc_regs)) {
  337. err = PTR_ERR(tsc->tsc_regs);
  338. dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err);
  339. return err;
  340. }
  341. adc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  342. tsc->adc_regs = devm_ioremap_resource(&pdev->dev, adc_mem);
  343. if (IS_ERR(tsc->adc_regs)) {
  344. err = PTR_ERR(tsc->adc_regs);
  345. dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err);
  346. return err;
  347. }
  348. tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc");
  349. if (IS_ERR(tsc->tsc_clk)) {
  350. err = PTR_ERR(tsc->tsc_clk);
  351. dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err);
  352. return err;
  353. }
  354. tsc->adc_clk = devm_clk_get(&pdev->dev, "adc");
  355. if (IS_ERR(tsc->adc_clk)) {
  356. err = PTR_ERR(tsc->adc_clk);
  357. dev_err(&pdev->dev, "failed getting adc clock: %d\n", err);
  358. return err;
  359. }
  360. tsc_irq = platform_get_irq(pdev, 0);
  361. if (tsc_irq < 0) {
  362. dev_err(&pdev->dev, "no tsc irq resource?\n");
  363. return tsc_irq;
  364. }
  365. adc_irq = platform_get_irq(pdev, 1);
  366. if (adc_irq < 0) {
  367. dev_err(&pdev->dev, "no adc irq resource?\n");
  368. return adc_irq;
  369. }
  370. err = devm_request_threaded_irq(tsc->dev, tsc_irq,
  371. NULL, tsc_irq_fn, IRQF_ONESHOT,
  372. dev_name(&pdev->dev), tsc);
  373. if (err) {
  374. dev_err(&pdev->dev,
  375. "failed requesting tsc irq %d: %d\n",
  376. tsc_irq, err);
  377. return err;
  378. }
  379. err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0,
  380. dev_name(&pdev->dev), tsc);
  381. if (err) {
  382. dev_err(&pdev->dev,
  383. "failed requesting adc irq %d: %d\n",
  384. adc_irq, err);
  385. return err;
  386. }
  387. err = of_property_read_u32(np, "measure-delay-time",
  388. &tsc->measure_delay_time);
  389. if (err)
  390. tsc->measure_delay_time = 0xffff;
  391. err = of_property_read_u32(np, "pre-charge-time",
  392. &tsc->pre_charge_time);
  393. if (err)
  394. tsc->pre_charge_time = 0xfff;
  395. err = of_property_read_u32(np, "touchscreen-average-samples",
  396. &average_samples);
  397. if (err)
  398. average_samples = 1;
  399. switch (average_samples) {
  400. case 1:
  401. tsc->average_enable = false;
  402. tsc->average_select = 0; /* value unused; initialize anyway */
  403. break;
  404. case 4:
  405. case 8:
  406. case 16:
  407. case 32:
  408. tsc->average_enable = true;
  409. tsc->average_select = ilog2(average_samples) - 2;
  410. break;
  411. default:
  412. dev_err(&pdev->dev,
  413. "touchscreen-average-samples (%u) must be 1, 4, 8, 16 or 32\n",
  414. average_samples);
  415. return -EINVAL;
  416. }
  417. err = input_register_device(tsc->input);
  418. if (err) {
  419. dev_err(&pdev->dev,
  420. "failed to register input device: %d\n", err);
  421. return err;
  422. }
  423. platform_set_drvdata(pdev, tsc);
  424. return 0;
  425. }
  426. static int __maybe_unused imx6ul_tsc_suspend(struct device *dev)
  427. {
  428. struct platform_device *pdev = to_platform_device(dev);
  429. struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
  430. struct input_dev *input_dev = tsc->input;
  431. mutex_lock(&input_dev->mutex);
  432. if (input_dev->users) {
  433. imx6ul_tsc_disable(tsc);
  434. clk_disable_unprepare(tsc->tsc_clk);
  435. clk_disable_unprepare(tsc->adc_clk);
  436. }
  437. mutex_unlock(&input_dev->mutex);
  438. return 0;
  439. }
  440. static int __maybe_unused imx6ul_tsc_resume(struct device *dev)
  441. {
  442. struct platform_device *pdev = to_platform_device(dev);
  443. struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
  444. struct input_dev *input_dev = tsc->input;
  445. int retval = 0;
  446. mutex_lock(&input_dev->mutex);
  447. if (input_dev->users) {
  448. retval = clk_prepare_enable(tsc->adc_clk);
  449. if (retval)
  450. goto out;
  451. retval = clk_prepare_enable(tsc->tsc_clk);
  452. if (retval) {
  453. clk_disable_unprepare(tsc->adc_clk);
  454. goto out;
  455. }
  456. retval = imx6ul_tsc_init(tsc);
  457. }
  458. out:
  459. mutex_unlock(&input_dev->mutex);
  460. return retval;
  461. }
  462. static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops,
  463. imx6ul_tsc_suspend, imx6ul_tsc_resume);
  464. static const struct of_device_id imx6ul_tsc_match[] = {
  465. { .compatible = "fsl,imx6ul-tsc", },
  466. { /* sentinel */ }
  467. };
  468. MODULE_DEVICE_TABLE(of, imx6ul_tsc_match);
  469. static struct platform_driver imx6ul_tsc_driver = {
  470. .driver = {
  471. .name = "imx6ul-tsc",
  472. .of_match_table = imx6ul_tsc_match,
  473. .pm = &imx6ul_tsc_pm_ops,
  474. },
  475. .probe = imx6ul_tsc_probe,
  476. };
  477. module_platform_driver(imx6ul_tsc_driver);
  478. MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>");
  479. MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver");
  480. MODULE_LICENSE("GPL v2");