i40iw_utils.c 39 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/ethtool.h>
  39. #include <linux/mii.h>
  40. #include <linux/if_vlan.h>
  41. #include <linux/crc32.h>
  42. #include <linux/in.h>
  43. #include <linux/ip.h>
  44. #include <linux/tcp.h>
  45. #include <linux/init.h>
  46. #include <linux/io.h>
  47. #include <asm/irq.h>
  48. #include <asm/byteorder.h>
  49. #include <net/netevent.h>
  50. #include <net/neighbour.h>
  51. #include "i40iw.h"
  52. /**
  53. * i40iw_arp_table - manage arp table
  54. * @iwdev: iwarp device
  55. * @ip_addr: ip address for device
  56. * @mac_addr: mac address ptr
  57. * @action: modify, delete or add
  58. */
  59. int i40iw_arp_table(struct i40iw_device *iwdev,
  60. u32 *ip_addr,
  61. bool ipv4,
  62. u8 *mac_addr,
  63. u32 action)
  64. {
  65. int arp_index;
  66. int err;
  67. u32 ip[4];
  68. if (ipv4) {
  69. memset(ip, 0, sizeof(ip));
  70. ip[0] = *ip_addr;
  71. } else {
  72. memcpy(ip, ip_addr, sizeof(ip));
  73. }
  74. for (arp_index = 0; (u32)arp_index < iwdev->arp_table_size; arp_index++)
  75. if (memcmp(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip)) == 0)
  76. break;
  77. switch (action) {
  78. case I40IW_ARP_ADD:
  79. if (arp_index != iwdev->arp_table_size)
  80. return -1;
  81. arp_index = 0;
  82. err = i40iw_alloc_resource(iwdev, iwdev->allocated_arps,
  83. iwdev->arp_table_size,
  84. (u32 *)&arp_index,
  85. &iwdev->next_arp_index);
  86. if (err)
  87. return err;
  88. memcpy(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip));
  89. ether_addr_copy(iwdev->arp_table[arp_index].mac_addr, mac_addr);
  90. break;
  91. case I40IW_ARP_RESOLVE:
  92. if (arp_index == iwdev->arp_table_size)
  93. return -1;
  94. break;
  95. case I40IW_ARP_DELETE:
  96. if (arp_index == iwdev->arp_table_size)
  97. return -1;
  98. memset(iwdev->arp_table[arp_index].ip_addr, 0,
  99. sizeof(iwdev->arp_table[arp_index].ip_addr));
  100. eth_zero_addr(iwdev->arp_table[arp_index].mac_addr);
  101. i40iw_free_resource(iwdev, iwdev->allocated_arps, arp_index);
  102. break;
  103. default:
  104. return -1;
  105. }
  106. return arp_index;
  107. }
  108. /**
  109. * i40iw_wr32 - write 32 bits to hw register
  110. * @hw: hardware information including registers
  111. * @reg: register offset
  112. * @value: vvalue to write to register
  113. */
  114. inline void i40iw_wr32(struct i40iw_hw *hw, u32 reg, u32 value)
  115. {
  116. writel(value, hw->hw_addr + reg);
  117. }
  118. /**
  119. * i40iw_rd32 - read a 32 bit hw register
  120. * @hw: hardware information including registers
  121. * @reg: register offset
  122. *
  123. * Return value of register content
  124. */
  125. inline u32 i40iw_rd32(struct i40iw_hw *hw, u32 reg)
  126. {
  127. return readl(hw->hw_addr + reg);
  128. }
  129. /**
  130. * i40iw_inetaddr_event - system notifier for netdev events
  131. * @notfier: not used
  132. * @event: event for notifier
  133. * @ptr: if address
  134. */
  135. int i40iw_inetaddr_event(struct notifier_block *notifier,
  136. unsigned long event,
  137. void *ptr)
  138. {
  139. struct in_ifaddr *ifa = ptr;
  140. struct net_device *event_netdev = ifa->ifa_dev->dev;
  141. struct net_device *netdev;
  142. struct net_device *upper_dev;
  143. struct i40iw_device *iwdev;
  144. struct i40iw_handler *hdl;
  145. u32 local_ipaddr;
  146. u32 action = I40IW_ARP_ADD;
  147. hdl = i40iw_find_netdev(event_netdev);
  148. if (!hdl)
  149. return NOTIFY_DONE;
  150. iwdev = &hdl->device;
  151. netdev = iwdev->ldev->netdev;
  152. upper_dev = netdev_master_upper_dev_get(netdev);
  153. if (netdev != event_netdev)
  154. return NOTIFY_DONE;
  155. if (upper_dev)
  156. local_ipaddr = ntohl(
  157. ((struct in_device *)upper_dev->ip_ptr)->ifa_list->ifa_address);
  158. else
  159. local_ipaddr = ntohl(ifa->ifa_address);
  160. switch (event) {
  161. case NETDEV_DOWN:
  162. action = I40IW_ARP_DELETE;
  163. /* Fall through */
  164. case NETDEV_UP:
  165. /* Fall through */
  166. case NETDEV_CHANGEADDR:
  167. i40iw_manage_arp_cache(iwdev,
  168. netdev->dev_addr,
  169. &local_ipaddr,
  170. true,
  171. action);
  172. i40iw_if_notify(iwdev, netdev, &local_ipaddr, true,
  173. (action == I40IW_ARP_ADD) ? true : false);
  174. break;
  175. default:
  176. break;
  177. }
  178. return NOTIFY_DONE;
  179. }
  180. /**
  181. * i40iw_inet6addr_event - system notifier for ipv6 netdev events
  182. * @notfier: not used
  183. * @event: event for notifier
  184. * @ptr: if address
  185. */
  186. int i40iw_inet6addr_event(struct notifier_block *notifier,
  187. unsigned long event,
  188. void *ptr)
  189. {
  190. struct inet6_ifaddr *ifa = (struct inet6_ifaddr *)ptr;
  191. struct net_device *event_netdev = ifa->idev->dev;
  192. struct net_device *netdev;
  193. struct i40iw_device *iwdev;
  194. struct i40iw_handler *hdl;
  195. u32 local_ipaddr6[4];
  196. u32 action = I40IW_ARP_ADD;
  197. hdl = i40iw_find_netdev(event_netdev);
  198. if (!hdl)
  199. return NOTIFY_DONE;
  200. iwdev = &hdl->device;
  201. netdev = iwdev->ldev->netdev;
  202. if (netdev != event_netdev)
  203. return NOTIFY_DONE;
  204. i40iw_copy_ip_ntohl(local_ipaddr6, ifa->addr.in6_u.u6_addr32);
  205. switch (event) {
  206. case NETDEV_DOWN:
  207. action = I40IW_ARP_DELETE;
  208. /* Fall through */
  209. case NETDEV_UP:
  210. /* Fall through */
  211. case NETDEV_CHANGEADDR:
  212. i40iw_manage_arp_cache(iwdev,
  213. netdev->dev_addr,
  214. local_ipaddr6,
  215. false,
  216. action);
  217. i40iw_if_notify(iwdev, netdev, local_ipaddr6, false,
  218. (action == I40IW_ARP_ADD) ? true : false);
  219. break;
  220. default:
  221. break;
  222. }
  223. return NOTIFY_DONE;
  224. }
  225. /**
  226. * i40iw_net_event - system notifier for net events
  227. * @notfier: not used
  228. * @event: event for notifier
  229. * @ptr: neighbor
  230. */
  231. int i40iw_net_event(struct notifier_block *notifier, unsigned long event, void *ptr)
  232. {
  233. struct neighbour *neigh = ptr;
  234. struct i40iw_device *iwdev;
  235. struct i40iw_handler *iwhdl;
  236. __be32 *p;
  237. u32 local_ipaddr[4];
  238. switch (event) {
  239. case NETEVENT_NEIGH_UPDATE:
  240. iwhdl = i40iw_find_netdev((struct net_device *)neigh->dev);
  241. if (!iwhdl)
  242. return NOTIFY_DONE;
  243. iwdev = &iwhdl->device;
  244. p = (__be32 *)neigh->primary_key;
  245. i40iw_copy_ip_ntohl(local_ipaddr, p);
  246. if (neigh->nud_state & NUD_VALID) {
  247. i40iw_manage_arp_cache(iwdev,
  248. neigh->ha,
  249. local_ipaddr,
  250. false,
  251. I40IW_ARP_ADD);
  252. } else {
  253. i40iw_manage_arp_cache(iwdev,
  254. neigh->ha,
  255. local_ipaddr,
  256. false,
  257. I40IW_ARP_DELETE);
  258. }
  259. break;
  260. default:
  261. break;
  262. }
  263. return NOTIFY_DONE;
  264. }
  265. /**
  266. * i40iw_get_cqp_request - get cqp struct
  267. * @cqp: device cqp ptr
  268. * @wait: cqp to be used in wait mode
  269. */
  270. struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait)
  271. {
  272. struct i40iw_cqp_request *cqp_request = NULL;
  273. unsigned long flags;
  274. spin_lock_irqsave(&cqp->req_lock, flags);
  275. if (!list_empty(&cqp->cqp_avail_reqs)) {
  276. cqp_request = list_entry(cqp->cqp_avail_reqs.next,
  277. struct i40iw_cqp_request, list);
  278. list_del_init(&cqp_request->list);
  279. }
  280. spin_unlock_irqrestore(&cqp->req_lock, flags);
  281. if (!cqp_request) {
  282. cqp_request = kzalloc(sizeof(*cqp_request), GFP_ATOMIC);
  283. if (cqp_request) {
  284. cqp_request->dynamic = true;
  285. INIT_LIST_HEAD(&cqp_request->list);
  286. init_waitqueue_head(&cqp_request->waitq);
  287. }
  288. }
  289. if (!cqp_request) {
  290. i40iw_pr_err("CQP Request Fail: No Memory");
  291. return NULL;
  292. }
  293. if (wait) {
  294. atomic_set(&cqp_request->refcount, 2);
  295. cqp_request->waiting = true;
  296. } else {
  297. atomic_set(&cqp_request->refcount, 1);
  298. }
  299. return cqp_request;
  300. }
  301. /**
  302. * i40iw_free_cqp_request - free cqp request
  303. * @cqp: cqp ptr
  304. * @cqp_request: to be put back in cqp list
  305. */
  306. void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request)
  307. {
  308. unsigned long flags;
  309. if (cqp_request->dynamic) {
  310. kfree(cqp_request);
  311. } else {
  312. cqp_request->request_done = false;
  313. cqp_request->callback_fcn = NULL;
  314. cqp_request->waiting = false;
  315. spin_lock_irqsave(&cqp->req_lock, flags);
  316. list_add_tail(&cqp_request->list, &cqp->cqp_avail_reqs);
  317. spin_unlock_irqrestore(&cqp->req_lock, flags);
  318. }
  319. }
  320. /**
  321. * i40iw_put_cqp_request - dec ref count and free if 0
  322. * @cqp: cqp ptr
  323. * @cqp_request: to be put back in cqp list
  324. */
  325. void i40iw_put_cqp_request(struct i40iw_cqp *cqp,
  326. struct i40iw_cqp_request *cqp_request)
  327. {
  328. if (atomic_dec_and_test(&cqp_request->refcount))
  329. i40iw_free_cqp_request(cqp, cqp_request);
  330. }
  331. /**
  332. * i40iw_free_qp - callback after destroy cqp completes
  333. * @cqp_request: cqp request for destroy qp
  334. * @num: not used
  335. */
  336. static void i40iw_free_qp(struct i40iw_cqp_request *cqp_request, u32 num)
  337. {
  338. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)cqp_request->param;
  339. struct i40iw_qp *iwqp = (struct i40iw_qp *)qp->back_qp;
  340. struct i40iw_device *iwdev;
  341. u32 qp_num = iwqp->ibqp.qp_num;
  342. iwdev = iwqp->iwdev;
  343. i40iw_rem_pdusecount(iwqp->iwpd, iwdev);
  344. i40iw_free_qp_resources(iwdev, iwqp, qp_num);
  345. i40iw_rem_devusecount(iwdev);
  346. }
  347. /**
  348. * i40iw_wait_event - wait for completion
  349. * @iwdev: iwarp device
  350. * @cqp_request: cqp request to wait
  351. */
  352. static int i40iw_wait_event(struct i40iw_device *iwdev,
  353. struct i40iw_cqp_request *cqp_request)
  354. {
  355. struct cqp_commands_info *info = &cqp_request->info;
  356. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  357. bool cqp_error = false;
  358. int err_code = 0;
  359. int timeout_ret = 0;
  360. timeout_ret = wait_event_timeout(cqp_request->waitq,
  361. cqp_request->request_done,
  362. I40IW_EVENT_TIMEOUT);
  363. if (!timeout_ret) {
  364. i40iw_pr_err("error cqp command 0x%x timed out ret = %d\n",
  365. info->cqp_cmd, timeout_ret);
  366. err_code = -ETIME;
  367. if (!iwdev->reset) {
  368. iwdev->reset = true;
  369. i40iw_request_reset(iwdev);
  370. }
  371. goto done;
  372. }
  373. cqp_error = cqp_request->compl_info.error;
  374. if (cqp_error) {
  375. i40iw_pr_err("error cqp command 0x%x completion maj = 0x%x min=0x%x\n",
  376. info->cqp_cmd, cqp_request->compl_info.maj_err_code,
  377. cqp_request->compl_info.min_err_code);
  378. err_code = -EPROTO;
  379. goto done;
  380. }
  381. done:
  382. i40iw_put_cqp_request(iwcqp, cqp_request);
  383. return err_code;
  384. }
  385. /**
  386. * i40iw_handle_cqp_op - process cqp command
  387. * @iwdev: iwarp device
  388. * @cqp_request: cqp request to process
  389. */
  390. enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
  391. struct i40iw_cqp_request
  392. *cqp_request)
  393. {
  394. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  395. enum i40iw_status_code status;
  396. struct cqp_commands_info *info = &cqp_request->info;
  397. int err_code = 0;
  398. if (iwdev->reset) {
  399. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  400. return I40IW_ERR_CQP_COMPL_ERROR;
  401. }
  402. status = i40iw_process_cqp_cmd(dev, info);
  403. if (status) {
  404. i40iw_pr_err("error cqp command 0x%x failed\n", info->cqp_cmd);
  405. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  406. return status;
  407. }
  408. if (cqp_request->waiting)
  409. err_code = i40iw_wait_event(iwdev, cqp_request);
  410. if (err_code)
  411. status = I40IW_ERR_CQP_COMPL_ERROR;
  412. return status;
  413. }
  414. /**
  415. * i40iw_add_devusecount - add dev refcount
  416. * @iwdev: dev for refcount
  417. */
  418. void i40iw_add_devusecount(struct i40iw_device *iwdev)
  419. {
  420. atomic64_inc(&iwdev->use_count);
  421. }
  422. /**
  423. * i40iw_rem_devusecount - decrement refcount for dev
  424. * @iwdev: device
  425. */
  426. void i40iw_rem_devusecount(struct i40iw_device *iwdev)
  427. {
  428. if (!atomic64_dec_and_test(&iwdev->use_count))
  429. return;
  430. wake_up(&iwdev->close_wq);
  431. }
  432. /**
  433. * i40iw_add_pdusecount - add pd refcount
  434. * @iwpd: pd for refcount
  435. */
  436. void i40iw_add_pdusecount(struct i40iw_pd *iwpd)
  437. {
  438. atomic_inc(&iwpd->usecount);
  439. }
  440. /**
  441. * i40iw_rem_pdusecount - decrement refcount for pd and free if 0
  442. * @iwpd: pd for refcount
  443. * @iwdev: iwarp device
  444. */
  445. void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev)
  446. {
  447. if (!atomic_dec_and_test(&iwpd->usecount))
  448. return;
  449. i40iw_free_resource(iwdev, iwdev->allocated_pds, iwpd->sc_pd.pd_id);
  450. kfree(iwpd);
  451. }
  452. /**
  453. * i40iw_add_ref - add refcount for qp
  454. * @ibqp: iqarp qp
  455. */
  456. void i40iw_add_ref(struct ib_qp *ibqp)
  457. {
  458. struct i40iw_qp *iwqp = (struct i40iw_qp *)ibqp;
  459. atomic_inc(&iwqp->refcount);
  460. }
  461. /**
  462. * i40iw_rem_ref - rem refcount for qp and free if 0
  463. * @ibqp: iqarp qp
  464. */
  465. void i40iw_rem_ref(struct ib_qp *ibqp)
  466. {
  467. struct i40iw_qp *iwqp;
  468. enum i40iw_status_code status;
  469. struct i40iw_cqp_request *cqp_request;
  470. struct cqp_commands_info *cqp_info;
  471. struct i40iw_device *iwdev;
  472. u32 qp_num;
  473. unsigned long flags;
  474. iwqp = to_iwqp(ibqp);
  475. iwdev = iwqp->iwdev;
  476. spin_lock_irqsave(&iwdev->qptable_lock, flags);
  477. if (!atomic_dec_and_test(&iwqp->refcount)) {
  478. spin_unlock_irqrestore(&iwdev->qptable_lock, flags);
  479. return;
  480. }
  481. qp_num = iwqp->ibqp.qp_num;
  482. iwdev->qp_table[qp_num] = NULL;
  483. spin_unlock_irqrestore(&iwdev->qptable_lock, flags);
  484. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  485. if (!cqp_request)
  486. return;
  487. cqp_request->callback_fcn = i40iw_free_qp;
  488. cqp_request->param = (void *)&iwqp->sc_qp;
  489. cqp_info = &cqp_request->info;
  490. cqp_info->cqp_cmd = OP_QP_DESTROY;
  491. cqp_info->post_sq = 1;
  492. cqp_info->in.u.qp_destroy.qp = &iwqp->sc_qp;
  493. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  494. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  495. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  496. if (status)
  497. i40iw_pr_err("CQP-OP Destroy QP fail");
  498. }
  499. /**
  500. * i40iw_get_qp - get qp address
  501. * @device: iwarp device
  502. * @qpn: qp number
  503. */
  504. struct ib_qp *i40iw_get_qp(struct ib_device *device, int qpn)
  505. {
  506. struct i40iw_device *iwdev = to_iwdev(device);
  507. if ((qpn < IW_FIRST_QPN) || (qpn >= iwdev->max_qp))
  508. return NULL;
  509. return &iwdev->qp_table[qpn]->ibqp;
  510. }
  511. /**
  512. * i40iw_debug_buf - print debug msg and buffer is mask set
  513. * @dev: hardware control device structure
  514. * @mask: mask to compare if to print debug buffer
  515. * @buf: points buffer addr
  516. * @size: saize of buffer to print
  517. */
  518. void i40iw_debug_buf(struct i40iw_sc_dev *dev,
  519. enum i40iw_debug_flag mask,
  520. char *desc,
  521. u64 *buf,
  522. u32 size)
  523. {
  524. u32 i;
  525. if (!(dev->debug_mask & mask))
  526. return;
  527. i40iw_debug(dev, mask, "%s\n", desc);
  528. i40iw_debug(dev, mask, "starting address virt=%p phy=%llxh\n", buf,
  529. (unsigned long long)virt_to_phys(buf));
  530. for (i = 0; i < size; i += 8)
  531. i40iw_debug(dev, mask, "index %03d val: %016llx\n", i, buf[i / 8]);
  532. }
  533. /**
  534. * i40iw_get_hw_addr - return hw addr
  535. * @par: points to shared dev
  536. */
  537. u8 __iomem *i40iw_get_hw_addr(void *par)
  538. {
  539. struct i40iw_sc_dev *dev = (struct i40iw_sc_dev *)par;
  540. return dev->hw->hw_addr;
  541. }
  542. /**
  543. * i40iw_remove_head - return head entry and remove from list
  544. * @list: list for entry
  545. */
  546. void *i40iw_remove_head(struct list_head *list)
  547. {
  548. struct list_head *entry;
  549. if (list_empty(list))
  550. return NULL;
  551. entry = (void *)list->next;
  552. list_del(entry);
  553. return (void *)entry;
  554. }
  555. /**
  556. * i40iw_allocate_dma_mem - Memory alloc helper fn
  557. * @hw: pointer to the HW structure
  558. * @mem: ptr to mem struct to fill out
  559. * @size: size of memory requested
  560. * @alignment: what to align the allocation to
  561. */
  562. enum i40iw_status_code i40iw_allocate_dma_mem(struct i40iw_hw *hw,
  563. struct i40iw_dma_mem *mem,
  564. u64 size,
  565. u32 alignment)
  566. {
  567. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  568. if (!mem)
  569. return I40IW_ERR_PARAM;
  570. mem->size = ALIGN(size, alignment);
  571. mem->va = dma_zalloc_coherent(&pcidev->dev, mem->size,
  572. (dma_addr_t *)&mem->pa, GFP_KERNEL);
  573. if (!mem->va)
  574. return I40IW_ERR_NO_MEMORY;
  575. return 0;
  576. }
  577. /**
  578. * i40iw_free_dma_mem - Memory free helper fn
  579. * @hw: pointer to the HW structure
  580. * @mem: ptr to mem struct to free
  581. */
  582. void i40iw_free_dma_mem(struct i40iw_hw *hw, struct i40iw_dma_mem *mem)
  583. {
  584. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  585. if (!mem || !mem->va)
  586. return;
  587. dma_free_coherent(&pcidev->dev, mem->size,
  588. mem->va, (dma_addr_t)mem->pa);
  589. mem->va = NULL;
  590. }
  591. /**
  592. * i40iw_allocate_virt_mem - virtual memory alloc helper fn
  593. * @hw: pointer to the HW structure
  594. * @mem: ptr to mem struct to fill out
  595. * @size: size of memory requested
  596. */
  597. enum i40iw_status_code i40iw_allocate_virt_mem(struct i40iw_hw *hw,
  598. struct i40iw_virt_mem *mem,
  599. u32 size)
  600. {
  601. if (!mem)
  602. return I40IW_ERR_PARAM;
  603. mem->size = size;
  604. mem->va = kzalloc(size, GFP_KERNEL);
  605. if (mem->va)
  606. return 0;
  607. else
  608. return I40IW_ERR_NO_MEMORY;
  609. }
  610. /**
  611. * i40iw_free_virt_mem - virtual memory free helper fn
  612. * @hw: pointer to the HW structure
  613. * @mem: ptr to mem struct to free
  614. */
  615. enum i40iw_status_code i40iw_free_virt_mem(struct i40iw_hw *hw,
  616. struct i40iw_virt_mem *mem)
  617. {
  618. if (!mem)
  619. return I40IW_ERR_PARAM;
  620. /*
  621. * mem->va points to the parent of mem, so both mem and mem->va
  622. * can not be touched once mem->va is freed
  623. */
  624. kfree(mem->va);
  625. return 0;
  626. }
  627. /**
  628. * i40iw_cqp_sds_cmd - create cqp command for sd
  629. * @dev: hardware control device structure
  630. * @sd_info: information for sd cqp
  631. *
  632. */
  633. enum i40iw_status_code i40iw_cqp_sds_cmd(struct i40iw_sc_dev *dev,
  634. struct i40iw_update_sds_info *sdinfo)
  635. {
  636. enum i40iw_status_code status;
  637. struct i40iw_cqp_request *cqp_request;
  638. struct cqp_commands_info *cqp_info;
  639. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  640. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  641. if (!cqp_request)
  642. return I40IW_ERR_NO_MEMORY;
  643. cqp_info = &cqp_request->info;
  644. memcpy(&cqp_info->in.u.update_pe_sds.info, sdinfo,
  645. sizeof(cqp_info->in.u.update_pe_sds.info));
  646. cqp_info->cqp_cmd = OP_UPDATE_PE_SDS;
  647. cqp_info->post_sq = 1;
  648. cqp_info->in.u.update_pe_sds.dev = dev;
  649. cqp_info->in.u.update_pe_sds.scratch = (uintptr_t)cqp_request;
  650. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  651. if (status)
  652. i40iw_pr_err("CQP-OP Update SD's fail");
  653. return status;
  654. }
  655. /**
  656. * i40iw_qp_suspend_resume - cqp command for suspend/resume
  657. * @dev: hardware control device structure
  658. * @qp: hardware control qp
  659. * @suspend: flag if suspend or resume
  660. */
  661. void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp, bool suspend)
  662. {
  663. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  664. struct i40iw_cqp_request *cqp_request;
  665. struct i40iw_sc_cqp *cqp = dev->cqp;
  666. struct cqp_commands_info *cqp_info;
  667. enum i40iw_status_code status;
  668. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  669. if (!cqp_request)
  670. return;
  671. cqp_info = &cqp_request->info;
  672. cqp_info->cqp_cmd = (suspend) ? OP_SUSPEND : OP_RESUME;
  673. cqp_info->in.u.suspend_resume.cqp = cqp;
  674. cqp_info->in.u.suspend_resume.qp = qp;
  675. cqp_info->in.u.suspend_resume.scratch = (uintptr_t)cqp_request;
  676. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  677. if (status)
  678. i40iw_pr_err("CQP-OP QP Suspend/Resume fail");
  679. }
  680. /**
  681. * i40iw_qp_mss_modify - modify mss for qp
  682. * @dev: hardware control device structure
  683. * @qp: hardware control qp
  684. */
  685. void i40iw_qp_mss_modify(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  686. {
  687. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  688. struct i40iw_qp *iwqp = (struct i40iw_qp *)qp->back_qp;
  689. struct i40iw_modify_qp_info info;
  690. memset(&info, 0, sizeof(info));
  691. info.mss_change = true;
  692. info.new_mss = qp->vsi->mss;
  693. i40iw_hw_modify_qp(iwdev, iwqp, &info, false);
  694. }
  695. /**
  696. * i40iw_term_modify_qp - modify qp for term message
  697. * @qp: hardware control qp
  698. * @next_state: qp's next state
  699. * @term: terminate code
  700. * @term_len: length
  701. */
  702. void i40iw_term_modify_qp(struct i40iw_sc_qp *qp, u8 next_state, u8 term, u8 term_len)
  703. {
  704. struct i40iw_qp *iwqp;
  705. iwqp = (struct i40iw_qp *)qp->back_qp;
  706. i40iw_next_iw_state(iwqp, next_state, 0, term, term_len);
  707. };
  708. /**
  709. * i40iw_terminate_done - after terminate is completed
  710. * @qp: hardware control qp
  711. * @timeout_occurred: indicates if terminate timer expired
  712. */
  713. void i40iw_terminate_done(struct i40iw_sc_qp *qp, int timeout_occurred)
  714. {
  715. struct i40iw_qp *iwqp;
  716. u32 next_iwarp_state = I40IW_QP_STATE_ERROR;
  717. u8 hte = 0;
  718. bool first_time;
  719. unsigned long flags;
  720. iwqp = (struct i40iw_qp *)qp->back_qp;
  721. spin_lock_irqsave(&iwqp->lock, flags);
  722. if (iwqp->hte_added) {
  723. iwqp->hte_added = 0;
  724. hte = 1;
  725. }
  726. first_time = !(qp->term_flags & I40IW_TERM_DONE);
  727. qp->term_flags |= I40IW_TERM_DONE;
  728. spin_unlock_irqrestore(&iwqp->lock, flags);
  729. if (first_time) {
  730. if (!timeout_occurred)
  731. i40iw_terminate_del_timer(qp);
  732. else
  733. next_iwarp_state = I40IW_QP_STATE_CLOSING;
  734. i40iw_next_iw_state(iwqp, next_iwarp_state, hte, 0, 0);
  735. i40iw_cm_disconn(iwqp);
  736. }
  737. }
  738. /**
  739. * i40iw_terminate_imeout - timeout happened
  740. * @context: points to iwarp qp
  741. */
  742. static void i40iw_terminate_timeout(unsigned long context)
  743. {
  744. struct i40iw_qp *iwqp = (struct i40iw_qp *)context;
  745. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)&iwqp->sc_qp;
  746. i40iw_terminate_done(qp, 1);
  747. i40iw_rem_ref(&iwqp->ibqp);
  748. }
  749. /**
  750. * i40iw_terminate_start_timer - start terminate timeout
  751. * @qp: hardware control qp
  752. */
  753. void i40iw_terminate_start_timer(struct i40iw_sc_qp *qp)
  754. {
  755. struct i40iw_qp *iwqp;
  756. iwqp = (struct i40iw_qp *)qp->back_qp;
  757. i40iw_add_ref(&iwqp->ibqp);
  758. init_timer(&iwqp->terminate_timer);
  759. iwqp->terminate_timer.function = i40iw_terminate_timeout;
  760. iwqp->terminate_timer.expires = jiffies + HZ;
  761. iwqp->terminate_timer.data = (unsigned long)iwqp;
  762. add_timer(&iwqp->terminate_timer);
  763. }
  764. /**
  765. * i40iw_terminate_del_timer - delete terminate timeout
  766. * @qp: hardware control qp
  767. */
  768. void i40iw_terminate_del_timer(struct i40iw_sc_qp *qp)
  769. {
  770. struct i40iw_qp *iwqp;
  771. iwqp = (struct i40iw_qp *)qp->back_qp;
  772. if (del_timer(&iwqp->terminate_timer))
  773. i40iw_rem_ref(&iwqp->ibqp);
  774. }
  775. /**
  776. * i40iw_cqp_generic_worker - generic worker for cqp
  777. * @work: work pointer
  778. */
  779. static void i40iw_cqp_generic_worker(struct work_struct *work)
  780. {
  781. struct i40iw_virtchnl_work_info *work_info =
  782. &((struct virtchnl_work *)work)->work_info;
  783. if (work_info->worker_vf_dev)
  784. work_info->callback_fcn(work_info->worker_vf_dev);
  785. }
  786. /**
  787. * i40iw_cqp_spawn_worker - spawn worket thread
  788. * @iwdev: device struct pointer
  789. * @work_info: work request info
  790. * @iw_vf_idx: virtual function index
  791. */
  792. void i40iw_cqp_spawn_worker(struct i40iw_sc_dev *dev,
  793. struct i40iw_virtchnl_work_info *work_info,
  794. u32 iw_vf_idx)
  795. {
  796. struct virtchnl_work *work;
  797. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  798. work = &iwdev->virtchnl_w[iw_vf_idx];
  799. memcpy(&work->work_info, work_info, sizeof(*work_info));
  800. INIT_WORK(&work->work, i40iw_cqp_generic_worker);
  801. queue_work(iwdev->virtchnl_wq, &work->work);
  802. }
  803. /**
  804. * i40iw_cqp_manage_hmc_fcn_worker -
  805. * @work: work pointer for hmc info
  806. */
  807. static void i40iw_cqp_manage_hmc_fcn_worker(struct work_struct *work)
  808. {
  809. struct i40iw_cqp_request *cqp_request =
  810. ((struct virtchnl_work *)work)->cqp_request;
  811. struct i40iw_ccq_cqe_info ccq_cqe_info;
  812. struct i40iw_hmc_fcn_info *hmcfcninfo =
  813. &cqp_request->info.in.u.manage_hmc_pm.info;
  814. struct i40iw_device *iwdev =
  815. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->back_dev;
  816. ccq_cqe_info.cqp = NULL;
  817. ccq_cqe_info.maj_err_code = cqp_request->compl_info.maj_err_code;
  818. ccq_cqe_info.min_err_code = cqp_request->compl_info.min_err_code;
  819. ccq_cqe_info.op_code = cqp_request->compl_info.op_code;
  820. ccq_cqe_info.op_ret_val = cqp_request->compl_info.op_ret_val;
  821. ccq_cqe_info.scratch = 0;
  822. ccq_cqe_info.error = cqp_request->compl_info.error;
  823. hmcfcninfo->callback_fcn(cqp_request->info.in.u.manage_hmc_pm.dev,
  824. hmcfcninfo->cqp_callback_param, &ccq_cqe_info);
  825. i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
  826. }
  827. /**
  828. * i40iw_cqp_manage_hmc_fcn_callback - called function after cqp completion
  829. * @cqp_request: cqp request info struct for hmc fun
  830. * @unused: unused param of callback
  831. */
  832. static void i40iw_cqp_manage_hmc_fcn_callback(struct i40iw_cqp_request *cqp_request,
  833. u32 unused)
  834. {
  835. struct virtchnl_work *work;
  836. struct i40iw_hmc_fcn_info *hmcfcninfo =
  837. &cqp_request->info.in.u.manage_hmc_pm.info;
  838. struct i40iw_device *iwdev =
  839. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->
  840. back_dev;
  841. if (hmcfcninfo && hmcfcninfo->callback_fcn) {
  842. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s1\n", __func__);
  843. atomic_inc(&cqp_request->refcount);
  844. work = &iwdev->virtchnl_w[hmcfcninfo->iw_vf_idx];
  845. work->cqp_request = cqp_request;
  846. INIT_WORK(&work->work, i40iw_cqp_manage_hmc_fcn_worker);
  847. queue_work(iwdev->virtchnl_wq, &work->work);
  848. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s2\n", __func__);
  849. } else {
  850. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s: Something wrong\n", __func__);
  851. }
  852. }
  853. /**
  854. * i40iw_cqp_manage_hmc_fcn_cmd - issue cqp command to manage hmc
  855. * @dev: hardware control device structure
  856. * @hmcfcninfo: info for hmc
  857. */
  858. enum i40iw_status_code i40iw_cqp_manage_hmc_fcn_cmd(struct i40iw_sc_dev *dev,
  859. struct i40iw_hmc_fcn_info *hmcfcninfo)
  860. {
  861. enum i40iw_status_code status;
  862. struct i40iw_cqp_request *cqp_request;
  863. struct cqp_commands_info *cqp_info;
  864. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  865. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s\n", __func__);
  866. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  867. if (!cqp_request)
  868. return I40IW_ERR_NO_MEMORY;
  869. cqp_info = &cqp_request->info;
  870. cqp_request->callback_fcn = i40iw_cqp_manage_hmc_fcn_callback;
  871. cqp_request->param = hmcfcninfo;
  872. memcpy(&cqp_info->in.u.manage_hmc_pm.info, hmcfcninfo,
  873. sizeof(*hmcfcninfo));
  874. cqp_info->in.u.manage_hmc_pm.dev = dev;
  875. cqp_info->cqp_cmd = OP_MANAGE_HMC_PM_FUNC_TABLE;
  876. cqp_info->post_sq = 1;
  877. cqp_info->in.u.manage_hmc_pm.scratch = (uintptr_t)cqp_request;
  878. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  879. if (status)
  880. i40iw_pr_err("CQP-OP Manage HMC fail");
  881. return status;
  882. }
  883. /**
  884. * i40iw_cqp_query_fpm_values_cmd - send cqp command for fpm
  885. * @iwdev: function device struct
  886. * @values_mem: buffer for fpm
  887. * @hmc_fn_id: function id for fpm
  888. */
  889. enum i40iw_status_code i40iw_cqp_query_fpm_values_cmd(struct i40iw_sc_dev *dev,
  890. struct i40iw_dma_mem *values_mem,
  891. u8 hmc_fn_id)
  892. {
  893. enum i40iw_status_code status;
  894. struct i40iw_cqp_request *cqp_request;
  895. struct cqp_commands_info *cqp_info;
  896. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  897. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  898. if (!cqp_request)
  899. return I40IW_ERR_NO_MEMORY;
  900. cqp_info = &cqp_request->info;
  901. cqp_request->param = NULL;
  902. cqp_info->in.u.query_fpm_values.cqp = dev->cqp;
  903. cqp_info->in.u.query_fpm_values.fpm_values_pa = values_mem->pa;
  904. cqp_info->in.u.query_fpm_values.fpm_values_va = values_mem->va;
  905. cqp_info->in.u.query_fpm_values.hmc_fn_id = hmc_fn_id;
  906. cqp_info->cqp_cmd = OP_QUERY_FPM_VALUES;
  907. cqp_info->post_sq = 1;
  908. cqp_info->in.u.query_fpm_values.scratch = (uintptr_t)cqp_request;
  909. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  910. if (status)
  911. i40iw_pr_err("CQP-OP Query FPM fail");
  912. return status;
  913. }
  914. /**
  915. * i40iw_cqp_commit_fpm_values_cmd - commit fpm values in hw
  916. * @dev: hardware control device structure
  917. * @values_mem: buffer with fpm values
  918. * @hmc_fn_id: function id for fpm
  919. */
  920. enum i40iw_status_code i40iw_cqp_commit_fpm_values_cmd(struct i40iw_sc_dev *dev,
  921. struct i40iw_dma_mem *values_mem,
  922. u8 hmc_fn_id)
  923. {
  924. enum i40iw_status_code status;
  925. struct i40iw_cqp_request *cqp_request;
  926. struct cqp_commands_info *cqp_info;
  927. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  928. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  929. if (!cqp_request)
  930. return I40IW_ERR_NO_MEMORY;
  931. cqp_info = &cqp_request->info;
  932. cqp_request->param = NULL;
  933. cqp_info->in.u.commit_fpm_values.cqp = dev->cqp;
  934. cqp_info->in.u.commit_fpm_values.fpm_values_pa = values_mem->pa;
  935. cqp_info->in.u.commit_fpm_values.fpm_values_va = values_mem->va;
  936. cqp_info->in.u.commit_fpm_values.hmc_fn_id = hmc_fn_id;
  937. cqp_info->cqp_cmd = OP_COMMIT_FPM_VALUES;
  938. cqp_info->post_sq = 1;
  939. cqp_info->in.u.commit_fpm_values.scratch = (uintptr_t)cqp_request;
  940. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  941. if (status)
  942. i40iw_pr_err("CQP-OP Commit FPM fail");
  943. return status;
  944. }
  945. /**
  946. * i40iw_vf_wait_vchnl_resp - wait for channel msg
  947. * @iwdev: function's device struct
  948. */
  949. enum i40iw_status_code i40iw_vf_wait_vchnl_resp(struct i40iw_sc_dev *dev)
  950. {
  951. struct i40iw_device *iwdev = dev->back_dev;
  952. int timeout_ret;
  953. i40iw_debug(dev, I40IW_DEBUG_VIRT, "%s[%u] dev %p, iwdev %p\n",
  954. __func__, __LINE__, dev, iwdev);
  955. atomic_set(&iwdev->vchnl_msgs, 2);
  956. timeout_ret = wait_event_timeout(iwdev->vchnl_waitq,
  957. (atomic_read(&iwdev->vchnl_msgs) == 1),
  958. I40IW_VCHNL_EVENT_TIMEOUT);
  959. atomic_dec(&iwdev->vchnl_msgs);
  960. if (!timeout_ret) {
  961. i40iw_pr_err("virt channel completion timeout = 0x%x\n", timeout_ret);
  962. atomic_set(&iwdev->vchnl_msgs, 0);
  963. dev->vchnl_up = false;
  964. return I40IW_ERR_TIMEOUT;
  965. }
  966. wake_up(&dev->vf_reqs);
  967. return 0;
  968. }
  969. /**
  970. * i40iw_cqp_cq_create_cmd - create a cq for the cqp
  971. * @dev: device pointer
  972. * @cq: pointer to created cq
  973. */
  974. enum i40iw_status_code i40iw_cqp_cq_create_cmd(struct i40iw_sc_dev *dev,
  975. struct i40iw_sc_cq *cq)
  976. {
  977. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  978. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  979. struct i40iw_cqp_request *cqp_request;
  980. struct cqp_commands_info *cqp_info;
  981. enum i40iw_status_code status;
  982. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  983. if (!cqp_request)
  984. return I40IW_ERR_NO_MEMORY;
  985. cqp_info = &cqp_request->info;
  986. cqp_info->cqp_cmd = OP_CQ_CREATE;
  987. cqp_info->post_sq = 1;
  988. cqp_info->in.u.cq_create.cq = cq;
  989. cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
  990. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  991. if (status)
  992. i40iw_pr_err("CQP-OP Create QP fail");
  993. return status;
  994. }
  995. /**
  996. * i40iw_cqp_qp_create_cmd - create a qp for the cqp
  997. * @dev: device pointer
  998. * @qp: pointer to created qp
  999. */
  1000. enum i40iw_status_code i40iw_cqp_qp_create_cmd(struct i40iw_sc_dev *dev,
  1001. struct i40iw_sc_qp *qp)
  1002. {
  1003. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1004. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1005. struct i40iw_cqp_request *cqp_request;
  1006. struct cqp_commands_info *cqp_info;
  1007. struct i40iw_create_qp_info *qp_info;
  1008. enum i40iw_status_code status;
  1009. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1010. if (!cqp_request)
  1011. return I40IW_ERR_NO_MEMORY;
  1012. cqp_info = &cqp_request->info;
  1013. qp_info = &cqp_request->info.in.u.qp_create.info;
  1014. memset(qp_info, 0, sizeof(*qp_info));
  1015. qp_info->cq_num_valid = true;
  1016. qp_info->next_iwarp_state = I40IW_QP_STATE_RTS;
  1017. cqp_info->cqp_cmd = OP_QP_CREATE;
  1018. cqp_info->post_sq = 1;
  1019. cqp_info->in.u.qp_create.qp = qp;
  1020. cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
  1021. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1022. if (status)
  1023. i40iw_pr_err("CQP-OP QP create fail");
  1024. return status;
  1025. }
  1026. /**
  1027. * i40iw_cqp_cq_destroy_cmd - destroy the cqp cq
  1028. * @dev: device pointer
  1029. * @cq: pointer to cq
  1030. */
  1031. void i40iw_cqp_cq_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_cq *cq)
  1032. {
  1033. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1034. i40iw_cq_wq_destroy(iwdev, cq);
  1035. }
  1036. /**
  1037. * i40iw_cqp_qp_destroy_cmd - destroy the cqp
  1038. * @dev: device pointer
  1039. * @qp: pointer to qp
  1040. */
  1041. void i40iw_cqp_qp_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  1042. {
  1043. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1044. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1045. struct i40iw_cqp_request *cqp_request;
  1046. struct cqp_commands_info *cqp_info;
  1047. enum i40iw_status_code status;
  1048. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1049. if (!cqp_request)
  1050. return;
  1051. cqp_info = &cqp_request->info;
  1052. memset(cqp_info, 0, sizeof(*cqp_info));
  1053. cqp_info->cqp_cmd = OP_QP_DESTROY;
  1054. cqp_info->post_sq = 1;
  1055. cqp_info->in.u.qp_destroy.qp = qp;
  1056. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  1057. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  1058. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1059. if (status)
  1060. i40iw_pr_err("CQP QP_DESTROY fail");
  1061. }
  1062. /**
  1063. * i40iw_ieq_mpa_crc_ae - generate AE for crc error
  1064. * @dev: hardware control device structure
  1065. * @qp: hardware control qp
  1066. */
  1067. void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  1068. {
  1069. struct i40iw_qp_flush_info info;
  1070. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1071. i40iw_debug(dev, I40IW_DEBUG_AEQ, "%s entered\n", __func__);
  1072. memset(&info, 0, sizeof(info));
  1073. info.ae_code = I40IW_AE_LLP_RECEIVED_MPA_CRC_ERROR;
  1074. info.generate_ae = true;
  1075. info.ae_source = 0x3;
  1076. (void)i40iw_hw_flush_wqes(iwdev, qp, &info, false);
  1077. }
  1078. /**
  1079. * i40iw_init_hash_desc - initialize hash for crc calculation
  1080. * @desc: cryption type
  1081. */
  1082. enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc)
  1083. {
  1084. struct crypto_shash *tfm;
  1085. struct shash_desc *tdesc;
  1086. tfm = crypto_alloc_shash("crc32c", 0, 0);
  1087. if (IS_ERR(tfm))
  1088. return I40IW_ERR_MPA_CRC;
  1089. tdesc = kzalloc(sizeof(*tdesc) + crypto_shash_descsize(tfm),
  1090. GFP_KERNEL);
  1091. if (!tdesc) {
  1092. crypto_free_shash(tfm);
  1093. return I40IW_ERR_MPA_CRC;
  1094. }
  1095. tdesc->tfm = tfm;
  1096. *desc = tdesc;
  1097. return 0;
  1098. }
  1099. /**
  1100. * i40iw_free_hash_desc - free hash desc
  1101. * @desc: to be freed
  1102. */
  1103. void i40iw_free_hash_desc(struct shash_desc *desc)
  1104. {
  1105. if (desc) {
  1106. crypto_free_shash(desc->tfm);
  1107. kfree(desc);
  1108. }
  1109. }
  1110. /**
  1111. * i40iw_alloc_query_fpm_buf - allocate buffer for fpm
  1112. * @dev: hardware control device structure
  1113. * @mem: buffer ptr for fpm to be allocated
  1114. * @return: memory allocation status
  1115. */
  1116. enum i40iw_status_code i40iw_alloc_query_fpm_buf(struct i40iw_sc_dev *dev,
  1117. struct i40iw_dma_mem *mem)
  1118. {
  1119. enum i40iw_status_code status;
  1120. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1121. status = i40iw_obj_aligned_mem(iwdev, mem, I40IW_QUERY_FPM_BUF_SIZE,
  1122. I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK);
  1123. return status;
  1124. }
  1125. /**
  1126. * i40iw_ieq_check_mpacrc - check if mpa crc is OK
  1127. * @desc: desc for hash
  1128. * @addr: address of buffer for crc
  1129. * @length: length of buffer
  1130. * @value: value to be compared
  1131. */
  1132. enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
  1133. void *addr,
  1134. u32 length,
  1135. u32 value)
  1136. {
  1137. u32 crc = 0;
  1138. int ret;
  1139. enum i40iw_status_code ret_code = 0;
  1140. crypto_shash_init(desc);
  1141. ret = crypto_shash_update(desc, addr, length);
  1142. if (!ret)
  1143. crypto_shash_final(desc, (u8 *)&crc);
  1144. if (crc != value) {
  1145. i40iw_pr_err("mpa crc check fail\n");
  1146. ret_code = I40IW_ERR_MPA_CRC;
  1147. }
  1148. return ret_code;
  1149. }
  1150. /**
  1151. * i40iw_ieq_get_qp - get qp based on quad in puda buffer
  1152. * @dev: hardware control device structure
  1153. * @buf: receive puda buffer on exception q
  1154. */
  1155. struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev,
  1156. struct i40iw_puda_buf *buf)
  1157. {
  1158. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1159. struct i40iw_qp *iwqp;
  1160. struct i40iw_cm_node *cm_node;
  1161. u32 loc_addr[4], rem_addr[4];
  1162. u16 loc_port, rem_port;
  1163. struct ipv6hdr *ip6h;
  1164. struct iphdr *iph = (struct iphdr *)buf->iph;
  1165. struct tcphdr *tcph = (struct tcphdr *)buf->tcph;
  1166. if (iph->version == 4) {
  1167. memset(loc_addr, 0, sizeof(loc_addr));
  1168. loc_addr[0] = ntohl(iph->daddr);
  1169. memset(rem_addr, 0, sizeof(rem_addr));
  1170. rem_addr[0] = ntohl(iph->saddr);
  1171. } else {
  1172. ip6h = (struct ipv6hdr *)buf->iph;
  1173. i40iw_copy_ip_ntohl(loc_addr, ip6h->daddr.in6_u.u6_addr32);
  1174. i40iw_copy_ip_ntohl(rem_addr, ip6h->saddr.in6_u.u6_addr32);
  1175. }
  1176. loc_port = ntohs(tcph->dest);
  1177. rem_port = ntohs(tcph->source);
  1178. cm_node = i40iw_find_node(&iwdev->cm_core, rem_port, rem_addr, loc_port,
  1179. loc_addr, false);
  1180. if (!cm_node)
  1181. return NULL;
  1182. iwqp = cm_node->iwqp;
  1183. return &iwqp->sc_qp;
  1184. }
  1185. /**
  1186. * i40iw_ieq_update_tcpip_info - update tcpip in the buffer
  1187. * @buf: puda to update
  1188. * @length: length of buffer
  1189. * @seqnum: seq number for tcp
  1190. */
  1191. void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length, u32 seqnum)
  1192. {
  1193. struct tcphdr *tcph;
  1194. struct iphdr *iph;
  1195. u16 iphlen;
  1196. u16 packetsize;
  1197. u8 *addr = (u8 *)buf->mem.va;
  1198. iphlen = (buf->ipv4) ? 20 : 40;
  1199. iph = (struct iphdr *)(addr + buf->maclen);
  1200. tcph = (struct tcphdr *)(addr + buf->maclen + iphlen);
  1201. packetsize = length + buf->tcphlen + iphlen;
  1202. iph->tot_len = htons(packetsize);
  1203. tcph->seq = htonl(seqnum);
  1204. }
  1205. /**
  1206. * i40iw_puda_get_tcpip_info - get tcpip info from puda buffer
  1207. * @info: to get information
  1208. * @buf: puda buffer
  1209. */
  1210. enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
  1211. struct i40iw_puda_buf *buf)
  1212. {
  1213. struct iphdr *iph;
  1214. struct ipv6hdr *ip6h;
  1215. struct tcphdr *tcph;
  1216. u16 iphlen;
  1217. u16 pkt_len;
  1218. u8 *mem = (u8 *)buf->mem.va;
  1219. struct ethhdr *ethh = (struct ethhdr *)buf->mem.va;
  1220. if (ethh->h_proto == htons(0x8100)) {
  1221. info->vlan_valid = true;
  1222. buf->vlan_id = ntohs(((struct vlan_ethhdr *)ethh)->h_vlan_TCI) & VLAN_VID_MASK;
  1223. }
  1224. buf->maclen = (info->vlan_valid) ? 18 : 14;
  1225. iphlen = (info->l3proto) ? 40 : 20;
  1226. buf->ipv4 = (info->l3proto) ? false : true;
  1227. buf->iph = mem + buf->maclen;
  1228. iph = (struct iphdr *)buf->iph;
  1229. buf->tcph = buf->iph + iphlen;
  1230. tcph = (struct tcphdr *)buf->tcph;
  1231. if (buf->ipv4) {
  1232. pkt_len = ntohs(iph->tot_len);
  1233. } else {
  1234. ip6h = (struct ipv6hdr *)buf->iph;
  1235. pkt_len = ntohs(ip6h->payload_len) + iphlen;
  1236. }
  1237. buf->totallen = pkt_len + buf->maclen;
  1238. if (info->payload_len < buf->totallen) {
  1239. i40iw_pr_err("payload_len = 0x%x totallen expected0x%x\n",
  1240. info->payload_len, buf->totallen);
  1241. return I40IW_ERR_INVALID_SIZE;
  1242. }
  1243. buf->tcphlen = (tcph->doff) << 2;
  1244. buf->datalen = pkt_len - iphlen - buf->tcphlen;
  1245. buf->data = (buf->datalen) ? buf->tcph + buf->tcphlen : NULL;
  1246. buf->hdrlen = buf->maclen + iphlen + buf->tcphlen;
  1247. buf->seqnum = ntohl(tcph->seq);
  1248. return 0;
  1249. }
  1250. /**
  1251. * i40iw_hw_stats_timeout - Stats timer-handler which updates all HW stats
  1252. * @vsi: pointer to the vsi structure
  1253. */
  1254. static void i40iw_hw_stats_timeout(unsigned long vsi)
  1255. {
  1256. struct i40iw_sc_vsi *sc_vsi = (struct i40iw_sc_vsi *)vsi;
  1257. struct i40iw_sc_dev *pf_dev = sc_vsi->dev;
  1258. struct i40iw_vsi_pestat *pf_devstat = sc_vsi->pestat;
  1259. struct i40iw_vsi_pestat *vf_devstat = NULL;
  1260. u16 iw_vf_idx;
  1261. unsigned long flags;
  1262. /*PF*/
  1263. i40iw_hw_stats_read_all(pf_devstat, &pf_devstat->hw_stats);
  1264. for (iw_vf_idx = 0; iw_vf_idx < I40IW_MAX_PE_ENABLED_VF_COUNT; iw_vf_idx++) {
  1265. spin_lock_irqsave(&pf_devstat->lock, flags);
  1266. if (pf_dev->vf_dev[iw_vf_idx]) {
  1267. if (pf_dev->vf_dev[iw_vf_idx]->stats_initialized) {
  1268. vf_devstat = &pf_dev->vf_dev[iw_vf_idx]->pestat;
  1269. i40iw_hw_stats_read_all(vf_devstat, &vf_devstat->hw_stats);
  1270. }
  1271. }
  1272. spin_unlock_irqrestore(&pf_devstat->lock, flags);
  1273. }
  1274. mod_timer(&pf_devstat->stats_timer,
  1275. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1276. }
  1277. /**
  1278. * i40iw_hw_stats_start_timer - Start periodic stats timer
  1279. * @vsi: pointer to the vsi structure
  1280. */
  1281. void i40iw_hw_stats_start_timer(struct i40iw_sc_vsi *vsi)
  1282. {
  1283. struct i40iw_vsi_pestat *devstat = vsi->pestat;
  1284. init_timer(&devstat->stats_timer);
  1285. devstat->stats_timer.function = i40iw_hw_stats_timeout;
  1286. devstat->stats_timer.data = (unsigned long)vsi;
  1287. mod_timer(&devstat->stats_timer,
  1288. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1289. }
  1290. /**
  1291. * i40iw_hw_stats_stop_timer - Delete periodic stats timer
  1292. * @vsi: pointer to the vsi structure
  1293. */
  1294. void i40iw_hw_stats_stop_timer(struct i40iw_sc_vsi *vsi)
  1295. {
  1296. struct i40iw_vsi_pestat *devstat = vsi->pestat;
  1297. del_timer_sync(&devstat->stats_timer);
  1298. }