rc.c 68 KB

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  1. /*
  2. * Copyright(c) 2015, 2016 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #include <linux/io.h>
  48. #include <rdma/rdma_vt.h>
  49. #include <rdma/rdmavt_qp.h>
  50. #include "hfi.h"
  51. #include "qp.h"
  52. #include "verbs_txreq.h"
  53. #include "trace.h"
  54. /* cut down ridiculously long IB macro names */
  55. #define OP(x) RC_OP(x)
  56. /**
  57. * hfi1_add_retry_timer - add/start a retry timer
  58. * @qp - the QP
  59. *
  60. * add a retry timer on the QP
  61. */
  62. static inline void hfi1_add_retry_timer(struct rvt_qp *qp)
  63. {
  64. struct ib_qp *ibqp = &qp->ibqp;
  65. struct rvt_dev_info *rdi = ib_to_rvt(ibqp->device);
  66. lockdep_assert_held(&qp->s_lock);
  67. qp->s_flags |= RVT_S_TIMER;
  68. /* 4.096 usec. * (1 << qp->timeout) */
  69. qp->s_timer.expires = jiffies + qp->timeout_jiffies +
  70. rdi->busy_jiffies;
  71. add_timer(&qp->s_timer);
  72. }
  73. /**
  74. * hfi1_add_rnr_timer - add/start an rnr timer
  75. * @qp - the QP
  76. * @to - timeout in usecs
  77. *
  78. * add an rnr timer on the QP
  79. */
  80. void hfi1_add_rnr_timer(struct rvt_qp *qp, u32 to)
  81. {
  82. struct hfi1_qp_priv *priv = qp->priv;
  83. lockdep_assert_held(&qp->s_lock);
  84. qp->s_flags |= RVT_S_WAIT_RNR;
  85. priv->s_rnr_timer.expires = jiffies + usecs_to_jiffies(to);
  86. add_timer(&priv->s_rnr_timer);
  87. }
  88. /**
  89. * hfi1_mod_retry_timer - mod a retry timer
  90. * @qp - the QP
  91. *
  92. * Modify a potentially already running retry
  93. * timer
  94. */
  95. static inline void hfi1_mod_retry_timer(struct rvt_qp *qp)
  96. {
  97. struct ib_qp *ibqp = &qp->ibqp;
  98. struct rvt_dev_info *rdi = ib_to_rvt(ibqp->device);
  99. lockdep_assert_held(&qp->s_lock);
  100. qp->s_flags |= RVT_S_TIMER;
  101. /* 4.096 usec. * (1 << qp->timeout) */
  102. mod_timer(&qp->s_timer, jiffies + qp->timeout_jiffies +
  103. rdi->busy_jiffies);
  104. }
  105. /**
  106. * hfi1_stop_retry_timer - stop a retry timer
  107. * @qp - the QP
  108. *
  109. * stop a retry timer and return if the timer
  110. * had been pending.
  111. */
  112. static inline int hfi1_stop_retry_timer(struct rvt_qp *qp)
  113. {
  114. int rval = 0;
  115. lockdep_assert_held(&qp->s_lock);
  116. /* Remove QP from retry */
  117. if (qp->s_flags & RVT_S_TIMER) {
  118. qp->s_flags &= ~RVT_S_TIMER;
  119. rval = del_timer(&qp->s_timer);
  120. }
  121. return rval;
  122. }
  123. /**
  124. * hfi1_stop_rc_timers - stop all timers
  125. * @qp - the QP
  126. *
  127. * stop any pending timers
  128. */
  129. void hfi1_stop_rc_timers(struct rvt_qp *qp)
  130. {
  131. struct hfi1_qp_priv *priv = qp->priv;
  132. lockdep_assert_held(&qp->s_lock);
  133. /* Remove QP from all timers */
  134. if (qp->s_flags & (RVT_S_TIMER | RVT_S_WAIT_RNR)) {
  135. qp->s_flags &= ~(RVT_S_TIMER | RVT_S_WAIT_RNR);
  136. del_timer(&qp->s_timer);
  137. del_timer(&priv->s_rnr_timer);
  138. }
  139. }
  140. /**
  141. * hfi1_stop_rnr_timer - stop an rnr timer
  142. * @qp - the QP
  143. *
  144. * stop an rnr timer and return if the timer
  145. * had been pending.
  146. */
  147. static inline int hfi1_stop_rnr_timer(struct rvt_qp *qp)
  148. {
  149. int rval = 0;
  150. struct hfi1_qp_priv *priv = qp->priv;
  151. lockdep_assert_held(&qp->s_lock);
  152. /* Remove QP from rnr timer */
  153. if (qp->s_flags & RVT_S_WAIT_RNR) {
  154. qp->s_flags &= ~RVT_S_WAIT_RNR;
  155. rval = del_timer(&priv->s_rnr_timer);
  156. }
  157. return rval;
  158. }
  159. /**
  160. * hfi1_del_timers_sync - wait for any timeout routines to exit
  161. * @qp - the QP
  162. */
  163. void hfi1_del_timers_sync(struct rvt_qp *qp)
  164. {
  165. struct hfi1_qp_priv *priv = qp->priv;
  166. del_timer_sync(&qp->s_timer);
  167. del_timer_sync(&priv->s_rnr_timer);
  168. }
  169. static u32 restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe,
  170. u32 psn, u32 pmtu)
  171. {
  172. u32 len;
  173. len = delta_psn(psn, wqe->psn) * pmtu;
  174. ss->sge = wqe->sg_list[0];
  175. ss->sg_list = wqe->sg_list + 1;
  176. ss->num_sge = wqe->wr.num_sge;
  177. ss->total_len = wqe->length;
  178. hfi1_skip_sge(ss, len, 0);
  179. return wqe->length - len;
  180. }
  181. /**
  182. * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  183. * @dev: the device for this QP
  184. * @qp: a pointer to the QP
  185. * @ohdr: a pointer to the IB header being constructed
  186. * @ps: the xmit packet state
  187. *
  188. * Return 1 if constructed; otherwise, return 0.
  189. * Note that we are in the responder's side of the QP context.
  190. * Note the QP s_lock must be held.
  191. */
  192. static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp,
  193. struct ib_other_headers *ohdr,
  194. struct hfi1_pkt_state *ps)
  195. {
  196. struct rvt_ack_entry *e;
  197. u32 hwords;
  198. u32 len;
  199. u32 bth0;
  200. u32 bth2;
  201. int middle = 0;
  202. u32 pmtu = qp->pmtu;
  203. struct hfi1_qp_priv *priv = qp->priv;
  204. lockdep_assert_held(&qp->s_lock);
  205. /* Don't send an ACK if we aren't supposed to. */
  206. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  207. goto bail;
  208. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  209. hwords = 5;
  210. switch (qp->s_ack_state) {
  211. case OP(RDMA_READ_RESPONSE_LAST):
  212. case OP(RDMA_READ_RESPONSE_ONLY):
  213. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  214. if (e->rdma_sge.mr) {
  215. rvt_put_mr(e->rdma_sge.mr);
  216. e->rdma_sge.mr = NULL;
  217. }
  218. /* FALLTHROUGH */
  219. case OP(ATOMIC_ACKNOWLEDGE):
  220. /*
  221. * We can increment the tail pointer now that the last
  222. * response has been sent instead of only being
  223. * constructed.
  224. */
  225. if (++qp->s_tail_ack_queue > HFI1_MAX_RDMA_ATOMIC)
  226. qp->s_tail_ack_queue = 0;
  227. /* FALLTHROUGH */
  228. case OP(SEND_ONLY):
  229. case OP(ACKNOWLEDGE):
  230. /* Check for no next entry in the queue. */
  231. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  232. if (qp->s_flags & RVT_S_ACK_PENDING)
  233. goto normal;
  234. goto bail;
  235. }
  236. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  237. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  238. /*
  239. * If a RDMA read response is being resent and
  240. * we haven't seen the duplicate request yet,
  241. * then stop sending the remaining responses the
  242. * responder has seen until the requester re-sends it.
  243. */
  244. len = e->rdma_sge.sge_length;
  245. if (len && !e->rdma_sge.mr) {
  246. qp->s_tail_ack_queue = qp->r_head_ack_queue;
  247. goto bail;
  248. }
  249. /* Copy SGE state in case we need to resend */
  250. ps->s_txreq->mr = e->rdma_sge.mr;
  251. if (ps->s_txreq->mr)
  252. rvt_get_mr(ps->s_txreq->mr);
  253. qp->s_ack_rdma_sge.sge = e->rdma_sge;
  254. qp->s_ack_rdma_sge.num_sge = 1;
  255. ps->s_txreq->ss = &qp->s_ack_rdma_sge;
  256. if (len > pmtu) {
  257. len = pmtu;
  258. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  259. } else {
  260. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  261. e->sent = 1;
  262. }
  263. ohdr->u.aeth = hfi1_compute_aeth(qp);
  264. hwords++;
  265. qp->s_ack_rdma_psn = e->psn;
  266. bth2 = mask_psn(qp->s_ack_rdma_psn++);
  267. } else {
  268. /* COMPARE_SWAP or FETCH_ADD */
  269. ps->s_txreq->ss = NULL;
  270. len = 0;
  271. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  272. ohdr->u.at.aeth = hfi1_compute_aeth(qp);
  273. ib_u64_put(e->atomic_data, &ohdr->u.at.atomic_ack_eth);
  274. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  275. bth2 = mask_psn(e->psn);
  276. e->sent = 1;
  277. }
  278. bth0 = qp->s_ack_state << 24;
  279. break;
  280. case OP(RDMA_READ_RESPONSE_FIRST):
  281. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  282. /* FALLTHROUGH */
  283. case OP(RDMA_READ_RESPONSE_MIDDLE):
  284. ps->s_txreq->ss = &qp->s_ack_rdma_sge;
  285. ps->s_txreq->mr = qp->s_ack_rdma_sge.sge.mr;
  286. if (ps->s_txreq->mr)
  287. rvt_get_mr(ps->s_txreq->mr);
  288. len = qp->s_ack_rdma_sge.sge.sge_length;
  289. if (len > pmtu) {
  290. len = pmtu;
  291. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  292. } else {
  293. ohdr->u.aeth = hfi1_compute_aeth(qp);
  294. hwords++;
  295. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  296. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  297. e->sent = 1;
  298. }
  299. bth0 = qp->s_ack_state << 24;
  300. bth2 = mask_psn(qp->s_ack_rdma_psn++);
  301. break;
  302. default:
  303. normal:
  304. /*
  305. * Send a regular ACK.
  306. * Set the s_ack_state so we wait until after sending
  307. * the ACK before setting s_ack_state to ACKNOWLEDGE
  308. * (see above).
  309. */
  310. qp->s_ack_state = OP(SEND_ONLY);
  311. qp->s_flags &= ~RVT_S_ACK_PENDING;
  312. ps->s_txreq->ss = NULL;
  313. if (qp->s_nak_state)
  314. ohdr->u.aeth =
  315. cpu_to_be32((qp->r_msn & HFI1_MSN_MASK) |
  316. (qp->s_nak_state <<
  317. HFI1_AETH_CREDIT_SHIFT));
  318. else
  319. ohdr->u.aeth = hfi1_compute_aeth(qp);
  320. hwords++;
  321. len = 0;
  322. bth0 = OP(ACKNOWLEDGE) << 24;
  323. bth2 = mask_psn(qp->s_ack_psn);
  324. }
  325. qp->s_rdma_ack_cnt++;
  326. qp->s_hdrwords = hwords;
  327. ps->s_txreq->sde = priv->s_sde;
  328. ps->s_txreq->s_cur_size = len;
  329. hfi1_make_ruc_header(qp, ohdr, bth0, bth2, middle, ps);
  330. /* pbc */
  331. ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
  332. return 1;
  333. bail:
  334. qp->s_ack_state = OP(ACKNOWLEDGE);
  335. /*
  336. * Ensure s_rdma_ack_cnt changes are committed prior to resetting
  337. * RVT_S_RESP_PENDING
  338. */
  339. smp_wmb();
  340. qp->s_flags &= ~(RVT_S_RESP_PENDING
  341. | RVT_S_ACK_PENDING
  342. | RVT_S_AHG_VALID);
  343. return 0;
  344. }
  345. /**
  346. * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  347. * @qp: a pointer to the QP
  348. *
  349. * Assumes s_lock is held.
  350. *
  351. * Return 1 if constructed; otherwise, return 0.
  352. */
  353. int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
  354. {
  355. struct hfi1_qp_priv *priv = qp->priv;
  356. struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
  357. struct ib_other_headers *ohdr;
  358. struct rvt_sge_state *ss;
  359. struct rvt_swqe *wqe;
  360. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  361. u32 hwords = 5;
  362. u32 len;
  363. u32 bth0 = 0;
  364. u32 bth2;
  365. u32 pmtu = qp->pmtu;
  366. char newreq;
  367. int middle = 0;
  368. int delta;
  369. lockdep_assert_held(&qp->s_lock);
  370. ps->s_txreq = get_txreq(ps->dev, qp);
  371. if (IS_ERR(ps->s_txreq))
  372. goto bail_no_tx;
  373. ohdr = &ps->s_txreq->phdr.hdr.u.oth;
  374. if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
  375. ohdr = &ps->s_txreq->phdr.hdr.u.l.oth;
  376. /* Sending responses has higher priority over sending requests. */
  377. if ((qp->s_flags & RVT_S_RESP_PENDING) &&
  378. make_rc_ack(dev, qp, ohdr, ps))
  379. return 1;
  380. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
  381. if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
  382. goto bail;
  383. /* We are in the error state, flush the work request. */
  384. smp_read_barrier_depends(); /* see post_one_send() */
  385. if (qp->s_last == ACCESS_ONCE(qp->s_head))
  386. goto bail;
  387. /* If DMAs are in progress, we can't flush immediately. */
  388. if (iowait_sdma_pending(&priv->s_iowait)) {
  389. qp->s_flags |= RVT_S_WAIT_DMA;
  390. goto bail;
  391. }
  392. clear_ahg(qp);
  393. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  394. hfi1_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
  395. IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
  396. /* will get called again */
  397. goto done_free_tx;
  398. }
  399. if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK))
  400. goto bail;
  401. if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) {
  402. if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
  403. qp->s_flags |= RVT_S_WAIT_PSN;
  404. goto bail;
  405. }
  406. qp->s_sending_psn = qp->s_psn;
  407. qp->s_sending_hpsn = qp->s_psn - 1;
  408. }
  409. /* Send a request. */
  410. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  411. switch (qp->s_state) {
  412. default:
  413. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK))
  414. goto bail;
  415. /*
  416. * Resend an old request or start a new one.
  417. *
  418. * We keep track of the current SWQE so that
  419. * we don't reset the "furthest progress" state
  420. * if we need to back up.
  421. */
  422. newreq = 0;
  423. if (qp->s_cur == qp->s_tail) {
  424. /* Check if send work queue is empty. */
  425. if (qp->s_tail == qp->s_head) {
  426. clear_ahg(qp);
  427. goto bail;
  428. }
  429. /*
  430. * If a fence is requested, wait for previous
  431. * RDMA read and atomic operations to finish.
  432. */
  433. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  434. qp->s_num_rd_atomic) {
  435. qp->s_flags |= RVT_S_WAIT_FENCE;
  436. goto bail;
  437. }
  438. /*
  439. * Local operations are processed immediately
  440. * after all prior requests have completed
  441. */
  442. if (wqe->wr.opcode == IB_WR_REG_MR ||
  443. wqe->wr.opcode == IB_WR_LOCAL_INV) {
  444. int local_ops = 0;
  445. int err = 0;
  446. if (qp->s_last != qp->s_cur)
  447. goto bail;
  448. if (++qp->s_cur == qp->s_size)
  449. qp->s_cur = 0;
  450. if (++qp->s_tail == qp->s_size)
  451. qp->s_tail = 0;
  452. if (!(wqe->wr.send_flags &
  453. RVT_SEND_COMPLETION_ONLY)) {
  454. err = rvt_invalidate_rkey(
  455. qp,
  456. wqe->wr.ex.invalidate_rkey);
  457. local_ops = 1;
  458. }
  459. hfi1_send_complete(qp, wqe,
  460. err ? IB_WC_LOC_PROT_ERR
  461. : IB_WC_SUCCESS);
  462. if (local_ops)
  463. atomic_dec(&qp->local_ops_pending);
  464. qp->s_hdrwords = 0;
  465. goto done_free_tx;
  466. }
  467. newreq = 1;
  468. qp->s_psn = wqe->psn;
  469. }
  470. /*
  471. * Note that we have to be careful not to modify the
  472. * original work request since we may need to resend
  473. * it.
  474. */
  475. len = wqe->length;
  476. ss = &qp->s_sge;
  477. bth2 = mask_psn(qp->s_psn);
  478. switch (wqe->wr.opcode) {
  479. case IB_WR_SEND:
  480. case IB_WR_SEND_WITH_IMM:
  481. case IB_WR_SEND_WITH_INV:
  482. /* If no credit, return. */
  483. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  484. cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
  485. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  486. goto bail;
  487. }
  488. if (len > pmtu) {
  489. qp->s_state = OP(SEND_FIRST);
  490. len = pmtu;
  491. break;
  492. }
  493. if (wqe->wr.opcode == IB_WR_SEND) {
  494. qp->s_state = OP(SEND_ONLY);
  495. } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
  496. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  497. /* Immediate data comes after the BTH */
  498. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  499. hwords += 1;
  500. } else {
  501. qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE);
  502. /* Invalidate rkey comes after the BTH */
  503. ohdr->u.ieth = cpu_to_be32(
  504. wqe->wr.ex.invalidate_rkey);
  505. hwords += 1;
  506. }
  507. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  508. bth0 |= IB_BTH_SOLICITED;
  509. bth2 |= IB_BTH_REQ_ACK;
  510. if (++qp->s_cur == qp->s_size)
  511. qp->s_cur = 0;
  512. break;
  513. case IB_WR_RDMA_WRITE:
  514. if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  515. qp->s_lsn++;
  516. /* FALLTHROUGH */
  517. case IB_WR_RDMA_WRITE_WITH_IMM:
  518. /* If no credit, return. */
  519. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  520. cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
  521. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  522. goto bail;
  523. }
  524. put_ib_reth_vaddr(
  525. wqe->rdma_wr.remote_addr,
  526. &ohdr->u.rc.reth);
  527. ohdr->u.rc.reth.rkey =
  528. cpu_to_be32(wqe->rdma_wr.rkey);
  529. ohdr->u.rc.reth.length = cpu_to_be32(len);
  530. hwords += sizeof(struct ib_reth) / sizeof(u32);
  531. if (len > pmtu) {
  532. qp->s_state = OP(RDMA_WRITE_FIRST);
  533. len = pmtu;
  534. break;
  535. }
  536. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  537. qp->s_state = OP(RDMA_WRITE_ONLY);
  538. } else {
  539. qp->s_state =
  540. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  541. /* Immediate data comes after RETH */
  542. ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
  543. hwords += 1;
  544. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  545. bth0 |= IB_BTH_SOLICITED;
  546. }
  547. bth2 |= IB_BTH_REQ_ACK;
  548. if (++qp->s_cur == qp->s_size)
  549. qp->s_cur = 0;
  550. break;
  551. case IB_WR_RDMA_READ:
  552. /*
  553. * Don't allow more operations to be started
  554. * than the QP limits allow.
  555. */
  556. if (newreq) {
  557. if (qp->s_num_rd_atomic >=
  558. qp->s_max_rd_atomic) {
  559. qp->s_flags |= RVT_S_WAIT_RDMAR;
  560. goto bail;
  561. }
  562. qp->s_num_rd_atomic++;
  563. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  564. qp->s_lsn++;
  565. }
  566. put_ib_reth_vaddr(
  567. wqe->rdma_wr.remote_addr,
  568. &ohdr->u.rc.reth);
  569. ohdr->u.rc.reth.rkey =
  570. cpu_to_be32(wqe->rdma_wr.rkey);
  571. ohdr->u.rc.reth.length = cpu_to_be32(len);
  572. qp->s_state = OP(RDMA_READ_REQUEST);
  573. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  574. ss = NULL;
  575. len = 0;
  576. bth2 |= IB_BTH_REQ_ACK;
  577. if (++qp->s_cur == qp->s_size)
  578. qp->s_cur = 0;
  579. break;
  580. case IB_WR_ATOMIC_CMP_AND_SWP:
  581. case IB_WR_ATOMIC_FETCH_AND_ADD:
  582. /*
  583. * Don't allow more operations to be started
  584. * than the QP limits allow.
  585. */
  586. if (newreq) {
  587. if (qp->s_num_rd_atomic >=
  588. qp->s_max_rd_atomic) {
  589. qp->s_flags |= RVT_S_WAIT_RDMAR;
  590. goto bail;
  591. }
  592. qp->s_num_rd_atomic++;
  593. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  594. qp->s_lsn++;
  595. }
  596. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  597. qp->s_state = OP(COMPARE_SWAP);
  598. put_ib_ateth_swap(wqe->atomic_wr.swap,
  599. &ohdr->u.atomic_eth);
  600. put_ib_ateth_compare(wqe->atomic_wr.compare_add,
  601. &ohdr->u.atomic_eth);
  602. } else {
  603. qp->s_state = OP(FETCH_ADD);
  604. put_ib_ateth_swap(wqe->atomic_wr.compare_add,
  605. &ohdr->u.atomic_eth);
  606. put_ib_ateth_compare(0, &ohdr->u.atomic_eth);
  607. }
  608. put_ib_ateth_vaddr(wqe->atomic_wr.remote_addr,
  609. &ohdr->u.atomic_eth);
  610. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  611. wqe->atomic_wr.rkey);
  612. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  613. ss = NULL;
  614. len = 0;
  615. bth2 |= IB_BTH_REQ_ACK;
  616. if (++qp->s_cur == qp->s_size)
  617. qp->s_cur = 0;
  618. break;
  619. default:
  620. goto bail;
  621. }
  622. qp->s_sge.sge = wqe->sg_list[0];
  623. qp->s_sge.sg_list = wqe->sg_list + 1;
  624. qp->s_sge.num_sge = wqe->wr.num_sge;
  625. qp->s_sge.total_len = wqe->length;
  626. qp->s_len = wqe->length;
  627. if (newreq) {
  628. qp->s_tail++;
  629. if (qp->s_tail >= qp->s_size)
  630. qp->s_tail = 0;
  631. }
  632. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  633. qp->s_psn = wqe->lpsn + 1;
  634. else
  635. qp->s_psn++;
  636. break;
  637. case OP(RDMA_READ_RESPONSE_FIRST):
  638. /*
  639. * qp->s_state is normally set to the opcode of the
  640. * last packet constructed for new requests and therefore
  641. * is never set to RDMA read response.
  642. * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
  643. * thread to indicate a SEND needs to be restarted from an
  644. * earlier PSN without interfering with the sending thread.
  645. * See restart_rc().
  646. */
  647. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  648. /* FALLTHROUGH */
  649. case OP(SEND_FIRST):
  650. qp->s_state = OP(SEND_MIDDLE);
  651. /* FALLTHROUGH */
  652. case OP(SEND_MIDDLE):
  653. bth2 = mask_psn(qp->s_psn++);
  654. ss = &qp->s_sge;
  655. len = qp->s_len;
  656. if (len > pmtu) {
  657. len = pmtu;
  658. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  659. break;
  660. }
  661. if (wqe->wr.opcode == IB_WR_SEND) {
  662. qp->s_state = OP(SEND_LAST);
  663. } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
  664. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  665. /* Immediate data comes after the BTH */
  666. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  667. hwords += 1;
  668. } else {
  669. qp->s_state = OP(SEND_LAST_WITH_INVALIDATE);
  670. /* invalidate data comes after the BTH */
  671. ohdr->u.ieth = cpu_to_be32(wqe->wr.ex.invalidate_rkey);
  672. hwords += 1;
  673. }
  674. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  675. bth0 |= IB_BTH_SOLICITED;
  676. bth2 |= IB_BTH_REQ_ACK;
  677. qp->s_cur++;
  678. if (qp->s_cur >= qp->s_size)
  679. qp->s_cur = 0;
  680. break;
  681. case OP(RDMA_READ_RESPONSE_LAST):
  682. /*
  683. * qp->s_state is normally set to the opcode of the
  684. * last packet constructed for new requests and therefore
  685. * is never set to RDMA read response.
  686. * RDMA_READ_RESPONSE_LAST is used by the ACK processing
  687. * thread to indicate a RDMA write needs to be restarted from
  688. * an earlier PSN without interfering with the sending thread.
  689. * See restart_rc().
  690. */
  691. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  692. /* FALLTHROUGH */
  693. case OP(RDMA_WRITE_FIRST):
  694. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  695. /* FALLTHROUGH */
  696. case OP(RDMA_WRITE_MIDDLE):
  697. bth2 = mask_psn(qp->s_psn++);
  698. ss = &qp->s_sge;
  699. len = qp->s_len;
  700. if (len > pmtu) {
  701. len = pmtu;
  702. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  703. break;
  704. }
  705. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  706. qp->s_state = OP(RDMA_WRITE_LAST);
  707. } else {
  708. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  709. /* Immediate data comes after the BTH */
  710. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  711. hwords += 1;
  712. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  713. bth0 |= IB_BTH_SOLICITED;
  714. }
  715. bth2 |= IB_BTH_REQ_ACK;
  716. qp->s_cur++;
  717. if (qp->s_cur >= qp->s_size)
  718. qp->s_cur = 0;
  719. break;
  720. case OP(RDMA_READ_RESPONSE_MIDDLE):
  721. /*
  722. * qp->s_state is normally set to the opcode of the
  723. * last packet constructed for new requests and therefore
  724. * is never set to RDMA read response.
  725. * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
  726. * thread to indicate a RDMA read needs to be restarted from
  727. * an earlier PSN without interfering with the sending thread.
  728. * See restart_rc().
  729. */
  730. len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu;
  731. put_ib_reth_vaddr(
  732. wqe->rdma_wr.remote_addr + len,
  733. &ohdr->u.rc.reth);
  734. ohdr->u.rc.reth.rkey =
  735. cpu_to_be32(wqe->rdma_wr.rkey);
  736. ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
  737. qp->s_state = OP(RDMA_READ_REQUEST);
  738. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  739. bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK;
  740. qp->s_psn = wqe->lpsn + 1;
  741. ss = NULL;
  742. len = 0;
  743. qp->s_cur++;
  744. if (qp->s_cur == qp->s_size)
  745. qp->s_cur = 0;
  746. break;
  747. }
  748. qp->s_sending_hpsn = bth2;
  749. delta = delta_psn(bth2, wqe->psn);
  750. if (delta && delta % HFI1_PSN_CREDIT == 0)
  751. bth2 |= IB_BTH_REQ_ACK;
  752. if (qp->s_flags & RVT_S_SEND_ONE) {
  753. qp->s_flags &= ~RVT_S_SEND_ONE;
  754. qp->s_flags |= RVT_S_WAIT_ACK;
  755. bth2 |= IB_BTH_REQ_ACK;
  756. }
  757. qp->s_len -= len;
  758. qp->s_hdrwords = hwords;
  759. ps->s_txreq->sde = priv->s_sde;
  760. ps->s_txreq->ss = ss;
  761. ps->s_txreq->s_cur_size = len;
  762. hfi1_make_ruc_header(
  763. qp,
  764. ohdr,
  765. bth0 | (qp->s_state << 24),
  766. bth2,
  767. middle,
  768. ps);
  769. /* pbc */
  770. ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
  771. return 1;
  772. done_free_tx:
  773. hfi1_put_txreq(ps->s_txreq);
  774. ps->s_txreq = NULL;
  775. return 1;
  776. bail:
  777. hfi1_put_txreq(ps->s_txreq);
  778. bail_no_tx:
  779. ps->s_txreq = NULL;
  780. qp->s_flags &= ~RVT_S_BUSY;
  781. qp->s_hdrwords = 0;
  782. return 0;
  783. }
  784. /**
  785. * hfi1_send_rc_ack - Construct an ACK packet and send it
  786. * @qp: a pointer to the QP
  787. *
  788. * This is called from hfi1_rc_rcv() and handle_receive_interrupt().
  789. * Note that RDMA reads and atomics are handled in the
  790. * send side QP state and send engine.
  791. */
  792. void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd, struct rvt_qp *qp,
  793. int is_fecn)
  794. {
  795. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  796. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  797. u64 pbc, pbc_flags = 0;
  798. u16 lrh0;
  799. u16 sc5;
  800. u32 bth0;
  801. u32 hwords;
  802. u32 vl, plen;
  803. struct send_context *sc;
  804. struct pio_buf *pbuf;
  805. struct ib_header hdr;
  806. struct ib_other_headers *ohdr;
  807. unsigned long flags;
  808. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  809. if (qp->s_flags & RVT_S_RESP_PENDING)
  810. goto queue_ack;
  811. /* Ensure s_rdma_ack_cnt changes are committed */
  812. smp_read_barrier_depends();
  813. if (qp->s_rdma_ack_cnt)
  814. goto queue_ack;
  815. /* Construct the header */
  816. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */
  817. hwords = 6;
  818. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  819. hwords += hfi1_make_grh(ibp, &hdr.u.l.grh,
  820. &qp->remote_ah_attr.grh, hwords, 0);
  821. ohdr = &hdr.u.l.oth;
  822. lrh0 = HFI1_LRH_GRH;
  823. } else {
  824. ohdr = &hdr.u.oth;
  825. lrh0 = HFI1_LRH_BTH;
  826. }
  827. /* read pkey_index w/o lock (its atomic) */
  828. bth0 = hfi1_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24);
  829. if (qp->s_mig_state == IB_MIG_MIGRATED)
  830. bth0 |= IB_BTH_MIG_REQ;
  831. if (qp->r_nak_state)
  832. ohdr->u.aeth = cpu_to_be32((qp->r_msn & HFI1_MSN_MASK) |
  833. (qp->r_nak_state <<
  834. HFI1_AETH_CREDIT_SHIFT));
  835. else
  836. ohdr->u.aeth = hfi1_compute_aeth(qp);
  837. sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl];
  838. /* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
  839. pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
  840. lrh0 |= (sc5 & 0xf) << 12 | (qp->remote_ah_attr.sl & 0xf) << 4;
  841. hdr.lrh[0] = cpu_to_be16(lrh0);
  842. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  843. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  844. hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits);
  845. ohdr->bth[0] = cpu_to_be32(bth0);
  846. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  847. ohdr->bth[1] |= cpu_to_be32((!!is_fecn) << HFI1_BECN_SHIFT);
  848. ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
  849. /* Don't try to send ACKs if the link isn't ACTIVE */
  850. if (driver_lstate(ppd) != IB_PORT_ACTIVE)
  851. return;
  852. sc = rcd->sc;
  853. plen = 2 /* PBC */ + hwords;
  854. vl = sc_to_vlt(ppd->dd, sc5);
  855. pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps, vl, plen);
  856. pbuf = sc_buffer_alloc(sc, plen, NULL, NULL);
  857. if (!pbuf) {
  858. /*
  859. * We have no room to send at the moment. Pass
  860. * responsibility for sending the ACK to the send engine
  861. * so that when enough buffer space becomes available,
  862. * the ACK is sent ahead of other outgoing packets.
  863. */
  864. goto queue_ack;
  865. }
  866. trace_ack_output_ibhdr(dd_from_ibdev(qp->ibqp.device), &hdr);
  867. /* write the pbc and data */
  868. ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc, &hdr, hwords);
  869. return;
  870. queue_ack:
  871. spin_lock_irqsave(&qp->s_lock, flags);
  872. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  873. goto unlock;
  874. this_cpu_inc(*ibp->rvp.rc_qacks);
  875. qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING;
  876. qp->s_nak_state = qp->r_nak_state;
  877. qp->s_ack_psn = qp->r_ack_psn;
  878. if (is_fecn)
  879. qp->s_flags |= RVT_S_ECN;
  880. /* Schedule the send engine. */
  881. hfi1_schedule_send(qp);
  882. unlock:
  883. spin_unlock_irqrestore(&qp->s_lock, flags);
  884. }
  885. /**
  886. * reset_psn - reset the QP state to send starting from PSN
  887. * @qp: the QP
  888. * @psn: the packet sequence number to restart at
  889. *
  890. * This is called from hfi1_rc_rcv() to process an incoming RC ACK
  891. * for the given QP.
  892. * Called at interrupt level with the QP s_lock held.
  893. */
  894. static void reset_psn(struct rvt_qp *qp, u32 psn)
  895. {
  896. u32 n = qp->s_acked;
  897. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n);
  898. u32 opcode;
  899. lockdep_assert_held(&qp->s_lock);
  900. qp->s_cur = n;
  901. /*
  902. * If we are starting the request from the beginning,
  903. * let the normal send code handle initialization.
  904. */
  905. if (cmp_psn(psn, wqe->psn) <= 0) {
  906. qp->s_state = OP(SEND_LAST);
  907. goto done;
  908. }
  909. /* Find the work request opcode corresponding to the given PSN. */
  910. opcode = wqe->wr.opcode;
  911. for (;;) {
  912. int diff;
  913. if (++n == qp->s_size)
  914. n = 0;
  915. if (n == qp->s_tail)
  916. break;
  917. wqe = rvt_get_swqe_ptr(qp, n);
  918. diff = cmp_psn(psn, wqe->psn);
  919. if (diff < 0)
  920. break;
  921. qp->s_cur = n;
  922. /*
  923. * If we are starting the request from the beginning,
  924. * let the normal send code handle initialization.
  925. */
  926. if (diff == 0) {
  927. qp->s_state = OP(SEND_LAST);
  928. goto done;
  929. }
  930. opcode = wqe->wr.opcode;
  931. }
  932. /*
  933. * Set the state to restart in the middle of a request.
  934. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  935. * See hfi1_make_rc_req().
  936. */
  937. switch (opcode) {
  938. case IB_WR_SEND:
  939. case IB_WR_SEND_WITH_IMM:
  940. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  941. break;
  942. case IB_WR_RDMA_WRITE:
  943. case IB_WR_RDMA_WRITE_WITH_IMM:
  944. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  945. break;
  946. case IB_WR_RDMA_READ:
  947. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  948. break;
  949. default:
  950. /*
  951. * This case shouldn't happen since its only
  952. * one PSN per req.
  953. */
  954. qp->s_state = OP(SEND_LAST);
  955. }
  956. done:
  957. qp->s_psn = psn;
  958. /*
  959. * Set RVT_S_WAIT_PSN as rc_complete() may start the timer
  960. * asynchronously before the send engine can get scheduled.
  961. * Doing it in hfi1_make_rc_req() is too late.
  962. */
  963. if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
  964. (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
  965. qp->s_flags |= RVT_S_WAIT_PSN;
  966. qp->s_flags &= ~RVT_S_AHG_VALID;
  967. }
  968. /*
  969. * Back up requester to resend the last un-ACKed request.
  970. * The QP r_lock and s_lock should be held and interrupts disabled.
  971. */
  972. static void restart_rc(struct rvt_qp *qp, u32 psn, int wait)
  973. {
  974. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  975. struct hfi1_ibport *ibp;
  976. lockdep_assert_held(&qp->r_lock);
  977. lockdep_assert_held(&qp->s_lock);
  978. if (qp->s_retry == 0) {
  979. if (qp->s_mig_state == IB_MIG_ARMED) {
  980. hfi1_migrate_qp(qp);
  981. qp->s_retry = qp->s_retry_cnt;
  982. } else if (qp->s_last == qp->s_acked) {
  983. hfi1_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
  984. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  985. return;
  986. } else { /* need to handle delayed completion */
  987. return;
  988. }
  989. } else {
  990. qp->s_retry--;
  991. }
  992. ibp = to_iport(qp->ibqp.device, qp->port_num);
  993. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  994. ibp->rvp.n_rc_resends++;
  995. else
  996. ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
  997. qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR |
  998. RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN |
  999. RVT_S_WAIT_ACK);
  1000. if (wait)
  1001. qp->s_flags |= RVT_S_SEND_ONE;
  1002. reset_psn(qp, psn);
  1003. }
  1004. /*
  1005. * This is called from s_timer for missing responses.
  1006. */
  1007. void hfi1_rc_timeout(unsigned long arg)
  1008. {
  1009. struct rvt_qp *qp = (struct rvt_qp *)arg;
  1010. struct hfi1_ibport *ibp;
  1011. unsigned long flags;
  1012. spin_lock_irqsave(&qp->r_lock, flags);
  1013. spin_lock(&qp->s_lock);
  1014. if (qp->s_flags & RVT_S_TIMER) {
  1015. ibp = to_iport(qp->ibqp.device, qp->port_num);
  1016. ibp->rvp.n_rc_timeouts++;
  1017. qp->s_flags &= ~RVT_S_TIMER;
  1018. del_timer(&qp->s_timer);
  1019. trace_hfi1_timeout(qp, qp->s_last_psn + 1);
  1020. restart_rc(qp, qp->s_last_psn + 1, 1);
  1021. hfi1_schedule_send(qp);
  1022. }
  1023. spin_unlock(&qp->s_lock);
  1024. spin_unlock_irqrestore(&qp->r_lock, flags);
  1025. }
  1026. /*
  1027. * This is called from s_timer for RNR timeouts.
  1028. */
  1029. void hfi1_rc_rnr_retry(unsigned long arg)
  1030. {
  1031. struct rvt_qp *qp = (struct rvt_qp *)arg;
  1032. unsigned long flags;
  1033. spin_lock_irqsave(&qp->s_lock, flags);
  1034. hfi1_stop_rnr_timer(qp);
  1035. hfi1_schedule_send(qp);
  1036. spin_unlock_irqrestore(&qp->s_lock, flags);
  1037. }
  1038. /*
  1039. * Set qp->s_sending_psn to the next PSN after the given one.
  1040. * This would be psn+1 except when RDMA reads are present.
  1041. */
  1042. static void reset_sending_psn(struct rvt_qp *qp, u32 psn)
  1043. {
  1044. struct rvt_swqe *wqe;
  1045. u32 n = qp->s_last;
  1046. lockdep_assert_held(&qp->s_lock);
  1047. /* Find the work request corresponding to the given PSN. */
  1048. for (;;) {
  1049. wqe = rvt_get_swqe_ptr(qp, n);
  1050. if (cmp_psn(psn, wqe->lpsn) <= 0) {
  1051. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  1052. qp->s_sending_psn = wqe->lpsn + 1;
  1053. else
  1054. qp->s_sending_psn = psn + 1;
  1055. break;
  1056. }
  1057. if (++n == qp->s_size)
  1058. n = 0;
  1059. if (n == qp->s_tail)
  1060. break;
  1061. }
  1062. }
  1063. /*
  1064. * This should be called with the QP s_lock held and interrupts disabled.
  1065. */
  1066. void hfi1_rc_send_complete(struct rvt_qp *qp, struct ib_header *hdr)
  1067. {
  1068. struct ib_other_headers *ohdr;
  1069. struct rvt_swqe *wqe;
  1070. u32 opcode;
  1071. u32 psn;
  1072. lockdep_assert_held(&qp->s_lock);
  1073. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_OR_FLUSH_SEND))
  1074. return;
  1075. /* Find out where the BTH is */
  1076. if ((be16_to_cpu(hdr->lrh[0]) & 3) == HFI1_LRH_BTH)
  1077. ohdr = &hdr->u.oth;
  1078. else
  1079. ohdr = &hdr->u.l.oth;
  1080. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  1081. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1082. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1083. WARN_ON(!qp->s_rdma_ack_cnt);
  1084. qp->s_rdma_ack_cnt--;
  1085. return;
  1086. }
  1087. psn = be32_to_cpu(ohdr->bth[2]);
  1088. reset_sending_psn(qp, psn);
  1089. /*
  1090. * Start timer after a packet requesting an ACK has been sent and
  1091. * there are still requests that haven't been acked.
  1092. */
  1093. if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
  1094. !(qp->s_flags &
  1095. (RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) &&
  1096. (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  1097. hfi1_add_retry_timer(qp);
  1098. while (qp->s_last != qp->s_acked) {
  1099. u32 s_last;
  1100. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  1101. if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
  1102. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
  1103. break;
  1104. s_last = qp->s_last;
  1105. if (++s_last >= qp->s_size)
  1106. s_last = 0;
  1107. qp->s_last = s_last;
  1108. /* see post_send() */
  1109. barrier();
  1110. rvt_put_swqe(wqe);
  1111. rvt_qp_swqe_complete(qp, wqe, IB_WC_SUCCESS);
  1112. }
  1113. /*
  1114. * If we were waiting for sends to complete before re-sending,
  1115. * and they are now complete, restart sending.
  1116. */
  1117. trace_hfi1_sendcomplete(qp, psn);
  1118. if (qp->s_flags & RVT_S_WAIT_PSN &&
  1119. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  1120. qp->s_flags &= ~RVT_S_WAIT_PSN;
  1121. qp->s_sending_psn = qp->s_psn;
  1122. qp->s_sending_hpsn = qp->s_psn - 1;
  1123. hfi1_schedule_send(qp);
  1124. }
  1125. }
  1126. static inline void update_last_psn(struct rvt_qp *qp, u32 psn)
  1127. {
  1128. qp->s_last_psn = psn;
  1129. }
  1130. /*
  1131. * Generate a SWQE completion.
  1132. * This is similar to hfi1_send_complete but has to check to be sure
  1133. * that the SGEs are not being referenced if the SWQE is being resent.
  1134. */
  1135. static struct rvt_swqe *do_rc_completion(struct rvt_qp *qp,
  1136. struct rvt_swqe *wqe,
  1137. struct hfi1_ibport *ibp)
  1138. {
  1139. lockdep_assert_held(&qp->s_lock);
  1140. /*
  1141. * Don't decrement refcount and don't generate a
  1142. * completion if the SWQE is being resent until the send
  1143. * is finished.
  1144. */
  1145. if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
  1146. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  1147. u32 s_last;
  1148. rvt_put_swqe(wqe);
  1149. s_last = qp->s_last;
  1150. if (++s_last >= qp->s_size)
  1151. s_last = 0;
  1152. qp->s_last = s_last;
  1153. /* see post_send() */
  1154. barrier();
  1155. rvt_qp_swqe_complete(qp, wqe, IB_WC_SUCCESS);
  1156. } else {
  1157. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  1158. this_cpu_inc(*ibp->rvp.rc_delayed_comp);
  1159. /*
  1160. * If send progress not running attempt to progress
  1161. * SDMA queue.
  1162. */
  1163. if (ppd->dd->flags & HFI1_HAS_SEND_DMA) {
  1164. struct sdma_engine *engine;
  1165. u8 sc5;
  1166. /* For now use sc to find engine */
  1167. sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl];
  1168. engine = qp_to_sdma_engine(qp, sc5);
  1169. sdma_engine_progress_schedule(engine);
  1170. }
  1171. }
  1172. qp->s_retry = qp->s_retry_cnt;
  1173. update_last_psn(qp, wqe->lpsn);
  1174. /*
  1175. * If we are completing a request which is in the process of
  1176. * being resent, we can stop re-sending it since we know the
  1177. * responder has already seen it.
  1178. */
  1179. if (qp->s_acked == qp->s_cur) {
  1180. if (++qp->s_cur >= qp->s_size)
  1181. qp->s_cur = 0;
  1182. qp->s_acked = qp->s_cur;
  1183. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  1184. if (qp->s_acked != qp->s_tail) {
  1185. qp->s_state = OP(SEND_LAST);
  1186. qp->s_psn = wqe->psn;
  1187. }
  1188. } else {
  1189. if (++qp->s_acked >= qp->s_size)
  1190. qp->s_acked = 0;
  1191. if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
  1192. qp->s_draining = 0;
  1193. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1194. }
  1195. return wqe;
  1196. }
  1197. /**
  1198. * do_rc_ack - process an incoming RC ACK
  1199. * @qp: the QP the ACK came in on
  1200. * @psn: the packet sequence number of the ACK
  1201. * @opcode: the opcode of the request that resulted in the ACK
  1202. *
  1203. * This is called from rc_rcv_resp() to process an incoming RC ACK
  1204. * for the given QP.
  1205. * May be called at interrupt level, with the QP s_lock held.
  1206. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  1207. */
  1208. static int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode,
  1209. u64 val, struct hfi1_ctxtdata *rcd)
  1210. {
  1211. struct hfi1_ibport *ibp;
  1212. enum ib_wc_status status;
  1213. struct rvt_swqe *wqe;
  1214. int ret = 0;
  1215. u32 ack_psn;
  1216. int diff;
  1217. unsigned long to;
  1218. lockdep_assert_held(&qp->s_lock);
  1219. /*
  1220. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  1221. * requests and implicitly NAK RDMA read and atomic requests issued
  1222. * before the NAK'ed request. The MSN won't include the NAK'ed
  1223. * request but will include an ACK'ed request(s).
  1224. */
  1225. ack_psn = psn;
  1226. if (aeth >> 29)
  1227. ack_psn--;
  1228. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1229. ibp = to_iport(qp->ibqp.device, qp->port_num);
  1230. /*
  1231. * The MSN might be for a later WQE than the PSN indicates so
  1232. * only complete WQEs that the PSN finishes.
  1233. */
  1234. while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) {
  1235. /*
  1236. * RDMA_READ_RESPONSE_ONLY is a special case since
  1237. * we want to generate completion events for everything
  1238. * before the RDMA read, copy the data, then generate
  1239. * the completion for the read.
  1240. */
  1241. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  1242. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  1243. diff == 0) {
  1244. ret = 1;
  1245. goto bail_stop;
  1246. }
  1247. /*
  1248. * If this request is a RDMA read or atomic, and the ACK is
  1249. * for a later operation, this ACK NAKs the RDMA read or
  1250. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  1251. * can ACK a RDMA read and likewise for atomic ops. Note
  1252. * that the NAK case can only happen if relaxed ordering is
  1253. * used and requests are sent after an RDMA read or atomic
  1254. * is sent but before the response is received.
  1255. */
  1256. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  1257. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  1258. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1259. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  1260. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  1261. /* Retry this request. */
  1262. if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) {
  1263. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1264. restart_rc(qp, qp->s_last_psn + 1, 0);
  1265. if (list_empty(&qp->rspwait)) {
  1266. qp->r_flags |= RVT_R_RSP_SEND;
  1267. rvt_get_qp(qp);
  1268. list_add_tail(&qp->rspwait,
  1269. &rcd->qp_wait_list);
  1270. }
  1271. }
  1272. /*
  1273. * No need to process the ACK/NAK since we are
  1274. * restarting an earlier request.
  1275. */
  1276. goto bail_stop;
  1277. }
  1278. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1279. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
  1280. u64 *vaddr = wqe->sg_list[0].vaddr;
  1281. *vaddr = val;
  1282. }
  1283. if (qp->s_num_rd_atomic &&
  1284. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1285. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1286. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  1287. qp->s_num_rd_atomic--;
  1288. /* Restart sending task if fence is complete */
  1289. if ((qp->s_flags & RVT_S_WAIT_FENCE) &&
  1290. !qp->s_num_rd_atomic) {
  1291. qp->s_flags &= ~(RVT_S_WAIT_FENCE |
  1292. RVT_S_WAIT_ACK);
  1293. hfi1_schedule_send(qp);
  1294. } else if (qp->s_flags & RVT_S_WAIT_RDMAR) {
  1295. qp->s_flags &= ~(RVT_S_WAIT_RDMAR |
  1296. RVT_S_WAIT_ACK);
  1297. hfi1_schedule_send(qp);
  1298. }
  1299. }
  1300. wqe = do_rc_completion(qp, wqe, ibp);
  1301. if (qp->s_acked == qp->s_tail)
  1302. break;
  1303. }
  1304. switch (aeth >> 29) {
  1305. case 0: /* ACK */
  1306. this_cpu_inc(*ibp->rvp.rc_acks);
  1307. if (qp->s_acked != qp->s_tail) {
  1308. /*
  1309. * We are expecting more ACKs so
  1310. * mod the retry timer.
  1311. */
  1312. hfi1_mod_retry_timer(qp);
  1313. /*
  1314. * We can stop re-sending the earlier packets and
  1315. * continue with the next packet the receiver wants.
  1316. */
  1317. if (cmp_psn(qp->s_psn, psn) <= 0)
  1318. reset_psn(qp, psn + 1);
  1319. } else {
  1320. /* No more acks - kill all timers */
  1321. hfi1_stop_rc_timers(qp);
  1322. if (cmp_psn(qp->s_psn, psn) <= 0) {
  1323. qp->s_state = OP(SEND_LAST);
  1324. qp->s_psn = psn + 1;
  1325. }
  1326. }
  1327. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1328. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1329. hfi1_schedule_send(qp);
  1330. }
  1331. hfi1_get_credit(qp, aeth);
  1332. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1333. qp->s_retry = qp->s_retry_cnt;
  1334. update_last_psn(qp, psn);
  1335. return 1;
  1336. case 1: /* RNR NAK */
  1337. ibp->rvp.n_rnr_naks++;
  1338. if (qp->s_acked == qp->s_tail)
  1339. goto bail_stop;
  1340. if (qp->s_flags & RVT_S_WAIT_RNR)
  1341. goto bail_stop;
  1342. if (qp->s_rnr_retry == 0) {
  1343. status = IB_WC_RNR_RETRY_EXC_ERR;
  1344. goto class_b;
  1345. }
  1346. if (qp->s_rnr_retry_cnt < 7)
  1347. qp->s_rnr_retry--;
  1348. /* The last valid PSN is the previous PSN. */
  1349. update_last_psn(qp, psn - 1);
  1350. ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
  1351. reset_psn(qp, psn);
  1352. qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK);
  1353. hfi1_stop_rc_timers(qp);
  1354. to =
  1355. ib_hfi1_rnr_table[(aeth >> HFI1_AETH_CREDIT_SHIFT) &
  1356. HFI1_AETH_CREDIT_MASK];
  1357. hfi1_add_rnr_timer(qp, to);
  1358. return 0;
  1359. case 3: /* NAK */
  1360. if (qp->s_acked == qp->s_tail)
  1361. goto bail_stop;
  1362. /* The last valid PSN is the previous PSN. */
  1363. update_last_psn(qp, psn - 1);
  1364. switch ((aeth >> HFI1_AETH_CREDIT_SHIFT) &
  1365. HFI1_AETH_CREDIT_MASK) {
  1366. case 0: /* PSN sequence error */
  1367. ibp->rvp.n_seq_naks++;
  1368. /*
  1369. * Back up to the responder's expected PSN.
  1370. * Note that we might get a NAK in the middle of an
  1371. * RDMA READ response which terminates the RDMA
  1372. * READ.
  1373. */
  1374. restart_rc(qp, psn, 0);
  1375. hfi1_schedule_send(qp);
  1376. break;
  1377. case 1: /* Invalid Request */
  1378. status = IB_WC_REM_INV_REQ_ERR;
  1379. ibp->rvp.n_other_naks++;
  1380. goto class_b;
  1381. case 2: /* Remote Access Error */
  1382. status = IB_WC_REM_ACCESS_ERR;
  1383. ibp->rvp.n_other_naks++;
  1384. goto class_b;
  1385. case 3: /* Remote Operation Error */
  1386. status = IB_WC_REM_OP_ERR;
  1387. ibp->rvp.n_other_naks++;
  1388. class_b:
  1389. if (qp->s_last == qp->s_acked) {
  1390. hfi1_send_complete(qp, wqe, status);
  1391. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1392. }
  1393. break;
  1394. default:
  1395. /* Ignore other reserved NAK error codes */
  1396. goto reserved;
  1397. }
  1398. qp->s_retry = qp->s_retry_cnt;
  1399. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1400. goto bail_stop;
  1401. default: /* 2: reserved */
  1402. reserved:
  1403. /* Ignore reserved NAK codes. */
  1404. goto bail_stop;
  1405. }
  1406. /* cannot be reached */
  1407. bail_stop:
  1408. hfi1_stop_rc_timers(qp);
  1409. return ret;
  1410. }
  1411. /*
  1412. * We have seen an out of sequence RDMA read middle or last packet.
  1413. * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
  1414. */
  1415. static void rdma_seq_err(struct rvt_qp *qp, struct hfi1_ibport *ibp, u32 psn,
  1416. struct hfi1_ctxtdata *rcd)
  1417. {
  1418. struct rvt_swqe *wqe;
  1419. lockdep_assert_held(&qp->s_lock);
  1420. /* Remove QP from retry timer */
  1421. hfi1_stop_rc_timers(qp);
  1422. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1423. while (cmp_psn(psn, wqe->lpsn) > 0) {
  1424. if (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1425. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1426. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  1427. break;
  1428. wqe = do_rc_completion(qp, wqe, ibp);
  1429. }
  1430. ibp->rvp.n_rdma_seq++;
  1431. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1432. restart_rc(qp, qp->s_last_psn + 1, 0);
  1433. if (list_empty(&qp->rspwait)) {
  1434. qp->r_flags |= RVT_R_RSP_SEND;
  1435. rvt_get_qp(qp);
  1436. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1437. }
  1438. }
  1439. /**
  1440. * rc_rcv_resp - process an incoming RC response packet
  1441. * @ibp: the port this packet came in on
  1442. * @ohdr: the other headers for this packet
  1443. * @data: the packet data
  1444. * @tlen: the packet length
  1445. * @qp: the QP for this packet
  1446. * @opcode: the opcode for this packet
  1447. * @psn: the packet sequence number for this packet
  1448. * @hdrsize: the header length
  1449. * @pmtu: the path MTU
  1450. *
  1451. * This is called from hfi1_rc_rcv() to process an incoming RC response
  1452. * packet for the given QP.
  1453. * Called at interrupt level.
  1454. */
  1455. static void rc_rcv_resp(struct hfi1_ibport *ibp,
  1456. struct ib_other_headers *ohdr,
  1457. void *data, u32 tlen, struct rvt_qp *qp,
  1458. u32 opcode, u32 psn, u32 hdrsize, u32 pmtu,
  1459. struct hfi1_ctxtdata *rcd)
  1460. {
  1461. struct rvt_swqe *wqe;
  1462. enum ib_wc_status status;
  1463. unsigned long flags;
  1464. int diff;
  1465. u32 pad;
  1466. u32 aeth;
  1467. u64 val;
  1468. spin_lock_irqsave(&qp->s_lock, flags);
  1469. trace_hfi1_ack(qp, psn);
  1470. /* Ignore invalid responses. */
  1471. smp_read_barrier_depends(); /* see post_one_send */
  1472. if (cmp_psn(psn, ACCESS_ONCE(qp->s_next_psn)) >= 0)
  1473. goto ack_done;
  1474. /* Ignore duplicate responses. */
  1475. diff = cmp_psn(psn, qp->s_last_psn);
  1476. if (unlikely(diff <= 0)) {
  1477. /* Update credits for "ghost" ACKs */
  1478. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1479. aeth = be32_to_cpu(ohdr->u.aeth);
  1480. if ((aeth >> 29) == 0)
  1481. hfi1_get_credit(qp, aeth);
  1482. }
  1483. goto ack_done;
  1484. }
  1485. /*
  1486. * Skip everything other than the PSN we expect, if we are waiting
  1487. * for a reply to a restarted RDMA read or atomic op.
  1488. */
  1489. if (qp->r_flags & RVT_R_RDMAR_SEQ) {
  1490. if (cmp_psn(psn, qp->s_last_psn + 1) != 0)
  1491. goto ack_done;
  1492. qp->r_flags &= ~RVT_R_RDMAR_SEQ;
  1493. }
  1494. if (unlikely(qp->s_acked == qp->s_tail))
  1495. goto ack_done;
  1496. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1497. status = IB_WC_SUCCESS;
  1498. switch (opcode) {
  1499. case OP(ACKNOWLEDGE):
  1500. case OP(ATOMIC_ACKNOWLEDGE):
  1501. case OP(RDMA_READ_RESPONSE_FIRST):
  1502. aeth = be32_to_cpu(ohdr->u.aeth);
  1503. if (opcode == OP(ATOMIC_ACKNOWLEDGE))
  1504. val = ib_u64_get(&ohdr->u.at.atomic_ack_eth);
  1505. else
  1506. val = 0;
  1507. if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
  1508. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1509. goto ack_done;
  1510. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1511. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1512. goto ack_op_err;
  1513. /*
  1514. * If this is a response to a resent RDMA read, we
  1515. * have to be careful to copy the data to the right
  1516. * location.
  1517. */
  1518. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1519. wqe, psn, pmtu);
  1520. goto read_middle;
  1521. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1522. /* no AETH, no ACK */
  1523. if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
  1524. goto ack_seq_err;
  1525. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1526. goto ack_op_err;
  1527. read_middle:
  1528. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1529. goto ack_len_err;
  1530. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1531. goto ack_len_err;
  1532. /*
  1533. * We got a response so update the timeout.
  1534. * 4.096 usec. * (1 << qp->timeout)
  1535. */
  1536. qp->s_flags |= RVT_S_TIMER;
  1537. mod_timer(&qp->s_timer, jiffies + qp->timeout_jiffies);
  1538. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1539. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1540. hfi1_schedule_send(qp);
  1541. }
  1542. if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
  1543. qp->s_retry = qp->s_retry_cnt;
  1544. /*
  1545. * Update the RDMA receive state but do the copy w/o
  1546. * holding the locks and blocking interrupts.
  1547. */
  1548. qp->s_rdma_read_len -= pmtu;
  1549. update_last_psn(qp, psn);
  1550. spin_unlock_irqrestore(&qp->s_lock, flags);
  1551. hfi1_copy_sge(&qp->s_rdma_read_sge, data, pmtu, 0, 0);
  1552. goto bail;
  1553. case OP(RDMA_READ_RESPONSE_ONLY):
  1554. aeth = be32_to_cpu(ohdr->u.aeth);
  1555. if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
  1556. goto ack_done;
  1557. /* Get the number of bytes the message was padded by. */
  1558. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1559. /*
  1560. * Check that the data size is >= 0 && <= pmtu.
  1561. * Remember to account for ICRC (4).
  1562. */
  1563. if (unlikely(tlen < (hdrsize + pad + 4)))
  1564. goto ack_len_err;
  1565. /*
  1566. * If this is a response to a resent RDMA read, we
  1567. * have to be careful to copy the data to the right
  1568. * location.
  1569. */
  1570. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1571. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1572. wqe, psn, pmtu);
  1573. goto read_last;
  1574. case OP(RDMA_READ_RESPONSE_LAST):
  1575. /* ACKs READ req. */
  1576. if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
  1577. goto ack_seq_err;
  1578. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1579. goto ack_op_err;
  1580. /* Get the number of bytes the message was padded by. */
  1581. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1582. /*
  1583. * Check that the data size is >= 1 && <= pmtu.
  1584. * Remember to account for ICRC (4).
  1585. */
  1586. if (unlikely(tlen <= (hdrsize + pad + 4)))
  1587. goto ack_len_err;
  1588. read_last:
  1589. tlen -= hdrsize + pad + 4;
  1590. if (unlikely(tlen != qp->s_rdma_read_len))
  1591. goto ack_len_err;
  1592. aeth = be32_to_cpu(ohdr->u.aeth);
  1593. hfi1_copy_sge(&qp->s_rdma_read_sge, data, tlen, 0, 0);
  1594. WARN_ON(qp->s_rdma_read_sge.num_sge);
  1595. (void)do_rc_ack(qp, aeth, psn,
  1596. OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
  1597. goto ack_done;
  1598. }
  1599. ack_op_err:
  1600. status = IB_WC_LOC_QP_OP_ERR;
  1601. goto ack_err;
  1602. ack_seq_err:
  1603. rdma_seq_err(qp, ibp, psn, rcd);
  1604. goto ack_done;
  1605. ack_len_err:
  1606. status = IB_WC_LOC_LEN_ERR;
  1607. ack_err:
  1608. if (qp->s_last == qp->s_acked) {
  1609. hfi1_send_complete(qp, wqe, status);
  1610. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1611. }
  1612. ack_done:
  1613. spin_unlock_irqrestore(&qp->s_lock, flags);
  1614. bail:
  1615. return;
  1616. }
  1617. static inline void rc_defered_ack(struct hfi1_ctxtdata *rcd,
  1618. struct rvt_qp *qp)
  1619. {
  1620. if (list_empty(&qp->rspwait)) {
  1621. qp->r_flags |= RVT_R_RSP_NAK;
  1622. rvt_get_qp(qp);
  1623. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1624. }
  1625. }
  1626. static inline void rc_cancel_ack(struct rvt_qp *qp)
  1627. {
  1628. struct hfi1_qp_priv *priv = qp->priv;
  1629. priv->r_adefered = 0;
  1630. if (list_empty(&qp->rspwait))
  1631. return;
  1632. list_del_init(&qp->rspwait);
  1633. qp->r_flags &= ~RVT_R_RSP_NAK;
  1634. rvt_put_qp(qp);
  1635. }
  1636. /**
  1637. * rc_rcv_error - process an incoming duplicate or error RC packet
  1638. * @ohdr: the other headers for this packet
  1639. * @data: the packet data
  1640. * @qp: the QP for this packet
  1641. * @opcode: the opcode for this packet
  1642. * @psn: the packet sequence number for this packet
  1643. * @diff: the difference between the PSN and the expected PSN
  1644. *
  1645. * This is called from hfi1_rc_rcv() to process an unexpected
  1646. * incoming RC packet for the given QP.
  1647. * Called at interrupt level.
  1648. * Return 1 if no more processing is needed; otherwise return 0 to
  1649. * schedule a response to be sent.
  1650. */
  1651. static noinline int rc_rcv_error(struct ib_other_headers *ohdr, void *data,
  1652. struct rvt_qp *qp, u32 opcode, u32 psn,
  1653. int diff, struct hfi1_ctxtdata *rcd)
  1654. {
  1655. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  1656. struct rvt_ack_entry *e;
  1657. unsigned long flags;
  1658. u8 i, prev;
  1659. int old_req;
  1660. trace_hfi1_rcv_error(qp, psn);
  1661. if (diff > 0) {
  1662. /*
  1663. * Packet sequence error.
  1664. * A NAK will ACK earlier sends and RDMA writes.
  1665. * Don't queue the NAK if we already sent one.
  1666. */
  1667. if (!qp->r_nak_state) {
  1668. ibp->rvp.n_rc_seqnak++;
  1669. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1670. /* Use the expected PSN. */
  1671. qp->r_ack_psn = qp->r_psn;
  1672. /*
  1673. * Wait to send the sequence NAK until all packets
  1674. * in the receive queue have been processed.
  1675. * Otherwise, we end up propagating congestion.
  1676. */
  1677. rc_defered_ack(rcd, qp);
  1678. }
  1679. goto done;
  1680. }
  1681. /*
  1682. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1683. * write or atomic op. Don't NAK errors, just silently drop
  1684. * the duplicate request. Note that r_sge, r_len, and
  1685. * r_rcv_len may be in use so don't modify them.
  1686. *
  1687. * We are supposed to ACK the earliest duplicate PSN but we
  1688. * can coalesce an outstanding duplicate ACK. We have to
  1689. * send the earliest so that RDMA reads can be restarted at
  1690. * the requester's expected PSN.
  1691. *
  1692. * First, find where this duplicate PSN falls within the
  1693. * ACKs previously sent.
  1694. * old_req is true if there is an older response that is scheduled
  1695. * to be sent before sending this one.
  1696. */
  1697. e = NULL;
  1698. old_req = 1;
  1699. ibp->rvp.n_rc_dupreq++;
  1700. spin_lock_irqsave(&qp->s_lock, flags);
  1701. for (i = qp->r_head_ack_queue; ; i = prev) {
  1702. if (i == qp->s_tail_ack_queue)
  1703. old_req = 0;
  1704. if (i)
  1705. prev = i - 1;
  1706. else
  1707. prev = HFI1_MAX_RDMA_ATOMIC;
  1708. if (prev == qp->r_head_ack_queue) {
  1709. e = NULL;
  1710. break;
  1711. }
  1712. e = &qp->s_ack_queue[prev];
  1713. if (!e->opcode) {
  1714. e = NULL;
  1715. break;
  1716. }
  1717. if (cmp_psn(psn, e->psn) >= 0) {
  1718. if (prev == qp->s_tail_ack_queue &&
  1719. cmp_psn(psn, e->lpsn) <= 0)
  1720. old_req = 0;
  1721. break;
  1722. }
  1723. }
  1724. switch (opcode) {
  1725. case OP(RDMA_READ_REQUEST): {
  1726. struct ib_reth *reth;
  1727. u32 offset;
  1728. u32 len;
  1729. /*
  1730. * If we didn't find the RDMA read request in the ack queue,
  1731. * we can ignore this request.
  1732. */
  1733. if (!e || e->opcode != OP(RDMA_READ_REQUEST))
  1734. goto unlock_done;
  1735. /* RETH comes after BTH */
  1736. reth = &ohdr->u.rc.reth;
  1737. /*
  1738. * Address range must be a subset of the original
  1739. * request and start on pmtu boundaries.
  1740. * We reuse the old ack_queue slot since the requester
  1741. * should not back up and request an earlier PSN for the
  1742. * same request.
  1743. */
  1744. offset = delta_psn(psn, e->psn) * qp->pmtu;
  1745. len = be32_to_cpu(reth->length);
  1746. if (unlikely(offset + len != e->rdma_sge.sge_length))
  1747. goto unlock_done;
  1748. if (e->rdma_sge.mr) {
  1749. rvt_put_mr(e->rdma_sge.mr);
  1750. e->rdma_sge.mr = NULL;
  1751. }
  1752. if (len != 0) {
  1753. u32 rkey = be32_to_cpu(reth->rkey);
  1754. u64 vaddr = get_ib_reth_vaddr(reth);
  1755. int ok;
  1756. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
  1757. IB_ACCESS_REMOTE_READ);
  1758. if (unlikely(!ok))
  1759. goto unlock_done;
  1760. } else {
  1761. e->rdma_sge.vaddr = NULL;
  1762. e->rdma_sge.length = 0;
  1763. e->rdma_sge.sge_length = 0;
  1764. }
  1765. e->psn = psn;
  1766. if (old_req)
  1767. goto unlock_done;
  1768. qp->s_tail_ack_queue = prev;
  1769. break;
  1770. }
  1771. case OP(COMPARE_SWAP):
  1772. case OP(FETCH_ADD): {
  1773. /*
  1774. * If we didn't find the atomic request in the ack queue
  1775. * or the send engine is already backed up to send an
  1776. * earlier entry, we can ignore this request.
  1777. */
  1778. if (!e || e->opcode != (u8)opcode || old_req)
  1779. goto unlock_done;
  1780. qp->s_tail_ack_queue = prev;
  1781. break;
  1782. }
  1783. default:
  1784. /*
  1785. * Ignore this operation if it doesn't request an ACK
  1786. * or an earlier RDMA read or atomic is going to be resent.
  1787. */
  1788. if (!(psn & IB_BTH_REQ_ACK) || old_req)
  1789. goto unlock_done;
  1790. /*
  1791. * Resend the most recent ACK if this request is
  1792. * after all the previous RDMA reads and atomics.
  1793. */
  1794. if (i == qp->r_head_ack_queue) {
  1795. spin_unlock_irqrestore(&qp->s_lock, flags);
  1796. qp->r_nak_state = 0;
  1797. qp->r_ack_psn = qp->r_psn - 1;
  1798. goto send_ack;
  1799. }
  1800. /*
  1801. * Resend the RDMA read or atomic op which
  1802. * ACKs this duplicate request.
  1803. */
  1804. qp->s_tail_ack_queue = i;
  1805. break;
  1806. }
  1807. qp->s_ack_state = OP(ACKNOWLEDGE);
  1808. qp->s_flags |= RVT_S_RESP_PENDING;
  1809. qp->r_nak_state = 0;
  1810. hfi1_schedule_send(qp);
  1811. unlock_done:
  1812. spin_unlock_irqrestore(&qp->s_lock, flags);
  1813. done:
  1814. return 1;
  1815. send_ack:
  1816. return 0;
  1817. }
  1818. void hfi1_rc_error(struct rvt_qp *qp, enum ib_wc_status err)
  1819. {
  1820. unsigned long flags;
  1821. int lastwqe;
  1822. spin_lock_irqsave(&qp->s_lock, flags);
  1823. lastwqe = rvt_error_qp(qp, err);
  1824. spin_unlock_irqrestore(&qp->s_lock, flags);
  1825. if (lastwqe) {
  1826. struct ib_event ev;
  1827. ev.device = qp->ibqp.device;
  1828. ev.element.qp = &qp->ibqp;
  1829. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  1830. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  1831. }
  1832. }
  1833. static inline void update_ack_queue(struct rvt_qp *qp, unsigned n)
  1834. {
  1835. unsigned next;
  1836. next = n + 1;
  1837. if (next > HFI1_MAX_RDMA_ATOMIC)
  1838. next = 0;
  1839. qp->s_tail_ack_queue = next;
  1840. qp->s_ack_state = OP(ACKNOWLEDGE);
  1841. }
  1842. static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid,
  1843. u32 lqpn, u32 rqpn, u8 svc_type)
  1844. {
  1845. struct opa_hfi1_cong_log_event_internal *cc_event;
  1846. unsigned long flags;
  1847. if (sl >= OPA_MAX_SLS)
  1848. return;
  1849. spin_lock_irqsave(&ppd->cc_log_lock, flags);
  1850. ppd->threshold_cong_event_map[sl / 8] |= 1 << (sl % 8);
  1851. ppd->threshold_event_counter++;
  1852. cc_event = &ppd->cc_events[ppd->cc_log_idx++];
  1853. if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS)
  1854. ppd->cc_log_idx = 0;
  1855. cc_event->lqpn = lqpn & RVT_QPN_MASK;
  1856. cc_event->rqpn = rqpn & RVT_QPN_MASK;
  1857. cc_event->sl = sl;
  1858. cc_event->svc_type = svc_type;
  1859. cc_event->rlid = rlid;
  1860. /* keep timestamp in units of 1.024 usec */
  1861. cc_event->timestamp = ktime_to_ns(ktime_get()) / 1024;
  1862. spin_unlock_irqrestore(&ppd->cc_log_lock, flags);
  1863. }
  1864. void process_becn(struct hfi1_pportdata *ppd, u8 sl, u16 rlid, u32 lqpn,
  1865. u32 rqpn, u8 svc_type)
  1866. {
  1867. struct cca_timer *cca_timer;
  1868. u16 ccti, ccti_incr, ccti_timer, ccti_limit;
  1869. u8 trigger_threshold;
  1870. struct cc_state *cc_state;
  1871. unsigned long flags;
  1872. if (sl >= OPA_MAX_SLS)
  1873. return;
  1874. cc_state = get_cc_state(ppd);
  1875. if (!cc_state)
  1876. return;
  1877. /*
  1878. * 1) increase CCTI (for this SL)
  1879. * 2) select IPG (i.e., call set_link_ipg())
  1880. * 3) start timer
  1881. */
  1882. ccti_limit = cc_state->cct.ccti_limit;
  1883. ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase;
  1884. ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
  1885. trigger_threshold =
  1886. cc_state->cong_setting.entries[sl].trigger_threshold;
  1887. spin_lock_irqsave(&ppd->cca_timer_lock, flags);
  1888. cca_timer = &ppd->cca_timer[sl];
  1889. if (cca_timer->ccti < ccti_limit) {
  1890. if (cca_timer->ccti + ccti_incr <= ccti_limit)
  1891. cca_timer->ccti += ccti_incr;
  1892. else
  1893. cca_timer->ccti = ccti_limit;
  1894. set_link_ipg(ppd);
  1895. }
  1896. ccti = cca_timer->ccti;
  1897. if (!hrtimer_active(&cca_timer->hrtimer)) {
  1898. /* ccti_timer is in units of 1.024 usec */
  1899. unsigned long nsec = 1024 * ccti_timer;
  1900. hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec),
  1901. HRTIMER_MODE_REL);
  1902. }
  1903. spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
  1904. if ((trigger_threshold != 0) && (ccti >= trigger_threshold))
  1905. log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type);
  1906. }
  1907. /**
  1908. * hfi1_rc_rcv - process an incoming RC packet
  1909. * @rcd: the context pointer
  1910. * @hdr: the header of this packet
  1911. * @rcv_flags: flags relevant to rcv processing
  1912. * @data: the packet data
  1913. * @tlen: the packet length
  1914. * @qp: the QP for this packet
  1915. *
  1916. * This is called from qp_rcv() to process an incoming RC packet
  1917. * for the given QP.
  1918. * May be called at interrupt level.
  1919. */
  1920. void hfi1_rc_rcv(struct hfi1_packet *packet)
  1921. {
  1922. struct hfi1_ctxtdata *rcd = packet->rcd;
  1923. struct ib_header *hdr = packet->hdr;
  1924. u32 rcv_flags = packet->rcv_flags;
  1925. void *data = packet->ebuf;
  1926. u32 tlen = packet->tlen;
  1927. struct rvt_qp *qp = packet->qp;
  1928. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  1929. struct ib_other_headers *ohdr = packet->ohdr;
  1930. u32 bth0, opcode;
  1931. u32 hdrsize = packet->hlen;
  1932. u32 psn;
  1933. u32 pad;
  1934. struct ib_wc wc;
  1935. u32 pmtu = qp->pmtu;
  1936. int diff;
  1937. struct ib_reth *reth;
  1938. unsigned long flags;
  1939. int ret, is_fecn = 0;
  1940. int copy_last = 0;
  1941. u32 rkey;
  1942. lockdep_assert_held(&qp->r_lock);
  1943. bth0 = be32_to_cpu(ohdr->bth[0]);
  1944. if (hfi1_ruc_check_hdr(ibp, hdr, rcv_flags & HFI1_HAS_GRH, qp, bth0))
  1945. return;
  1946. is_fecn = process_ecn(qp, packet, false);
  1947. psn = be32_to_cpu(ohdr->bth[2]);
  1948. opcode = (bth0 >> 24) & 0xff;
  1949. /*
  1950. * Process responses (ACKs) before anything else. Note that the
  1951. * packet sequence number will be for something in the send work
  1952. * queue rather than the expected receive packet sequence number.
  1953. * In other words, this QP is the requester.
  1954. */
  1955. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1956. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1957. rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn,
  1958. hdrsize, pmtu, rcd);
  1959. if (is_fecn)
  1960. goto send_ack;
  1961. return;
  1962. }
  1963. /* Compute 24 bits worth of difference. */
  1964. diff = delta_psn(psn, qp->r_psn);
  1965. if (unlikely(diff)) {
  1966. if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
  1967. return;
  1968. goto send_ack;
  1969. }
  1970. /* Check for opcode sequence errors. */
  1971. switch (qp->r_state) {
  1972. case OP(SEND_FIRST):
  1973. case OP(SEND_MIDDLE):
  1974. if (opcode == OP(SEND_MIDDLE) ||
  1975. opcode == OP(SEND_LAST) ||
  1976. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1977. opcode == OP(SEND_LAST_WITH_INVALIDATE))
  1978. break;
  1979. goto nack_inv;
  1980. case OP(RDMA_WRITE_FIRST):
  1981. case OP(RDMA_WRITE_MIDDLE):
  1982. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1983. opcode == OP(RDMA_WRITE_LAST) ||
  1984. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1985. break;
  1986. goto nack_inv;
  1987. default:
  1988. if (opcode == OP(SEND_MIDDLE) ||
  1989. opcode == OP(SEND_LAST) ||
  1990. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1991. opcode == OP(SEND_LAST_WITH_INVALIDATE) ||
  1992. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1993. opcode == OP(RDMA_WRITE_LAST) ||
  1994. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1995. goto nack_inv;
  1996. /*
  1997. * Note that it is up to the requester to not send a new
  1998. * RDMA read or atomic operation before receiving an ACK
  1999. * for the previous operation.
  2000. */
  2001. break;
  2002. }
  2003. if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
  2004. qp_comm_est(qp);
  2005. /* OK, process the packet. */
  2006. switch (opcode) {
  2007. case OP(SEND_FIRST):
  2008. ret = hfi1_rvt_get_rwqe(qp, 0);
  2009. if (ret < 0)
  2010. goto nack_op_err;
  2011. if (!ret)
  2012. goto rnr_nak;
  2013. qp->r_rcv_len = 0;
  2014. /* FALLTHROUGH */
  2015. case OP(SEND_MIDDLE):
  2016. case OP(RDMA_WRITE_MIDDLE):
  2017. send_middle:
  2018. /* Check for invalid length PMTU or posted rwqe len. */
  2019. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  2020. goto nack_inv;
  2021. qp->r_rcv_len += pmtu;
  2022. if (unlikely(qp->r_rcv_len > qp->r_len))
  2023. goto nack_inv;
  2024. hfi1_copy_sge(&qp->r_sge, data, pmtu, 1, 0);
  2025. break;
  2026. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  2027. /* consume RWQE */
  2028. ret = hfi1_rvt_get_rwqe(qp, 1);
  2029. if (ret < 0)
  2030. goto nack_op_err;
  2031. if (!ret)
  2032. goto rnr_nak;
  2033. goto send_last_imm;
  2034. case OP(SEND_ONLY):
  2035. case OP(SEND_ONLY_WITH_IMMEDIATE):
  2036. case OP(SEND_ONLY_WITH_INVALIDATE):
  2037. ret = hfi1_rvt_get_rwqe(qp, 0);
  2038. if (ret < 0)
  2039. goto nack_op_err;
  2040. if (!ret)
  2041. goto rnr_nak;
  2042. qp->r_rcv_len = 0;
  2043. if (opcode == OP(SEND_ONLY))
  2044. goto no_immediate_data;
  2045. if (opcode == OP(SEND_ONLY_WITH_INVALIDATE))
  2046. goto send_last_inv;
  2047. /* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */
  2048. case OP(SEND_LAST_WITH_IMMEDIATE):
  2049. send_last_imm:
  2050. wc.ex.imm_data = ohdr->u.imm_data;
  2051. wc.wc_flags = IB_WC_WITH_IMM;
  2052. goto send_last;
  2053. case OP(SEND_LAST_WITH_INVALIDATE):
  2054. send_last_inv:
  2055. rkey = be32_to_cpu(ohdr->u.ieth);
  2056. if (rvt_invalidate_rkey(qp, rkey))
  2057. goto no_immediate_data;
  2058. wc.ex.invalidate_rkey = rkey;
  2059. wc.wc_flags = IB_WC_WITH_INVALIDATE;
  2060. goto send_last;
  2061. case OP(RDMA_WRITE_LAST):
  2062. copy_last = ibpd_to_rvtpd(qp->ibqp.pd)->user;
  2063. /* fall through */
  2064. case OP(SEND_LAST):
  2065. no_immediate_data:
  2066. wc.wc_flags = 0;
  2067. wc.ex.imm_data = 0;
  2068. send_last:
  2069. /* Get the number of bytes the message was padded by. */
  2070. pad = (bth0 >> 20) & 3;
  2071. /* Check for invalid length. */
  2072. /* LAST len should be >= 1 */
  2073. if (unlikely(tlen < (hdrsize + pad + 4)))
  2074. goto nack_inv;
  2075. /* Don't count the CRC. */
  2076. tlen -= (hdrsize + pad + 4);
  2077. wc.byte_len = tlen + qp->r_rcv_len;
  2078. if (unlikely(wc.byte_len > qp->r_len))
  2079. goto nack_inv;
  2080. hfi1_copy_sge(&qp->r_sge, data, tlen, 1, copy_last);
  2081. rvt_put_ss(&qp->r_sge);
  2082. qp->r_msn++;
  2083. if (!__test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags))
  2084. break;
  2085. wc.wr_id = qp->r_wr_id;
  2086. wc.status = IB_WC_SUCCESS;
  2087. if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
  2088. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  2089. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  2090. else
  2091. wc.opcode = IB_WC_RECV;
  2092. wc.qp = &qp->ibqp;
  2093. wc.src_qp = qp->remote_qpn;
  2094. wc.slid = qp->remote_ah_attr.dlid;
  2095. /*
  2096. * It seems that IB mandates the presence of an SL in a
  2097. * work completion only for the UD transport (see section
  2098. * 11.4.2 of IBTA Vol. 1).
  2099. *
  2100. * However, the way the SL is chosen below is consistent
  2101. * with the way that IB/qib works and is trying avoid
  2102. * introducing incompatibilities.
  2103. *
  2104. * See also OPA Vol. 1, section 9.7.6, and table 9-17.
  2105. */
  2106. wc.sl = qp->remote_ah_attr.sl;
  2107. /* zero fields that are N/A */
  2108. wc.vendor_err = 0;
  2109. wc.pkey_index = 0;
  2110. wc.dlid_path_bits = 0;
  2111. wc.port_num = 0;
  2112. /* Signal completion event if the solicited bit is set. */
  2113. rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
  2114. (bth0 & IB_BTH_SOLICITED) != 0);
  2115. break;
  2116. case OP(RDMA_WRITE_ONLY):
  2117. copy_last = 1;
  2118. /* fall through */
  2119. case OP(RDMA_WRITE_FIRST):
  2120. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  2121. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
  2122. goto nack_inv;
  2123. /* consume RWQE */
  2124. reth = &ohdr->u.rc.reth;
  2125. qp->r_len = be32_to_cpu(reth->length);
  2126. qp->r_rcv_len = 0;
  2127. qp->r_sge.sg_list = NULL;
  2128. if (qp->r_len != 0) {
  2129. u32 rkey = be32_to_cpu(reth->rkey);
  2130. u64 vaddr = get_ib_reth_vaddr(reth);
  2131. int ok;
  2132. /* Check rkey & NAK */
  2133. ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
  2134. rkey, IB_ACCESS_REMOTE_WRITE);
  2135. if (unlikely(!ok))
  2136. goto nack_acc;
  2137. qp->r_sge.num_sge = 1;
  2138. } else {
  2139. qp->r_sge.num_sge = 0;
  2140. qp->r_sge.sge.mr = NULL;
  2141. qp->r_sge.sge.vaddr = NULL;
  2142. qp->r_sge.sge.length = 0;
  2143. qp->r_sge.sge.sge_length = 0;
  2144. }
  2145. if (opcode == OP(RDMA_WRITE_FIRST))
  2146. goto send_middle;
  2147. else if (opcode == OP(RDMA_WRITE_ONLY))
  2148. goto no_immediate_data;
  2149. ret = hfi1_rvt_get_rwqe(qp, 1);
  2150. if (ret < 0)
  2151. goto nack_op_err;
  2152. if (!ret)
  2153. goto rnr_nak;
  2154. wc.ex.imm_data = ohdr->u.rc.imm_data;
  2155. wc.wc_flags = IB_WC_WITH_IMM;
  2156. goto send_last;
  2157. case OP(RDMA_READ_REQUEST): {
  2158. struct rvt_ack_entry *e;
  2159. u32 len;
  2160. u8 next;
  2161. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
  2162. goto nack_inv;
  2163. next = qp->r_head_ack_queue + 1;
  2164. /* s_ack_queue is size HFI1_MAX_RDMA_ATOMIC+1 so use > not >= */
  2165. if (next > HFI1_MAX_RDMA_ATOMIC)
  2166. next = 0;
  2167. spin_lock_irqsave(&qp->s_lock, flags);
  2168. if (unlikely(next == qp->s_tail_ack_queue)) {
  2169. if (!qp->s_ack_queue[next].sent)
  2170. goto nack_inv_unlck;
  2171. update_ack_queue(qp, next);
  2172. }
  2173. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2174. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2175. rvt_put_mr(e->rdma_sge.mr);
  2176. e->rdma_sge.mr = NULL;
  2177. }
  2178. reth = &ohdr->u.rc.reth;
  2179. len = be32_to_cpu(reth->length);
  2180. if (len) {
  2181. u32 rkey = be32_to_cpu(reth->rkey);
  2182. u64 vaddr = get_ib_reth_vaddr(reth);
  2183. int ok;
  2184. /* Check rkey & NAK */
  2185. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  2186. rkey, IB_ACCESS_REMOTE_READ);
  2187. if (unlikely(!ok))
  2188. goto nack_acc_unlck;
  2189. /*
  2190. * Update the next expected PSN. We add 1 later
  2191. * below, so only add the remainder here.
  2192. */
  2193. qp->r_psn += rvt_div_mtu(qp, len - 1);
  2194. } else {
  2195. e->rdma_sge.mr = NULL;
  2196. e->rdma_sge.vaddr = NULL;
  2197. e->rdma_sge.length = 0;
  2198. e->rdma_sge.sge_length = 0;
  2199. }
  2200. e->opcode = opcode;
  2201. e->sent = 0;
  2202. e->psn = psn;
  2203. e->lpsn = qp->r_psn;
  2204. /*
  2205. * We need to increment the MSN here instead of when we
  2206. * finish sending the result since a duplicate request would
  2207. * increment it more than once.
  2208. */
  2209. qp->r_msn++;
  2210. qp->r_psn++;
  2211. qp->r_state = opcode;
  2212. qp->r_nak_state = 0;
  2213. qp->r_head_ack_queue = next;
  2214. /* Schedule the send engine. */
  2215. qp->s_flags |= RVT_S_RESP_PENDING;
  2216. hfi1_schedule_send(qp);
  2217. spin_unlock_irqrestore(&qp->s_lock, flags);
  2218. if (is_fecn)
  2219. goto send_ack;
  2220. return;
  2221. }
  2222. case OP(COMPARE_SWAP):
  2223. case OP(FETCH_ADD): {
  2224. struct ib_atomic_eth *ateth;
  2225. struct rvt_ack_entry *e;
  2226. u64 vaddr;
  2227. atomic64_t *maddr;
  2228. u64 sdata;
  2229. u32 rkey;
  2230. u8 next;
  2231. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
  2232. goto nack_inv;
  2233. next = qp->r_head_ack_queue + 1;
  2234. if (next > HFI1_MAX_RDMA_ATOMIC)
  2235. next = 0;
  2236. spin_lock_irqsave(&qp->s_lock, flags);
  2237. if (unlikely(next == qp->s_tail_ack_queue)) {
  2238. if (!qp->s_ack_queue[next].sent)
  2239. goto nack_inv_unlck;
  2240. update_ack_queue(qp, next);
  2241. }
  2242. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2243. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2244. rvt_put_mr(e->rdma_sge.mr);
  2245. e->rdma_sge.mr = NULL;
  2246. }
  2247. ateth = &ohdr->u.atomic_eth;
  2248. vaddr = get_ib_ateth_vaddr(ateth);
  2249. if (unlikely(vaddr & (sizeof(u64) - 1)))
  2250. goto nack_inv_unlck;
  2251. rkey = be32_to_cpu(ateth->rkey);
  2252. /* Check rkey & NAK */
  2253. if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
  2254. vaddr, rkey,
  2255. IB_ACCESS_REMOTE_ATOMIC)))
  2256. goto nack_acc_unlck;
  2257. /* Perform atomic OP and save result. */
  2258. maddr = (atomic64_t *)qp->r_sge.sge.vaddr;
  2259. sdata = get_ib_ateth_swap(ateth);
  2260. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  2261. (u64)atomic64_add_return(sdata, maddr) - sdata :
  2262. (u64)cmpxchg((u64 *)qp->r_sge.sge.vaddr,
  2263. get_ib_ateth_compare(ateth),
  2264. sdata);
  2265. rvt_put_mr(qp->r_sge.sge.mr);
  2266. qp->r_sge.num_sge = 0;
  2267. e->opcode = opcode;
  2268. e->sent = 0;
  2269. e->psn = psn;
  2270. e->lpsn = psn;
  2271. qp->r_msn++;
  2272. qp->r_psn++;
  2273. qp->r_state = opcode;
  2274. qp->r_nak_state = 0;
  2275. qp->r_head_ack_queue = next;
  2276. /* Schedule the send engine. */
  2277. qp->s_flags |= RVT_S_RESP_PENDING;
  2278. hfi1_schedule_send(qp);
  2279. spin_unlock_irqrestore(&qp->s_lock, flags);
  2280. if (is_fecn)
  2281. goto send_ack;
  2282. return;
  2283. }
  2284. default:
  2285. /* NAK unknown opcodes. */
  2286. goto nack_inv;
  2287. }
  2288. qp->r_psn++;
  2289. qp->r_state = opcode;
  2290. qp->r_ack_psn = psn;
  2291. qp->r_nak_state = 0;
  2292. /* Send an ACK if requested or required. */
  2293. if (psn & IB_BTH_REQ_ACK) {
  2294. struct hfi1_qp_priv *priv = qp->priv;
  2295. if (packet->numpkt == 0) {
  2296. rc_cancel_ack(qp);
  2297. goto send_ack;
  2298. }
  2299. if (priv->r_adefered >= HFI1_PSN_CREDIT) {
  2300. rc_cancel_ack(qp);
  2301. goto send_ack;
  2302. }
  2303. if (unlikely(is_fecn)) {
  2304. rc_cancel_ack(qp);
  2305. goto send_ack;
  2306. }
  2307. priv->r_adefered++;
  2308. rc_defered_ack(rcd, qp);
  2309. }
  2310. return;
  2311. rnr_nak:
  2312. qp->r_nak_state = qp->r_min_rnr_timer | IB_RNR_NAK;
  2313. qp->r_ack_psn = qp->r_psn;
  2314. /* Queue RNR NAK for later */
  2315. rc_defered_ack(rcd, qp);
  2316. return;
  2317. nack_op_err:
  2318. hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2319. qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
  2320. qp->r_ack_psn = qp->r_psn;
  2321. /* Queue NAK for later */
  2322. rc_defered_ack(rcd, qp);
  2323. return;
  2324. nack_inv_unlck:
  2325. spin_unlock_irqrestore(&qp->s_lock, flags);
  2326. nack_inv:
  2327. hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2328. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  2329. qp->r_ack_psn = qp->r_psn;
  2330. /* Queue NAK for later */
  2331. rc_defered_ack(rcd, qp);
  2332. return;
  2333. nack_acc_unlck:
  2334. spin_unlock_irqrestore(&qp->s_lock, flags);
  2335. nack_acc:
  2336. hfi1_rc_error(qp, IB_WC_LOC_PROT_ERR);
  2337. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  2338. qp->r_ack_psn = qp->r_psn;
  2339. send_ack:
  2340. hfi1_send_rc_ack(rcd, qp, is_fecn);
  2341. }
  2342. void hfi1_rc_hdrerr(
  2343. struct hfi1_ctxtdata *rcd,
  2344. struct ib_header *hdr,
  2345. u32 rcv_flags,
  2346. struct rvt_qp *qp)
  2347. {
  2348. int has_grh = rcv_flags & HFI1_HAS_GRH;
  2349. struct ib_other_headers *ohdr;
  2350. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  2351. int diff;
  2352. u32 opcode;
  2353. u32 psn, bth0;
  2354. /* Check for GRH */
  2355. ohdr = &hdr->u.oth;
  2356. if (has_grh)
  2357. ohdr = &hdr->u.l.oth;
  2358. bth0 = be32_to_cpu(ohdr->bth[0]);
  2359. if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0))
  2360. return;
  2361. psn = be32_to_cpu(ohdr->bth[2]);
  2362. opcode = (bth0 >> 24) & 0xff;
  2363. /* Only deal with RDMA Writes for now */
  2364. if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
  2365. diff = delta_psn(psn, qp->r_psn);
  2366. if (!qp->r_nak_state && diff >= 0) {
  2367. ibp->rvp.n_rc_seqnak++;
  2368. qp->r_nak_state = IB_NAK_PSN_ERROR;
  2369. /* Use the expected PSN. */
  2370. qp->r_ack_psn = qp->r_psn;
  2371. /*
  2372. * Wait to send the sequence
  2373. * NAK until all packets
  2374. * in the receive queue have
  2375. * been processed.
  2376. * Otherwise, we end up
  2377. * propagating congestion.
  2378. */
  2379. rc_defered_ack(rcd, qp);
  2380. } /* Out of sequence NAK */
  2381. } /* QP Request NAKs */
  2382. }