mad.c 125 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428
  1. /*
  2. * Copyright(c) 2015, 2016 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #include <linux/net.h>
  48. #define OPA_NUM_PKEY_BLOCKS_PER_SMP (OPA_SMP_DR_DATA_SIZE \
  49. / (OPA_PARTITION_TABLE_BLK_SIZE * sizeof(u16)))
  50. #include "hfi.h"
  51. #include "mad.h"
  52. #include "trace.h"
  53. #include "qp.h"
  54. /* the reset value from the FM is supposed to be 0xffff, handle both */
  55. #define OPA_LINK_WIDTH_RESET_OLD 0x0fff
  56. #define OPA_LINK_WIDTH_RESET 0xffff
  57. static int reply(struct ib_mad_hdr *smp)
  58. {
  59. /*
  60. * The verbs framework will handle the directed/LID route
  61. * packet changes.
  62. */
  63. smp->method = IB_MGMT_METHOD_GET_RESP;
  64. if (smp->mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
  65. smp->status |= IB_SMP_DIRECTION;
  66. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  67. }
  68. static inline void clear_opa_smp_data(struct opa_smp *smp)
  69. {
  70. void *data = opa_get_smp_data(smp);
  71. size_t size = opa_get_smp_data_size(smp);
  72. memset(data, 0, size);
  73. }
  74. void hfi1_event_pkey_change(struct hfi1_devdata *dd, u8 port)
  75. {
  76. struct ib_event event;
  77. event.event = IB_EVENT_PKEY_CHANGE;
  78. event.device = &dd->verbs_dev.rdi.ibdev;
  79. event.element.port_num = port;
  80. ib_dispatch_event(&event);
  81. }
  82. static void send_trap(struct hfi1_ibport *ibp, void *data, unsigned len)
  83. {
  84. struct ib_mad_send_buf *send_buf;
  85. struct ib_mad_agent *agent;
  86. struct opa_smp *smp;
  87. int ret;
  88. unsigned long flags;
  89. unsigned long timeout;
  90. int pkey_idx;
  91. u32 qpn = ppd_from_ibp(ibp)->sm_trap_qp;
  92. agent = ibp->rvp.send_agent;
  93. if (!agent)
  94. return;
  95. /* o14-3.2.1 */
  96. if (ppd_from_ibp(ibp)->lstate != IB_PORT_ACTIVE)
  97. return;
  98. /* o14-2 */
  99. if (ibp->rvp.trap_timeout && time_before(jiffies,
  100. ibp->rvp.trap_timeout))
  101. return;
  102. pkey_idx = hfi1_lookup_pkey_idx(ibp, LIM_MGMT_P_KEY);
  103. if (pkey_idx < 0) {
  104. pr_warn("%s: failed to find limited mgmt pkey, defaulting 0x%x\n",
  105. __func__, hfi1_get_pkey(ibp, 1));
  106. pkey_idx = 1;
  107. }
  108. send_buf = ib_create_send_mad(agent, qpn, pkey_idx, 0,
  109. IB_MGMT_MAD_HDR, IB_MGMT_MAD_DATA,
  110. GFP_ATOMIC, IB_MGMT_BASE_VERSION);
  111. if (IS_ERR(send_buf))
  112. return;
  113. smp = send_buf->mad;
  114. smp->base_version = OPA_MGMT_BASE_VERSION;
  115. smp->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  116. smp->class_version = OPA_SM_CLASS_VERSION;
  117. smp->method = IB_MGMT_METHOD_TRAP;
  118. ibp->rvp.tid++;
  119. smp->tid = cpu_to_be64(ibp->rvp.tid);
  120. smp->attr_id = IB_SMP_ATTR_NOTICE;
  121. /* o14-1: smp->mkey = 0; */
  122. memcpy(smp->route.lid.data, data, len);
  123. spin_lock_irqsave(&ibp->rvp.lock, flags);
  124. if (!ibp->rvp.sm_ah) {
  125. if (ibp->rvp.sm_lid != be16_to_cpu(IB_LID_PERMISSIVE)) {
  126. struct ib_ah *ah;
  127. ah = hfi1_create_qp0_ah(ibp, ibp->rvp.sm_lid);
  128. if (IS_ERR(ah)) {
  129. ret = PTR_ERR(ah);
  130. } else {
  131. send_buf->ah = ah;
  132. ibp->rvp.sm_ah = ibah_to_rvtah(ah);
  133. ret = 0;
  134. }
  135. } else {
  136. ret = -EINVAL;
  137. }
  138. } else {
  139. send_buf->ah = &ibp->rvp.sm_ah->ibah;
  140. ret = 0;
  141. }
  142. spin_unlock_irqrestore(&ibp->rvp.lock, flags);
  143. if (!ret)
  144. ret = ib_post_send_mad(send_buf, NULL);
  145. if (!ret) {
  146. /* 4.096 usec. */
  147. timeout = (4096 * (1UL << ibp->rvp.subnet_timeout)) / 1000;
  148. ibp->rvp.trap_timeout = jiffies + usecs_to_jiffies(timeout);
  149. } else {
  150. ib_free_send_mad(send_buf);
  151. ibp->rvp.trap_timeout = 0;
  152. }
  153. }
  154. /*
  155. * Send a bad [PQ]_Key trap (ch. 14.3.8).
  156. */
  157. void hfi1_bad_pqkey(struct hfi1_ibport *ibp, __be16 trap_num, u32 key, u32 sl,
  158. u32 qp1, u32 qp2, u16 lid1, u16 lid2)
  159. {
  160. struct opa_mad_notice_attr data;
  161. u32 lid = ppd_from_ibp(ibp)->lid;
  162. u32 _lid1 = lid1;
  163. u32 _lid2 = lid2;
  164. memset(&data, 0, sizeof(data));
  165. if (trap_num == OPA_TRAP_BAD_P_KEY)
  166. ibp->rvp.pkey_violations++;
  167. else
  168. ibp->rvp.qkey_violations++;
  169. ibp->rvp.n_pkt_drops++;
  170. /* Send violation trap */
  171. data.generic_type = IB_NOTICE_TYPE_SECURITY;
  172. data.prod_type_lsb = IB_NOTICE_PROD_CA;
  173. data.trap_num = trap_num;
  174. data.issuer_lid = cpu_to_be32(lid);
  175. data.ntc_257_258.lid1 = cpu_to_be32(_lid1);
  176. data.ntc_257_258.lid2 = cpu_to_be32(_lid2);
  177. data.ntc_257_258.key = cpu_to_be32(key);
  178. data.ntc_257_258.sl = sl << 3;
  179. data.ntc_257_258.qp1 = cpu_to_be32(qp1);
  180. data.ntc_257_258.qp2 = cpu_to_be32(qp2);
  181. send_trap(ibp, &data, sizeof(data));
  182. }
  183. /*
  184. * Send a bad M_Key trap (ch. 14.3.9).
  185. */
  186. static void bad_mkey(struct hfi1_ibport *ibp, struct ib_mad_hdr *mad,
  187. __be64 mkey, __be32 dr_slid, u8 return_path[], u8 hop_cnt)
  188. {
  189. struct opa_mad_notice_attr data;
  190. u32 lid = ppd_from_ibp(ibp)->lid;
  191. memset(&data, 0, sizeof(data));
  192. /* Send violation trap */
  193. data.generic_type = IB_NOTICE_TYPE_SECURITY;
  194. data.prod_type_lsb = IB_NOTICE_PROD_CA;
  195. data.trap_num = OPA_TRAP_BAD_M_KEY;
  196. data.issuer_lid = cpu_to_be32(lid);
  197. data.ntc_256.lid = data.issuer_lid;
  198. data.ntc_256.method = mad->method;
  199. data.ntc_256.attr_id = mad->attr_id;
  200. data.ntc_256.attr_mod = mad->attr_mod;
  201. data.ntc_256.mkey = mkey;
  202. if (mad->mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
  203. data.ntc_256.dr_slid = dr_slid;
  204. data.ntc_256.dr_trunc_hop = IB_NOTICE_TRAP_DR_NOTICE;
  205. if (hop_cnt > ARRAY_SIZE(data.ntc_256.dr_rtn_path)) {
  206. data.ntc_256.dr_trunc_hop |=
  207. IB_NOTICE_TRAP_DR_TRUNC;
  208. hop_cnt = ARRAY_SIZE(data.ntc_256.dr_rtn_path);
  209. }
  210. data.ntc_256.dr_trunc_hop |= hop_cnt;
  211. memcpy(data.ntc_256.dr_rtn_path, return_path,
  212. hop_cnt);
  213. }
  214. send_trap(ibp, &data, sizeof(data));
  215. }
  216. /*
  217. * Send a Port Capability Mask Changed trap (ch. 14.3.11).
  218. */
  219. void hfi1_cap_mask_chg(struct rvt_dev_info *rdi, u8 port_num)
  220. {
  221. struct opa_mad_notice_attr data;
  222. struct hfi1_ibdev *verbs_dev = dev_from_rdi(rdi);
  223. struct hfi1_devdata *dd = dd_from_dev(verbs_dev);
  224. struct hfi1_ibport *ibp = &dd->pport[port_num - 1].ibport_data;
  225. u32 lid = ppd_from_ibp(ibp)->lid;
  226. memset(&data, 0, sizeof(data));
  227. data.generic_type = IB_NOTICE_TYPE_INFO;
  228. data.prod_type_lsb = IB_NOTICE_PROD_CA;
  229. data.trap_num = OPA_TRAP_CHANGE_CAPABILITY;
  230. data.issuer_lid = cpu_to_be32(lid);
  231. data.ntc_144.lid = data.issuer_lid;
  232. data.ntc_144.new_cap_mask = cpu_to_be32(ibp->rvp.port_cap_flags);
  233. send_trap(ibp, &data, sizeof(data));
  234. }
  235. /*
  236. * Send a System Image GUID Changed trap (ch. 14.3.12).
  237. */
  238. void hfi1_sys_guid_chg(struct hfi1_ibport *ibp)
  239. {
  240. struct opa_mad_notice_attr data;
  241. u32 lid = ppd_from_ibp(ibp)->lid;
  242. memset(&data, 0, sizeof(data));
  243. data.generic_type = IB_NOTICE_TYPE_INFO;
  244. data.prod_type_lsb = IB_NOTICE_PROD_CA;
  245. data.trap_num = OPA_TRAP_CHANGE_SYSGUID;
  246. data.issuer_lid = cpu_to_be32(lid);
  247. data.ntc_145.new_sys_guid = ib_hfi1_sys_image_guid;
  248. data.ntc_145.lid = data.issuer_lid;
  249. send_trap(ibp, &data, sizeof(data));
  250. }
  251. /*
  252. * Send a Node Description Changed trap (ch. 14.3.13).
  253. */
  254. void hfi1_node_desc_chg(struct hfi1_ibport *ibp)
  255. {
  256. struct opa_mad_notice_attr data;
  257. u32 lid = ppd_from_ibp(ibp)->lid;
  258. memset(&data, 0, sizeof(data));
  259. data.generic_type = IB_NOTICE_TYPE_INFO;
  260. data.prod_type_lsb = IB_NOTICE_PROD_CA;
  261. data.trap_num = OPA_TRAP_CHANGE_CAPABILITY;
  262. data.issuer_lid = cpu_to_be32(lid);
  263. data.ntc_144.lid = data.issuer_lid;
  264. data.ntc_144.change_flags =
  265. cpu_to_be16(OPA_NOTICE_TRAP_NODE_DESC_CHG);
  266. send_trap(ibp, &data, sizeof(data));
  267. }
  268. static int __subn_get_opa_nodedesc(struct opa_smp *smp, u32 am,
  269. u8 *data, struct ib_device *ibdev,
  270. u8 port, u32 *resp_len)
  271. {
  272. struct opa_node_description *nd;
  273. if (am) {
  274. smp->status |= IB_SMP_INVALID_FIELD;
  275. return reply((struct ib_mad_hdr *)smp);
  276. }
  277. nd = (struct opa_node_description *)data;
  278. memcpy(nd->data, ibdev->node_desc, sizeof(nd->data));
  279. if (resp_len)
  280. *resp_len += sizeof(*nd);
  281. return reply((struct ib_mad_hdr *)smp);
  282. }
  283. static int __subn_get_opa_nodeinfo(struct opa_smp *smp, u32 am, u8 *data,
  284. struct ib_device *ibdev, u8 port,
  285. u32 *resp_len)
  286. {
  287. struct opa_node_info *ni;
  288. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  289. unsigned pidx = port - 1; /* IB number port from 1, hw from 0 */
  290. ni = (struct opa_node_info *)data;
  291. /* GUID 0 is illegal */
  292. if (am || pidx >= dd->num_pports || ibdev->node_guid == 0 ||
  293. get_sguid(to_iport(ibdev, port), HFI1_PORT_GUID_INDEX) == 0) {
  294. smp->status |= IB_SMP_INVALID_FIELD;
  295. return reply((struct ib_mad_hdr *)smp);
  296. }
  297. ni->port_guid = get_sguid(to_iport(ibdev, port), HFI1_PORT_GUID_INDEX);
  298. ni->base_version = OPA_MGMT_BASE_VERSION;
  299. ni->class_version = OPA_SM_CLASS_VERSION;
  300. ni->node_type = 1; /* channel adapter */
  301. ni->num_ports = ibdev->phys_port_cnt;
  302. /* This is already in network order */
  303. ni->system_image_guid = ib_hfi1_sys_image_guid;
  304. ni->node_guid = ibdev->node_guid;
  305. ni->partition_cap = cpu_to_be16(hfi1_get_npkeys(dd));
  306. ni->device_id = cpu_to_be16(dd->pcidev->device);
  307. ni->revision = cpu_to_be32(dd->minrev);
  308. ni->local_port_num = port;
  309. ni->vendor_id[0] = dd->oui1;
  310. ni->vendor_id[1] = dd->oui2;
  311. ni->vendor_id[2] = dd->oui3;
  312. if (resp_len)
  313. *resp_len += sizeof(*ni);
  314. return reply((struct ib_mad_hdr *)smp);
  315. }
  316. static int subn_get_nodeinfo(struct ib_smp *smp, struct ib_device *ibdev,
  317. u8 port)
  318. {
  319. struct ib_node_info *nip = (struct ib_node_info *)&smp->data;
  320. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  321. unsigned pidx = port - 1; /* IB number port from 1, hw from 0 */
  322. /* GUID 0 is illegal */
  323. if (smp->attr_mod || pidx >= dd->num_pports ||
  324. ibdev->node_guid == 0 ||
  325. get_sguid(to_iport(ibdev, port), HFI1_PORT_GUID_INDEX) == 0) {
  326. smp->status |= IB_SMP_INVALID_FIELD;
  327. return reply((struct ib_mad_hdr *)smp);
  328. }
  329. nip->port_guid = get_sguid(to_iport(ibdev, port), HFI1_PORT_GUID_INDEX);
  330. nip->base_version = OPA_MGMT_BASE_VERSION;
  331. nip->class_version = OPA_SM_CLASS_VERSION;
  332. nip->node_type = 1; /* channel adapter */
  333. nip->num_ports = ibdev->phys_port_cnt;
  334. /* This is already in network order */
  335. nip->sys_guid = ib_hfi1_sys_image_guid;
  336. nip->node_guid = ibdev->node_guid;
  337. nip->partition_cap = cpu_to_be16(hfi1_get_npkeys(dd));
  338. nip->device_id = cpu_to_be16(dd->pcidev->device);
  339. nip->revision = cpu_to_be32(dd->minrev);
  340. nip->local_port_num = port;
  341. nip->vendor_id[0] = dd->oui1;
  342. nip->vendor_id[1] = dd->oui2;
  343. nip->vendor_id[2] = dd->oui3;
  344. return reply((struct ib_mad_hdr *)smp);
  345. }
  346. static void set_link_width_enabled(struct hfi1_pportdata *ppd, u32 w)
  347. {
  348. (void)hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LWID_ENB, w);
  349. }
  350. static void set_link_width_downgrade_enabled(struct hfi1_pportdata *ppd, u32 w)
  351. {
  352. (void)hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LWID_DG_ENB, w);
  353. }
  354. static void set_link_speed_enabled(struct hfi1_pportdata *ppd, u32 s)
  355. {
  356. (void)hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_SPD_ENB, s);
  357. }
  358. static int check_mkey(struct hfi1_ibport *ibp, struct ib_mad_hdr *mad,
  359. int mad_flags, __be64 mkey, __be32 dr_slid,
  360. u8 return_path[], u8 hop_cnt)
  361. {
  362. int valid_mkey = 0;
  363. int ret = 0;
  364. /* Is the mkey in the process of expiring? */
  365. if (ibp->rvp.mkey_lease_timeout &&
  366. time_after_eq(jiffies, ibp->rvp.mkey_lease_timeout)) {
  367. /* Clear timeout and mkey protection field. */
  368. ibp->rvp.mkey_lease_timeout = 0;
  369. ibp->rvp.mkeyprot = 0;
  370. }
  371. if ((mad_flags & IB_MAD_IGNORE_MKEY) || ibp->rvp.mkey == 0 ||
  372. ibp->rvp.mkey == mkey)
  373. valid_mkey = 1;
  374. /* Unset lease timeout on any valid Get/Set/TrapRepress */
  375. if (valid_mkey && ibp->rvp.mkey_lease_timeout &&
  376. (mad->method == IB_MGMT_METHOD_GET ||
  377. mad->method == IB_MGMT_METHOD_SET ||
  378. mad->method == IB_MGMT_METHOD_TRAP_REPRESS))
  379. ibp->rvp.mkey_lease_timeout = 0;
  380. if (!valid_mkey) {
  381. switch (mad->method) {
  382. case IB_MGMT_METHOD_GET:
  383. /* Bad mkey not a violation below level 2 */
  384. if (ibp->rvp.mkeyprot < 2)
  385. break;
  386. case IB_MGMT_METHOD_SET:
  387. case IB_MGMT_METHOD_TRAP_REPRESS:
  388. if (ibp->rvp.mkey_violations != 0xFFFF)
  389. ++ibp->rvp.mkey_violations;
  390. if (!ibp->rvp.mkey_lease_timeout &&
  391. ibp->rvp.mkey_lease_period)
  392. ibp->rvp.mkey_lease_timeout = jiffies +
  393. ibp->rvp.mkey_lease_period * HZ;
  394. /* Generate a trap notice. */
  395. bad_mkey(ibp, mad, mkey, dr_slid, return_path,
  396. hop_cnt);
  397. ret = 1;
  398. }
  399. }
  400. return ret;
  401. }
  402. /*
  403. * The SMA caches reads from LCB registers in case the LCB is unavailable.
  404. * (The LCB is unavailable in certain link states, for example.)
  405. */
  406. struct lcb_datum {
  407. u32 off;
  408. u64 val;
  409. };
  410. static struct lcb_datum lcb_cache[] = {
  411. { DC_LCB_STS_ROUND_TRIP_LTP_CNT, 0 },
  412. };
  413. static int write_lcb_cache(u32 off, u64 val)
  414. {
  415. int i;
  416. for (i = 0; i < ARRAY_SIZE(lcb_cache); i++) {
  417. if (lcb_cache[i].off == off) {
  418. lcb_cache[i].val = val;
  419. return 0;
  420. }
  421. }
  422. pr_warn("%s bad offset 0x%x\n", __func__, off);
  423. return -1;
  424. }
  425. static int read_lcb_cache(u32 off, u64 *val)
  426. {
  427. int i;
  428. for (i = 0; i < ARRAY_SIZE(lcb_cache); i++) {
  429. if (lcb_cache[i].off == off) {
  430. *val = lcb_cache[i].val;
  431. return 0;
  432. }
  433. }
  434. pr_warn("%s bad offset 0x%x\n", __func__, off);
  435. return -1;
  436. }
  437. void read_ltp_rtt(struct hfi1_devdata *dd)
  438. {
  439. u64 reg;
  440. if (read_lcb_csr(dd, DC_LCB_STS_ROUND_TRIP_LTP_CNT, &reg))
  441. dd_dev_err(dd, "%s: unable to read LTP RTT\n", __func__);
  442. else
  443. write_lcb_cache(DC_LCB_STS_ROUND_TRIP_LTP_CNT, reg);
  444. }
  445. static int __subn_get_opa_portinfo(struct opa_smp *smp, u32 am, u8 *data,
  446. struct ib_device *ibdev, u8 port,
  447. u32 *resp_len)
  448. {
  449. int i;
  450. struct hfi1_devdata *dd;
  451. struct hfi1_pportdata *ppd;
  452. struct hfi1_ibport *ibp;
  453. struct opa_port_info *pi = (struct opa_port_info *)data;
  454. u8 mtu;
  455. u8 credit_rate;
  456. u8 is_beaconing_active;
  457. u32 state;
  458. u32 num_ports = OPA_AM_NPORT(am);
  459. u32 start_of_sm_config = OPA_AM_START_SM_CFG(am);
  460. u32 buffer_units;
  461. u64 tmp = 0;
  462. if (num_ports != 1) {
  463. smp->status |= IB_SMP_INVALID_FIELD;
  464. return reply((struct ib_mad_hdr *)smp);
  465. }
  466. dd = dd_from_ibdev(ibdev);
  467. /* IB numbers ports from 1, hw from 0 */
  468. ppd = dd->pport + (port - 1);
  469. ibp = &ppd->ibport_data;
  470. if (ppd->vls_supported / 2 > ARRAY_SIZE(pi->neigh_mtu.pvlx_to_mtu) ||
  471. ppd->vls_supported > ARRAY_SIZE(dd->vld)) {
  472. smp->status |= IB_SMP_INVALID_FIELD;
  473. return reply((struct ib_mad_hdr *)smp);
  474. }
  475. pi->lid = cpu_to_be32(ppd->lid);
  476. /* Only return the mkey if the protection field allows it. */
  477. if (!(smp->method == IB_MGMT_METHOD_GET &&
  478. ibp->rvp.mkey != smp->mkey &&
  479. ibp->rvp.mkeyprot == 1))
  480. pi->mkey = ibp->rvp.mkey;
  481. pi->subnet_prefix = ibp->rvp.gid_prefix;
  482. pi->sm_lid = cpu_to_be32(ibp->rvp.sm_lid);
  483. pi->ib_cap_mask = cpu_to_be32(ibp->rvp.port_cap_flags);
  484. pi->mkey_lease_period = cpu_to_be16(ibp->rvp.mkey_lease_period);
  485. pi->sm_trap_qp = cpu_to_be32(ppd->sm_trap_qp);
  486. pi->sa_qp = cpu_to_be32(ppd->sa_qp);
  487. pi->link_width.enabled = cpu_to_be16(ppd->link_width_enabled);
  488. pi->link_width.supported = cpu_to_be16(ppd->link_width_supported);
  489. pi->link_width.active = cpu_to_be16(ppd->link_width_active);
  490. pi->link_width_downgrade.supported =
  491. cpu_to_be16(ppd->link_width_downgrade_supported);
  492. pi->link_width_downgrade.enabled =
  493. cpu_to_be16(ppd->link_width_downgrade_enabled);
  494. pi->link_width_downgrade.tx_active =
  495. cpu_to_be16(ppd->link_width_downgrade_tx_active);
  496. pi->link_width_downgrade.rx_active =
  497. cpu_to_be16(ppd->link_width_downgrade_rx_active);
  498. pi->link_speed.supported = cpu_to_be16(ppd->link_speed_supported);
  499. pi->link_speed.active = cpu_to_be16(ppd->link_speed_active);
  500. pi->link_speed.enabled = cpu_to_be16(ppd->link_speed_enabled);
  501. state = driver_lstate(ppd);
  502. if (start_of_sm_config && (state == IB_PORT_INIT))
  503. ppd->is_sm_config_started = 1;
  504. pi->port_phys_conf = (ppd->port_type & 0xf);
  505. pi->port_states.ledenable_offlinereason = ppd->neighbor_normal << 4;
  506. pi->port_states.ledenable_offlinereason |=
  507. ppd->is_sm_config_started << 5;
  508. /*
  509. * This pairs with the memory barrier in hfi1_start_led_override to
  510. * ensure that we read the correct state of LED beaconing represented
  511. * by led_override_timer_active
  512. */
  513. smp_rmb();
  514. is_beaconing_active = !!atomic_read(&ppd->led_override_timer_active);
  515. pi->port_states.ledenable_offlinereason |= is_beaconing_active << 6;
  516. pi->port_states.ledenable_offlinereason |=
  517. ppd->offline_disabled_reason;
  518. pi->port_states.portphysstate_portstate =
  519. (hfi1_ibphys_portstate(ppd) << 4) | state;
  520. pi->mkeyprotect_lmc = (ibp->rvp.mkeyprot << 6) | ppd->lmc;
  521. memset(pi->neigh_mtu.pvlx_to_mtu, 0, sizeof(pi->neigh_mtu.pvlx_to_mtu));
  522. for (i = 0; i < ppd->vls_supported; i++) {
  523. mtu = mtu_to_enum(dd->vld[i].mtu, HFI1_DEFAULT_ACTIVE_MTU);
  524. if ((i % 2) == 0)
  525. pi->neigh_mtu.pvlx_to_mtu[i / 2] |= (mtu << 4);
  526. else
  527. pi->neigh_mtu.pvlx_to_mtu[i / 2] |= mtu;
  528. }
  529. /* don't forget VL 15 */
  530. mtu = mtu_to_enum(dd->vld[15].mtu, 2048);
  531. pi->neigh_mtu.pvlx_to_mtu[15 / 2] |= mtu;
  532. pi->smsl = ibp->rvp.sm_sl & OPA_PI_MASK_SMSL;
  533. pi->operational_vls = hfi1_get_ib_cfg(ppd, HFI1_IB_CFG_OP_VLS);
  534. pi->partenforce_filterraw |=
  535. (ppd->linkinit_reason & OPA_PI_MASK_LINKINIT_REASON);
  536. if (ppd->part_enforce & HFI1_PART_ENFORCE_IN)
  537. pi->partenforce_filterraw |= OPA_PI_MASK_PARTITION_ENFORCE_IN;
  538. if (ppd->part_enforce & HFI1_PART_ENFORCE_OUT)
  539. pi->partenforce_filterraw |= OPA_PI_MASK_PARTITION_ENFORCE_OUT;
  540. pi->mkey_violations = cpu_to_be16(ibp->rvp.mkey_violations);
  541. /* P_KeyViolations are counted by hardware. */
  542. pi->pkey_violations = cpu_to_be16(ibp->rvp.pkey_violations);
  543. pi->qkey_violations = cpu_to_be16(ibp->rvp.qkey_violations);
  544. pi->vl.cap = ppd->vls_supported;
  545. pi->vl.high_limit = cpu_to_be16(ibp->rvp.vl_high_limit);
  546. pi->vl.arb_high_cap = (u8)hfi1_get_ib_cfg(ppd, HFI1_IB_CFG_VL_HIGH_CAP);
  547. pi->vl.arb_low_cap = (u8)hfi1_get_ib_cfg(ppd, HFI1_IB_CFG_VL_LOW_CAP);
  548. pi->clientrereg_subnettimeout = ibp->rvp.subnet_timeout;
  549. pi->port_link_mode = cpu_to_be16(OPA_PORT_LINK_MODE_OPA << 10 |
  550. OPA_PORT_LINK_MODE_OPA << 5 |
  551. OPA_PORT_LINK_MODE_OPA);
  552. pi->port_ltp_crc_mode = cpu_to_be16(ppd->port_ltp_crc_mode);
  553. pi->port_mode = cpu_to_be16(
  554. ppd->is_active_optimize_enabled ?
  555. OPA_PI_MASK_PORT_ACTIVE_OPTOMIZE : 0);
  556. pi->port_packet_format.supported =
  557. cpu_to_be16(OPA_PORT_PACKET_FORMAT_9B);
  558. pi->port_packet_format.enabled =
  559. cpu_to_be16(OPA_PORT_PACKET_FORMAT_9B);
  560. /* flit_control.interleave is (OPA V1, version .76):
  561. * bits use
  562. * ---- ---
  563. * 2 res
  564. * 2 DistanceSupported
  565. * 2 DistanceEnabled
  566. * 5 MaxNextLevelTxEnabled
  567. * 5 MaxNestLevelRxSupported
  568. *
  569. * HFI supports only "distance mode 1" (see OPA V1, version .76,
  570. * section 9.6.2), so set DistanceSupported, DistanceEnabled
  571. * to 0x1.
  572. */
  573. pi->flit_control.interleave = cpu_to_be16(0x1400);
  574. pi->link_down_reason = ppd->local_link_down_reason.sma;
  575. pi->neigh_link_down_reason = ppd->neigh_link_down_reason.sma;
  576. pi->port_error_action = cpu_to_be32(ppd->port_error_action);
  577. pi->mtucap = mtu_to_enum(hfi1_max_mtu, IB_MTU_4096);
  578. /* 32.768 usec. response time (guessing) */
  579. pi->resptimevalue = 3;
  580. pi->local_port_num = port;
  581. /* buffer info for FM */
  582. pi->overall_buffer_space = cpu_to_be16(dd->link_credits);
  583. pi->neigh_node_guid = cpu_to_be64(ppd->neighbor_guid);
  584. pi->neigh_port_num = ppd->neighbor_port_number;
  585. pi->port_neigh_mode =
  586. (ppd->neighbor_type & OPA_PI_MASK_NEIGH_NODE_TYPE) |
  587. (ppd->mgmt_allowed ? OPA_PI_MASK_NEIGH_MGMT_ALLOWED : 0) |
  588. (ppd->neighbor_fm_security ?
  589. OPA_PI_MASK_NEIGH_FW_AUTH_BYPASS : 0);
  590. /* HFIs shall always return VL15 credits to their
  591. * neighbor in a timely manner, without any credit return pacing.
  592. */
  593. credit_rate = 0;
  594. buffer_units = (dd->vau) & OPA_PI_MASK_BUF_UNIT_BUF_ALLOC;
  595. buffer_units |= (dd->vcu << 3) & OPA_PI_MASK_BUF_UNIT_CREDIT_ACK;
  596. buffer_units |= (credit_rate << 6) &
  597. OPA_PI_MASK_BUF_UNIT_VL15_CREDIT_RATE;
  598. buffer_units |= (dd->vl15_init << 11) & OPA_PI_MASK_BUF_UNIT_VL15_INIT;
  599. pi->buffer_units = cpu_to_be32(buffer_units);
  600. pi->opa_cap_mask = cpu_to_be16(OPA_CAP_MASK3_IsSharedSpaceSupported);
  601. /* HFI supports a replay buffer 128 LTPs in size */
  602. pi->replay_depth.buffer = 0x80;
  603. /* read the cached value of DC_LCB_STS_ROUND_TRIP_LTP_CNT */
  604. read_lcb_cache(DC_LCB_STS_ROUND_TRIP_LTP_CNT, &tmp);
  605. /*
  606. * this counter is 16 bits wide, but the replay_depth.wire
  607. * variable is only 8 bits
  608. */
  609. if (tmp > 0xff)
  610. tmp = 0xff;
  611. pi->replay_depth.wire = tmp;
  612. if (resp_len)
  613. *resp_len += sizeof(struct opa_port_info);
  614. return reply((struct ib_mad_hdr *)smp);
  615. }
  616. /**
  617. * get_pkeys - return the PKEY table
  618. * @dd: the hfi1_ib device
  619. * @port: the IB port number
  620. * @pkeys: the pkey table is placed here
  621. */
  622. static int get_pkeys(struct hfi1_devdata *dd, u8 port, u16 *pkeys)
  623. {
  624. struct hfi1_pportdata *ppd = dd->pport + port - 1;
  625. memcpy(pkeys, ppd->pkeys, sizeof(ppd->pkeys));
  626. return 0;
  627. }
  628. static int __subn_get_opa_pkeytable(struct opa_smp *smp, u32 am, u8 *data,
  629. struct ib_device *ibdev, u8 port,
  630. u32 *resp_len)
  631. {
  632. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  633. u32 n_blocks_req = OPA_AM_NBLK(am);
  634. u32 start_block = am & 0x7ff;
  635. __be16 *p;
  636. u16 *q;
  637. int i;
  638. u16 n_blocks_avail;
  639. unsigned npkeys = hfi1_get_npkeys(dd);
  640. size_t size;
  641. if (n_blocks_req == 0) {
  642. pr_warn("OPA Get PKey AM Invalid : P = %d; B = 0x%x; N = 0x%x\n",
  643. port, start_block, n_blocks_req);
  644. smp->status |= IB_SMP_INVALID_FIELD;
  645. return reply((struct ib_mad_hdr *)smp);
  646. }
  647. n_blocks_avail = (u16)(npkeys / OPA_PARTITION_TABLE_BLK_SIZE) + 1;
  648. size = (n_blocks_req * OPA_PARTITION_TABLE_BLK_SIZE) * sizeof(u16);
  649. if (start_block + n_blocks_req > n_blocks_avail ||
  650. n_blocks_req > OPA_NUM_PKEY_BLOCKS_PER_SMP) {
  651. pr_warn("OPA Get PKey AM Invalid : s 0x%x; req 0x%x; "
  652. "avail 0x%x; blk/smp 0x%lx\n",
  653. start_block, n_blocks_req, n_blocks_avail,
  654. OPA_NUM_PKEY_BLOCKS_PER_SMP);
  655. smp->status |= IB_SMP_INVALID_FIELD;
  656. return reply((struct ib_mad_hdr *)smp);
  657. }
  658. p = (__be16 *)data;
  659. q = (u16 *)data;
  660. /* get the real pkeys if we are requesting the first block */
  661. if (start_block == 0) {
  662. get_pkeys(dd, port, q);
  663. for (i = 0; i < npkeys; i++)
  664. p[i] = cpu_to_be16(q[i]);
  665. if (resp_len)
  666. *resp_len += size;
  667. } else {
  668. smp->status |= IB_SMP_INVALID_FIELD;
  669. }
  670. return reply((struct ib_mad_hdr *)smp);
  671. }
  672. enum {
  673. HFI_TRANSITION_DISALLOWED,
  674. HFI_TRANSITION_IGNORED,
  675. HFI_TRANSITION_ALLOWED,
  676. HFI_TRANSITION_UNDEFINED,
  677. };
  678. /*
  679. * Use shortened names to improve readability of
  680. * {logical,physical}_state_transitions
  681. */
  682. enum {
  683. __D = HFI_TRANSITION_DISALLOWED,
  684. __I = HFI_TRANSITION_IGNORED,
  685. __A = HFI_TRANSITION_ALLOWED,
  686. __U = HFI_TRANSITION_UNDEFINED,
  687. };
  688. /*
  689. * IB_PORTPHYSSTATE_POLLING (2) through OPA_PORTPHYSSTATE_MAX (11) are
  690. * represented in physical_state_transitions.
  691. */
  692. #define __N_PHYSTATES (OPA_PORTPHYSSTATE_MAX - IB_PORTPHYSSTATE_POLLING + 1)
  693. /*
  694. * Within physical_state_transitions, rows represent "old" states,
  695. * columns "new" states, and physical_state_transitions.allowed[old][new]
  696. * indicates if the transition from old state to new state is legal (see
  697. * OPAg1v1, Table 6-4).
  698. */
  699. static const struct {
  700. u8 allowed[__N_PHYSTATES][__N_PHYSTATES];
  701. } physical_state_transitions = {
  702. {
  703. /* 2 3 4 5 6 7 8 9 10 11 */
  704. /* 2 */ { __A, __A, __D, __D, __D, __D, __D, __D, __D, __D },
  705. /* 3 */ { __A, __I, __D, __D, __D, __D, __D, __D, __D, __A },
  706. /* 4 */ { __U, __U, __U, __U, __U, __U, __U, __U, __U, __U },
  707. /* 5 */ { __A, __A, __D, __I, __D, __D, __D, __D, __D, __D },
  708. /* 6 */ { __U, __U, __U, __U, __U, __U, __U, __U, __U, __U },
  709. /* 7 */ { __D, __A, __D, __D, __D, __I, __D, __D, __D, __D },
  710. /* 8 */ { __U, __U, __U, __U, __U, __U, __U, __U, __U, __U },
  711. /* 9 */ { __I, __A, __D, __D, __D, __D, __D, __I, __D, __D },
  712. /*10 */ { __U, __U, __U, __U, __U, __U, __U, __U, __U, __U },
  713. /*11 */ { __D, __A, __D, __D, __D, __D, __D, __D, __D, __I },
  714. }
  715. };
  716. /*
  717. * IB_PORT_DOWN (1) through IB_PORT_ACTIVE_DEFER (5) are represented
  718. * logical_state_transitions
  719. */
  720. #define __N_LOGICAL_STATES (IB_PORT_ACTIVE_DEFER - IB_PORT_DOWN + 1)
  721. /*
  722. * Within logical_state_transitions rows represent "old" states,
  723. * columns "new" states, and logical_state_transitions.allowed[old][new]
  724. * indicates if the transition from old state to new state is legal (see
  725. * OPAg1v1, Table 9-12).
  726. */
  727. static const struct {
  728. u8 allowed[__N_LOGICAL_STATES][__N_LOGICAL_STATES];
  729. } logical_state_transitions = {
  730. {
  731. /* 1 2 3 4 5 */
  732. /* 1 */ { __I, __D, __D, __D, __U},
  733. /* 2 */ { __D, __I, __A, __D, __U},
  734. /* 3 */ { __D, __D, __I, __A, __U},
  735. /* 4 */ { __D, __D, __I, __I, __U},
  736. /* 5 */ { __U, __U, __U, __U, __U},
  737. }
  738. };
  739. static int logical_transition_allowed(int old, int new)
  740. {
  741. if (old < IB_PORT_NOP || old > IB_PORT_ACTIVE_DEFER ||
  742. new < IB_PORT_NOP || new > IB_PORT_ACTIVE_DEFER) {
  743. pr_warn("invalid logical state(s) (old %d new %d)\n",
  744. old, new);
  745. return HFI_TRANSITION_UNDEFINED;
  746. }
  747. if (new == IB_PORT_NOP)
  748. return HFI_TRANSITION_ALLOWED; /* always allowed */
  749. /* adjust states for indexing into logical_state_transitions */
  750. old -= IB_PORT_DOWN;
  751. new -= IB_PORT_DOWN;
  752. if (old < 0 || new < 0)
  753. return HFI_TRANSITION_UNDEFINED;
  754. return logical_state_transitions.allowed[old][new];
  755. }
  756. static int physical_transition_allowed(int old, int new)
  757. {
  758. if (old < IB_PORTPHYSSTATE_NOP || old > OPA_PORTPHYSSTATE_MAX ||
  759. new < IB_PORTPHYSSTATE_NOP || new > OPA_PORTPHYSSTATE_MAX) {
  760. pr_warn("invalid physical state(s) (old %d new %d)\n",
  761. old, new);
  762. return HFI_TRANSITION_UNDEFINED;
  763. }
  764. if (new == IB_PORTPHYSSTATE_NOP)
  765. return HFI_TRANSITION_ALLOWED; /* always allowed */
  766. /* adjust states for indexing into physical_state_transitions */
  767. old -= IB_PORTPHYSSTATE_POLLING;
  768. new -= IB_PORTPHYSSTATE_POLLING;
  769. if (old < 0 || new < 0)
  770. return HFI_TRANSITION_UNDEFINED;
  771. return physical_state_transitions.allowed[old][new];
  772. }
  773. static int port_states_transition_allowed(struct hfi1_pportdata *ppd,
  774. u32 logical_new, u32 physical_new)
  775. {
  776. u32 physical_old = driver_physical_state(ppd);
  777. u32 logical_old = driver_logical_state(ppd);
  778. int ret, logical_allowed, physical_allowed;
  779. ret = logical_transition_allowed(logical_old, logical_new);
  780. logical_allowed = ret;
  781. if (ret == HFI_TRANSITION_DISALLOWED ||
  782. ret == HFI_TRANSITION_UNDEFINED) {
  783. pr_warn("invalid logical state transition %s -> %s\n",
  784. opa_lstate_name(logical_old),
  785. opa_lstate_name(logical_new));
  786. return ret;
  787. }
  788. ret = physical_transition_allowed(physical_old, physical_new);
  789. physical_allowed = ret;
  790. if (ret == HFI_TRANSITION_DISALLOWED ||
  791. ret == HFI_TRANSITION_UNDEFINED) {
  792. pr_warn("invalid physical state transition %s -> %s\n",
  793. opa_pstate_name(physical_old),
  794. opa_pstate_name(physical_new));
  795. return ret;
  796. }
  797. if (logical_allowed == HFI_TRANSITION_IGNORED &&
  798. physical_allowed == HFI_TRANSITION_IGNORED)
  799. return HFI_TRANSITION_IGNORED;
  800. /*
  801. * A change request of Physical Port State from
  802. * 'Offline' to 'Polling' should be ignored.
  803. */
  804. if ((physical_old == OPA_PORTPHYSSTATE_OFFLINE) &&
  805. (physical_new == IB_PORTPHYSSTATE_POLLING))
  806. return HFI_TRANSITION_IGNORED;
  807. /*
  808. * Either physical_allowed or logical_allowed is
  809. * HFI_TRANSITION_ALLOWED.
  810. */
  811. return HFI_TRANSITION_ALLOWED;
  812. }
  813. static int set_port_states(struct hfi1_pportdata *ppd, struct opa_smp *smp,
  814. u32 logical_state, u32 phys_state,
  815. int suppress_idle_sma)
  816. {
  817. struct hfi1_devdata *dd = ppd->dd;
  818. u32 link_state;
  819. int ret;
  820. ret = port_states_transition_allowed(ppd, logical_state, phys_state);
  821. if (ret == HFI_TRANSITION_DISALLOWED ||
  822. ret == HFI_TRANSITION_UNDEFINED) {
  823. /* error message emitted above */
  824. smp->status |= IB_SMP_INVALID_FIELD;
  825. return 0;
  826. }
  827. if (ret == HFI_TRANSITION_IGNORED)
  828. return 0;
  829. if ((phys_state != IB_PORTPHYSSTATE_NOP) &&
  830. !(logical_state == IB_PORT_DOWN ||
  831. logical_state == IB_PORT_NOP)){
  832. pr_warn("SubnSet(OPA_PortInfo) port state invalid: logical_state 0x%x physical_state 0x%x\n",
  833. logical_state, phys_state);
  834. smp->status |= IB_SMP_INVALID_FIELD;
  835. }
  836. /*
  837. * Logical state changes are summarized in OPAv1g1 spec.,
  838. * Table 9-12; physical state changes are summarized in
  839. * OPAv1g1 spec., Table 6.4.
  840. */
  841. switch (logical_state) {
  842. case IB_PORT_NOP:
  843. if (phys_state == IB_PORTPHYSSTATE_NOP)
  844. break;
  845. /* FALLTHROUGH */
  846. case IB_PORT_DOWN:
  847. if (phys_state == IB_PORTPHYSSTATE_NOP) {
  848. link_state = HLS_DN_DOWNDEF;
  849. } else if (phys_state == IB_PORTPHYSSTATE_POLLING) {
  850. link_state = HLS_DN_POLL;
  851. set_link_down_reason(ppd, OPA_LINKDOWN_REASON_FM_BOUNCE,
  852. 0, OPA_LINKDOWN_REASON_FM_BOUNCE);
  853. } else if (phys_state == IB_PORTPHYSSTATE_DISABLED) {
  854. link_state = HLS_DN_DISABLE;
  855. } else {
  856. pr_warn("SubnSet(OPA_PortInfo) invalid physical state 0x%x\n",
  857. phys_state);
  858. smp->status |= IB_SMP_INVALID_FIELD;
  859. break;
  860. }
  861. if ((link_state == HLS_DN_POLL ||
  862. link_state == HLS_DN_DOWNDEF)) {
  863. /*
  864. * Going to poll. No matter what the current state,
  865. * always move offline first, then tune and start the
  866. * link. This correctly handles a FM link bounce and
  867. * a link enable. Going offline is a no-op if already
  868. * offline.
  869. */
  870. set_link_state(ppd, HLS_DN_OFFLINE);
  871. start_link(ppd);
  872. } else {
  873. set_link_state(ppd, link_state);
  874. }
  875. if (link_state == HLS_DN_DISABLE &&
  876. (ppd->offline_disabled_reason >
  877. HFI1_ODR_MASK(OPA_LINKDOWN_REASON_SMA_DISABLED) ||
  878. ppd->offline_disabled_reason ==
  879. HFI1_ODR_MASK(OPA_LINKDOWN_REASON_NONE)))
  880. ppd->offline_disabled_reason =
  881. HFI1_ODR_MASK(OPA_LINKDOWN_REASON_SMA_DISABLED);
  882. /*
  883. * Don't send a reply if the response would be sent
  884. * through the disabled port.
  885. */
  886. if (link_state == HLS_DN_DISABLE && smp->hop_cnt)
  887. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  888. break;
  889. case IB_PORT_ARMED:
  890. ret = set_link_state(ppd, HLS_UP_ARMED);
  891. if ((ret == 0) && (suppress_idle_sma == 0))
  892. send_idle_sma(dd, SMA_IDLE_ARM);
  893. break;
  894. case IB_PORT_ACTIVE:
  895. if (ppd->neighbor_normal) {
  896. ret = set_link_state(ppd, HLS_UP_ACTIVE);
  897. if (ret == 0)
  898. send_idle_sma(dd, SMA_IDLE_ACTIVE);
  899. } else {
  900. pr_warn("SubnSet(OPA_PortInfo) Cannot move to Active with NeighborNormal 0\n");
  901. smp->status |= IB_SMP_INVALID_FIELD;
  902. }
  903. break;
  904. default:
  905. pr_warn("SubnSet(OPA_PortInfo) invalid logical state 0x%x\n",
  906. logical_state);
  907. smp->status |= IB_SMP_INVALID_FIELD;
  908. }
  909. return 0;
  910. }
  911. /**
  912. * subn_set_opa_portinfo - set port information
  913. * @smp: the incoming SM packet
  914. * @ibdev: the infiniband device
  915. * @port: the port on the device
  916. *
  917. */
  918. static int __subn_set_opa_portinfo(struct opa_smp *smp, u32 am, u8 *data,
  919. struct ib_device *ibdev, u8 port,
  920. u32 *resp_len)
  921. {
  922. struct opa_port_info *pi = (struct opa_port_info *)data;
  923. struct ib_event event;
  924. struct hfi1_devdata *dd;
  925. struct hfi1_pportdata *ppd;
  926. struct hfi1_ibport *ibp;
  927. u8 clientrereg;
  928. unsigned long flags;
  929. u32 smlid, opa_lid; /* tmp vars to hold LID values */
  930. u16 lid;
  931. u8 ls_old, ls_new, ps_new;
  932. u8 vls;
  933. u8 msl;
  934. u8 crc_enabled;
  935. u16 lse, lwe, mtu;
  936. u32 num_ports = OPA_AM_NPORT(am);
  937. u32 start_of_sm_config = OPA_AM_START_SM_CFG(am);
  938. int ret, i, invalid = 0, call_set_mtu = 0;
  939. int call_link_downgrade_policy = 0;
  940. if (num_ports != 1) {
  941. smp->status |= IB_SMP_INVALID_FIELD;
  942. return reply((struct ib_mad_hdr *)smp);
  943. }
  944. opa_lid = be32_to_cpu(pi->lid);
  945. if (opa_lid & 0xFFFF0000) {
  946. pr_warn("OPA_PortInfo lid out of range: %X\n", opa_lid);
  947. smp->status |= IB_SMP_INVALID_FIELD;
  948. goto get_only;
  949. }
  950. lid = (u16)(opa_lid & 0x0000FFFF);
  951. smlid = be32_to_cpu(pi->sm_lid);
  952. if (smlid & 0xFFFF0000) {
  953. pr_warn("OPA_PortInfo SM lid out of range: %X\n", smlid);
  954. smp->status |= IB_SMP_INVALID_FIELD;
  955. goto get_only;
  956. }
  957. smlid &= 0x0000FFFF;
  958. clientrereg = (pi->clientrereg_subnettimeout &
  959. OPA_PI_MASK_CLIENT_REREGISTER);
  960. dd = dd_from_ibdev(ibdev);
  961. /* IB numbers ports from 1, hw from 0 */
  962. ppd = dd->pport + (port - 1);
  963. ibp = &ppd->ibport_data;
  964. event.device = ibdev;
  965. event.element.port_num = port;
  966. ls_old = driver_lstate(ppd);
  967. ibp->rvp.mkey = pi->mkey;
  968. ibp->rvp.gid_prefix = pi->subnet_prefix;
  969. ibp->rvp.mkey_lease_period = be16_to_cpu(pi->mkey_lease_period);
  970. /* Must be a valid unicast LID address. */
  971. if ((lid == 0 && ls_old > IB_PORT_INIT) ||
  972. lid >= be16_to_cpu(IB_MULTICAST_LID_BASE)) {
  973. smp->status |= IB_SMP_INVALID_FIELD;
  974. pr_warn("SubnSet(OPA_PortInfo) lid invalid 0x%x\n",
  975. lid);
  976. } else if (ppd->lid != lid ||
  977. ppd->lmc != (pi->mkeyprotect_lmc & OPA_PI_MASK_LMC)) {
  978. if (ppd->lid != lid)
  979. hfi1_set_uevent_bits(ppd, _HFI1_EVENT_LID_CHANGE_BIT);
  980. if (ppd->lmc != (pi->mkeyprotect_lmc & OPA_PI_MASK_LMC))
  981. hfi1_set_uevent_bits(ppd, _HFI1_EVENT_LMC_CHANGE_BIT);
  982. hfi1_set_lid(ppd, lid, pi->mkeyprotect_lmc & OPA_PI_MASK_LMC);
  983. event.event = IB_EVENT_LID_CHANGE;
  984. ib_dispatch_event(&event);
  985. }
  986. msl = pi->smsl & OPA_PI_MASK_SMSL;
  987. if (pi->partenforce_filterraw & OPA_PI_MASK_LINKINIT_REASON)
  988. ppd->linkinit_reason =
  989. (pi->partenforce_filterraw &
  990. OPA_PI_MASK_LINKINIT_REASON);
  991. /* enable/disable SW pkey checking as per FM control */
  992. if (pi->partenforce_filterraw & OPA_PI_MASK_PARTITION_ENFORCE_IN)
  993. ppd->part_enforce |= HFI1_PART_ENFORCE_IN;
  994. else
  995. ppd->part_enforce &= ~HFI1_PART_ENFORCE_IN;
  996. if (pi->partenforce_filterraw & OPA_PI_MASK_PARTITION_ENFORCE_OUT)
  997. ppd->part_enforce |= HFI1_PART_ENFORCE_OUT;
  998. else
  999. ppd->part_enforce &= ~HFI1_PART_ENFORCE_OUT;
  1000. /* Must be a valid unicast LID address. */
  1001. if ((smlid == 0 && ls_old > IB_PORT_INIT) ||
  1002. smlid >= be16_to_cpu(IB_MULTICAST_LID_BASE)) {
  1003. smp->status |= IB_SMP_INVALID_FIELD;
  1004. pr_warn("SubnSet(OPA_PortInfo) smlid invalid 0x%x\n", smlid);
  1005. } else if (smlid != ibp->rvp.sm_lid || msl != ibp->rvp.sm_sl) {
  1006. pr_warn("SubnSet(OPA_PortInfo) smlid 0x%x\n", smlid);
  1007. spin_lock_irqsave(&ibp->rvp.lock, flags);
  1008. if (ibp->rvp.sm_ah) {
  1009. if (smlid != ibp->rvp.sm_lid)
  1010. ibp->rvp.sm_ah->attr.dlid = smlid;
  1011. if (msl != ibp->rvp.sm_sl)
  1012. ibp->rvp.sm_ah->attr.sl = msl;
  1013. }
  1014. spin_unlock_irqrestore(&ibp->rvp.lock, flags);
  1015. if (smlid != ibp->rvp.sm_lid)
  1016. ibp->rvp.sm_lid = smlid;
  1017. if (msl != ibp->rvp.sm_sl)
  1018. ibp->rvp.sm_sl = msl;
  1019. event.event = IB_EVENT_SM_CHANGE;
  1020. ib_dispatch_event(&event);
  1021. }
  1022. if (pi->link_down_reason == 0) {
  1023. ppd->local_link_down_reason.sma = 0;
  1024. ppd->local_link_down_reason.latest = 0;
  1025. }
  1026. if (pi->neigh_link_down_reason == 0) {
  1027. ppd->neigh_link_down_reason.sma = 0;
  1028. ppd->neigh_link_down_reason.latest = 0;
  1029. }
  1030. ppd->sm_trap_qp = be32_to_cpu(pi->sm_trap_qp);
  1031. ppd->sa_qp = be32_to_cpu(pi->sa_qp);
  1032. ppd->port_error_action = be32_to_cpu(pi->port_error_action);
  1033. lwe = be16_to_cpu(pi->link_width.enabled);
  1034. if (lwe) {
  1035. if (lwe == OPA_LINK_WIDTH_RESET ||
  1036. lwe == OPA_LINK_WIDTH_RESET_OLD)
  1037. set_link_width_enabled(ppd, ppd->link_width_supported);
  1038. else if ((lwe & ~ppd->link_width_supported) == 0)
  1039. set_link_width_enabled(ppd, lwe);
  1040. else
  1041. smp->status |= IB_SMP_INVALID_FIELD;
  1042. }
  1043. lwe = be16_to_cpu(pi->link_width_downgrade.enabled);
  1044. /* LWD.E is always applied - 0 means "disabled" */
  1045. if (lwe == OPA_LINK_WIDTH_RESET ||
  1046. lwe == OPA_LINK_WIDTH_RESET_OLD) {
  1047. set_link_width_downgrade_enabled(ppd,
  1048. ppd->
  1049. link_width_downgrade_supported
  1050. );
  1051. } else if ((lwe & ~ppd->link_width_downgrade_supported) == 0) {
  1052. /* only set and apply if something changed */
  1053. if (lwe != ppd->link_width_downgrade_enabled) {
  1054. set_link_width_downgrade_enabled(ppd, lwe);
  1055. call_link_downgrade_policy = 1;
  1056. }
  1057. } else {
  1058. smp->status |= IB_SMP_INVALID_FIELD;
  1059. }
  1060. lse = be16_to_cpu(pi->link_speed.enabled);
  1061. if (lse) {
  1062. if (lse & be16_to_cpu(pi->link_speed.supported))
  1063. set_link_speed_enabled(ppd, lse);
  1064. else
  1065. smp->status |= IB_SMP_INVALID_FIELD;
  1066. }
  1067. ibp->rvp.mkeyprot =
  1068. (pi->mkeyprotect_lmc & OPA_PI_MASK_MKEY_PROT_BIT) >> 6;
  1069. ibp->rvp.vl_high_limit = be16_to_cpu(pi->vl.high_limit) & 0xFF;
  1070. (void)hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_VL_HIGH_LIMIT,
  1071. ibp->rvp.vl_high_limit);
  1072. if (ppd->vls_supported / 2 > ARRAY_SIZE(pi->neigh_mtu.pvlx_to_mtu) ||
  1073. ppd->vls_supported > ARRAY_SIZE(dd->vld)) {
  1074. smp->status |= IB_SMP_INVALID_FIELD;
  1075. return reply((struct ib_mad_hdr *)smp);
  1076. }
  1077. for (i = 0; i < ppd->vls_supported; i++) {
  1078. if ((i % 2) == 0)
  1079. mtu = enum_to_mtu((pi->neigh_mtu.pvlx_to_mtu[i / 2] >>
  1080. 4) & 0xF);
  1081. else
  1082. mtu = enum_to_mtu(pi->neigh_mtu.pvlx_to_mtu[i / 2] &
  1083. 0xF);
  1084. if (mtu == 0xffff) {
  1085. pr_warn("SubnSet(OPA_PortInfo) mtu invalid %d (0x%x)\n",
  1086. mtu,
  1087. (pi->neigh_mtu.pvlx_to_mtu[0] >> 4) & 0xF);
  1088. smp->status |= IB_SMP_INVALID_FIELD;
  1089. mtu = hfi1_max_mtu; /* use a valid MTU */
  1090. }
  1091. if (dd->vld[i].mtu != mtu) {
  1092. dd_dev_info(dd,
  1093. "MTU change on vl %d from %d to %d\n",
  1094. i, dd->vld[i].mtu, mtu);
  1095. dd->vld[i].mtu = mtu;
  1096. call_set_mtu++;
  1097. }
  1098. }
  1099. /* As per OPAV1 spec: VL15 must support and be configured
  1100. * for operation with a 2048 or larger MTU.
  1101. */
  1102. mtu = enum_to_mtu(pi->neigh_mtu.pvlx_to_mtu[15 / 2] & 0xF);
  1103. if (mtu < 2048 || mtu == 0xffff)
  1104. mtu = 2048;
  1105. if (dd->vld[15].mtu != mtu) {
  1106. dd_dev_info(dd,
  1107. "MTU change on vl 15 from %d to %d\n",
  1108. dd->vld[15].mtu, mtu);
  1109. dd->vld[15].mtu = mtu;
  1110. call_set_mtu++;
  1111. }
  1112. if (call_set_mtu)
  1113. set_mtu(ppd);
  1114. /* Set operational VLs */
  1115. vls = pi->operational_vls & OPA_PI_MASK_OPERATIONAL_VL;
  1116. if (vls) {
  1117. if (vls > ppd->vls_supported) {
  1118. pr_warn("SubnSet(OPA_PortInfo) VL's supported invalid %d\n",
  1119. pi->operational_vls);
  1120. smp->status |= IB_SMP_INVALID_FIELD;
  1121. } else {
  1122. if (hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_OP_VLS,
  1123. vls) == -EINVAL)
  1124. smp->status |= IB_SMP_INVALID_FIELD;
  1125. }
  1126. }
  1127. if (pi->mkey_violations == 0)
  1128. ibp->rvp.mkey_violations = 0;
  1129. if (pi->pkey_violations == 0)
  1130. ibp->rvp.pkey_violations = 0;
  1131. if (pi->qkey_violations == 0)
  1132. ibp->rvp.qkey_violations = 0;
  1133. ibp->rvp.subnet_timeout =
  1134. pi->clientrereg_subnettimeout & OPA_PI_MASK_SUBNET_TIMEOUT;
  1135. crc_enabled = be16_to_cpu(pi->port_ltp_crc_mode);
  1136. crc_enabled >>= 4;
  1137. crc_enabled &= 0xf;
  1138. if (crc_enabled != 0)
  1139. ppd->port_crc_mode_enabled = port_ltp_to_cap(crc_enabled);
  1140. ppd->is_active_optimize_enabled =
  1141. !!(be16_to_cpu(pi->port_mode)
  1142. & OPA_PI_MASK_PORT_ACTIVE_OPTOMIZE);
  1143. ls_new = pi->port_states.portphysstate_portstate &
  1144. OPA_PI_MASK_PORT_STATE;
  1145. ps_new = (pi->port_states.portphysstate_portstate &
  1146. OPA_PI_MASK_PORT_PHYSICAL_STATE) >> 4;
  1147. if (ls_old == IB_PORT_INIT) {
  1148. if (start_of_sm_config) {
  1149. if (ls_new == ls_old || (ls_new == IB_PORT_ARMED))
  1150. ppd->is_sm_config_started = 1;
  1151. } else if (ls_new == IB_PORT_ARMED) {
  1152. if (ppd->is_sm_config_started == 0)
  1153. invalid = 1;
  1154. }
  1155. }
  1156. /* Handle CLIENT_REREGISTER event b/c SM asked us for it */
  1157. if (clientrereg) {
  1158. event.event = IB_EVENT_CLIENT_REREGISTER;
  1159. ib_dispatch_event(&event);
  1160. }
  1161. /*
  1162. * Do the port state change now that the other link parameters
  1163. * have been set.
  1164. * Changing the port physical state only makes sense if the link
  1165. * is down or is being set to down.
  1166. */
  1167. ret = set_port_states(ppd, smp, ls_new, ps_new, invalid);
  1168. if (ret)
  1169. return ret;
  1170. ret = __subn_get_opa_portinfo(smp, am, data, ibdev, port, resp_len);
  1171. /* restore re-reg bit per o14-12.2.1 */
  1172. pi->clientrereg_subnettimeout |= clientrereg;
  1173. /*
  1174. * Apply the new link downgrade policy. This may result in a link
  1175. * bounce. Do this after everything else so things are settled.
  1176. * Possible problem: if setting the port state above fails, then
  1177. * the policy change is not applied.
  1178. */
  1179. if (call_link_downgrade_policy)
  1180. apply_link_downgrade_policy(ppd, 0);
  1181. return ret;
  1182. get_only:
  1183. return __subn_get_opa_portinfo(smp, am, data, ibdev, port, resp_len);
  1184. }
  1185. /**
  1186. * set_pkeys - set the PKEY table for ctxt 0
  1187. * @dd: the hfi1_ib device
  1188. * @port: the IB port number
  1189. * @pkeys: the PKEY table
  1190. */
  1191. static int set_pkeys(struct hfi1_devdata *dd, u8 port, u16 *pkeys)
  1192. {
  1193. struct hfi1_pportdata *ppd;
  1194. int i;
  1195. int changed = 0;
  1196. int update_includes_mgmt_partition = 0;
  1197. /*
  1198. * IB port one/two always maps to context zero/one,
  1199. * always a kernel context, no locking needed
  1200. * If we get here with ppd setup, no need to check
  1201. * that rcd is valid.
  1202. */
  1203. ppd = dd->pport + (port - 1);
  1204. /*
  1205. * If the update does not include the management pkey, don't do it.
  1206. */
  1207. for (i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
  1208. if (pkeys[i] == LIM_MGMT_P_KEY) {
  1209. update_includes_mgmt_partition = 1;
  1210. break;
  1211. }
  1212. }
  1213. if (!update_includes_mgmt_partition)
  1214. return 1;
  1215. for (i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
  1216. u16 key = pkeys[i];
  1217. u16 okey = ppd->pkeys[i];
  1218. if (key == okey)
  1219. continue;
  1220. /*
  1221. * The SM gives us the complete PKey table. We have
  1222. * to ensure that we put the PKeys in the matching
  1223. * slots.
  1224. */
  1225. ppd->pkeys[i] = key;
  1226. changed = 1;
  1227. }
  1228. if (changed) {
  1229. (void)hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_PKEYS, 0);
  1230. hfi1_event_pkey_change(dd, port);
  1231. }
  1232. return 0;
  1233. }
  1234. static int __subn_set_opa_pkeytable(struct opa_smp *smp, u32 am, u8 *data,
  1235. struct ib_device *ibdev, u8 port,
  1236. u32 *resp_len)
  1237. {
  1238. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  1239. u32 n_blocks_sent = OPA_AM_NBLK(am);
  1240. u32 start_block = am & 0x7ff;
  1241. u16 *p = (u16 *)data;
  1242. __be16 *q = (__be16 *)data;
  1243. int i;
  1244. u16 n_blocks_avail;
  1245. unsigned npkeys = hfi1_get_npkeys(dd);
  1246. if (n_blocks_sent == 0) {
  1247. pr_warn("OPA Get PKey AM Invalid : P = %d; B = 0x%x; N = 0x%x\n",
  1248. port, start_block, n_blocks_sent);
  1249. smp->status |= IB_SMP_INVALID_FIELD;
  1250. return reply((struct ib_mad_hdr *)smp);
  1251. }
  1252. n_blocks_avail = (u16)(npkeys / OPA_PARTITION_TABLE_BLK_SIZE) + 1;
  1253. if (start_block + n_blocks_sent > n_blocks_avail ||
  1254. n_blocks_sent > OPA_NUM_PKEY_BLOCKS_PER_SMP) {
  1255. pr_warn("OPA Set PKey AM Invalid : s 0x%x; req 0x%x; avail 0x%x; blk/smp 0x%lx\n",
  1256. start_block, n_blocks_sent, n_blocks_avail,
  1257. OPA_NUM_PKEY_BLOCKS_PER_SMP);
  1258. smp->status |= IB_SMP_INVALID_FIELD;
  1259. return reply((struct ib_mad_hdr *)smp);
  1260. }
  1261. for (i = 0; i < n_blocks_sent * OPA_PARTITION_TABLE_BLK_SIZE; i++)
  1262. p[i] = be16_to_cpu(q[i]);
  1263. if (start_block == 0 && set_pkeys(dd, port, p) != 0) {
  1264. smp->status |= IB_SMP_INVALID_FIELD;
  1265. return reply((struct ib_mad_hdr *)smp);
  1266. }
  1267. return __subn_get_opa_pkeytable(smp, am, data, ibdev, port, resp_len);
  1268. }
  1269. static int get_sc2vlt_tables(struct hfi1_devdata *dd, void *data)
  1270. {
  1271. u64 *val = data;
  1272. *val++ = read_csr(dd, SEND_SC2VLT0);
  1273. *val++ = read_csr(dd, SEND_SC2VLT1);
  1274. *val++ = read_csr(dd, SEND_SC2VLT2);
  1275. *val++ = read_csr(dd, SEND_SC2VLT3);
  1276. return 0;
  1277. }
  1278. #define ILLEGAL_VL 12
  1279. /*
  1280. * filter_sc2vlt changes mappings to VL15 to ILLEGAL_VL (except
  1281. * for SC15, which must map to VL15). If we don't remap things this
  1282. * way it is possible for VL15 counters to increment when we try to
  1283. * send on a SC which is mapped to an invalid VL.
  1284. */
  1285. static void filter_sc2vlt(void *data)
  1286. {
  1287. int i;
  1288. u8 *pd = data;
  1289. for (i = 0; i < OPA_MAX_SCS; i++) {
  1290. if (i == 15)
  1291. continue;
  1292. if ((pd[i] & 0x1f) == 0xf)
  1293. pd[i] = ILLEGAL_VL;
  1294. }
  1295. }
  1296. static int set_sc2vlt_tables(struct hfi1_devdata *dd, void *data)
  1297. {
  1298. u64 *val = data;
  1299. filter_sc2vlt(data);
  1300. write_csr(dd, SEND_SC2VLT0, *val++);
  1301. write_csr(dd, SEND_SC2VLT1, *val++);
  1302. write_csr(dd, SEND_SC2VLT2, *val++);
  1303. write_csr(dd, SEND_SC2VLT3, *val++);
  1304. write_seqlock_irq(&dd->sc2vl_lock);
  1305. memcpy(dd->sc2vl, data, sizeof(dd->sc2vl));
  1306. write_sequnlock_irq(&dd->sc2vl_lock);
  1307. return 0;
  1308. }
  1309. static int __subn_get_opa_sl_to_sc(struct opa_smp *smp, u32 am, u8 *data,
  1310. struct ib_device *ibdev, u8 port,
  1311. u32 *resp_len)
  1312. {
  1313. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  1314. u8 *p = data;
  1315. size_t size = ARRAY_SIZE(ibp->sl_to_sc); /* == 32 */
  1316. unsigned i;
  1317. if (am) {
  1318. smp->status |= IB_SMP_INVALID_FIELD;
  1319. return reply((struct ib_mad_hdr *)smp);
  1320. }
  1321. for (i = 0; i < ARRAY_SIZE(ibp->sl_to_sc); i++)
  1322. *p++ = ibp->sl_to_sc[i];
  1323. if (resp_len)
  1324. *resp_len += size;
  1325. return reply((struct ib_mad_hdr *)smp);
  1326. }
  1327. static int __subn_set_opa_sl_to_sc(struct opa_smp *smp, u32 am, u8 *data,
  1328. struct ib_device *ibdev, u8 port,
  1329. u32 *resp_len)
  1330. {
  1331. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  1332. u8 *p = data;
  1333. int i;
  1334. u8 sc;
  1335. if (am) {
  1336. smp->status |= IB_SMP_INVALID_FIELD;
  1337. return reply((struct ib_mad_hdr *)smp);
  1338. }
  1339. for (i = 0; i < ARRAY_SIZE(ibp->sl_to_sc); i++) {
  1340. sc = *p++;
  1341. if (ibp->sl_to_sc[i] != sc) {
  1342. ibp->sl_to_sc[i] = sc;
  1343. /* Put all stale qps into error state */
  1344. hfi1_error_port_qps(ibp, i);
  1345. }
  1346. }
  1347. return __subn_get_opa_sl_to_sc(smp, am, data, ibdev, port, resp_len);
  1348. }
  1349. static int __subn_get_opa_sc_to_sl(struct opa_smp *smp, u32 am, u8 *data,
  1350. struct ib_device *ibdev, u8 port,
  1351. u32 *resp_len)
  1352. {
  1353. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  1354. u8 *p = data;
  1355. size_t size = ARRAY_SIZE(ibp->sc_to_sl); /* == 32 */
  1356. unsigned i;
  1357. if (am) {
  1358. smp->status |= IB_SMP_INVALID_FIELD;
  1359. return reply((struct ib_mad_hdr *)smp);
  1360. }
  1361. for (i = 0; i < ARRAY_SIZE(ibp->sc_to_sl); i++)
  1362. *p++ = ibp->sc_to_sl[i];
  1363. if (resp_len)
  1364. *resp_len += size;
  1365. return reply((struct ib_mad_hdr *)smp);
  1366. }
  1367. static int __subn_set_opa_sc_to_sl(struct opa_smp *smp, u32 am, u8 *data,
  1368. struct ib_device *ibdev, u8 port,
  1369. u32 *resp_len)
  1370. {
  1371. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  1372. u8 *p = data;
  1373. int i;
  1374. if (am) {
  1375. smp->status |= IB_SMP_INVALID_FIELD;
  1376. return reply((struct ib_mad_hdr *)smp);
  1377. }
  1378. for (i = 0; i < ARRAY_SIZE(ibp->sc_to_sl); i++)
  1379. ibp->sc_to_sl[i] = *p++;
  1380. return __subn_get_opa_sc_to_sl(smp, am, data, ibdev, port, resp_len);
  1381. }
  1382. static int __subn_get_opa_sc_to_vlt(struct opa_smp *smp, u32 am, u8 *data,
  1383. struct ib_device *ibdev, u8 port,
  1384. u32 *resp_len)
  1385. {
  1386. u32 n_blocks = OPA_AM_NBLK(am);
  1387. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  1388. void *vp = (void *)data;
  1389. size_t size = 4 * sizeof(u64);
  1390. if (n_blocks != 1) {
  1391. smp->status |= IB_SMP_INVALID_FIELD;
  1392. return reply((struct ib_mad_hdr *)smp);
  1393. }
  1394. get_sc2vlt_tables(dd, vp);
  1395. if (resp_len)
  1396. *resp_len += size;
  1397. return reply((struct ib_mad_hdr *)smp);
  1398. }
  1399. static int __subn_set_opa_sc_to_vlt(struct opa_smp *smp, u32 am, u8 *data,
  1400. struct ib_device *ibdev, u8 port,
  1401. u32 *resp_len)
  1402. {
  1403. u32 n_blocks = OPA_AM_NBLK(am);
  1404. int async_update = OPA_AM_ASYNC(am);
  1405. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  1406. void *vp = (void *)data;
  1407. struct hfi1_pportdata *ppd;
  1408. int lstate;
  1409. if (n_blocks != 1 || async_update) {
  1410. smp->status |= IB_SMP_INVALID_FIELD;
  1411. return reply((struct ib_mad_hdr *)smp);
  1412. }
  1413. /* IB numbers ports from 1, hw from 0 */
  1414. ppd = dd->pport + (port - 1);
  1415. lstate = driver_lstate(ppd);
  1416. /*
  1417. * it's known that async_update is 0 by this point, but include
  1418. * the explicit check for clarity
  1419. */
  1420. if (!async_update &&
  1421. (lstate == IB_PORT_ARMED || lstate == IB_PORT_ACTIVE)) {
  1422. smp->status |= IB_SMP_INVALID_FIELD;
  1423. return reply((struct ib_mad_hdr *)smp);
  1424. }
  1425. set_sc2vlt_tables(dd, vp);
  1426. return __subn_get_opa_sc_to_vlt(smp, am, data, ibdev, port, resp_len);
  1427. }
  1428. static int __subn_get_opa_sc_to_vlnt(struct opa_smp *smp, u32 am, u8 *data,
  1429. struct ib_device *ibdev, u8 port,
  1430. u32 *resp_len)
  1431. {
  1432. u32 n_blocks = OPA_AM_NPORT(am);
  1433. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  1434. struct hfi1_pportdata *ppd;
  1435. void *vp = (void *)data;
  1436. int size;
  1437. if (n_blocks != 1) {
  1438. smp->status |= IB_SMP_INVALID_FIELD;
  1439. return reply((struct ib_mad_hdr *)smp);
  1440. }
  1441. ppd = dd->pport + (port - 1);
  1442. size = fm_get_table(ppd, FM_TBL_SC2VLNT, vp);
  1443. if (resp_len)
  1444. *resp_len += size;
  1445. return reply((struct ib_mad_hdr *)smp);
  1446. }
  1447. static int __subn_set_opa_sc_to_vlnt(struct opa_smp *smp, u32 am, u8 *data,
  1448. struct ib_device *ibdev, u8 port,
  1449. u32 *resp_len)
  1450. {
  1451. u32 n_blocks = OPA_AM_NPORT(am);
  1452. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  1453. struct hfi1_pportdata *ppd;
  1454. void *vp = (void *)data;
  1455. int lstate;
  1456. if (n_blocks != 1) {
  1457. smp->status |= IB_SMP_INVALID_FIELD;
  1458. return reply((struct ib_mad_hdr *)smp);
  1459. }
  1460. /* IB numbers ports from 1, hw from 0 */
  1461. ppd = dd->pport + (port - 1);
  1462. lstate = driver_lstate(ppd);
  1463. if (lstate == IB_PORT_ARMED || lstate == IB_PORT_ACTIVE) {
  1464. smp->status |= IB_SMP_INVALID_FIELD;
  1465. return reply((struct ib_mad_hdr *)smp);
  1466. }
  1467. ppd = dd->pport + (port - 1);
  1468. fm_set_table(ppd, FM_TBL_SC2VLNT, vp);
  1469. return __subn_get_opa_sc_to_vlnt(smp, am, data, ibdev, port,
  1470. resp_len);
  1471. }
  1472. static int __subn_get_opa_psi(struct opa_smp *smp, u32 am, u8 *data,
  1473. struct ib_device *ibdev, u8 port,
  1474. u32 *resp_len)
  1475. {
  1476. u32 nports = OPA_AM_NPORT(am);
  1477. u32 start_of_sm_config = OPA_AM_START_SM_CFG(am);
  1478. u32 lstate;
  1479. struct hfi1_ibport *ibp;
  1480. struct hfi1_pportdata *ppd;
  1481. struct opa_port_state_info *psi = (struct opa_port_state_info *)data;
  1482. if (nports != 1) {
  1483. smp->status |= IB_SMP_INVALID_FIELD;
  1484. return reply((struct ib_mad_hdr *)smp);
  1485. }
  1486. ibp = to_iport(ibdev, port);
  1487. ppd = ppd_from_ibp(ibp);
  1488. lstate = driver_lstate(ppd);
  1489. if (start_of_sm_config && (lstate == IB_PORT_INIT))
  1490. ppd->is_sm_config_started = 1;
  1491. psi->port_states.ledenable_offlinereason = ppd->neighbor_normal << 4;
  1492. psi->port_states.ledenable_offlinereason |=
  1493. ppd->is_sm_config_started << 5;
  1494. psi->port_states.ledenable_offlinereason |=
  1495. ppd->offline_disabled_reason;
  1496. psi->port_states.portphysstate_portstate =
  1497. (hfi1_ibphys_portstate(ppd) << 4) | (lstate & 0xf);
  1498. psi->link_width_downgrade_tx_active =
  1499. cpu_to_be16(ppd->link_width_downgrade_tx_active);
  1500. psi->link_width_downgrade_rx_active =
  1501. cpu_to_be16(ppd->link_width_downgrade_rx_active);
  1502. if (resp_len)
  1503. *resp_len += sizeof(struct opa_port_state_info);
  1504. return reply((struct ib_mad_hdr *)smp);
  1505. }
  1506. static int __subn_set_opa_psi(struct opa_smp *smp, u32 am, u8 *data,
  1507. struct ib_device *ibdev, u8 port,
  1508. u32 *resp_len)
  1509. {
  1510. u32 nports = OPA_AM_NPORT(am);
  1511. u32 start_of_sm_config = OPA_AM_START_SM_CFG(am);
  1512. u32 ls_old;
  1513. u8 ls_new, ps_new;
  1514. struct hfi1_ibport *ibp;
  1515. struct hfi1_pportdata *ppd;
  1516. struct opa_port_state_info *psi = (struct opa_port_state_info *)data;
  1517. int ret, invalid = 0;
  1518. if (nports != 1) {
  1519. smp->status |= IB_SMP_INVALID_FIELD;
  1520. return reply((struct ib_mad_hdr *)smp);
  1521. }
  1522. ibp = to_iport(ibdev, port);
  1523. ppd = ppd_from_ibp(ibp);
  1524. ls_old = driver_lstate(ppd);
  1525. ls_new = port_states_to_logical_state(&psi->port_states);
  1526. ps_new = port_states_to_phys_state(&psi->port_states);
  1527. if (ls_old == IB_PORT_INIT) {
  1528. if (start_of_sm_config) {
  1529. if (ls_new == ls_old || (ls_new == IB_PORT_ARMED))
  1530. ppd->is_sm_config_started = 1;
  1531. } else if (ls_new == IB_PORT_ARMED) {
  1532. if (ppd->is_sm_config_started == 0)
  1533. invalid = 1;
  1534. }
  1535. }
  1536. ret = set_port_states(ppd, smp, ls_new, ps_new, invalid);
  1537. if (ret)
  1538. return ret;
  1539. if (invalid)
  1540. smp->status |= IB_SMP_INVALID_FIELD;
  1541. return __subn_get_opa_psi(smp, am, data, ibdev, port, resp_len);
  1542. }
  1543. static int __subn_get_opa_cable_info(struct opa_smp *smp, u32 am, u8 *data,
  1544. struct ib_device *ibdev, u8 port,
  1545. u32 *resp_len)
  1546. {
  1547. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  1548. u32 addr = OPA_AM_CI_ADDR(am);
  1549. u32 len = OPA_AM_CI_LEN(am) + 1;
  1550. int ret;
  1551. if (dd->pport->port_type != PORT_TYPE_QSFP) {
  1552. smp->status |= IB_SMP_INVALID_FIELD;
  1553. return reply((struct ib_mad_hdr *)smp);
  1554. }
  1555. #define __CI_PAGE_SIZE BIT(7) /* 128 bytes */
  1556. #define __CI_PAGE_MASK ~(__CI_PAGE_SIZE - 1)
  1557. #define __CI_PAGE_NUM(a) ((a) & __CI_PAGE_MASK)
  1558. /*
  1559. * check that addr is within spec, and
  1560. * addr and (addr + len - 1) are on the same "page"
  1561. */
  1562. if (addr >= 4096 ||
  1563. (__CI_PAGE_NUM(addr) != __CI_PAGE_NUM(addr + len - 1))) {
  1564. smp->status |= IB_SMP_INVALID_FIELD;
  1565. return reply((struct ib_mad_hdr *)smp);
  1566. }
  1567. ret = get_cable_info(dd, port, addr, len, data);
  1568. if (ret == -ENODEV) {
  1569. smp->status |= IB_SMP_UNSUP_METH_ATTR;
  1570. return reply((struct ib_mad_hdr *)smp);
  1571. }
  1572. /* The address range for the CableInfo SMA query is wider than the
  1573. * memory available on the QSFP cable. We want to return a valid
  1574. * response, albeit zeroed out, for address ranges beyond available
  1575. * memory but that are within the CableInfo query spec
  1576. */
  1577. if (ret < 0 && ret != -ERANGE) {
  1578. smp->status |= IB_SMP_INVALID_FIELD;
  1579. return reply((struct ib_mad_hdr *)smp);
  1580. }
  1581. if (resp_len)
  1582. *resp_len += len;
  1583. return reply((struct ib_mad_hdr *)smp);
  1584. }
  1585. static int __subn_get_opa_bct(struct opa_smp *smp, u32 am, u8 *data,
  1586. struct ib_device *ibdev, u8 port, u32 *resp_len)
  1587. {
  1588. u32 num_ports = OPA_AM_NPORT(am);
  1589. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  1590. struct hfi1_pportdata *ppd;
  1591. struct buffer_control *p = (struct buffer_control *)data;
  1592. int size;
  1593. if (num_ports != 1) {
  1594. smp->status |= IB_SMP_INVALID_FIELD;
  1595. return reply((struct ib_mad_hdr *)smp);
  1596. }
  1597. ppd = dd->pport + (port - 1);
  1598. size = fm_get_table(ppd, FM_TBL_BUFFER_CONTROL, p);
  1599. trace_bct_get(dd, p);
  1600. if (resp_len)
  1601. *resp_len += size;
  1602. return reply((struct ib_mad_hdr *)smp);
  1603. }
  1604. static int __subn_set_opa_bct(struct opa_smp *smp, u32 am, u8 *data,
  1605. struct ib_device *ibdev, u8 port, u32 *resp_len)
  1606. {
  1607. u32 num_ports = OPA_AM_NPORT(am);
  1608. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  1609. struct hfi1_pportdata *ppd;
  1610. struct buffer_control *p = (struct buffer_control *)data;
  1611. if (num_ports != 1) {
  1612. smp->status |= IB_SMP_INVALID_FIELD;
  1613. return reply((struct ib_mad_hdr *)smp);
  1614. }
  1615. ppd = dd->pport + (port - 1);
  1616. trace_bct_set(dd, p);
  1617. if (fm_set_table(ppd, FM_TBL_BUFFER_CONTROL, p) < 0) {
  1618. smp->status |= IB_SMP_INVALID_FIELD;
  1619. return reply((struct ib_mad_hdr *)smp);
  1620. }
  1621. return __subn_get_opa_bct(smp, am, data, ibdev, port, resp_len);
  1622. }
  1623. static int __subn_get_opa_vl_arb(struct opa_smp *smp, u32 am, u8 *data,
  1624. struct ib_device *ibdev, u8 port,
  1625. u32 *resp_len)
  1626. {
  1627. struct hfi1_pportdata *ppd = ppd_from_ibp(to_iport(ibdev, port));
  1628. u32 num_ports = OPA_AM_NPORT(am);
  1629. u8 section = (am & 0x00ff0000) >> 16;
  1630. u8 *p = data;
  1631. int size = 0;
  1632. if (num_ports != 1) {
  1633. smp->status |= IB_SMP_INVALID_FIELD;
  1634. return reply((struct ib_mad_hdr *)smp);
  1635. }
  1636. switch (section) {
  1637. case OPA_VLARB_LOW_ELEMENTS:
  1638. size = fm_get_table(ppd, FM_TBL_VL_LOW_ARB, p);
  1639. break;
  1640. case OPA_VLARB_HIGH_ELEMENTS:
  1641. size = fm_get_table(ppd, FM_TBL_VL_HIGH_ARB, p);
  1642. break;
  1643. case OPA_VLARB_PREEMPT_ELEMENTS:
  1644. size = fm_get_table(ppd, FM_TBL_VL_PREEMPT_ELEMS, p);
  1645. break;
  1646. case OPA_VLARB_PREEMPT_MATRIX:
  1647. size = fm_get_table(ppd, FM_TBL_VL_PREEMPT_MATRIX, p);
  1648. break;
  1649. default:
  1650. pr_warn("OPA SubnGet(VL Arb) AM Invalid : 0x%x\n",
  1651. be32_to_cpu(smp->attr_mod));
  1652. smp->status |= IB_SMP_INVALID_FIELD;
  1653. break;
  1654. }
  1655. if (size > 0 && resp_len)
  1656. *resp_len += size;
  1657. return reply((struct ib_mad_hdr *)smp);
  1658. }
  1659. static int __subn_set_opa_vl_arb(struct opa_smp *smp, u32 am, u8 *data,
  1660. struct ib_device *ibdev, u8 port,
  1661. u32 *resp_len)
  1662. {
  1663. struct hfi1_pportdata *ppd = ppd_from_ibp(to_iport(ibdev, port));
  1664. u32 num_ports = OPA_AM_NPORT(am);
  1665. u8 section = (am & 0x00ff0000) >> 16;
  1666. u8 *p = data;
  1667. if (num_ports != 1) {
  1668. smp->status |= IB_SMP_INVALID_FIELD;
  1669. return reply((struct ib_mad_hdr *)smp);
  1670. }
  1671. switch (section) {
  1672. case OPA_VLARB_LOW_ELEMENTS:
  1673. (void)fm_set_table(ppd, FM_TBL_VL_LOW_ARB, p);
  1674. break;
  1675. case OPA_VLARB_HIGH_ELEMENTS:
  1676. (void)fm_set_table(ppd, FM_TBL_VL_HIGH_ARB, p);
  1677. break;
  1678. /*
  1679. * neither OPA_VLARB_PREEMPT_ELEMENTS, or OPA_VLARB_PREEMPT_MATRIX
  1680. * can be changed from the default values
  1681. */
  1682. case OPA_VLARB_PREEMPT_ELEMENTS:
  1683. /* FALLTHROUGH */
  1684. case OPA_VLARB_PREEMPT_MATRIX:
  1685. smp->status |= IB_SMP_UNSUP_METH_ATTR;
  1686. break;
  1687. default:
  1688. pr_warn("OPA SubnSet(VL Arb) AM Invalid : 0x%x\n",
  1689. be32_to_cpu(smp->attr_mod));
  1690. smp->status |= IB_SMP_INVALID_FIELD;
  1691. break;
  1692. }
  1693. return __subn_get_opa_vl_arb(smp, am, data, ibdev, port, resp_len);
  1694. }
  1695. struct opa_pma_mad {
  1696. struct ib_mad_hdr mad_hdr;
  1697. u8 data[2024];
  1698. } __packed;
  1699. struct opa_class_port_info {
  1700. u8 base_version;
  1701. u8 class_version;
  1702. __be16 cap_mask;
  1703. __be32 cap_mask2_resp_time;
  1704. u8 redirect_gid[16];
  1705. __be32 redirect_tc_fl;
  1706. __be32 redirect_lid;
  1707. __be32 redirect_sl_qp;
  1708. __be32 redirect_qkey;
  1709. u8 trap_gid[16];
  1710. __be32 trap_tc_fl;
  1711. __be32 trap_lid;
  1712. __be32 trap_hl_qp;
  1713. __be32 trap_qkey;
  1714. __be16 trap_pkey;
  1715. __be16 redirect_pkey;
  1716. u8 trap_sl_rsvd;
  1717. u8 reserved[3];
  1718. } __packed;
  1719. struct opa_port_status_req {
  1720. __u8 port_num;
  1721. __u8 reserved[3];
  1722. __be32 vl_select_mask;
  1723. };
  1724. #define VL_MASK_ALL 0x000080ff
  1725. struct opa_port_status_rsp {
  1726. __u8 port_num;
  1727. __u8 reserved[3];
  1728. __be32 vl_select_mask;
  1729. /* Data counters */
  1730. __be64 port_xmit_data;
  1731. __be64 port_rcv_data;
  1732. __be64 port_xmit_pkts;
  1733. __be64 port_rcv_pkts;
  1734. __be64 port_multicast_xmit_pkts;
  1735. __be64 port_multicast_rcv_pkts;
  1736. __be64 port_xmit_wait;
  1737. __be64 sw_port_congestion;
  1738. __be64 port_rcv_fecn;
  1739. __be64 port_rcv_becn;
  1740. __be64 port_xmit_time_cong;
  1741. __be64 port_xmit_wasted_bw;
  1742. __be64 port_xmit_wait_data;
  1743. __be64 port_rcv_bubble;
  1744. __be64 port_mark_fecn;
  1745. /* Error counters */
  1746. __be64 port_rcv_constraint_errors;
  1747. __be64 port_rcv_switch_relay_errors;
  1748. __be64 port_xmit_discards;
  1749. __be64 port_xmit_constraint_errors;
  1750. __be64 port_rcv_remote_physical_errors;
  1751. __be64 local_link_integrity_errors;
  1752. __be64 port_rcv_errors;
  1753. __be64 excessive_buffer_overruns;
  1754. __be64 fm_config_errors;
  1755. __be32 link_error_recovery;
  1756. __be32 link_downed;
  1757. u8 uncorrectable_errors;
  1758. u8 link_quality_indicator; /* 5res, 3bit */
  1759. u8 res2[6];
  1760. struct _vls_pctrs {
  1761. /* per-VL Data counters */
  1762. __be64 port_vl_xmit_data;
  1763. __be64 port_vl_rcv_data;
  1764. __be64 port_vl_xmit_pkts;
  1765. __be64 port_vl_rcv_pkts;
  1766. __be64 port_vl_xmit_wait;
  1767. __be64 sw_port_vl_congestion;
  1768. __be64 port_vl_rcv_fecn;
  1769. __be64 port_vl_rcv_becn;
  1770. __be64 port_xmit_time_cong;
  1771. __be64 port_vl_xmit_wasted_bw;
  1772. __be64 port_vl_xmit_wait_data;
  1773. __be64 port_vl_rcv_bubble;
  1774. __be64 port_vl_mark_fecn;
  1775. __be64 port_vl_xmit_discards;
  1776. } vls[0]; /* real array size defined by # bits set in vl_select_mask */
  1777. };
  1778. enum counter_selects {
  1779. CS_PORT_XMIT_DATA = (1 << 31),
  1780. CS_PORT_RCV_DATA = (1 << 30),
  1781. CS_PORT_XMIT_PKTS = (1 << 29),
  1782. CS_PORT_RCV_PKTS = (1 << 28),
  1783. CS_PORT_MCAST_XMIT_PKTS = (1 << 27),
  1784. CS_PORT_MCAST_RCV_PKTS = (1 << 26),
  1785. CS_PORT_XMIT_WAIT = (1 << 25),
  1786. CS_SW_PORT_CONGESTION = (1 << 24),
  1787. CS_PORT_RCV_FECN = (1 << 23),
  1788. CS_PORT_RCV_BECN = (1 << 22),
  1789. CS_PORT_XMIT_TIME_CONG = (1 << 21),
  1790. CS_PORT_XMIT_WASTED_BW = (1 << 20),
  1791. CS_PORT_XMIT_WAIT_DATA = (1 << 19),
  1792. CS_PORT_RCV_BUBBLE = (1 << 18),
  1793. CS_PORT_MARK_FECN = (1 << 17),
  1794. CS_PORT_RCV_CONSTRAINT_ERRORS = (1 << 16),
  1795. CS_PORT_RCV_SWITCH_RELAY_ERRORS = (1 << 15),
  1796. CS_PORT_XMIT_DISCARDS = (1 << 14),
  1797. CS_PORT_XMIT_CONSTRAINT_ERRORS = (1 << 13),
  1798. CS_PORT_RCV_REMOTE_PHYSICAL_ERRORS = (1 << 12),
  1799. CS_LOCAL_LINK_INTEGRITY_ERRORS = (1 << 11),
  1800. CS_PORT_RCV_ERRORS = (1 << 10),
  1801. CS_EXCESSIVE_BUFFER_OVERRUNS = (1 << 9),
  1802. CS_FM_CONFIG_ERRORS = (1 << 8),
  1803. CS_LINK_ERROR_RECOVERY = (1 << 7),
  1804. CS_LINK_DOWNED = (1 << 6),
  1805. CS_UNCORRECTABLE_ERRORS = (1 << 5),
  1806. };
  1807. struct opa_clear_port_status {
  1808. __be64 port_select_mask[4];
  1809. __be32 counter_select_mask;
  1810. };
  1811. struct opa_aggregate {
  1812. __be16 attr_id;
  1813. __be16 err_reqlength; /* 1 bit, 8 res, 7 bit */
  1814. __be32 attr_mod;
  1815. u8 data[0];
  1816. };
  1817. #define MSK_LLI 0x000000f0
  1818. #define MSK_LLI_SFT 4
  1819. #define MSK_LER 0x0000000f
  1820. #define MSK_LER_SFT 0
  1821. #define ADD_LLI 8
  1822. #define ADD_LER 2
  1823. /* Request contains first three fields, response contains those plus the rest */
  1824. struct opa_port_data_counters_msg {
  1825. __be64 port_select_mask[4];
  1826. __be32 vl_select_mask;
  1827. __be32 resolution;
  1828. /* Response fields follow */
  1829. struct _port_dctrs {
  1830. u8 port_number;
  1831. u8 reserved2[3];
  1832. __be32 link_quality_indicator; /* 29res, 3bit */
  1833. /* Data counters */
  1834. __be64 port_xmit_data;
  1835. __be64 port_rcv_data;
  1836. __be64 port_xmit_pkts;
  1837. __be64 port_rcv_pkts;
  1838. __be64 port_multicast_xmit_pkts;
  1839. __be64 port_multicast_rcv_pkts;
  1840. __be64 port_xmit_wait;
  1841. __be64 sw_port_congestion;
  1842. __be64 port_rcv_fecn;
  1843. __be64 port_rcv_becn;
  1844. __be64 port_xmit_time_cong;
  1845. __be64 port_xmit_wasted_bw;
  1846. __be64 port_xmit_wait_data;
  1847. __be64 port_rcv_bubble;
  1848. __be64 port_mark_fecn;
  1849. __be64 port_error_counter_summary;
  1850. /* Sum of error counts/port */
  1851. struct _vls_dctrs {
  1852. /* per-VL Data counters */
  1853. __be64 port_vl_xmit_data;
  1854. __be64 port_vl_rcv_data;
  1855. __be64 port_vl_xmit_pkts;
  1856. __be64 port_vl_rcv_pkts;
  1857. __be64 port_vl_xmit_wait;
  1858. __be64 sw_port_vl_congestion;
  1859. __be64 port_vl_rcv_fecn;
  1860. __be64 port_vl_rcv_becn;
  1861. __be64 port_xmit_time_cong;
  1862. __be64 port_vl_xmit_wasted_bw;
  1863. __be64 port_vl_xmit_wait_data;
  1864. __be64 port_vl_rcv_bubble;
  1865. __be64 port_vl_mark_fecn;
  1866. } vls[0];
  1867. /* array size defined by #bits set in vl_select_mask*/
  1868. } port[1]; /* array size defined by #ports in attribute modifier */
  1869. };
  1870. struct opa_port_error_counters64_msg {
  1871. /*
  1872. * Request contains first two fields, response contains the
  1873. * whole magilla
  1874. */
  1875. __be64 port_select_mask[4];
  1876. __be32 vl_select_mask;
  1877. /* Response-only fields follow */
  1878. __be32 reserved1;
  1879. struct _port_ectrs {
  1880. u8 port_number;
  1881. u8 reserved2[7];
  1882. __be64 port_rcv_constraint_errors;
  1883. __be64 port_rcv_switch_relay_errors;
  1884. __be64 port_xmit_discards;
  1885. __be64 port_xmit_constraint_errors;
  1886. __be64 port_rcv_remote_physical_errors;
  1887. __be64 local_link_integrity_errors;
  1888. __be64 port_rcv_errors;
  1889. __be64 excessive_buffer_overruns;
  1890. __be64 fm_config_errors;
  1891. __be32 link_error_recovery;
  1892. __be32 link_downed;
  1893. u8 uncorrectable_errors;
  1894. u8 reserved3[7];
  1895. struct _vls_ectrs {
  1896. __be64 port_vl_xmit_discards;
  1897. } vls[0];
  1898. /* array size defined by #bits set in vl_select_mask */
  1899. } port[1]; /* array size defined by #ports in attribute modifier */
  1900. };
  1901. struct opa_port_error_info_msg {
  1902. __be64 port_select_mask[4];
  1903. __be32 error_info_select_mask;
  1904. __be32 reserved1;
  1905. struct _port_ei {
  1906. u8 port_number;
  1907. u8 reserved2[7];
  1908. /* PortRcvErrorInfo */
  1909. struct {
  1910. u8 status_and_code;
  1911. union {
  1912. u8 raw[17];
  1913. struct {
  1914. /* EI1to12 format */
  1915. u8 packet_flit1[8];
  1916. u8 packet_flit2[8];
  1917. u8 remaining_flit_bits12;
  1918. } ei1to12;
  1919. struct {
  1920. u8 packet_bytes[8];
  1921. u8 remaining_flit_bits;
  1922. } ei13;
  1923. } ei;
  1924. u8 reserved3[6];
  1925. } __packed port_rcv_ei;
  1926. /* ExcessiveBufferOverrunInfo */
  1927. struct {
  1928. u8 status_and_sc;
  1929. u8 reserved4[7];
  1930. } __packed excessive_buffer_overrun_ei;
  1931. /* PortXmitConstraintErrorInfo */
  1932. struct {
  1933. u8 status;
  1934. u8 reserved5;
  1935. __be16 pkey;
  1936. __be32 slid;
  1937. } __packed port_xmit_constraint_ei;
  1938. /* PortRcvConstraintErrorInfo */
  1939. struct {
  1940. u8 status;
  1941. u8 reserved6;
  1942. __be16 pkey;
  1943. __be32 slid;
  1944. } __packed port_rcv_constraint_ei;
  1945. /* PortRcvSwitchRelayErrorInfo */
  1946. struct {
  1947. u8 status_and_code;
  1948. u8 reserved7[3];
  1949. __u32 error_info;
  1950. } __packed port_rcv_switch_relay_ei;
  1951. /* UncorrectableErrorInfo */
  1952. struct {
  1953. u8 status_and_code;
  1954. u8 reserved8;
  1955. } __packed uncorrectable_ei;
  1956. /* FMConfigErrorInfo */
  1957. struct {
  1958. u8 status_and_code;
  1959. u8 error_info;
  1960. } __packed fm_config_ei;
  1961. __u32 reserved9;
  1962. } port[1]; /* actual array size defined by #ports in attr modifier */
  1963. };
  1964. /* opa_port_error_info_msg error_info_select_mask bit definitions */
  1965. enum error_info_selects {
  1966. ES_PORT_RCV_ERROR_INFO = (1 << 31),
  1967. ES_EXCESSIVE_BUFFER_OVERRUN_INFO = (1 << 30),
  1968. ES_PORT_XMIT_CONSTRAINT_ERROR_INFO = (1 << 29),
  1969. ES_PORT_RCV_CONSTRAINT_ERROR_INFO = (1 << 28),
  1970. ES_PORT_RCV_SWITCH_RELAY_ERROR_INFO = (1 << 27),
  1971. ES_UNCORRECTABLE_ERROR_INFO = (1 << 26),
  1972. ES_FM_CONFIG_ERROR_INFO = (1 << 25)
  1973. };
  1974. static int pma_get_opa_classportinfo(struct opa_pma_mad *pmp,
  1975. struct ib_device *ibdev, u32 *resp_len)
  1976. {
  1977. struct opa_class_port_info *p =
  1978. (struct opa_class_port_info *)pmp->data;
  1979. memset(pmp->data, 0, sizeof(pmp->data));
  1980. if (pmp->mad_hdr.attr_mod != 0)
  1981. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  1982. p->base_version = OPA_MGMT_BASE_VERSION;
  1983. p->class_version = OPA_SM_CLASS_VERSION;
  1984. /*
  1985. * Expected response time is 4.096 usec. * 2^18 == 1.073741824 sec.
  1986. */
  1987. p->cap_mask2_resp_time = cpu_to_be32(18);
  1988. if (resp_len)
  1989. *resp_len += sizeof(*p);
  1990. return reply((struct ib_mad_hdr *)pmp);
  1991. }
  1992. static void a0_portstatus(struct hfi1_pportdata *ppd,
  1993. struct opa_port_status_rsp *rsp, u32 vl_select_mask)
  1994. {
  1995. if (!is_bx(ppd->dd)) {
  1996. unsigned long vl;
  1997. u64 sum_vl_xmit_wait = 0;
  1998. u32 vl_all_mask = VL_MASK_ALL;
  1999. for_each_set_bit(vl, (unsigned long *)&(vl_all_mask),
  2000. 8 * sizeof(vl_all_mask)) {
  2001. u64 tmp = sum_vl_xmit_wait +
  2002. read_port_cntr(ppd, C_TX_WAIT_VL,
  2003. idx_from_vl(vl));
  2004. if (tmp < sum_vl_xmit_wait) {
  2005. /* we wrapped */
  2006. sum_vl_xmit_wait = (u64)~0;
  2007. break;
  2008. }
  2009. sum_vl_xmit_wait = tmp;
  2010. }
  2011. if (be64_to_cpu(rsp->port_xmit_wait) > sum_vl_xmit_wait)
  2012. rsp->port_xmit_wait = cpu_to_be64(sum_vl_xmit_wait);
  2013. }
  2014. }
  2015. static int pma_get_opa_portstatus(struct opa_pma_mad *pmp,
  2016. struct ib_device *ibdev,
  2017. u8 port, u32 *resp_len)
  2018. {
  2019. struct opa_port_status_req *req =
  2020. (struct opa_port_status_req *)pmp->data;
  2021. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  2022. struct opa_port_status_rsp *rsp;
  2023. u32 vl_select_mask = be32_to_cpu(req->vl_select_mask);
  2024. unsigned long vl;
  2025. size_t response_data_size;
  2026. u32 nports = be32_to_cpu(pmp->mad_hdr.attr_mod) >> 24;
  2027. u8 port_num = req->port_num;
  2028. u8 num_vls = hweight32(vl_select_mask);
  2029. struct _vls_pctrs *vlinfo;
  2030. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  2031. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  2032. int vfi;
  2033. u64 tmp, tmp2;
  2034. response_data_size = sizeof(struct opa_port_status_rsp) +
  2035. num_vls * sizeof(struct _vls_pctrs);
  2036. if (response_data_size > sizeof(pmp->data)) {
  2037. pmp->mad_hdr.status |= OPA_PM_STATUS_REQUEST_TOO_LARGE;
  2038. return reply((struct ib_mad_hdr *)pmp);
  2039. }
  2040. if (nports != 1 || (port_num && port_num != port) ||
  2041. num_vls > OPA_MAX_VLS || (vl_select_mask & ~VL_MASK_ALL)) {
  2042. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2043. return reply((struct ib_mad_hdr *)pmp);
  2044. }
  2045. memset(pmp->data, 0, sizeof(pmp->data));
  2046. rsp = (struct opa_port_status_rsp *)pmp->data;
  2047. if (port_num)
  2048. rsp->port_num = port_num;
  2049. else
  2050. rsp->port_num = port;
  2051. rsp->port_rcv_constraint_errors =
  2052. cpu_to_be64(read_port_cntr(ppd, C_SW_RCV_CSTR_ERR,
  2053. CNTR_INVALID_VL));
  2054. hfi1_read_link_quality(dd, &rsp->link_quality_indicator);
  2055. rsp->vl_select_mask = cpu_to_be32(vl_select_mask);
  2056. rsp->port_xmit_data = cpu_to_be64(read_dev_cntr(dd, C_DC_XMIT_FLITS,
  2057. CNTR_INVALID_VL));
  2058. rsp->port_rcv_data = cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FLITS,
  2059. CNTR_INVALID_VL));
  2060. rsp->port_xmit_pkts = cpu_to_be64(read_dev_cntr(dd, C_DC_XMIT_PKTS,
  2061. CNTR_INVALID_VL));
  2062. rsp->port_rcv_pkts = cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_PKTS,
  2063. CNTR_INVALID_VL));
  2064. rsp->port_multicast_xmit_pkts =
  2065. cpu_to_be64(read_dev_cntr(dd, C_DC_MC_XMIT_PKTS,
  2066. CNTR_INVALID_VL));
  2067. rsp->port_multicast_rcv_pkts =
  2068. cpu_to_be64(read_dev_cntr(dd, C_DC_MC_RCV_PKTS,
  2069. CNTR_INVALID_VL));
  2070. rsp->port_xmit_wait =
  2071. cpu_to_be64(read_port_cntr(ppd, C_TX_WAIT, CNTR_INVALID_VL));
  2072. rsp->port_rcv_fecn =
  2073. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FCN, CNTR_INVALID_VL));
  2074. rsp->port_rcv_becn =
  2075. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_BCN, CNTR_INVALID_VL));
  2076. rsp->port_xmit_discards =
  2077. cpu_to_be64(read_port_cntr(ppd, C_SW_XMIT_DSCD,
  2078. CNTR_INVALID_VL));
  2079. rsp->port_xmit_constraint_errors =
  2080. cpu_to_be64(read_port_cntr(ppd, C_SW_XMIT_CSTR_ERR,
  2081. CNTR_INVALID_VL));
  2082. rsp->port_rcv_remote_physical_errors =
  2083. cpu_to_be64(read_dev_cntr(dd, C_DC_RMT_PHY_ERR,
  2084. CNTR_INVALID_VL));
  2085. rsp->local_link_integrity_errors =
  2086. cpu_to_be64(read_dev_cntr(dd, C_DC_RX_REPLAY,
  2087. CNTR_INVALID_VL));
  2088. tmp = read_dev_cntr(dd, C_DC_SEQ_CRC_CNT, CNTR_INVALID_VL);
  2089. tmp2 = tmp + read_dev_cntr(dd, C_DC_REINIT_FROM_PEER_CNT,
  2090. CNTR_INVALID_VL);
  2091. if (tmp2 > (u32)UINT_MAX || tmp2 < tmp) {
  2092. /* overflow/wrapped */
  2093. rsp->link_error_recovery = cpu_to_be32(~0);
  2094. } else {
  2095. rsp->link_error_recovery = cpu_to_be32(tmp2);
  2096. }
  2097. rsp->port_rcv_errors =
  2098. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_ERR, CNTR_INVALID_VL));
  2099. rsp->excessive_buffer_overruns =
  2100. cpu_to_be64(read_dev_cntr(dd, C_RCV_OVF, CNTR_INVALID_VL));
  2101. rsp->fm_config_errors =
  2102. cpu_to_be64(read_dev_cntr(dd, C_DC_FM_CFG_ERR,
  2103. CNTR_INVALID_VL));
  2104. rsp->link_downed = cpu_to_be32(read_port_cntr(ppd, C_SW_LINK_DOWN,
  2105. CNTR_INVALID_VL));
  2106. /* rsp->uncorrectable_errors is 8 bits wide, and it pegs at 0xff */
  2107. tmp = read_dev_cntr(dd, C_DC_UNC_ERR, CNTR_INVALID_VL);
  2108. rsp->uncorrectable_errors = tmp < 0x100 ? (tmp & 0xff) : 0xff;
  2109. vlinfo = &rsp->vls[0];
  2110. vfi = 0;
  2111. /* The vl_select_mask has been checked above, and we know
  2112. * that it contains only entries which represent valid VLs.
  2113. * So in the for_each_set_bit() loop below, we don't need
  2114. * any additional checks for vl.
  2115. */
  2116. for_each_set_bit(vl, (unsigned long *)&(vl_select_mask),
  2117. 8 * sizeof(vl_select_mask)) {
  2118. memset(vlinfo, 0, sizeof(*vlinfo));
  2119. tmp = read_dev_cntr(dd, C_DC_RX_FLIT_VL, idx_from_vl(vl));
  2120. rsp->vls[vfi].port_vl_rcv_data = cpu_to_be64(tmp);
  2121. rsp->vls[vfi].port_vl_rcv_pkts =
  2122. cpu_to_be64(read_dev_cntr(dd, C_DC_RX_PKT_VL,
  2123. idx_from_vl(vl)));
  2124. rsp->vls[vfi].port_vl_xmit_data =
  2125. cpu_to_be64(read_port_cntr(ppd, C_TX_FLIT_VL,
  2126. idx_from_vl(vl)));
  2127. rsp->vls[vfi].port_vl_xmit_pkts =
  2128. cpu_to_be64(read_port_cntr(ppd, C_TX_PKT_VL,
  2129. idx_from_vl(vl)));
  2130. rsp->vls[vfi].port_vl_xmit_wait =
  2131. cpu_to_be64(read_port_cntr(ppd, C_TX_WAIT_VL,
  2132. idx_from_vl(vl)));
  2133. rsp->vls[vfi].port_vl_rcv_fecn =
  2134. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FCN_VL,
  2135. idx_from_vl(vl)));
  2136. rsp->vls[vfi].port_vl_rcv_becn =
  2137. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_BCN_VL,
  2138. idx_from_vl(vl)));
  2139. rsp->vls[vfi].port_vl_xmit_discards =
  2140. cpu_to_be64(read_port_cntr(ppd, C_SW_XMIT_DSCD_VL,
  2141. idx_from_vl(vl)));
  2142. vlinfo++;
  2143. vfi++;
  2144. }
  2145. a0_portstatus(ppd, rsp, vl_select_mask);
  2146. if (resp_len)
  2147. *resp_len += response_data_size;
  2148. return reply((struct ib_mad_hdr *)pmp);
  2149. }
  2150. static u64 get_error_counter_summary(struct ib_device *ibdev, u8 port,
  2151. u8 res_lli, u8 res_ler)
  2152. {
  2153. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  2154. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  2155. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  2156. u64 error_counter_summary = 0, tmp;
  2157. error_counter_summary += read_port_cntr(ppd, C_SW_RCV_CSTR_ERR,
  2158. CNTR_INVALID_VL);
  2159. /* port_rcv_switch_relay_errors is 0 for HFIs */
  2160. error_counter_summary += read_port_cntr(ppd, C_SW_XMIT_DSCD,
  2161. CNTR_INVALID_VL);
  2162. error_counter_summary += read_port_cntr(ppd, C_SW_XMIT_CSTR_ERR,
  2163. CNTR_INVALID_VL);
  2164. error_counter_summary += read_dev_cntr(dd, C_DC_RMT_PHY_ERR,
  2165. CNTR_INVALID_VL);
  2166. /* local link integrity must be right-shifted by the lli resolution */
  2167. error_counter_summary += (read_dev_cntr(dd, C_DC_RX_REPLAY,
  2168. CNTR_INVALID_VL) >> res_lli);
  2169. /* link error recovery must b right-shifted by the ler resolution */
  2170. tmp = read_dev_cntr(dd, C_DC_SEQ_CRC_CNT, CNTR_INVALID_VL);
  2171. tmp += read_dev_cntr(dd, C_DC_REINIT_FROM_PEER_CNT, CNTR_INVALID_VL);
  2172. error_counter_summary += (tmp >> res_ler);
  2173. error_counter_summary += read_dev_cntr(dd, C_DC_RCV_ERR,
  2174. CNTR_INVALID_VL);
  2175. error_counter_summary += read_dev_cntr(dd, C_RCV_OVF, CNTR_INVALID_VL);
  2176. error_counter_summary += read_dev_cntr(dd, C_DC_FM_CFG_ERR,
  2177. CNTR_INVALID_VL);
  2178. /* ppd->link_downed is a 32-bit value */
  2179. error_counter_summary += read_port_cntr(ppd, C_SW_LINK_DOWN,
  2180. CNTR_INVALID_VL);
  2181. tmp = read_dev_cntr(dd, C_DC_UNC_ERR, CNTR_INVALID_VL);
  2182. /* this is an 8-bit quantity */
  2183. error_counter_summary += tmp < 0x100 ? (tmp & 0xff) : 0xff;
  2184. return error_counter_summary;
  2185. }
  2186. static void a0_datacounters(struct hfi1_pportdata *ppd, struct _port_dctrs *rsp,
  2187. u32 vl_select_mask)
  2188. {
  2189. if (!is_bx(ppd->dd)) {
  2190. unsigned long vl;
  2191. u64 sum_vl_xmit_wait = 0;
  2192. u32 vl_all_mask = VL_MASK_ALL;
  2193. for_each_set_bit(vl, (unsigned long *)&(vl_all_mask),
  2194. 8 * sizeof(vl_all_mask)) {
  2195. u64 tmp = sum_vl_xmit_wait +
  2196. read_port_cntr(ppd, C_TX_WAIT_VL,
  2197. idx_from_vl(vl));
  2198. if (tmp < sum_vl_xmit_wait) {
  2199. /* we wrapped */
  2200. sum_vl_xmit_wait = (u64)~0;
  2201. break;
  2202. }
  2203. sum_vl_xmit_wait = tmp;
  2204. }
  2205. if (be64_to_cpu(rsp->port_xmit_wait) > sum_vl_xmit_wait)
  2206. rsp->port_xmit_wait = cpu_to_be64(sum_vl_xmit_wait);
  2207. }
  2208. }
  2209. static void pma_get_opa_port_dctrs(struct ib_device *ibdev,
  2210. struct _port_dctrs *rsp)
  2211. {
  2212. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  2213. rsp->port_xmit_data = cpu_to_be64(read_dev_cntr(dd, C_DC_XMIT_FLITS,
  2214. CNTR_INVALID_VL));
  2215. rsp->port_rcv_data = cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FLITS,
  2216. CNTR_INVALID_VL));
  2217. rsp->port_xmit_pkts = cpu_to_be64(read_dev_cntr(dd, C_DC_XMIT_PKTS,
  2218. CNTR_INVALID_VL));
  2219. rsp->port_rcv_pkts = cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_PKTS,
  2220. CNTR_INVALID_VL));
  2221. rsp->port_multicast_xmit_pkts =
  2222. cpu_to_be64(read_dev_cntr(dd, C_DC_MC_XMIT_PKTS,
  2223. CNTR_INVALID_VL));
  2224. rsp->port_multicast_rcv_pkts =
  2225. cpu_to_be64(read_dev_cntr(dd, C_DC_MC_RCV_PKTS,
  2226. CNTR_INVALID_VL));
  2227. }
  2228. static int pma_get_opa_datacounters(struct opa_pma_mad *pmp,
  2229. struct ib_device *ibdev,
  2230. u8 port, u32 *resp_len)
  2231. {
  2232. struct opa_port_data_counters_msg *req =
  2233. (struct opa_port_data_counters_msg *)pmp->data;
  2234. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  2235. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  2236. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  2237. struct _port_dctrs *rsp;
  2238. struct _vls_dctrs *vlinfo;
  2239. size_t response_data_size;
  2240. u32 num_ports;
  2241. u8 num_pslm;
  2242. u8 lq, num_vls;
  2243. u8 res_lli, res_ler;
  2244. u64 port_mask;
  2245. u8 port_num;
  2246. unsigned long vl;
  2247. u32 vl_select_mask;
  2248. int vfi;
  2249. num_ports = be32_to_cpu(pmp->mad_hdr.attr_mod) >> 24;
  2250. num_pslm = hweight64(be64_to_cpu(req->port_select_mask[3]));
  2251. num_vls = hweight32(be32_to_cpu(req->vl_select_mask));
  2252. vl_select_mask = be32_to_cpu(req->vl_select_mask);
  2253. res_lli = (u8)(be32_to_cpu(req->resolution) & MSK_LLI) >> MSK_LLI_SFT;
  2254. res_lli = res_lli ? res_lli + ADD_LLI : 0;
  2255. res_ler = (u8)(be32_to_cpu(req->resolution) & MSK_LER) >> MSK_LER_SFT;
  2256. res_ler = res_ler ? res_ler + ADD_LER : 0;
  2257. if (num_ports != 1 || (vl_select_mask & ~VL_MASK_ALL)) {
  2258. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2259. return reply((struct ib_mad_hdr *)pmp);
  2260. }
  2261. /* Sanity check */
  2262. response_data_size = sizeof(struct opa_port_data_counters_msg) +
  2263. num_vls * sizeof(struct _vls_dctrs);
  2264. if (response_data_size > sizeof(pmp->data)) {
  2265. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2266. return reply((struct ib_mad_hdr *)pmp);
  2267. }
  2268. /*
  2269. * The bit set in the mask needs to be consistent with the
  2270. * port the request came in on.
  2271. */
  2272. port_mask = be64_to_cpu(req->port_select_mask[3]);
  2273. port_num = find_first_bit((unsigned long *)&port_mask,
  2274. sizeof(port_mask) * 8);
  2275. if (port_num != port) {
  2276. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2277. return reply((struct ib_mad_hdr *)pmp);
  2278. }
  2279. rsp = &req->port[0];
  2280. memset(rsp, 0, sizeof(*rsp));
  2281. rsp->port_number = port;
  2282. /*
  2283. * Note that link_quality_indicator is a 32 bit quantity in
  2284. * 'datacounters' queries (as opposed to 'portinfo' queries,
  2285. * where it's a byte).
  2286. */
  2287. hfi1_read_link_quality(dd, &lq);
  2288. rsp->link_quality_indicator = cpu_to_be32((u32)lq);
  2289. pma_get_opa_port_dctrs(ibdev, rsp);
  2290. rsp->port_xmit_wait =
  2291. cpu_to_be64(read_port_cntr(ppd, C_TX_WAIT, CNTR_INVALID_VL));
  2292. rsp->port_rcv_fecn =
  2293. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FCN, CNTR_INVALID_VL));
  2294. rsp->port_rcv_becn =
  2295. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_BCN, CNTR_INVALID_VL));
  2296. rsp->port_error_counter_summary =
  2297. cpu_to_be64(get_error_counter_summary(ibdev, port,
  2298. res_lli, res_ler));
  2299. vlinfo = &rsp->vls[0];
  2300. vfi = 0;
  2301. /* The vl_select_mask has been checked above, and we know
  2302. * that it contains only entries which represent valid VLs.
  2303. * So in the for_each_set_bit() loop below, we don't need
  2304. * any additional checks for vl.
  2305. */
  2306. for_each_set_bit(vl, (unsigned long *)&(vl_select_mask),
  2307. 8 * sizeof(req->vl_select_mask)) {
  2308. memset(vlinfo, 0, sizeof(*vlinfo));
  2309. rsp->vls[vfi].port_vl_xmit_data =
  2310. cpu_to_be64(read_port_cntr(ppd, C_TX_FLIT_VL,
  2311. idx_from_vl(vl)));
  2312. rsp->vls[vfi].port_vl_rcv_data =
  2313. cpu_to_be64(read_dev_cntr(dd, C_DC_RX_FLIT_VL,
  2314. idx_from_vl(vl)));
  2315. rsp->vls[vfi].port_vl_xmit_pkts =
  2316. cpu_to_be64(read_port_cntr(ppd, C_TX_PKT_VL,
  2317. idx_from_vl(vl)));
  2318. rsp->vls[vfi].port_vl_rcv_pkts =
  2319. cpu_to_be64(read_dev_cntr(dd, C_DC_RX_PKT_VL,
  2320. idx_from_vl(vl)));
  2321. rsp->vls[vfi].port_vl_xmit_wait =
  2322. cpu_to_be64(read_port_cntr(ppd, C_TX_WAIT_VL,
  2323. idx_from_vl(vl)));
  2324. rsp->vls[vfi].port_vl_rcv_fecn =
  2325. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FCN_VL,
  2326. idx_from_vl(vl)));
  2327. rsp->vls[vfi].port_vl_rcv_becn =
  2328. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_BCN_VL,
  2329. idx_from_vl(vl)));
  2330. /* rsp->port_vl_xmit_time_cong is 0 for HFIs */
  2331. /* rsp->port_vl_xmit_wasted_bw ??? */
  2332. /* port_vl_xmit_wait_data - TXE (table 13-9 HFI spec) ???
  2333. * does this differ from rsp->vls[vfi].port_vl_xmit_wait
  2334. */
  2335. /*rsp->vls[vfi].port_vl_mark_fecn =
  2336. * cpu_to_be64(read_csr(dd, DCC_PRF_PORT_VL_MARK_FECN_CNT
  2337. * + offset));
  2338. */
  2339. vlinfo++;
  2340. vfi++;
  2341. }
  2342. a0_datacounters(ppd, rsp, vl_select_mask);
  2343. if (resp_len)
  2344. *resp_len += response_data_size;
  2345. return reply((struct ib_mad_hdr *)pmp);
  2346. }
  2347. static int pma_get_ib_portcounters_ext(struct ib_pma_mad *pmp,
  2348. struct ib_device *ibdev, u8 port)
  2349. {
  2350. struct ib_pma_portcounters_ext *p = (struct ib_pma_portcounters_ext *)
  2351. pmp->data;
  2352. struct _port_dctrs rsp;
  2353. if (pmp->mad_hdr.attr_mod != 0 || p->port_select != port) {
  2354. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2355. goto bail;
  2356. }
  2357. memset(&rsp, 0, sizeof(rsp));
  2358. pma_get_opa_port_dctrs(ibdev, &rsp);
  2359. p->port_xmit_data = rsp.port_xmit_data;
  2360. p->port_rcv_data = rsp.port_rcv_data;
  2361. p->port_xmit_packets = rsp.port_xmit_pkts;
  2362. p->port_rcv_packets = rsp.port_rcv_pkts;
  2363. p->port_unicast_xmit_packets = 0;
  2364. p->port_unicast_rcv_packets = 0;
  2365. p->port_multicast_xmit_packets = rsp.port_multicast_xmit_pkts;
  2366. p->port_multicast_rcv_packets = rsp.port_multicast_rcv_pkts;
  2367. bail:
  2368. return reply((struct ib_mad_hdr *)pmp);
  2369. }
  2370. static void pma_get_opa_port_ectrs(struct ib_device *ibdev,
  2371. struct _port_ectrs *rsp, u8 port)
  2372. {
  2373. u64 tmp, tmp2;
  2374. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  2375. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  2376. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  2377. tmp = read_dev_cntr(dd, C_DC_SEQ_CRC_CNT, CNTR_INVALID_VL);
  2378. tmp2 = tmp + read_dev_cntr(dd, C_DC_REINIT_FROM_PEER_CNT,
  2379. CNTR_INVALID_VL);
  2380. if (tmp2 > (u32)UINT_MAX || tmp2 < tmp) {
  2381. /* overflow/wrapped */
  2382. rsp->link_error_recovery = cpu_to_be32(~0);
  2383. } else {
  2384. rsp->link_error_recovery = cpu_to_be32(tmp2);
  2385. }
  2386. rsp->link_downed = cpu_to_be32(read_port_cntr(ppd, C_SW_LINK_DOWN,
  2387. CNTR_INVALID_VL));
  2388. rsp->port_rcv_errors =
  2389. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_ERR, CNTR_INVALID_VL));
  2390. rsp->port_rcv_remote_physical_errors =
  2391. cpu_to_be64(read_dev_cntr(dd, C_DC_RMT_PHY_ERR,
  2392. CNTR_INVALID_VL));
  2393. rsp->port_rcv_switch_relay_errors = 0;
  2394. rsp->port_xmit_discards =
  2395. cpu_to_be64(read_port_cntr(ppd, C_SW_XMIT_DSCD,
  2396. CNTR_INVALID_VL));
  2397. rsp->port_xmit_constraint_errors =
  2398. cpu_to_be64(read_port_cntr(ppd, C_SW_XMIT_CSTR_ERR,
  2399. CNTR_INVALID_VL));
  2400. rsp->port_rcv_constraint_errors =
  2401. cpu_to_be64(read_port_cntr(ppd, C_SW_RCV_CSTR_ERR,
  2402. CNTR_INVALID_VL));
  2403. rsp->local_link_integrity_errors =
  2404. cpu_to_be64(read_dev_cntr(dd, C_DC_RX_REPLAY,
  2405. CNTR_INVALID_VL));
  2406. rsp->excessive_buffer_overruns =
  2407. cpu_to_be64(read_dev_cntr(dd, C_RCV_OVF, CNTR_INVALID_VL));
  2408. }
  2409. static int pma_get_opa_porterrors(struct opa_pma_mad *pmp,
  2410. struct ib_device *ibdev,
  2411. u8 port, u32 *resp_len)
  2412. {
  2413. size_t response_data_size;
  2414. struct _port_ectrs *rsp;
  2415. u8 port_num;
  2416. struct opa_port_error_counters64_msg *req;
  2417. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  2418. u32 num_ports;
  2419. u8 num_pslm;
  2420. u8 num_vls;
  2421. struct hfi1_ibport *ibp;
  2422. struct hfi1_pportdata *ppd;
  2423. struct _vls_ectrs *vlinfo;
  2424. unsigned long vl;
  2425. u64 port_mask, tmp;
  2426. u32 vl_select_mask;
  2427. int vfi;
  2428. req = (struct opa_port_error_counters64_msg *)pmp->data;
  2429. num_ports = be32_to_cpu(pmp->mad_hdr.attr_mod) >> 24;
  2430. num_pslm = hweight64(be64_to_cpu(req->port_select_mask[3]));
  2431. num_vls = hweight32(be32_to_cpu(req->vl_select_mask));
  2432. if (num_ports != 1 || num_ports != num_pslm) {
  2433. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2434. return reply((struct ib_mad_hdr *)pmp);
  2435. }
  2436. response_data_size = sizeof(struct opa_port_error_counters64_msg) +
  2437. num_vls * sizeof(struct _vls_ectrs);
  2438. if (response_data_size > sizeof(pmp->data)) {
  2439. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2440. return reply((struct ib_mad_hdr *)pmp);
  2441. }
  2442. /*
  2443. * The bit set in the mask needs to be consistent with the
  2444. * port the request came in on.
  2445. */
  2446. port_mask = be64_to_cpu(req->port_select_mask[3]);
  2447. port_num = find_first_bit((unsigned long *)&port_mask,
  2448. sizeof(port_mask) * 8);
  2449. if (port_num != port) {
  2450. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2451. return reply((struct ib_mad_hdr *)pmp);
  2452. }
  2453. rsp = &req->port[0];
  2454. ibp = to_iport(ibdev, port_num);
  2455. ppd = ppd_from_ibp(ibp);
  2456. memset(rsp, 0, sizeof(*rsp));
  2457. rsp->port_number = port_num;
  2458. pma_get_opa_port_ectrs(ibdev, rsp, port_num);
  2459. rsp->port_rcv_remote_physical_errors =
  2460. cpu_to_be64(read_dev_cntr(dd, C_DC_RMT_PHY_ERR,
  2461. CNTR_INVALID_VL));
  2462. rsp->fm_config_errors =
  2463. cpu_to_be64(read_dev_cntr(dd, C_DC_FM_CFG_ERR,
  2464. CNTR_INVALID_VL));
  2465. tmp = read_dev_cntr(dd, C_DC_UNC_ERR, CNTR_INVALID_VL);
  2466. rsp->uncorrectable_errors = tmp < 0x100 ? (tmp & 0xff) : 0xff;
  2467. rsp->port_rcv_errors =
  2468. cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_ERR, CNTR_INVALID_VL));
  2469. vlinfo = &rsp->vls[0];
  2470. vfi = 0;
  2471. vl_select_mask = be32_to_cpu(req->vl_select_mask);
  2472. for_each_set_bit(vl, (unsigned long *)&(vl_select_mask),
  2473. 8 * sizeof(req->vl_select_mask)) {
  2474. memset(vlinfo, 0, sizeof(*vlinfo));
  2475. rsp->vls[vfi].port_vl_xmit_discards =
  2476. cpu_to_be64(read_port_cntr(ppd, C_SW_XMIT_DSCD_VL,
  2477. idx_from_vl(vl)));
  2478. vlinfo += 1;
  2479. vfi++;
  2480. }
  2481. if (resp_len)
  2482. *resp_len += response_data_size;
  2483. return reply((struct ib_mad_hdr *)pmp);
  2484. }
  2485. static int pma_get_ib_portcounters(struct ib_pma_mad *pmp,
  2486. struct ib_device *ibdev, u8 port)
  2487. {
  2488. struct ib_pma_portcounters *p = (struct ib_pma_portcounters *)
  2489. pmp->data;
  2490. struct _port_ectrs rsp;
  2491. u64 temp_link_overrun_errors;
  2492. u64 temp_64;
  2493. u32 temp_32;
  2494. memset(&rsp, 0, sizeof(rsp));
  2495. pma_get_opa_port_ectrs(ibdev, &rsp, port);
  2496. if (pmp->mad_hdr.attr_mod != 0 || p->port_select != port) {
  2497. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2498. goto bail;
  2499. }
  2500. p->symbol_error_counter = 0; /* N/A for OPA */
  2501. temp_32 = be32_to_cpu(rsp.link_error_recovery);
  2502. if (temp_32 > 0xFFUL)
  2503. p->link_error_recovery_counter = 0xFF;
  2504. else
  2505. p->link_error_recovery_counter = (u8)temp_32;
  2506. temp_32 = be32_to_cpu(rsp.link_downed);
  2507. if (temp_32 > 0xFFUL)
  2508. p->link_downed_counter = 0xFF;
  2509. else
  2510. p->link_downed_counter = (u8)temp_32;
  2511. temp_64 = be64_to_cpu(rsp.port_rcv_errors);
  2512. if (temp_64 > 0xFFFFUL)
  2513. p->port_rcv_errors = cpu_to_be16(0xFFFF);
  2514. else
  2515. p->port_rcv_errors = cpu_to_be16((u16)temp_64);
  2516. temp_64 = be64_to_cpu(rsp.port_rcv_remote_physical_errors);
  2517. if (temp_64 > 0xFFFFUL)
  2518. p->port_rcv_remphys_errors = cpu_to_be16(0xFFFF);
  2519. else
  2520. p->port_rcv_remphys_errors = cpu_to_be16((u16)temp_64);
  2521. temp_64 = be64_to_cpu(rsp.port_rcv_switch_relay_errors);
  2522. p->port_rcv_switch_relay_errors = cpu_to_be16((u16)temp_64);
  2523. temp_64 = be64_to_cpu(rsp.port_xmit_discards);
  2524. if (temp_64 > 0xFFFFUL)
  2525. p->port_xmit_discards = cpu_to_be16(0xFFFF);
  2526. else
  2527. p->port_xmit_discards = cpu_to_be16((u16)temp_64);
  2528. temp_64 = be64_to_cpu(rsp.port_xmit_constraint_errors);
  2529. if (temp_64 > 0xFFUL)
  2530. p->port_xmit_constraint_errors = 0xFF;
  2531. else
  2532. p->port_xmit_constraint_errors = (u8)temp_64;
  2533. temp_64 = be64_to_cpu(rsp.port_rcv_constraint_errors);
  2534. if (temp_64 > 0xFFUL)
  2535. p->port_rcv_constraint_errors = 0xFFUL;
  2536. else
  2537. p->port_rcv_constraint_errors = (u8)temp_64;
  2538. /* LocalLink: 7:4, BufferOverrun: 3:0 */
  2539. temp_64 = be64_to_cpu(rsp.local_link_integrity_errors);
  2540. if (temp_64 > 0xFUL)
  2541. temp_64 = 0xFUL;
  2542. temp_link_overrun_errors = temp_64 << 4;
  2543. temp_64 = be64_to_cpu(rsp.excessive_buffer_overruns);
  2544. if (temp_64 > 0xFUL)
  2545. temp_64 = 0xFUL;
  2546. temp_link_overrun_errors |= temp_64;
  2547. p->link_overrun_errors = (u8)temp_link_overrun_errors;
  2548. p->vl15_dropped = 0; /* N/A for OPA */
  2549. bail:
  2550. return reply((struct ib_mad_hdr *)pmp);
  2551. }
  2552. static int pma_get_opa_errorinfo(struct opa_pma_mad *pmp,
  2553. struct ib_device *ibdev,
  2554. u8 port, u32 *resp_len)
  2555. {
  2556. size_t response_data_size;
  2557. struct _port_ei *rsp;
  2558. struct opa_port_error_info_msg *req;
  2559. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  2560. u64 port_mask;
  2561. u32 num_ports;
  2562. u8 port_num;
  2563. u8 num_pslm;
  2564. u64 reg;
  2565. req = (struct opa_port_error_info_msg *)pmp->data;
  2566. rsp = &req->port[0];
  2567. num_ports = OPA_AM_NPORT(be32_to_cpu(pmp->mad_hdr.attr_mod));
  2568. num_pslm = hweight64(be64_to_cpu(req->port_select_mask[3]));
  2569. memset(rsp, 0, sizeof(*rsp));
  2570. if (num_ports != 1 || num_ports != num_pslm) {
  2571. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2572. return reply((struct ib_mad_hdr *)pmp);
  2573. }
  2574. /* Sanity check */
  2575. response_data_size = sizeof(struct opa_port_error_info_msg);
  2576. if (response_data_size > sizeof(pmp->data)) {
  2577. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2578. return reply((struct ib_mad_hdr *)pmp);
  2579. }
  2580. /*
  2581. * The bit set in the mask needs to be consistent with the port
  2582. * the request came in on.
  2583. */
  2584. port_mask = be64_to_cpu(req->port_select_mask[3]);
  2585. port_num = find_first_bit((unsigned long *)&port_mask,
  2586. sizeof(port_mask) * 8);
  2587. if (port_num != port) {
  2588. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2589. return reply((struct ib_mad_hdr *)pmp);
  2590. }
  2591. /* PortRcvErrorInfo */
  2592. rsp->port_rcv_ei.status_and_code =
  2593. dd->err_info_rcvport.status_and_code;
  2594. memcpy(&rsp->port_rcv_ei.ei.ei1to12.packet_flit1,
  2595. &dd->err_info_rcvport.packet_flit1, sizeof(u64));
  2596. memcpy(&rsp->port_rcv_ei.ei.ei1to12.packet_flit2,
  2597. &dd->err_info_rcvport.packet_flit2, sizeof(u64));
  2598. /* ExcessiverBufferOverrunInfo */
  2599. reg = read_csr(dd, RCV_ERR_INFO);
  2600. if (reg & RCV_ERR_INFO_RCV_EXCESS_BUFFER_OVERRUN_SMASK) {
  2601. /*
  2602. * if the RcvExcessBufferOverrun bit is set, save SC of
  2603. * first pkt that encountered an excess buffer overrun
  2604. */
  2605. u8 tmp = (u8)reg;
  2606. tmp &= RCV_ERR_INFO_RCV_EXCESS_BUFFER_OVERRUN_SC_SMASK;
  2607. tmp <<= 2;
  2608. rsp->excessive_buffer_overrun_ei.status_and_sc = tmp;
  2609. /* set the status bit */
  2610. rsp->excessive_buffer_overrun_ei.status_and_sc |= 0x80;
  2611. }
  2612. rsp->port_xmit_constraint_ei.status =
  2613. dd->err_info_xmit_constraint.status;
  2614. rsp->port_xmit_constraint_ei.pkey =
  2615. cpu_to_be16(dd->err_info_xmit_constraint.pkey);
  2616. rsp->port_xmit_constraint_ei.slid =
  2617. cpu_to_be32(dd->err_info_xmit_constraint.slid);
  2618. rsp->port_rcv_constraint_ei.status =
  2619. dd->err_info_rcv_constraint.status;
  2620. rsp->port_rcv_constraint_ei.pkey =
  2621. cpu_to_be16(dd->err_info_rcv_constraint.pkey);
  2622. rsp->port_rcv_constraint_ei.slid =
  2623. cpu_to_be32(dd->err_info_rcv_constraint.slid);
  2624. /* UncorrectableErrorInfo */
  2625. rsp->uncorrectable_ei.status_and_code = dd->err_info_uncorrectable;
  2626. /* FMConfigErrorInfo */
  2627. rsp->fm_config_ei.status_and_code = dd->err_info_fmconfig;
  2628. if (resp_len)
  2629. *resp_len += response_data_size;
  2630. return reply((struct ib_mad_hdr *)pmp);
  2631. }
  2632. static int pma_set_opa_portstatus(struct opa_pma_mad *pmp,
  2633. struct ib_device *ibdev,
  2634. u8 port, u32 *resp_len)
  2635. {
  2636. struct opa_clear_port_status *req =
  2637. (struct opa_clear_port_status *)pmp->data;
  2638. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  2639. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  2640. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  2641. u32 nports = be32_to_cpu(pmp->mad_hdr.attr_mod) >> 24;
  2642. u64 portn = be64_to_cpu(req->port_select_mask[3]);
  2643. u32 counter_select = be32_to_cpu(req->counter_select_mask);
  2644. u32 vl_select_mask = VL_MASK_ALL; /* clear all per-vl cnts */
  2645. unsigned long vl;
  2646. if ((nports != 1) || (portn != 1 << port)) {
  2647. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2648. return reply((struct ib_mad_hdr *)pmp);
  2649. }
  2650. /*
  2651. * only counters returned by pma_get_opa_portstatus() are
  2652. * handled, so when pma_get_opa_portstatus() gets a fix,
  2653. * the corresponding change should be made here as well.
  2654. */
  2655. if (counter_select & CS_PORT_XMIT_DATA)
  2656. write_dev_cntr(dd, C_DC_XMIT_FLITS, CNTR_INVALID_VL, 0);
  2657. if (counter_select & CS_PORT_RCV_DATA)
  2658. write_dev_cntr(dd, C_DC_RCV_FLITS, CNTR_INVALID_VL, 0);
  2659. if (counter_select & CS_PORT_XMIT_PKTS)
  2660. write_dev_cntr(dd, C_DC_XMIT_PKTS, CNTR_INVALID_VL, 0);
  2661. if (counter_select & CS_PORT_RCV_PKTS)
  2662. write_dev_cntr(dd, C_DC_RCV_PKTS, CNTR_INVALID_VL, 0);
  2663. if (counter_select & CS_PORT_MCAST_XMIT_PKTS)
  2664. write_dev_cntr(dd, C_DC_MC_XMIT_PKTS, CNTR_INVALID_VL, 0);
  2665. if (counter_select & CS_PORT_MCAST_RCV_PKTS)
  2666. write_dev_cntr(dd, C_DC_MC_RCV_PKTS, CNTR_INVALID_VL, 0);
  2667. if (counter_select & CS_PORT_XMIT_WAIT)
  2668. write_port_cntr(ppd, C_TX_WAIT, CNTR_INVALID_VL, 0);
  2669. /* ignore cs_sw_portCongestion for HFIs */
  2670. if (counter_select & CS_PORT_RCV_FECN)
  2671. write_dev_cntr(dd, C_DC_RCV_FCN, CNTR_INVALID_VL, 0);
  2672. if (counter_select & CS_PORT_RCV_BECN)
  2673. write_dev_cntr(dd, C_DC_RCV_BCN, CNTR_INVALID_VL, 0);
  2674. /* ignore cs_port_xmit_time_cong for HFIs */
  2675. /* ignore cs_port_xmit_wasted_bw for now */
  2676. /* ignore cs_port_xmit_wait_data for now */
  2677. if (counter_select & CS_PORT_RCV_BUBBLE)
  2678. write_dev_cntr(dd, C_DC_RCV_BBL, CNTR_INVALID_VL, 0);
  2679. /* Only applicable for switch */
  2680. /* if (counter_select & CS_PORT_MARK_FECN)
  2681. * write_csr(dd, DCC_PRF_PORT_MARK_FECN_CNT, 0);
  2682. */
  2683. if (counter_select & CS_PORT_RCV_CONSTRAINT_ERRORS)
  2684. write_port_cntr(ppd, C_SW_RCV_CSTR_ERR, CNTR_INVALID_VL, 0);
  2685. /* ignore cs_port_rcv_switch_relay_errors for HFIs */
  2686. if (counter_select & CS_PORT_XMIT_DISCARDS)
  2687. write_port_cntr(ppd, C_SW_XMIT_DSCD, CNTR_INVALID_VL, 0);
  2688. if (counter_select & CS_PORT_XMIT_CONSTRAINT_ERRORS)
  2689. write_port_cntr(ppd, C_SW_XMIT_CSTR_ERR, CNTR_INVALID_VL, 0);
  2690. if (counter_select & CS_PORT_RCV_REMOTE_PHYSICAL_ERRORS)
  2691. write_dev_cntr(dd, C_DC_RMT_PHY_ERR, CNTR_INVALID_VL, 0);
  2692. if (counter_select & CS_LOCAL_LINK_INTEGRITY_ERRORS)
  2693. write_dev_cntr(dd, C_DC_RX_REPLAY, CNTR_INVALID_VL, 0);
  2694. if (counter_select & CS_LINK_ERROR_RECOVERY) {
  2695. write_dev_cntr(dd, C_DC_SEQ_CRC_CNT, CNTR_INVALID_VL, 0);
  2696. write_dev_cntr(dd, C_DC_REINIT_FROM_PEER_CNT,
  2697. CNTR_INVALID_VL, 0);
  2698. }
  2699. if (counter_select & CS_PORT_RCV_ERRORS)
  2700. write_dev_cntr(dd, C_DC_RCV_ERR, CNTR_INVALID_VL, 0);
  2701. if (counter_select & CS_EXCESSIVE_BUFFER_OVERRUNS) {
  2702. write_dev_cntr(dd, C_RCV_OVF, CNTR_INVALID_VL, 0);
  2703. dd->rcv_ovfl_cnt = 0;
  2704. }
  2705. if (counter_select & CS_FM_CONFIG_ERRORS)
  2706. write_dev_cntr(dd, C_DC_FM_CFG_ERR, CNTR_INVALID_VL, 0);
  2707. if (counter_select & CS_LINK_DOWNED)
  2708. write_port_cntr(ppd, C_SW_LINK_DOWN, CNTR_INVALID_VL, 0);
  2709. if (counter_select & CS_UNCORRECTABLE_ERRORS)
  2710. write_dev_cntr(dd, C_DC_UNC_ERR, CNTR_INVALID_VL, 0);
  2711. for_each_set_bit(vl, (unsigned long *)&(vl_select_mask),
  2712. 8 * sizeof(vl_select_mask)) {
  2713. if (counter_select & CS_PORT_XMIT_DATA)
  2714. write_port_cntr(ppd, C_TX_FLIT_VL, idx_from_vl(vl), 0);
  2715. if (counter_select & CS_PORT_RCV_DATA)
  2716. write_dev_cntr(dd, C_DC_RX_FLIT_VL, idx_from_vl(vl), 0);
  2717. if (counter_select & CS_PORT_XMIT_PKTS)
  2718. write_port_cntr(ppd, C_TX_PKT_VL, idx_from_vl(vl), 0);
  2719. if (counter_select & CS_PORT_RCV_PKTS)
  2720. write_dev_cntr(dd, C_DC_RX_PKT_VL, idx_from_vl(vl), 0);
  2721. if (counter_select & CS_PORT_XMIT_WAIT)
  2722. write_port_cntr(ppd, C_TX_WAIT_VL, idx_from_vl(vl), 0);
  2723. /* sw_port_vl_congestion is 0 for HFIs */
  2724. if (counter_select & CS_PORT_RCV_FECN)
  2725. write_dev_cntr(dd, C_DC_RCV_FCN_VL, idx_from_vl(vl), 0);
  2726. if (counter_select & CS_PORT_RCV_BECN)
  2727. write_dev_cntr(dd, C_DC_RCV_BCN_VL, idx_from_vl(vl), 0);
  2728. /* port_vl_xmit_time_cong is 0 for HFIs */
  2729. /* port_vl_xmit_wasted_bw ??? */
  2730. /* port_vl_xmit_wait_data - TXE (table 13-9 HFI spec) ??? */
  2731. if (counter_select & CS_PORT_RCV_BUBBLE)
  2732. write_dev_cntr(dd, C_DC_RCV_BBL_VL, idx_from_vl(vl), 0);
  2733. /* if (counter_select & CS_PORT_MARK_FECN)
  2734. * write_csr(dd, DCC_PRF_PORT_VL_MARK_FECN_CNT + offset, 0);
  2735. */
  2736. if (counter_select & C_SW_XMIT_DSCD_VL)
  2737. write_port_cntr(ppd, C_SW_XMIT_DSCD_VL,
  2738. idx_from_vl(vl), 0);
  2739. }
  2740. if (resp_len)
  2741. *resp_len += sizeof(*req);
  2742. return reply((struct ib_mad_hdr *)pmp);
  2743. }
  2744. static int pma_set_opa_errorinfo(struct opa_pma_mad *pmp,
  2745. struct ib_device *ibdev,
  2746. u8 port, u32 *resp_len)
  2747. {
  2748. struct _port_ei *rsp;
  2749. struct opa_port_error_info_msg *req;
  2750. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  2751. u64 port_mask;
  2752. u32 num_ports;
  2753. u8 port_num;
  2754. u8 num_pslm;
  2755. u32 error_info_select;
  2756. req = (struct opa_port_error_info_msg *)pmp->data;
  2757. rsp = &req->port[0];
  2758. num_ports = OPA_AM_NPORT(be32_to_cpu(pmp->mad_hdr.attr_mod));
  2759. num_pslm = hweight64(be64_to_cpu(req->port_select_mask[3]));
  2760. memset(rsp, 0, sizeof(*rsp));
  2761. if (num_ports != 1 || num_ports != num_pslm) {
  2762. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2763. return reply((struct ib_mad_hdr *)pmp);
  2764. }
  2765. /*
  2766. * The bit set in the mask needs to be consistent with the port
  2767. * the request came in on.
  2768. */
  2769. port_mask = be64_to_cpu(req->port_select_mask[3]);
  2770. port_num = find_first_bit((unsigned long *)&port_mask,
  2771. sizeof(port_mask) * 8);
  2772. if (port_num != port) {
  2773. pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
  2774. return reply((struct ib_mad_hdr *)pmp);
  2775. }
  2776. error_info_select = be32_to_cpu(req->error_info_select_mask);
  2777. /* PortRcvErrorInfo */
  2778. if (error_info_select & ES_PORT_RCV_ERROR_INFO)
  2779. /* turn off status bit */
  2780. dd->err_info_rcvport.status_and_code &= ~OPA_EI_STATUS_SMASK;
  2781. /* ExcessiverBufferOverrunInfo */
  2782. if (error_info_select & ES_EXCESSIVE_BUFFER_OVERRUN_INFO)
  2783. /*
  2784. * status bit is essentially kept in the h/w - bit 5 of
  2785. * RCV_ERR_INFO
  2786. */
  2787. write_csr(dd, RCV_ERR_INFO,
  2788. RCV_ERR_INFO_RCV_EXCESS_BUFFER_OVERRUN_SMASK);
  2789. if (error_info_select & ES_PORT_XMIT_CONSTRAINT_ERROR_INFO)
  2790. dd->err_info_xmit_constraint.status &= ~OPA_EI_STATUS_SMASK;
  2791. if (error_info_select & ES_PORT_RCV_CONSTRAINT_ERROR_INFO)
  2792. dd->err_info_rcv_constraint.status &= ~OPA_EI_STATUS_SMASK;
  2793. /* UncorrectableErrorInfo */
  2794. if (error_info_select & ES_UNCORRECTABLE_ERROR_INFO)
  2795. /* turn off status bit */
  2796. dd->err_info_uncorrectable &= ~OPA_EI_STATUS_SMASK;
  2797. /* FMConfigErrorInfo */
  2798. if (error_info_select & ES_FM_CONFIG_ERROR_INFO)
  2799. /* turn off status bit */
  2800. dd->err_info_fmconfig &= ~OPA_EI_STATUS_SMASK;
  2801. if (resp_len)
  2802. *resp_len += sizeof(*req);
  2803. return reply((struct ib_mad_hdr *)pmp);
  2804. }
  2805. struct opa_congestion_info_attr {
  2806. __be16 congestion_info;
  2807. u8 control_table_cap; /* Multiple of 64 entry unit CCTs */
  2808. u8 congestion_log_length;
  2809. } __packed;
  2810. static int __subn_get_opa_cong_info(struct opa_smp *smp, u32 am, u8 *data,
  2811. struct ib_device *ibdev, u8 port,
  2812. u32 *resp_len)
  2813. {
  2814. struct opa_congestion_info_attr *p =
  2815. (struct opa_congestion_info_attr *)data;
  2816. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  2817. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  2818. p->congestion_info = 0;
  2819. p->control_table_cap = ppd->cc_max_table_entries;
  2820. p->congestion_log_length = OPA_CONG_LOG_ELEMS;
  2821. if (resp_len)
  2822. *resp_len += sizeof(*p);
  2823. return reply((struct ib_mad_hdr *)smp);
  2824. }
  2825. static int __subn_get_opa_cong_setting(struct opa_smp *smp, u32 am,
  2826. u8 *data, struct ib_device *ibdev,
  2827. u8 port, u32 *resp_len)
  2828. {
  2829. int i;
  2830. struct opa_congestion_setting_attr *p =
  2831. (struct opa_congestion_setting_attr *)data;
  2832. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  2833. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  2834. struct opa_congestion_setting_entry_shadow *entries;
  2835. struct cc_state *cc_state;
  2836. rcu_read_lock();
  2837. cc_state = get_cc_state(ppd);
  2838. if (!cc_state) {
  2839. rcu_read_unlock();
  2840. return reply((struct ib_mad_hdr *)smp);
  2841. }
  2842. entries = cc_state->cong_setting.entries;
  2843. p->port_control = cpu_to_be16(cc_state->cong_setting.port_control);
  2844. p->control_map = cpu_to_be32(cc_state->cong_setting.control_map);
  2845. for (i = 0; i < OPA_MAX_SLS; i++) {
  2846. p->entries[i].ccti_increase = entries[i].ccti_increase;
  2847. p->entries[i].ccti_timer = cpu_to_be16(entries[i].ccti_timer);
  2848. p->entries[i].trigger_threshold =
  2849. entries[i].trigger_threshold;
  2850. p->entries[i].ccti_min = entries[i].ccti_min;
  2851. }
  2852. rcu_read_unlock();
  2853. if (resp_len)
  2854. *resp_len += sizeof(*p);
  2855. return reply((struct ib_mad_hdr *)smp);
  2856. }
  2857. /*
  2858. * Apply congestion control information stored in the ppd to the
  2859. * active structure.
  2860. */
  2861. static void apply_cc_state(struct hfi1_pportdata *ppd)
  2862. {
  2863. struct cc_state *old_cc_state, *new_cc_state;
  2864. new_cc_state = kzalloc(sizeof(*new_cc_state), GFP_KERNEL);
  2865. if (!new_cc_state)
  2866. return;
  2867. /*
  2868. * Hold the lock for updating *and* to prevent ppd information
  2869. * from changing during the update.
  2870. */
  2871. spin_lock(&ppd->cc_state_lock);
  2872. old_cc_state = get_cc_state_protected(ppd);
  2873. if (!old_cc_state) {
  2874. /* never active, or shutting down */
  2875. spin_unlock(&ppd->cc_state_lock);
  2876. kfree(new_cc_state);
  2877. return;
  2878. }
  2879. *new_cc_state = *old_cc_state;
  2880. new_cc_state->cct.ccti_limit = ppd->total_cct_entry - 1;
  2881. memcpy(new_cc_state->cct.entries, ppd->ccti_entries,
  2882. ppd->total_cct_entry * sizeof(struct ib_cc_table_entry));
  2883. new_cc_state->cong_setting.port_control = IB_CC_CCS_PC_SL_BASED;
  2884. new_cc_state->cong_setting.control_map = ppd->cc_sl_control_map;
  2885. memcpy(new_cc_state->cong_setting.entries, ppd->congestion_entries,
  2886. OPA_MAX_SLS * sizeof(struct opa_congestion_setting_entry));
  2887. rcu_assign_pointer(ppd->cc_state, new_cc_state);
  2888. spin_unlock(&ppd->cc_state_lock);
  2889. kfree_rcu(old_cc_state, rcu);
  2890. }
  2891. static int __subn_set_opa_cong_setting(struct opa_smp *smp, u32 am, u8 *data,
  2892. struct ib_device *ibdev, u8 port,
  2893. u32 *resp_len)
  2894. {
  2895. struct opa_congestion_setting_attr *p =
  2896. (struct opa_congestion_setting_attr *)data;
  2897. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  2898. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  2899. struct opa_congestion_setting_entry_shadow *entries;
  2900. int i;
  2901. /*
  2902. * Save details from packet into the ppd. Hold the cc_state_lock so
  2903. * our information is consistent with anyone trying to apply the state.
  2904. */
  2905. spin_lock(&ppd->cc_state_lock);
  2906. ppd->cc_sl_control_map = be32_to_cpu(p->control_map);
  2907. entries = ppd->congestion_entries;
  2908. for (i = 0; i < OPA_MAX_SLS; i++) {
  2909. entries[i].ccti_increase = p->entries[i].ccti_increase;
  2910. entries[i].ccti_timer = be16_to_cpu(p->entries[i].ccti_timer);
  2911. entries[i].trigger_threshold =
  2912. p->entries[i].trigger_threshold;
  2913. entries[i].ccti_min = p->entries[i].ccti_min;
  2914. }
  2915. spin_unlock(&ppd->cc_state_lock);
  2916. /* now apply the information */
  2917. apply_cc_state(ppd);
  2918. return __subn_get_opa_cong_setting(smp, am, data, ibdev, port,
  2919. resp_len);
  2920. }
  2921. static int __subn_get_opa_hfi1_cong_log(struct opa_smp *smp, u32 am,
  2922. u8 *data, struct ib_device *ibdev,
  2923. u8 port, u32 *resp_len)
  2924. {
  2925. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  2926. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  2927. struct opa_hfi1_cong_log *cong_log = (struct opa_hfi1_cong_log *)data;
  2928. s64 ts;
  2929. int i;
  2930. if (am != 0) {
  2931. smp->status |= IB_SMP_INVALID_FIELD;
  2932. return reply((struct ib_mad_hdr *)smp);
  2933. }
  2934. spin_lock_irq(&ppd->cc_log_lock);
  2935. cong_log->log_type = OPA_CC_LOG_TYPE_HFI;
  2936. cong_log->congestion_flags = 0;
  2937. cong_log->threshold_event_counter =
  2938. cpu_to_be16(ppd->threshold_event_counter);
  2939. memcpy(cong_log->threshold_cong_event_map,
  2940. ppd->threshold_cong_event_map,
  2941. sizeof(cong_log->threshold_cong_event_map));
  2942. /* keep timestamp in units of 1.024 usec */
  2943. ts = ktime_to_ns(ktime_get()) / 1024;
  2944. cong_log->current_time_stamp = cpu_to_be32(ts);
  2945. for (i = 0; i < OPA_CONG_LOG_ELEMS; i++) {
  2946. struct opa_hfi1_cong_log_event_internal *cce =
  2947. &ppd->cc_events[ppd->cc_mad_idx++];
  2948. if (ppd->cc_mad_idx == OPA_CONG_LOG_ELEMS)
  2949. ppd->cc_mad_idx = 0;
  2950. /*
  2951. * Entries which are older than twice the time
  2952. * required to wrap the counter are supposed to
  2953. * be zeroed (CA10-49 IBTA, release 1.2.1, V1).
  2954. */
  2955. if ((u64)(ts - cce->timestamp) > (2 * UINT_MAX))
  2956. continue;
  2957. memcpy(cong_log->events[i].local_qp_cn_entry, &cce->lqpn, 3);
  2958. memcpy(cong_log->events[i].remote_qp_number_cn_entry,
  2959. &cce->rqpn, 3);
  2960. cong_log->events[i].sl_svc_type_cn_entry =
  2961. ((cce->sl & 0x1f) << 3) | (cce->svc_type & 0x7);
  2962. cong_log->events[i].remote_lid_cn_entry =
  2963. cpu_to_be32(cce->rlid);
  2964. cong_log->events[i].timestamp_cn_entry =
  2965. cpu_to_be32(cce->timestamp);
  2966. }
  2967. /*
  2968. * Reset threshold_cong_event_map, and threshold_event_counter
  2969. * to 0 when log is read.
  2970. */
  2971. memset(ppd->threshold_cong_event_map, 0x0,
  2972. sizeof(ppd->threshold_cong_event_map));
  2973. ppd->threshold_event_counter = 0;
  2974. spin_unlock_irq(&ppd->cc_log_lock);
  2975. if (resp_len)
  2976. *resp_len += sizeof(struct opa_hfi1_cong_log);
  2977. return reply((struct ib_mad_hdr *)smp);
  2978. }
  2979. static int __subn_get_opa_cc_table(struct opa_smp *smp, u32 am, u8 *data,
  2980. struct ib_device *ibdev, u8 port,
  2981. u32 *resp_len)
  2982. {
  2983. struct ib_cc_table_attr *cc_table_attr =
  2984. (struct ib_cc_table_attr *)data;
  2985. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  2986. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  2987. u32 start_block = OPA_AM_START_BLK(am);
  2988. u32 n_blocks = OPA_AM_NBLK(am);
  2989. struct ib_cc_table_entry_shadow *entries;
  2990. int i, j;
  2991. u32 sentry, eentry;
  2992. struct cc_state *cc_state;
  2993. /* sanity check n_blocks, start_block */
  2994. if (n_blocks == 0 ||
  2995. start_block + n_blocks > ppd->cc_max_table_entries) {
  2996. smp->status |= IB_SMP_INVALID_FIELD;
  2997. return reply((struct ib_mad_hdr *)smp);
  2998. }
  2999. rcu_read_lock();
  3000. cc_state = get_cc_state(ppd);
  3001. if (!cc_state) {
  3002. rcu_read_unlock();
  3003. return reply((struct ib_mad_hdr *)smp);
  3004. }
  3005. sentry = start_block * IB_CCT_ENTRIES;
  3006. eentry = sentry + (IB_CCT_ENTRIES * n_blocks);
  3007. cc_table_attr->ccti_limit = cpu_to_be16(cc_state->cct.ccti_limit);
  3008. entries = cc_state->cct.entries;
  3009. /* return n_blocks, though the last block may not be full */
  3010. for (j = 0, i = sentry; i < eentry; j++, i++)
  3011. cc_table_attr->ccti_entries[j].entry =
  3012. cpu_to_be16(entries[i].entry);
  3013. rcu_read_unlock();
  3014. if (resp_len)
  3015. *resp_len += sizeof(u16) * (IB_CCT_ENTRIES * n_blocks + 1);
  3016. return reply((struct ib_mad_hdr *)smp);
  3017. }
  3018. static int __subn_set_opa_cc_table(struct opa_smp *smp, u32 am, u8 *data,
  3019. struct ib_device *ibdev, u8 port,
  3020. u32 *resp_len)
  3021. {
  3022. struct ib_cc_table_attr *p = (struct ib_cc_table_attr *)data;
  3023. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  3024. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  3025. u32 start_block = OPA_AM_START_BLK(am);
  3026. u32 n_blocks = OPA_AM_NBLK(am);
  3027. struct ib_cc_table_entry_shadow *entries;
  3028. int i, j;
  3029. u32 sentry, eentry;
  3030. u16 ccti_limit;
  3031. /* sanity check n_blocks, start_block */
  3032. if (n_blocks == 0 ||
  3033. start_block + n_blocks > ppd->cc_max_table_entries) {
  3034. smp->status |= IB_SMP_INVALID_FIELD;
  3035. return reply((struct ib_mad_hdr *)smp);
  3036. }
  3037. sentry = start_block * IB_CCT_ENTRIES;
  3038. eentry = sentry + ((n_blocks - 1) * IB_CCT_ENTRIES) +
  3039. (be16_to_cpu(p->ccti_limit)) % IB_CCT_ENTRIES + 1;
  3040. /* sanity check ccti_limit */
  3041. ccti_limit = be16_to_cpu(p->ccti_limit);
  3042. if (ccti_limit + 1 > eentry) {
  3043. smp->status |= IB_SMP_INVALID_FIELD;
  3044. return reply((struct ib_mad_hdr *)smp);
  3045. }
  3046. /*
  3047. * Save details from packet into the ppd. Hold the cc_state_lock so
  3048. * our information is consistent with anyone trying to apply the state.
  3049. */
  3050. spin_lock(&ppd->cc_state_lock);
  3051. ppd->total_cct_entry = ccti_limit + 1;
  3052. entries = ppd->ccti_entries;
  3053. for (j = 0, i = sentry; i < eentry; j++, i++)
  3054. entries[i].entry = be16_to_cpu(p->ccti_entries[j].entry);
  3055. spin_unlock(&ppd->cc_state_lock);
  3056. /* now apply the information */
  3057. apply_cc_state(ppd);
  3058. return __subn_get_opa_cc_table(smp, am, data, ibdev, port, resp_len);
  3059. }
  3060. struct opa_led_info {
  3061. __be32 rsvd_led_mask;
  3062. __be32 rsvd;
  3063. };
  3064. #define OPA_LED_SHIFT 31
  3065. #define OPA_LED_MASK BIT(OPA_LED_SHIFT)
  3066. static int __subn_get_opa_led_info(struct opa_smp *smp, u32 am, u8 *data,
  3067. struct ib_device *ibdev, u8 port,
  3068. u32 *resp_len)
  3069. {
  3070. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  3071. struct hfi1_pportdata *ppd = dd->pport;
  3072. struct opa_led_info *p = (struct opa_led_info *)data;
  3073. u32 nport = OPA_AM_NPORT(am);
  3074. u32 is_beaconing_active;
  3075. if (nport != 1) {
  3076. smp->status |= IB_SMP_INVALID_FIELD;
  3077. return reply((struct ib_mad_hdr *)smp);
  3078. }
  3079. /*
  3080. * This pairs with the memory barrier in hfi1_start_led_override to
  3081. * ensure that we read the correct state of LED beaconing represented
  3082. * by led_override_timer_active
  3083. */
  3084. smp_rmb();
  3085. is_beaconing_active = !!atomic_read(&ppd->led_override_timer_active);
  3086. p->rsvd_led_mask = cpu_to_be32(is_beaconing_active << OPA_LED_SHIFT);
  3087. if (resp_len)
  3088. *resp_len += sizeof(struct opa_led_info);
  3089. return reply((struct ib_mad_hdr *)smp);
  3090. }
  3091. static int __subn_set_opa_led_info(struct opa_smp *smp, u32 am, u8 *data,
  3092. struct ib_device *ibdev, u8 port,
  3093. u32 *resp_len)
  3094. {
  3095. struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
  3096. struct opa_led_info *p = (struct opa_led_info *)data;
  3097. u32 nport = OPA_AM_NPORT(am);
  3098. int on = !!(be32_to_cpu(p->rsvd_led_mask) & OPA_LED_MASK);
  3099. if (nport != 1) {
  3100. smp->status |= IB_SMP_INVALID_FIELD;
  3101. return reply((struct ib_mad_hdr *)smp);
  3102. }
  3103. if (on)
  3104. hfi1_start_led_override(dd->pport, 2000, 1500);
  3105. else
  3106. shutdown_led_override(dd->pport);
  3107. return __subn_get_opa_led_info(smp, am, data, ibdev, port, resp_len);
  3108. }
  3109. static int subn_get_opa_sma(__be16 attr_id, struct opa_smp *smp, u32 am,
  3110. u8 *data, struct ib_device *ibdev, u8 port,
  3111. u32 *resp_len)
  3112. {
  3113. int ret;
  3114. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  3115. switch (attr_id) {
  3116. case IB_SMP_ATTR_NODE_DESC:
  3117. ret = __subn_get_opa_nodedesc(smp, am, data, ibdev, port,
  3118. resp_len);
  3119. break;
  3120. case IB_SMP_ATTR_NODE_INFO:
  3121. ret = __subn_get_opa_nodeinfo(smp, am, data, ibdev, port,
  3122. resp_len);
  3123. break;
  3124. case IB_SMP_ATTR_PORT_INFO:
  3125. ret = __subn_get_opa_portinfo(smp, am, data, ibdev, port,
  3126. resp_len);
  3127. break;
  3128. case IB_SMP_ATTR_PKEY_TABLE:
  3129. ret = __subn_get_opa_pkeytable(smp, am, data, ibdev, port,
  3130. resp_len);
  3131. break;
  3132. case OPA_ATTRIB_ID_SL_TO_SC_MAP:
  3133. ret = __subn_get_opa_sl_to_sc(smp, am, data, ibdev, port,
  3134. resp_len);
  3135. break;
  3136. case OPA_ATTRIB_ID_SC_TO_SL_MAP:
  3137. ret = __subn_get_opa_sc_to_sl(smp, am, data, ibdev, port,
  3138. resp_len);
  3139. break;
  3140. case OPA_ATTRIB_ID_SC_TO_VLT_MAP:
  3141. ret = __subn_get_opa_sc_to_vlt(smp, am, data, ibdev, port,
  3142. resp_len);
  3143. break;
  3144. case OPA_ATTRIB_ID_SC_TO_VLNT_MAP:
  3145. ret = __subn_get_opa_sc_to_vlnt(smp, am, data, ibdev, port,
  3146. resp_len);
  3147. break;
  3148. case OPA_ATTRIB_ID_PORT_STATE_INFO:
  3149. ret = __subn_get_opa_psi(smp, am, data, ibdev, port,
  3150. resp_len);
  3151. break;
  3152. case OPA_ATTRIB_ID_BUFFER_CONTROL_TABLE:
  3153. ret = __subn_get_opa_bct(smp, am, data, ibdev, port,
  3154. resp_len);
  3155. break;
  3156. case OPA_ATTRIB_ID_CABLE_INFO:
  3157. ret = __subn_get_opa_cable_info(smp, am, data, ibdev, port,
  3158. resp_len);
  3159. break;
  3160. case IB_SMP_ATTR_VL_ARB_TABLE:
  3161. ret = __subn_get_opa_vl_arb(smp, am, data, ibdev, port,
  3162. resp_len);
  3163. break;
  3164. case OPA_ATTRIB_ID_CONGESTION_INFO:
  3165. ret = __subn_get_opa_cong_info(smp, am, data, ibdev, port,
  3166. resp_len);
  3167. break;
  3168. case OPA_ATTRIB_ID_HFI_CONGESTION_SETTING:
  3169. ret = __subn_get_opa_cong_setting(smp, am, data, ibdev,
  3170. port, resp_len);
  3171. break;
  3172. case OPA_ATTRIB_ID_HFI_CONGESTION_LOG:
  3173. ret = __subn_get_opa_hfi1_cong_log(smp, am, data, ibdev,
  3174. port, resp_len);
  3175. break;
  3176. case OPA_ATTRIB_ID_CONGESTION_CONTROL_TABLE:
  3177. ret = __subn_get_opa_cc_table(smp, am, data, ibdev, port,
  3178. resp_len);
  3179. break;
  3180. case IB_SMP_ATTR_LED_INFO:
  3181. ret = __subn_get_opa_led_info(smp, am, data, ibdev, port,
  3182. resp_len);
  3183. break;
  3184. case IB_SMP_ATTR_SM_INFO:
  3185. if (ibp->rvp.port_cap_flags & IB_PORT_SM_DISABLED)
  3186. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  3187. if (ibp->rvp.port_cap_flags & IB_PORT_SM)
  3188. return IB_MAD_RESULT_SUCCESS;
  3189. /* FALLTHROUGH */
  3190. default:
  3191. smp->status |= IB_SMP_UNSUP_METH_ATTR;
  3192. ret = reply((struct ib_mad_hdr *)smp);
  3193. break;
  3194. }
  3195. return ret;
  3196. }
  3197. static int subn_set_opa_sma(__be16 attr_id, struct opa_smp *smp, u32 am,
  3198. u8 *data, struct ib_device *ibdev, u8 port,
  3199. u32 *resp_len)
  3200. {
  3201. int ret;
  3202. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  3203. switch (attr_id) {
  3204. case IB_SMP_ATTR_PORT_INFO:
  3205. ret = __subn_set_opa_portinfo(smp, am, data, ibdev, port,
  3206. resp_len);
  3207. break;
  3208. case IB_SMP_ATTR_PKEY_TABLE:
  3209. ret = __subn_set_opa_pkeytable(smp, am, data, ibdev, port,
  3210. resp_len);
  3211. break;
  3212. case OPA_ATTRIB_ID_SL_TO_SC_MAP:
  3213. ret = __subn_set_opa_sl_to_sc(smp, am, data, ibdev, port,
  3214. resp_len);
  3215. break;
  3216. case OPA_ATTRIB_ID_SC_TO_SL_MAP:
  3217. ret = __subn_set_opa_sc_to_sl(smp, am, data, ibdev, port,
  3218. resp_len);
  3219. break;
  3220. case OPA_ATTRIB_ID_SC_TO_VLT_MAP:
  3221. ret = __subn_set_opa_sc_to_vlt(smp, am, data, ibdev, port,
  3222. resp_len);
  3223. break;
  3224. case OPA_ATTRIB_ID_SC_TO_VLNT_MAP:
  3225. ret = __subn_set_opa_sc_to_vlnt(smp, am, data, ibdev, port,
  3226. resp_len);
  3227. break;
  3228. case OPA_ATTRIB_ID_PORT_STATE_INFO:
  3229. ret = __subn_set_opa_psi(smp, am, data, ibdev, port,
  3230. resp_len);
  3231. break;
  3232. case OPA_ATTRIB_ID_BUFFER_CONTROL_TABLE:
  3233. ret = __subn_set_opa_bct(smp, am, data, ibdev, port,
  3234. resp_len);
  3235. break;
  3236. case IB_SMP_ATTR_VL_ARB_TABLE:
  3237. ret = __subn_set_opa_vl_arb(smp, am, data, ibdev, port,
  3238. resp_len);
  3239. break;
  3240. case OPA_ATTRIB_ID_HFI_CONGESTION_SETTING:
  3241. ret = __subn_set_opa_cong_setting(smp, am, data, ibdev,
  3242. port, resp_len);
  3243. break;
  3244. case OPA_ATTRIB_ID_CONGESTION_CONTROL_TABLE:
  3245. ret = __subn_set_opa_cc_table(smp, am, data, ibdev, port,
  3246. resp_len);
  3247. break;
  3248. case IB_SMP_ATTR_LED_INFO:
  3249. ret = __subn_set_opa_led_info(smp, am, data, ibdev, port,
  3250. resp_len);
  3251. break;
  3252. case IB_SMP_ATTR_SM_INFO:
  3253. if (ibp->rvp.port_cap_flags & IB_PORT_SM_DISABLED)
  3254. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  3255. if (ibp->rvp.port_cap_flags & IB_PORT_SM)
  3256. return IB_MAD_RESULT_SUCCESS;
  3257. /* FALLTHROUGH */
  3258. default:
  3259. smp->status |= IB_SMP_UNSUP_METH_ATTR;
  3260. ret = reply((struct ib_mad_hdr *)smp);
  3261. break;
  3262. }
  3263. return ret;
  3264. }
  3265. static inline void set_aggr_error(struct opa_aggregate *ag)
  3266. {
  3267. ag->err_reqlength |= cpu_to_be16(0x8000);
  3268. }
  3269. static int subn_get_opa_aggregate(struct opa_smp *smp,
  3270. struct ib_device *ibdev, u8 port,
  3271. u32 *resp_len)
  3272. {
  3273. int i;
  3274. u32 num_attr = be32_to_cpu(smp->attr_mod) & 0x000000ff;
  3275. u8 *next_smp = opa_get_smp_data(smp);
  3276. if (num_attr < 1 || num_attr > 117) {
  3277. smp->status |= IB_SMP_INVALID_FIELD;
  3278. return reply((struct ib_mad_hdr *)smp);
  3279. }
  3280. for (i = 0; i < num_attr; i++) {
  3281. struct opa_aggregate *agg;
  3282. size_t agg_data_len;
  3283. size_t agg_size;
  3284. u32 am;
  3285. agg = (struct opa_aggregate *)next_smp;
  3286. agg_data_len = (be16_to_cpu(agg->err_reqlength) & 0x007f) * 8;
  3287. agg_size = sizeof(*agg) + agg_data_len;
  3288. am = be32_to_cpu(agg->attr_mod);
  3289. *resp_len += agg_size;
  3290. if (next_smp + agg_size > ((u8 *)smp) + sizeof(*smp)) {
  3291. smp->status |= IB_SMP_INVALID_FIELD;
  3292. return reply((struct ib_mad_hdr *)smp);
  3293. }
  3294. /* zero the payload for this segment */
  3295. memset(next_smp + sizeof(*agg), 0, agg_data_len);
  3296. (void)subn_get_opa_sma(agg->attr_id, smp, am, agg->data,
  3297. ibdev, port, NULL);
  3298. if (smp->status & ~IB_SMP_DIRECTION) {
  3299. set_aggr_error(agg);
  3300. return reply((struct ib_mad_hdr *)smp);
  3301. }
  3302. next_smp += agg_size;
  3303. }
  3304. return reply((struct ib_mad_hdr *)smp);
  3305. }
  3306. static int subn_set_opa_aggregate(struct opa_smp *smp,
  3307. struct ib_device *ibdev, u8 port,
  3308. u32 *resp_len)
  3309. {
  3310. int i;
  3311. u32 num_attr = be32_to_cpu(smp->attr_mod) & 0x000000ff;
  3312. u8 *next_smp = opa_get_smp_data(smp);
  3313. if (num_attr < 1 || num_attr > 117) {
  3314. smp->status |= IB_SMP_INVALID_FIELD;
  3315. return reply((struct ib_mad_hdr *)smp);
  3316. }
  3317. for (i = 0; i < num_attr; i++) {
  3318. struct opa_aggregate *agg;
  3319. size_t agg_data_len;
  3320. size_t agg_size;
  3321. u32 am;
  3322. agg = (struct opa_aggregate *)next_smp;
  3323. agg_data_len = (be16_to_cpu(agg->err_reqlength) & 0x007f) * 8;
  3324. agg_size = sizeof(*agg) + agg_data_len;
  3325. am = be32_to_cpu(agg->attr_mod);
  3326. *resp_len += agg_size;
  3327. if (next_smp + agg_size > ((u8 *)smp) + sizeof(*smp)) {
  3328. smp->status |= IB_SMP_INVALID_FIELD;
  3329. return reply((struct ib_mad_hdr *)smp);
  3330. }
  3331. (void)subn_set_opa_sma(agg->attr_id, smp, am, agg->data,
  3332. ibdev, port, NULL);
  3333. if (smp->status & ~IB_SMP_DIRECTION) {
  3334. set_aggr_error(agg);
  3335. return reply((struct ib_mad_hdr *)smp);
  3336. }
  3337. next_smp += agg_size;
  3338. }
  3339. return reply((struct ib_mad_hdr *)smp);
  3340. }
  3341. /*
  3342. * OPAv1 specifies that, on the transition to link up, these counters
  3343. * are cleared:
  3344. * PortRcvErrors [*]
  3345. * LinkErrorRecovery
  3346. * LocalLinkIntegrityErrors
  3347. * ExcessiveBufferOverruns [*]
  3348. *
  3349. * [*] Error info associated with these counters is retained, but the
  3350. * error info status is reset to 0.
  3351. */
  3352. void clear_linkup_counters(struct hfi1_devdata *dd)
  3353. {
  3354. /* PortRcvErrors */
  3355. write_dev_cntr(dd, C_DC_RCV_ERR, CNTR_INVALID_VL, 0);
  3356. dd->err_info_rcvport.status_and_code &= ~OPA_EI_STATUS_SMASK;
  3357. /* LinkErrorRecovery */
  3358. write_dev_cntr(dd, C_DC_SEQ_CRC_CNT, CNTR_INVALID_VL, 0);
  3359. write_dev_cntr(dd, C_DC_REINIT_FROM_PEER_CNT, CNTR_INVALID_VL, 0);
  3360. /* LocalLinkIntegrityErrors */
  3361. write_dev_cntr(dd, C_DC_RX_REPLAY, CNTR_INVALID_VL, 0);
  3362. /* ExcessiveBufferOverruns */
  3363. write_dev_cntr(dd, C_RCV_OVF, CNTR_INVALID_VL, 0);
  3364. dd->rcv_ovfl_cnt = 0;
  3365. dd->err_info_xmit_constraint.status &= ~OPA_EI_STATUS_SMASK;
  3366. }
  3367. /*
  3368. * is_local_mad() returns 1 if 'mad' is sent from, and destined to the
  3369. * local node, 0 otherwise.
  3370. */
  3371. static int is_local_mad(struct hfi1_ibport *ibp, const struct opa_mad *mad,
  3372. const struct ib_wc *in_wc)
  3373. {
  3374. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  3375. const struct opa_smp *smp = (const struct opa_smp *)mad;
  3376. if (smp->mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
  3377. return (smp->hop_cnt == 0 &&
  3378. smp->route.dr.dr_slid == OPA_LID_PERMISSIVE &&
  3379. smp->route.dr.dr_dlid == OPA_LID_PERMISSIVE);
  3380. }
  3381. return (in_wc->slid == ppd->lid);
  3382. }
  3383. /*
  3384. * opa_local_smp_check() should only be called on MADs for which
  3385. * is_local_mad() returns true. It applies the SMP checks that are
  3386. * specific to SMPs which are sent from, and destined to this node.
  3387. * opa_local_smp_check() returns 0 if the SMP passes its checks, 1
  3388. * otherwise.
  3389. *
  3390. * SMPs which arrive from other nodes are instead checked by
  3391. * opa_smp_check().
  3392. */
  3393. static int opa_local_smp_check(struct hfi1_ibport *ibp,
  3394. const struct ib_wc *in_wc)
  3395. {
  3396. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  3397. u16 slid = in_wc->slid;
  3398. u16 pkey;
  3399. if (in_wc->pkey_index >= ARRAY_SIZE(ppd->pkeys))
  3400. return 1;
  3401. pkey = ppd->pkeys[in_wc->pkey_index];
  3402. /*
  3403. * We need to do the "node-local" checks specified in OPAv1,
  3404. * rev 0.90, section 9.10.26, which are:
  3405. * - pkey is 0x7fff, or 0xffff
  3406. * - Source QPN == 0 || Destination QPN == 0
  3407. * - the MAD header's management class is either
  3408. * IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE or
  3409. * IB_MGMT_CLASS_SUBN_LID_ROUTED
  3410. * - SLID != 0
  3411. *
  3412. * However, we know (and so don't need to check again) that,
  3413. * for local SMPs, the MAD stack passes MADs with:
  3414. * - Source QPN of 0
  3415. * - MAD mgmt_class is IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
  3416. * - SLID is either: OPA_LID_PERMISSIVE (0xFFFFFFFF), or
  3417. * our own port's lid
  3418. *
  3419. */
  3420. if (pkey == LIM_MGMT_P_KEY || pkey == FULL_MGMT_P_KEY)
  3421. return 0;
  3422. ingress_pkey_table_fail(ppd, pkey, slid);
  3423. return 1;
  3424. }
  3425. static int process_subn_opa(struct ib_device *ibdev, int mad_flags,
  3426. u8 port, const struct opa_mad *in_mad,
  3427. struct opa_mad *out_mad,
  3428. u32 *resp_len)
  3429. {
  3430. struct opa_smp *smp = (struct opa_smp *)out_mad;
  3431. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  3432. u8 *data;
  3433. u32 am;
  3434. __be16 attr_id;
  3435. int ret;
  3436. *out_mad = *in_mad;
  3437. data = opa_get_smp_data(smp);
  3438. am = be32_to_cpu(smp->attr_mod);
  3439. attr_id = smp->attr_id;
  3440. if (smp->class_version != OPA_SM_CLASS_VERSION) {
  3441. smp->status |= IB_SMP_UNSUP_VERSION;
  3442. ret = reply((struct ib_mad_hdr *)smp);
  3443. return ret;
  3444. }
  3445. ret = check_mkey(ibp, (struct ib_mad_hdr *)smp, mad_flags, smp->mkey,
  3446. smp->route.dr.dr_slid, smp->route.dr.return_path,
  3447. smp->hop_cnt);
  3448. if (ret) {
  3449. u32 port_num = be32_to_cpu(smp->attr_mod);
  3450. /*
  3451. * If this is a get/set portinfo, we already check the
  3452. * M_Key if the MAD is for another port and the M_Key
  3453. * is OK on the receiving port. This check is needed
  3454. * to increment the error counters when the M_Key
  3455. * fails to match on *both* ports.
  3456. */
  3457. if (attr_id == IB_SMP_ATTR_PORT_INFO &&
  3458. (smp->method == IB_MGMT_METHOD_GET ||
  3459. smp->method == IB_MGMT_METHOD_SET) &&
  3460. port_num && port_num <= ibdev->phys_port_cnt &&
  3461. port != port_num)
  3462. (void)check_mkey(to_iport(ibdev, port_num),
  3463. (struct ib_mad_hdr *)smp, 0,
  3464. smp->mkey, smp->route.dr.dr_slid,
  3465. smp->route.dr.return_path,
  3466. smp->hop_cnt);
  3467. ret = IB_MAD_RESULT_FAILURE;
  3468. return ret;
  3469. }
  3470. *resp_len = opa_get_smp_header_size(smp);
  3471. switch (smp->method) {
  3472. case IB_MGMT_METHOD_GET:
  3473. switch (attr_id) {
  3474. default:
  3475. clear_opa_smp_data(smp);
  3476. ret = subn_get_opa_sma(attr_id, smp, am, data,
  3477. ibdev, port, resp_len);
  3478. break;
  3479. case OPA_ATTRIB_ID_AGGREGATE:
  3480. ret = subn_get_opa_aggregate(smp, ibdev, port,
  3481. resp_len);
  3482. break;
  3483. }
  3484. break;
  3485. case IB_MGMT_METHOD_SET:
  3486. switch (attr_id) {
  3487. default:
  3488. ret = subn_set_opa_sma(attr_id, smp, am, data,
  3489. ibdev, port, resp_len);
  3490. break;
  3491. case OPA_ATTRIB_ID_AGGREGATE:
  3492. ret = subn_set_opa_aggregate(smp, ibdev, port,
  3493. resp_len);
  3494. break;
  3495. }
  3496. break;
  3497. case IB_MGMT_METHOD_TRAP:
  3498. case IB_MGMT_METHOD_REPORT:
  3499. case IB_MGMT_METHOD_REPORT_RESP:
  3500. case IB_MGMT_METHOD_GET_RESP:
  3501. /*
  3502. * The ib_mad module will call us to process responses
  3503. * before checking for other consumers.
  3504. * Just tell the caller to process it normally.
  3505. */
  3506. ret = IB_MAD_RESULT_SUCCESS;
  3507. break;
  3508. default:
  3509. smp->status |= IB_SMP_UNSUP_METHOD;
  3510. ret = reply((struct ib_mad_hdr *)smp);
  3511. break;
  3512. }
  3513. return ret;
  3514. }
  3515. static int process_subn(struct ib_device *ibdev, int mad_flags,
  3516. u8 port, const struct ib_mad *in_mad,
  3517. struct ib_mad *out_mad)
  3518. {
  3519. struct ib_smp *smp = (struct ib_smp *)out_mad;
  3520. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  3521. int ret;
  3522. *out_mad = *in_mad;
  3523. if (smp->class_version != 1) {
  3524. smp->status |= IB_SMP_UNSUP_VERSION;
  3525. ret = reply((struct ib_mad_hdr *)smp);
  3526. return ret;
  3527. }
  3528. ret = check_mkey(ibp, (struct ib_mad_hdr *)smp, mad_flags,
  3529. smp->mkey, (__force __be32)smp->dr_slid,
  3530. smp->return_path, smp->hop_cnt);
  3531. if (ret) {
  3532. u32 port_num = be32_to_cpu(smp->attr_mod);
  3533. /*
  3534. * If this is a get/set portinfo, we already check the
  3535. * M_Key if the MAD is for another port and the M_Key
  3536. * is OK on the receiving port. This check is needed
  3537. * to increment the error counters when the M_Key
  3538. * fails to match on *both* ports.
  3539. */
  3540. if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
  3541. (smp->method == IB_MGMT_METHOD_GET ||
  3542. smp->method == IB_MGMT_METHOD_SET) &&
  3543. port_num && port_num <= ibdev->phys_port_cnt &&
  3544. port != port_num)
  3545. (void)check_mkey(to_iport(ibdev, port_num),
  3546. (struct ib_mad_hdr *)smp, 0,
  3547. smp->mkey,
  3548. (__force __be32)smp->dr_slid,
  3549. smp->return_path, smp->hop_cnt);
  3550. ret = IB_MAD_RESULT_FAILURE;
  3551. return ret;
  3552. }
  3553. switch (smp->method) {
  3554. case IB_MGMT_METHOD_GET:
  3555. switch (smp->attr_id) {
  3556. case IB_SMP_ATTR_NODE_INFO:
  3557. ret = subn_get_nodeinfo(smp, ibdev, port);
  3558. break;
  3559. default:
  3560. smp->status |= IB_SMP_UNSUP_METH_ATTR;
  3561. ret = reply((struct ib_mad_hdr *)smp);
  3562. break;
  3563. }
  3564. break;
  3565. }
  3566. return ret;
  3567. }
  3568. static int process_perf(struct ib_device *ibdev, u8 port,
  3569. const struct ib_mad *in_mad,
  3570. struct ib_mad *out_mad)
  3571. {
  3572. struct ib_pma_mad *pmp = (struct ib_pma_mad *)out_mad;
  3573. struct ib_class_port_info *cpi = (struct ib_class_port_info *)
  3574. &pmp->data;
  3575. int ret = IB_MAD_RESULT_FAILURE;
  3576. *out_mad = *in_mad;
  3577. if (pmp->mad_hdr.class_version != 1) {
  3578. pmp->mad_hdr.status |= IB_SMP_UNSUP_VERSION;
  3579. ret = reply((struct ib_mad_hdr *)pmp);
  3580. return ret;
  3581. }
  3582. switch (pmp->mad_hdr.method) {
  3583. case IB_MGMT_METHOD_GET:
  3584. switch (pmp->mad_hdr.attr_id) {
  3585. case IB_PMA_PORT_COUNTERS:
  3586. ret = pma_get_ib_portcounters(pmp, ibdev, port);
  3587. break;
  3588. case IB_PMA_PORT_COUNTERS_EXT:
  3589. ret = pma_get_ib_portcounters_ext(pmp, ibdev, port);
  3590. break;
  3591. case IB_PMA_CLASS_PORT_INFO:
  3592. cpi->capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
  3593. ret = reply((struct ib_mad_hdr *)pmp);
  3594. break;
  3595. default:
  3596. pmp->mad_hdr.status |= IB_SMP_UNSUP_METH_ATTR;
  3597. ret = reply((struct ib_mad_hdr *)pmp);
  3598. break;
  3599. }
  3600. break;
  3601. case IB_MGMT_METHOD_SET:
  3602. if (pmp->mad_hdr.attr_id) {
  3603. pmp->mad_hdr.status |= IB_SMP_UNSUP_METH_ATTR;
  3604. ret = reply((struct ib_mad_hdr *)pmp);
  3605. }
  3606. break;
  3607. case IB_MGMT_METHOD_TRAP:
  3608. case IB_MGMT_METHOD_GET_RESP:
  3609. /*
  3610. * The ib_mad module will call us to process responses
  3611. * before checking for other consumers.
  3612. * Just tell the caller to process it normally.
  3613. */
  3614. ret = IB_MAD_RESULT_SUCCESS;
  3615. break;
  3616. default:
  3617. pmp->mad_hdr.status |= IB_SMP_UNSUP_METHOD;
  3618. ret = reply((struct ib_mad_hdr *)pmp);
  3619. break;
  3620. }
  3621. return ret;
  3622. }
  3623. static int process_perf_opa(struct ib_device *ibdev, u8 port,
  3624. const struct opa_mad *in_mad,
  3625. struct opa_mad *out_mad, u32 *resp_len)
  3626. {
  3627. struct opa_pma_mad *pmp = (struct opa_pma_mad *)out_mad;
  3628. int ret;
  3629. *out_mad = *in_mad;
  3630. if (pmp->mad_hdr.class_version != OPA_SM_CLASS_VERSION) {
  3631. pmp->mad_hdr.status |= IB_SMP_UNSUP_VERSION;
  3632. return reply((struct ib_mad_hdr *)pmp);
  3633. }
  3634. *resp_len = sizeof(pmp->mad_hdr);
  3635. switch (pmp->mad_hdr.method) {
  3636. case IB_MGMT_METHOD_GET:
  3637. switch (pmp->mad_hdr.attr_id) {
  3638. case IB_PMA_CLASS_PORT_INFO:
  3639. ret = pma_get_opa_classportinfo(pmp, ibdev, resp_len);
  3640. break;
  3641. case OPA_PM_ATTRIB_ID_PORT_STATUS:
  3642. ret = pma_get_opa_portstatus(pmp, ibdev, port,
  3643. resp_len);
  3644. break;
  3645. case OPA_PM_ATTRIB_ID_DATA_PORT_COUNTERS:
  3646. ret = pma_get_opa_datacounters(pmp, ibdev, port,
  3647. resp_len);
  3648. break;
  3649. case OPA_PM_ATTRIB_ID_ERROR_PORT_COUNTERS:
  3650. ret = pma_get_opa_porterrors(pmp, ibdev, port,
  3651. resp_len);
  3652. break;
  3653. case OPA_PM_ATTRIB_ID_ERROR_INFO:
  3654. ret = pma_get_opa_errorinfo(pmp, ibdev, port,
  3655. resp_len);
  3656. break;
  3657. default:
  3658. pmp->mad_hdr.status |= IB_SMP_UNSUP_METH_ATTR;
  3659. ret = reply((struct ib_mad_hdr *)pmp);
  3660. break;
  3661. }
  3662. break;
  3663. case IB_MGMT_METHOD_SET:
  3664. switch (pmp->mad_hdr.attr_id) {
  3665. case OPA_PM_ATTRIB_ID_CLEAR_PORT_STATUS:
  3666. ret = pma_set_opa_portstatus(pmp, ibdev, port,
  3667. resp_len);
  3668. break;
  3669. case OPA_PM_ATTRIB_ID_ERROR_INFO:
  3670. ret = pma_set_opa_errorinfo(pmp, ibdev, port,
  3671. resp_len);
  3672. break;
  3673. default:
  3674. pmp->mad_hdr.status |= IB_SMP_UNSUP_METH_ATTR;
  3675. ret = reply((struct ib_mad_hdr *)pmp);
  3676. break;
  3677. }
  3678. break;
  3679. case IB_MGMT_METHOD_TRAP:
  3680. case IB_MGMT_METHOD_GET_RESP:
  3681. /*
  3682. * The ib_mad module will call us to process responses
  3683. * before checking for other consumers.
  3684. * Just tell the caller to process it normally.
  3685. */
  3686. ret = IB_MAD_RESULT_SUCCESS;
  3687. break;
  3688. default:
  3689. pmp->mad_hdr.status |= IB_SMP_UNSUP_METHOD;
  3690. ret = reply((struct ib_mad_hdr *)pmp);
  3691. break;
  3692. }
  3693. return ret;
  3694. }
  3695. static int hfi1_process_opa_mad(struct ib_device *ibdev, int mad_flags,
  3696. u8 port, const struct ib_wc *in_wc,
  3697. const struct ib_grh *in_grh,
  3698. const struct opa_mad *in_mad,
  3699. struct opa_mad *out_mad, size_t *out_mad_size,
  3700. u16 *out_mad_pkey_index)
  3701. {
  3702. int ret;
  3703. int pkey_idx;
  3704. u32 resp_len = 0;
  3705. struct hfi1_ibport *ibp = to_iport(ibdev, port);
  3706. pkey_idx = hfi1_lookup_pkey_idx(ibp, LIM_MGMT_P_KEY);
  3707. if (pkey_idx < 0) {
  3708. pr_warn("failed to find limited mgmt pkey, defaulting 0x%x\n",
  3709. hfi1_get_pkey(ibp, 1));
  3710. pkey_idx = 1;
  3711. }
  3712. *out_mad_pkey_index = (u16)pkey_idx;
  3713. switch (in_mad->mad_hdr.mgmt_class) {
  3714. case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
  3715. case IB_MGMT_CLASS_SUBN_LID_ROUTED:
  3716. if (is_local_mad(ibp, in_mad, in_wc)) {
  3717. ret = opa_local_smp_check(ibp, in_wc);
  3718. if (ret)
  3719. return IB_MAD_RESULT_FAILURE;
  3720. }
  3721. ret = process_subn_opa(ibdev, mad_flags, port, in_mad,
  3722. out_mad, &resp_len);
  3723. goto bail;
  3724. case IB_MGMT_CLASS_PERF_MGMT:
  3725. ret = process_perf_opa(ibdev, port, in_mad, out_mad,
  3726. &resp_len);
  3727. goto bail;
  3728. default:
  3729. ret = IB_MAD_RESULT_SUCCESS;
  3730. }
  3731. bail:
  3732. if (ret & IB_MAD_RESULT_REPLY)
  3733. *out_mad_size = round_up(resp_len, 8);
  3734. else if (ret & IB_MAD_RESULT_SUCCESS)
  3735. *out_mad_size = in_wc->byte_len - sizeof(struct ib_grh);
  3736. return ret;
  3737. }
  3738. static int hfi1_process_ib_mad(struct ib_device *ibdev, int mad_flags, u8 port,
  3739. const struct ib_wc *in_wc,
  3740. const struct ib_grh *in_grh,
  3741. const struct ib_mad *in_mad,
  3742. struct ib_mad *out_mad)
  3743. {
  3744. int ret;
  3745. switch (in_mad->mad_hdr.mgmt_class) {
  3746. case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
  3747. case IB_MGMT_CLASS_SUBN_LID_ROUTED:
  3748. ret = process_subn(ibdev, mad_flags, port, in_mad, out_mad);
  3749. break;
  3750. case IB_MGMT_CLASS_PERF_MGMT:
  3751. ret = process_perf(ibdev, port, in_mad, out_mad);
  3752. break;
  3753. default:
  3754. ret = IB_MAD_RESULT_SUCCESS;
  3755. break;
  3756. }
  3757. return ret;
  3758. }
  3759. /**
  3760. * hfi1_process_mad - process an incoming MAD packet
  3761. * @ibdev: the infiniband device this packet came in on
  3762. * @mad_flags: MAD flags
  3763. * @port: the port number this packet came in on
  3764. * @in_wc: the work completion entry for this packet
  3765. * @in_grh: the global route header for this packet
  3766. * @in_mad: the incoming MAD
  3767. * @out_mad: any outgoing MAD reply
  3768. *
  3769. * Returns IB_MAD_RESULT_SUCCESS if this is a MAD that we are not
  3770. * interested in processing.
  3771. *
  3772. * Note that the verbs framework has already done the MAD sanity checks,
  3773. * and hop count/pointer updating for IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
  3774. * MADs.
  3775. *
  3776. * This is called by the ib_mad module.
  3777. */
  3778. int hfi1_process_mad(struct ib_device *ibdev, int mad_flags, u8 port,
  3779. const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  3780. const struct ib_mad_hdr *in_mad, size_t in_mad_size,
  3781. struct ib_mad_hdr *out_mad, size_t *out_mad_size,
  3782. u16 *out_mad_pkey_index)
  3783. {
  3784. switch (in_mad->base_version) {
  3785. case OPA_MGMT_BASE_VERSION:
  3786. if (unlikely(in_mad_size != sizeof(struct opa_mad))) {
  3787. dev_err(ibdev->dma_device, "invalid in_mad_size\n");
  3788. return IB_MAD_RESULT_FAILURE;
  3789. }
  3790. return hfi1_process_opa_mad(ibdev, mad_flags, port,
  3791. in_wc, in_grh,
  3792. (struct opa_mad *)in_mad,
  3793. (struct opa_mad *)out_mad,
  3794. out_mad_size,
  3795. out_mad_pkey_index);
  3796. case IB_MGMT_BASE_VERSION:
  3797. return hfi1_process_ib_mad(ibdev, mad_flags, port,
  3798. in_wc, in_grh,
  3799. (const struct ib_mad *)in_mad,
  3800. (struct ib_mad *)out_mad);
  3801. default:
  3802. break;
  3803. }
  3804. return IB_MAD_RESULT_FAILURE;
  3805. }