mcp320x.c 11 KB

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  1. /*
  2. * Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com>
  3. * Copyright (C) 2014 Rose Technology
  4. * Allan Bendorff Jensen <abj@rosetechnology.dk>
  5. * Soren Andersen <san@rosetechnology.dk>
  6. *
  7. * Driver for following ADC chips from Microchip Technology's:
  8. * 10 Bit converter
  9. * MCP3001
  10. * MCP3002
  11. * MCP3004
  12. * MCP3008
  13. * ------------
  14. * 12 bit converter
  15. * MCP3201
  16. * MCP3202
  17. * MCP3204
  18. * MCP3208
  19. * ------------
  20. *
  21. * Datasheet can be found here:
  22. * http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001
  23. * http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf mcp3002
  24. * http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf mcp3004/08
  25. * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf mcp3201
  26. * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf mcp3202
  27. * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf mcp3204/08
  28. * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301
  29. *
  30. * This program is free software; you can redistribute it and/or modify
  31. * it under the terms of the GNU General Public License version 2 as
  32. * published by the Free Software Foundation.
  33. */
  34. #include <linux/err.h>
  35. #include <linux/delay.h>
  36. #include <linux/spi/spi.h>
  37. #include <linux/module.h>
  38. #include <linux/iio/iio.h>
  39. #include <linux/regulator/consumer.h>
  40. enum {
  41. mcp3001,
  42. mcp3002,
  43. mcp3004,
  44. mcp3008,
  45. mcp3201,
  46. mcp3202,
  47. mcp3204,
  48. mcp3208,
  49. mcp3301,
  50. };
  51. struct mcp320x_chip_info {
  52. const struct iio_chan_spec *channels;
  53. unsigned int num_channels;
  54. unsigned int resolution;
  55. };
  56. struct mcp320x {
  57. struct spi_device *spi;
  58. struct spi_message msg;
  59. struct spi_transfer transfer[2];
  60. struct regulator *reg;
  61. struct mutex lock;
  62. const struct mcp320x_chip_info *chip_info;
  63. u8 tx_buf ____cacheline_aligned;
  64. u8 rx_buf[2];
  65. };
  66. static int mcp320x_channel_to_tx_data(int device_index,
  67. const unsigned int channel, bool differential)
  68. {
  69. int start_bit = 1;
  70. switch (device_index) {
  71. case mcp3001:
  72. case mcp3201:
  73. case mcp3301:
  74. return 0;
  75. case mcp3002:
  76. case mcp3202:
  77. return ((start_bit << 4) | (!differential << 3) |
  78. (channel << 2));
  79. case mcp3004:
  80. case mcp3204:
  81. case mcp3008:
  82. case mcp3208:
  83. return ((start_bit << 6) | (!differential << 5) |
  84. (channel << 2));
  85. default:
  86. return -EINVAL;
  87. }
  88. }
  89. static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
  90. bool differential, int device_index)
  91. {
  92. int ret;
  93. adc->rx_buf[0] = 0;
  94. adc->rx_buf[1] = 0;
  95. adc->tx_buf = mcp320x_channel_to_tx_data(device_index,
  96. channel, differential);
  97. if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) {
  98. ret = spi_sync(adc->spi, &adc->msg);
  99. if (ret < 0)
  100. return ret;
  101. } else {
  102. ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf));
  103. if (ret < 0)
  104. return ret;
  105. }
  106. switch (device_index) {
  107. case mcp3001:
  108. return (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
  109. case mcp3002:
  110. case mcp3004:
  111. case mcp3008:
  112. return (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
  113. case mcp3201:
  114. return (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
  115. case mcp3202:
  116. case mcp3204:
  117. case mcp3208:
  118. return (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
  119. case mcp3301:
  120. return sign_extend32((adc->rx_buf[0] & 0x1f) << 8 | adc->rx_buf[1], 12);
  121. default:
  122. return -EINVAL;
  123. }
  124. }
  125. static int mcp320x_read_raw(struct iio_dev *indio_dev,
  126. struct iio_chan_spec const *channel, int *val,
  127. int *val2, long mask)
  128. {
  129. struct mcp320x *adc = iio_priv(indio_dev);
  130. int ret = -EINVAL;
  131. int device_index = 0;
  132. mutex_lock(&adc->lock);
  133. device_index = spi_get_device_id(adc->spi)->driver_data;
  134. switch (mask) {
  135. case IIO_CHAN_INFO_RAW:
  136. ret = mcp320x_adc_conversion(adc, channel->address,
  137. channel->differential, device_index);
  138. if (ret < 0)
  139. goto out;
  140. *val = ret;
  141. ret = IIO_VAL_INT;
  142. break;
  143. case IIO_CHAN_INFO_SCALE:
  144. ret = regulator_get_voltage(adc->reg);
  145. if (ret < 0)
  146. goto out;
  147. /* convert regulator output voltage to mV */
  148. *val = ret / 1000;
  149. *val2 = adc->chip_info->resolution;
  150. ret = IIO_VAL_FRACTIONAL_LOG2;
  151. break;
  152. }
  153. out:
  154. mutex_unlock(&adc->lock);
  155. return ret;
  156. }
  157. #define MCP320X_VOLTAGE_CHANNEL(num) \
  158. { \
  159. .type = IIO_VOLTAGE, \
  160. .indexed = 1, \
  161. .channel = (num), \
  162. .address = (num), \
  163. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  164. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
  165. }
  166. #define MCP320X_VOLTAGE_CHANNEL_DIFF(chan1, chan2) \
  167. { \
  168. .type = IIO_VOLTAGE, \
  169. .indexed = 1, \
  170. .channel = (chan1), \
  171. .channel2 = (chan2), \
  172. .address = (chan1), \
  173. .differential = 1, \
  174. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  175. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
  176. }
  177. static const struct iio_chan_spec mcp3201_channels[] = {
  178. MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
  179. };
  180. static const struct iio_chan_spec mcp3202_channels[] = {
  181. MCP320X_VOLTAGE_CHANNEL(0),
  182. MCP320X_VOLTAGE_CHANNEL(1),
  183. MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
  184. MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
  185. };
  186. static const struct iio_chan_spec mcp3204_channels[] = {
  187. MCP320X_VOLTAGE_CHANNEL(0),
  188. MCP320X_VOLTAGE_CHANNEL(1),
  189. MCP320X_VOLTAGE_CHANNEL(2),
  190. MCP320X_VOLTAGE_CHANNEL(3),
  191. MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
  192. MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
  193. MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
  194. MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
  195. };
  196. static const struct iio_chan_spec mcp3208_channels[] = {
  197. MCP320X_VOLTAGE_CHANNEL(0),
  198. MCP320X_VOLTAGE_CHANNEL(1),
  199. MCP320X_VOLTAGE_CHANNEL(2),
  200. MCP320X_VOLTAGE_CHANNEL(3),
  201. MCP320X_VOLTAGE_CHANNEL(4),
  202. MCP320X_VOLTAGE_CHANNEL(5),
  203. MCP320X_VOLTAGE_CHANNEL(6),
  204. MCP320X_VOLTAGE_CHANNEL(7),
  205. MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
  206. MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
  207. MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
  208. MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
  209. MCP320X_VOLTAGE_CHANNEL_DIFF(4, 5),
  210. MCP320X_VOLTAGE_CHANNEL_DIFF(5, 4),
  211. MCP320X_VOLTAGE_CHANNEL_DIFF(6, 7),
  212. MCP320X_VOLTAGE_CHANNEL_DIFF(7, 6),
  213. };
  214. static const struct iio_info mcp320x_info = {
  215. .read_raw = mcp320x_read_raw,
  216. .driver_module = THIS_MODULE,
  217. };
  218. static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
  219. [mcp3001] = {
  220. .channels = mcp3201_channels,
  221. .num_channels = ARRAY_SIZE(mcp3201_channels),
  222. .resolution = 10
  223. },
  224. [mcp3002] = {
  225. .channels = mcp3202_channels,
  226. .num_channels = ARRAY_SIZE(mcp3202_channels),
  227. .resolution = 10
  228. },
  229. [mcp3004] = {
  230. .channels = mcp3204_channels,
  231. .num_channels = ARRAY_SIZE(mcp3204_channels),
  232. .resolution = 10
  233. },
  234. [mcp3008] = {
  235. .channels = mcp3208_channels,
  236. .num_channels = ARRAY_SIZE(mcp3208_channels),
  237. .resolution = 10
  238. },
  239. [mcp3201] = {
  240. .channels = mcp3201_channels,
  241. .num_channels = ARRAY_SIZE(mcp3201_channels),
  242. .resolution = 12
  243. },
  244. [mcp3202] = {
  245. .channels = mcp3202_channels,
  246. .num_channels = ARRAY_SIZE(mcp3202_channels),
  247. .resolution = 12
  248. },
  249. [mcp3204] = {
  250. .channels = mcp3204_channels,
  251. .num_channels = ARRAY_SIZE(mcp3204_channels),
  252. .resolution = 12
  253. },
  254. [mcp3208] = {
  255. .channels = mcp3208_channels,
  256. .num_channels = ARRAY_SIZE(mcp3208_channels),
  257. .resolution = 12
  258. },
  259. [mcp3301] = {
  260. .channels = mcp3201_channels,
  261. .num_channels = ARRAY_SIZE(mcp3201_channels),
  262. .resolution = 13
  263. },
  264. };
  265. static int mcp320x_probe(struct spi_device *spi)
  266. {
  267. struct iio_dev *indio_dev;
  268. struct mcp320x *adc;
  269. const struct mcp320x_chip_info *chip_info;
  270. int ret;
  271. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
  272. if (!indio_dev)
  273. return -ENOMEM;
  274. adc = iio_priv(indio_dev);
  275. adc->spi = spi;
  276. indio_dev->dev.parent = &spi->dev;
  277. indio_dev->dev.of_node = spi->dev.of_node;
  278. indio_dev->name = spi_get_device_id(spi)->name;
  279. indio_dev->modes = INDIO_DIRECT_MODE;
  280. indio_dev->info = &mcp320x_info;
  281. chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data];
  282. indio_dev->channels = chip_info->channels;
  283. indio_dev->num_channels = chip_info->num_channels;
  284. adc->chip_info = chip_info;
  285. adc->transfer[0].tx_buf = &adc->tx_buf;
  286. adc->transfer[0].len = sizeof(adc->tx_buf);
  287. adc->transfer[1].rx_buf = adc->rx_buf;
  288. adc->transfer[1].len = sizeof(adc->rx_buf);
  289. spi_message_init_with_transfers(&adc->msg, adc->transfer,
  290. ARRAY_SIZE(adc->transfer));
  291. adc->reg = devm_regulator_get(&spi->dev, "vref");
  292. if (IS_ERR(adc->reg))
  293. return PTR_ERR(adc->reg);
  294. ret = regulator_enable(adc->reg);
  295. if (ret < 0)
  296. return ret;
  297. mutex_init(&adc->lock);
  298. ret = iio_device_register(indio_dev);
  299. if (ret < 0)
  300. goto reg_disable;
  301. return 0;
  302. reg_disable:
  303. regulator_disable(adc->reg);
  304. return ret;
  305. }
  306. static int mcp320x_remove(struct spi_device *spi)
  307. {
  308. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  309. struct mcp320x *adc = iio_priv(indio_dev);
  310. iio_device_unregister(indio_dev);
  311. regulator_disable(adc->reg);
  312. return 0;
  313. }
  314. #if defined(CONFIG_OF)
  315. static const struct of_device_id mcp320x_dt_ids[] = {
  316. /* NOTE: The use of compatibles with no vendor prefix is deprecated. */
  317. {
  318. .compatible = "mcp3001",
  319. .data = &mcp320x_chip_infos[mcp3001],
  320. }, {
  321. .compatible = "mcp3002",
  322. .data = &mcp320x_chip_infos[mcp3002],
  323. }, {
  324. .compatible = "mcp3004",
  325. .data = &mcp320x_chip_infos[mcp3004],
  326. }, {
  327. .compatible = "mcp3008",
  328. .data = &mcp320x_chip_infos[mcp3008],
  329. }, {
  330. .compatible = "mcp3201",
  331. .data = &mcp320x_chip_infos[mcp3201],
  332. }, {
  333. .compatible = "mcp3202",
  334. .data = &mcp320x_chip_infos[mcp3202],
  335. }, {
  336. .compatible = "mcp3204",
  337. .data = &mcp320x_chip_infos[mcp3204],
  338. }, {
  339. .compatible = "mcp3208",
  340. .data = &mcp320x_chip_infos[mcp3208],
  341. }, {
  342. .compatible = "mcp3301",
  343. .data = &mcp320x_chip_infos[mcp3301],
  344. }, {
  345. .compatible = "microchip,mcp3001",
  346. .data = &mcp320x_chip_infos[mcp3001],
  347. }, {
  348. .compatible = "microchip,mcp3002",
  349. .data = &mcp320x_chip_infos[mcp3002],
  350. }, {
  351. .compatible = "microchip,mcp3004",
  352. .data = &mcp320x_chip_infos[mcp3004],
  353. }, {
  354. .compatible = "microchip,mcp3008",
  355. .data = &mcp320x_chip_infos[mcp3008],
  356. }, {
  357. .compatible = "microchip,mcp3201",
  358. .data = &mcp320x_chip_infos[mcp3201],
  359. }, {
  360. .compatible = "microchip,mcp3202",
  361. .data = &mcp320x_chip_infos[mcp3202],
  362. }, {
  363. .compatible = "microchip,mcp3204",
  364. .data = &mcp320x_chip_infos[mcp3204],
  365. }, {
  366. .compatible = "microchip,mcp3208",
  367. .data = &mcp320x_chip_infos[mcp3208],
  368. }, {
  369. .compatible = "microchip,mcp3301",
  370. .data = &mcp320x_chip_infos[mcp3301],
  371. }, {
  372. }
  373. };
  374. MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
  375. #endif
  376. static const struct spi_device_id mcp320x_id[] = {
  377. { "mcp3001", mcp3001 },
  378. { "mcp3002", mcp3002 },
  379. { "mcp3004", mcp3004 },
  380. { "mcp3008", mcp3008 },
  381. { "mcp3201", mcp3201 },
  382. { "mcp3202", mcp3202 },
  383. { "mcp3204", mcp3204 },
  384. { "mcp3208", mcp3208 },
  385. { "mcp3301", mcp3301 },
  386. { }
  387. };
  388. MODULE_DEVICE_TABLE(spi, mcp320x_id);
  389. static struct spi_driver mcp320x_driver = {
  390. .driver = {
  391. .name = "mcp320x",
  392. .of_match_table = of_match_ptr(mcp320x_dt_ids),
  393. },
  394. .probe = mcp320x_probe,
  395. .remove = mcp320x_remove,
  396. .id_table = mcp320x_id,
  397. };
  398. module_spi_driver(mcp320x_driver);
  399. MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
  400. MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08");
  401. MODULE_LICENSE("GPL v2");