sth.c 6.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267
  1. /*
  2. * Intel(R) Trace Hub Software Trace Hub support
  3. *
  4. * Copyright (C) 2014-2015 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. */
  15. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  16. #include <linux/types.h>
  17. #include <linux/module.h>
  18. #include <linux/device.h>
  19. #include <linux/io.h>
  20. #include <linux/mm.h>
  21. #include <linux/slab.h>
  22. #include <linux/stm.h>
  23. #include "intel_th.h"
  24. #include "sth.h"
  25. struct sth_device {
  26. void __iomem *base;
  27. void __iomem *channels;
  28. phys_addr_t channels_phys;
  29. struct device *dev;
  30. struct stm_data stm;
  31. unsigned int sw_nmasters;
  32. };
  33. static struct intel_th_channel __iomem *
  34. sth_channel(struct sth_device *sth, unsigned int master, unsigned int channel)
  35. {
  36. struct intel_th_channel __iomem *sw_map = sth->channels;
  37. return &sw_map[(master - sth->stm.sw_start) * sth->stm.sw_nchannels +
  38. channel];
  39. }
  40. static void sth_iowrite(void __iomem *dest, const unsigned char *payload,
  41. unsigned int size)
  42. {
  43. switch (size) {
  44. #ifdef CONFIG_64BIT
  45. case 8:
  46. writeq_relaxed(*(u64 *)payload, dest);
  47. break;
  48. #endif
  49. case 4:
  50. writel_relaxed(*(u32 *)payload, dest);
  51. break;
  52. case 2:
  53. writew_relaxed(*(u16 *)payload, dest);
  54. break;
  55. case 1:
  56. writeb_relaxed(*(u8 *)payload, dest);
  57. break;
  58. default:
  59. break;
  60. }
  61. }
  62. static ssize_t notrace sth_stm_packet(struct stm_data *stm_data,
  63. unsigned int master,
  64. unsigned int channel,
  65. unsigned int packet,
  66. unsigned int flags,
  67. unsigned int size,
  68. const unsigned char *payload)
  69. {
  70. struct sth_device *sth = container_of(stm_data, struct sth_device, stm);
  71. struct intel_th_channel __iomem *out =
  72. sth_channel(sth, master, channel);
  73. u64 __iomem *outp = &out->Dn;
  74. unsigned long reg = REG_STH_TRIG;
  75. #ifndef CONFIG_64BIT
  76. if (size > 4)
  77. size = 4;
  78. #endif
  79. size = rounddown_pow_of_two(size);
  80. switch (packet) {
  81. /* Global packets (GERR, XSYNC, TRIG) are sent with register writes */
  82. case STP_PACKET_GERR:
  83. reg += 4;
  84. case STP_PACKET_XSYNC:
  85. reg += 8;
  86. case STP_PACKET_TRIG:
  87. if (flags & STP_PACKET_TIMESTAMPED)
  88. reg += 4;
  89. writeb_relaxed(*payload, sth->base + reg);
  90. break;
  91. case STP_PACKET_MERR:
  92. if (size > 4)
  93. size = 4;
  94. sth_iowrite(&out->MERR, payload, size);
  95. break;
  96. case STP_PACKET_FLAG:
  97. if (flags & STP_PACKET_TIMESTAMPED)
  98. outp = (u64 __iomem *)&out->FLAG_TS;
  99. else
  100. outp = (u64 __iomem *)&out->FLAG;
  101. size = 0;
  102. writeb_relaxed(0, outp);
  103. break;
  104. case STP_PACKET_USER:
  105. if (flags & STP_PACKET_TIMESTAMPED)
  106. outp = &out->USER_TS;
  107. else
  108. outp = &out->USER;
  109. sth_iowrite(outp, payload, size);
  110. break;
  111. case STP_PACKET_DATA:
  112. outp = &out->Dn;
  113. if (flags & STP_PACKET_TIMESTAMPED)
  114. outp += 2;
  115. if (flags & STP_PACKET_MARKED)
  116. outp++;
  117. sth_iowrite(outp, payload, size);
  118. break;
  119. default:
  120. return -ENOTSUPP;
  121. }
  122. return size;
  123. }
  124. static phys_addr_t
  125. sth_stm_mmio_addr(struct stm_data *stm_data, unsigned int master,
  126. unsigned int channel, unsigned int nr_chans)
  127. {
  128. struct sth_device *sth = container_of(stm_data, struct sth_device, stm);
  129. phys_addr_t addr;
  130. master -= sth->stm.sw_start;
  131. addr = sth->channels_phys + (master * sth->stm.sw_nchannels + channel) *
  132. sizeof(struct intel_th_channel);
  133. if (offset_in_page(addr) ||
  134. offset_in_page(nr_chans * sizeof(struct intel_th_channel)))
  135. return 0;
  136. return addr;
  137. }
  138. static int sth_stm_link(struct stm_data *stm_data, unsigned int master,
  139. unsigned int channel)
  140. {
  141. struct sth_device *sth = container_of(stm_data, struct sth_device, stm);
  142. intel_th_set_output(to_intel_th_device(sth->dev), master);
  143. return 0;
  144. }
  145. static int intel_th_sw_init(struct sth_device *sth)
  146. {
  147. u32 reg;
  148. reg = ioread32(sth->base + REG_STH_STHCAP1);
  149. sth->stm.sw_nchannels = reg & 0xff;
  150. reg = ioread32(sth->base + REG_STH_STHCAP0);
  151. sth->stm.sw_start = reg & 0xffff;
  152. sth->stm.sw_end = reg >> 16;
  153. sth->sw_nmasters = sth->stm.sw_end - sth->stm.sw_start;
  154. dev_dbg(sth->dev, "sw_start: %x sw_end: %x masters: %x nchannels: %x\n",
  155. sth->stm.sw_start, sth->stm.sw_end, sth->sw_nmasters,
  156. sth->stm.sw_nchannels);
  157. return 0;
  158. }
  159. static int intel_th_sth_probe(struct intel_th_device *thdev)
  160. {
  161. struct device *dev = &thdev->dev;
  162. struct sth_device *sth;
  163. struct resource *res;
  164. void __iomem *base, *channels;
  165. int err;
  166. res = intel_th_device_get_resource(thdev, IORESOURCE_MEM, 0);
  167. if (!res)
  168. return -ENODEV;
  169. base = devm_ioremap(dev, res->start, resource_size(res));
  170. if (!base)
  171. return -ENOMEM;
  172. res = intel_th_device_get_resource(thdev, IORESOURCE_MEM, 1);
  173. if (!res)
  174. return -ENODEV;
  175. channels = devm_ioremap(dev, res->start, resource_size(res));
  176. if (!channels)
  177. return -ENOMEM;
  178. sth = devm_kzalloc(dev, sizeof(*sth), GFP_KERNEL);
  179. if (!sth)
  180. return -ENOMEM;
  181. sth->dev = dev;
  182. sth->base = base;
  183. sth->channels = channels;
  184. sth->channels_phys = res->start;
  185. sth->stm.name = dev_name(dev);
  186. sth->stm.packet = sth_stm_packet;
  187. sth->stm.mmio_addr = sth_stm_mmio_addr;
  188. sth->stm.sw_mmiosz = sizeof(struct intel_th_channel);
  189. sth->stm.link = sth_stm_link;
  190. err = intel_th_sw_init(sth);
  191. if (err)
  192. return err;
  193. err = stm_register_device(dev, &sth->stm, THIS_MODULE);
  194. if (err) {
  195. dev_err(dev, "stm_register_device failed\n");
  196. return err;
  197. }
  198. dev_set_drvdata(dev, sth);
  199. return 0;
  200. }
  201. static void intel_th_sth_remove(struct intel_th_device *thdev)
  202. {
  203. struct sth_device *sth = dev_get_drvdata(&thdev->dev);
  204. stm_unregister_device(&sth->stm);
  205. }
  206. static struct intel_th_driver intel_th_sth_driver = {
  207. .probe = intel_th_sth_probe,
  208. .remove = intel_th_sth_remove,
  209. .driver = {
  210. .name = "sth",
  211. .owner = THIS_MODULE,
  212. },
  213. };
  214. module_driver(intel_th_sth_driver,
  215. intel_th_driver_register,
  216. intel_th_driver_unregister);
  217. MODULE_LICENSE("GPL v2");
  218. MODULE_DESCRIPTION("Intel(R) Trace Hub Software Trace Hub driver");
  219. MODULE_AUTHOR("Alexander Shishkin <alexander.shishkin@intel.com>");