coresight-etm3x-sysfs.c 32 KB

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  1. /*
  2. * Copyright(C) 2015 Linaro Limited. All rights reserved.
  3. * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #include <linux/pm_runtime.h>
  18. #include <linux/sysfs.h>
  19. #include "coresight-etm.h"
  20. #include "coresight-priv.h"
  21. static ssize_t nr_addr_cmp_show(struct device *dev,
  22. struct device_attribute *attr, char *buf)
  23. {
  24. unsigned long val;
  25. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  26. val = drvdata->nr_addr_cmp;
  27. return sprintf(buf, "%#lx\n", val);
  28. }
  29. static DEVICE_ATTR_RO(nr_addr_cmp);
  30. static ssize_t nr_cntr_show(struct device *dev,
  31. struct device_attribute *attr, char *buf)
  32. { unsigned long val;
  33. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  34. val = drvdata->nr_cntr;
  35. return sprintf(buf, "%#lx\n", val);
  36. }
  37. static DEVICE_ATTR_RO(nr_cntr);
  38. static ssize_t nr_ctxid_cmp_show(struct device *dev,
  39. struct device_attribute *attr, char *buf)
  40. {
  41. unsigned long val;
  42. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  43. val = drvdata->nr_ctxid_cmp;
  44. return sprintf(buf, "%#lx\n", val);
  45. }
  46. static DEVICE_ATTR_RO(nr_ctxid_cmp);
  47. static ssize_t etmsr_show(struct device *dev,
  48. struct device_attribute *attr, char *buf)
  49. {
  50. unsigned long flags, val;
  51. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  52. pm_runtime_get_sync(drvdata->dev);
  53. spin_lock_irqsave(&drvdata->spinlock, flags);
  54. CS_UNLOCK(drvdata->base);
  55. val = etm_readl(drvdata, ETMSR);
  56. CS_LOCK(drvdata->base);
  57. spin_unlock_irqrestore(&drvdata->spinlock, flags);
  58. pm_runtime_put(drvdata->dev);
  59. return sprintf(buf, "%#lx\n", val);
  60. }
  61. static DEVICE_ATTR_RO(etmsr);
  62. static ssize_t reset_store(struct device *dev,
  63. struct device_attribute *attr,
  64. const char *buf, size_t size)
  65. {
  66. int i, ret;
  67. unsigned long val;
  68. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  69. struct etm_config *config = &drvdata->config;
  70. ret = kstrtoul(buf, 16, &val);
  71. if (ret)
  72. return ret;
  73. if (val) {
  74. spin_lock(&drvdata->spinlock);
  75. memset(config, 0, sizeof(struct etm_config));
  76. config->mode = ETM_MODE_EXCLUDE;
  77. config->trigger_event = ETM_DEFAULT_EVENT_VAL;
  78. for (i = 0; i < drvdata->nr_addr_cmp; i++) {
  79. config->addr_type[i] = ETM_ADDR_TYPE_NONE;
  80. }
  81. etm_set_default(config);
  82. spin_unlock(&drvdata->spinlock);
  83. }
  84. return size;
  85. }
  86. static DEVICE_ATTR_WO(reset);
  87. static ssize_t mode_show(struct device *dev,
  88. struct device_attribute *attr, char *buf)
  89. {
  90. unsigned long val;
  91. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  92. struct etm_config *config = &drvdata->config;
  93. val = config->mode;
  94. return sprintf(buf, "%#lx\n", val);
  95. }
  96. static ssize_t mode_store(struct device *dev,
  97. struct device_attribute *attr,
  98. const char *buf, size_t size)
  99. {
  100. int ret;
  101. unsigned long val;
  102. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  103. struct etm_config *config = &drvdata->config;
  104. ret = kstrtoul(buf, 16, &val);
  105. if (ret)
  106. return ret;
  107. spin_lock(&drvdata->spinlock);
  108. config->mode = val & ETM_MODE_ALL;
  109. if (config->mode & ETM_MODE_EXCLUDE)
  110. config->enable_ctrl1 |= ETMTECR1_INC_EXC;
  111. else
  112. config->enable_ctrl1 &= ~ETMTECR1_INC_EXC;
  113. if (config->mode & ETM_MODE_CYCACC)
  114. config->ctrl |= ETMCR_CYC_ACC;
  115. else
  116. config->ctrl &= ~ETMCR_CYC_ACC;
  117. if (config->mode & ETM_MODE_STALL) {
  118. if (!(drvdata->etmccr & ETMCCR_FIFOFULL)) {
  119. dev_warn(drvdata->dev, "stall mode not supported\n");
  120. ret = -EINVAL;
  121. goto err_unlock;
  122. }
  123. config->ctrl |= ETMCR_STALL_MODE;
  124. } else
  125. config->ctrl &= ~ETMCR_STALL_MODE;
  126. if (config->mode & ETM_MODE_TIMESTAMP) {
  127. if (!(drvdata->etmccer & ETMCCER_TIMESTAMP)) {
  128. dev_warn(drvdata->dev, "timestamp not supported\n");
  129. ret = -EINVAL;
  130. goto err_unlock;
  131. }
  132. config->ctrl |= ETMCR_TIMESTAMP_EN;
  133. } else
  134. config->ctrl &= ~ETMCR_TIMESTAMP_EN;
  135. if (config->mode & ETM_MODE_CTXID)
  136. config->ctrl |= ETMCR_CTXID_SIZE;
  137. else
  138. config->ctrl &= ~ETMCR_CTXID_SIZE;
  139. if (config->mode & ETM_MODE_BBROAD)
  140. config->ctrl |= ETMCR_BRANCH_BROADCAST;
  141. else
  142. config->ctrl &= ~ETMCR_BRANCH_BROADCAST;
  143. if (config->mode & ETM_MODE_RET_STACK)
  144. config->ctrl |= ETMCR_RETURN_STACK;
  145. else
  146. config->ctrl &= ~ETMCR_RETURN_STACK;
  147. if (config->mode & (ETM_MODE_EXCL_KERN | ETM_MODE_EXCL_USER))
  148. etm_config_trace_mode(config);
  149. spin_unlock(&drvdata->spinlock);
  150. return size;
  151. err_unlock:
  152. spin_unlock(&drvdata->spinlock);
  153. return ret;
  154. }
  155. static DEVICE_ATTR_RW(mode);
  156. static ssize_t trigger_event_show(struct device *dev,
  157. struct device_attribute *attr, char *buf)
  158. {
  159. unsigned long val;
  160. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  161. struct etm_config *config = &drvdata->config;
  162. val = config->trigger_event;
  163. return sprintf(buf, "%#lx\n", val);
  164. }
  165. static ssize_t trigger_event_store(struct device *dev,
  166. struct device_attribute *attr,
  167. const char *buf, size_t size)
  168. {
  169. int ret;
  170. unsigned long val;
  171. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  172. struct etm_config *config = &drvdata->config;
  173. ret = kstrtoul(buf, 16, &val);
  174. if (ret)
  175. return ret;
  176. config->trigger_event = val & ETM_EVENT_MASK;
  177. return size;
  178. }
  179. static DEVICE_ATTR_RW(trigger_event);
  180. static ssize_t enable_event_show(struct device *dev,
  181. struct device_attribute *attr, char *buf)
  182. {
  183. unsigned long val;
  184. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  185. struct etm_config *config = &drvdata->config;
  186. val = config->enable_event;
  187. return sprintf(buf, "%#lx\n", val);
  188. }
  189. static ssize_t enable_event_store(struct device *dev,
  190. struct device_attribute *attr,
  191. const char *buf, size_t size)
  192. {
  193. int ret;
  194. unsigned long val;
  195. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  196. struct etm_config *config = &drvdata->config;
  197. ret = kstrtoul(buf, 16, &val);
  198. if (ret)
  199. return ret;
  200. config->enable_event = val & ETM_EVENT_MASK;
  201. return size;
  202. }
  203. static DEVICE_ATTR_RW(enable_event);
  204. static ssize_t fifofull_level_show(struct device *dev,
  205. struct device_attribute *attr, char *buf)
  206. {
  207. unsigned long val;
  208. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  209. struct etm_config *config = &drvdata->config;
  210. val = config->fifofull_level;
  211. return sprintf(buf, "%#lx\n", val);
  212. }
  213. static ssize_t fifofull_level_store(struct device *dev,
  214. struct device_attribute *attr,
  215. const char *buf, size_t size)
  216. {
  217. int ret;
  218. unsigned long val;
  219. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  220. struct etm_config *config = &drvdata->config;
  221. ret = kstrtoul(buf, 16, &val);
  222. if (ret)
  223. return ret;
  224. config->fifofull_level = val;
  225. return size;
  226. }
  227. static DEVICE_ATTR_RW(fifofull_level);
  228. static ssize_t addr_idx_show(struct device *dev,
  229. struct device_attribute *attr, char *buf)
  230. {
  231. unsigned long val;
  232. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  233. struct etm_config *config = &drvdata->config;
  234. val = config->addr_idx;
  235. return sprintf(buf, "%#lx\n", val);
  236. }
  237. static ssize_t addr_idx_store(struct device *dev,
  238. struct device_attribute *attr,
  239. const char *buf, size_t size)
  240. {
  241. int ret;
  242. unsigned long val;
  243. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  244. struct etm_config *config = &drvdata->config;
  245. ret = kstrtoul(buf, 16, &val);
  246. if (ret)
  247. return ret;
  248. if (val >= drvdata->nr_addr_cmp)
  249. return -EINVAL;
  250. /*
  251. * Use spinlock to ensure index doesn't change while it gets
  252. * dereferenced multiple times within a spinlock block elsewhere.
  253. */
  254. spin_lock(&drvdata->spinlock);
  255. config->addr_idx = val;
  256. spin_unlock(&drvdata->spinlock);
  257. return size;
  258. }
  259. static DEVICE_ATTR_RW(addr_idx);
  260. static ssize_t addr_single_show(struct device *dev,
  261. struct device_attribute *attr, char *buf)
  262. {
  263. u8 idx;
  264. unsigned long val;
  265. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  266. struct etm_config *config = &drvdata->config;
  267. spin_lock(&drvdata->spinlock);
  268. idx = config->addr_idx;
  269. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  270. config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
  271. spin_unlock(&drvdata->spinlock);
  272. return -EINVAL;
  273. }
  274. val = config->addr_val[idx];
  275. spin_unlock(&drvdata->spinlock);
  276. return sprintf(buf, "%#lx\n", val);
  277. }
  278. static ssize_t addr_single_store(struct device *dev,
  279. struct device_attribute *attr,
  280. const char *buf, size_t size)
  281. {
  282. u8 idx;
  283. int ret;
  284. unsigned long val;
  285. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  286. struct etm_config *config = &drvdata->config;
  287. ret = kstrtoul(buf, 16, &val);
  288. if (ret)
  289. return ret;
  290. spin_lock(&drvdata->spinlock);
  291. idx = config->addr_idx;
  292. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  293. config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
  294. spin_unlock(&drvdata->spinlock);
  295. return -EINVAL;
  296. }
  297. config->addr_val[idx] = val;
  298. config->addr_type[idx] = ETM_ADDR_TYPE_SINGLE;
  299. spin_unlock(&drvdata->spinlock);
  300. return size;
  301. }
  302. static DEVICE_ATTR_RW(addr_single);
  303. static ssize_t addr_range_show(struct device *dev,
  304. struct device_attribute *attr, char *buf)
  305. {
  306. u8 idx;
  307. unsigned long val1, val2;
  308. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  309. struct etm_config *config = &drvdata->config;
  310. spin_lock(&drvdata->spinlock);
  311. idx = config->addr_idx;
  312. if (idx % 2 != 0) {
  313. spin_unlock(&drvdata->spinlock);
  314. return -EPERM;
  315. }
  316. if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
  317. config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
  318. (config->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
  319. config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
  320. spin_unlock(&drvdata->spinlock);
  321. return -EPERM;
  322. }
  323. val1 = config->addr_val[idx];
  324. val2 = config->addr_val[idx + 1];
  325. spin_unlock(&drvdata->spinlock);
  326. return sprintf(buf, "%#lx %#lx\n", val1, val2);
  327. }
  328. static ssize_t addr_range_store(struct device *dev,
  329. struct device_attribute *attr,
  330. const char *buf, size_t size)
  331. {
  332. u8 idx;
  333. unsigned long val1, val2;
  334. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  335. struct etm_config *config = &drvdata->config;
  336. if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
  337. return -EINVAL;
  338. /* Lower address comparator cannot have a higher address value */
  339. if (val1 > val2)
  340. return -EINVAL;
  341. spin_lock(&drvdata->spinlock);
  342. idx = config->addr_idx;
  343. if (idx % 2 != 0) {
  344. spin_unlock(&drvdata->spinlock);
  345. return -EPERM;
  346. }
  347. if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
  348. config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
  349. (config->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
  350. config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
  351. spin_unlock(&drvdata->spinlock);
  352. return -EPERM;
  353. }
  354. config->addr_val[idx] = val1;
  355. config->addr_type[idx] = ETM_ADDR_TYPE_RANGE;
  356. config->addr_val[idx + 1] = val2;
  357. config->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE;
  358. config->enable_ctrl1 |= (1 << (idx/2));
  359. spin_unlock(&drvdata->spinlock);
  360. return size;
  361. }
  362. static DEVICE_ATTR_RW(addr_range);
  363. static ssize_t addr_start_show(struct device *dev,
  364. struct device_attribute *attr, char *buf)
  365. {
  366. u8 idx;
  367. unsigned long val;
  368. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  369. struct etm_config *config = &drvdata->config;
  370. spin_lock(&drvdata->spinlock);
  371. idx = config->addr_idx;
  372. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  373. config->addr_type[idx] == ETM_ADDR_TYPE_START)) {
  374. spin_unlock(&drvdata->spinlock);
  375. return -EPERM;
  376. }
  377. val = config->addr_val[idx];
  378. spin_unlock(&drvdata->spinlock);
  379. return sprintf(buf, "%#lx\n", val);
  380. }
  381. static ssize_t addr_start_store(struct device *dev,
  382. struct device_attribute *attr,
  383. const char *buf, size_t size)
  384. {
  385. u8 idx;
  386. int ret;
  387. unsigned long val;
  388. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  389. struct etm_config *config = &drvdata->config;
  390. ret = kstrtoul(buf, 16, &val);
  391. if (ret)
  392. return ret;
  393. spin_lock(&drvdata->spinlock);
  394. idx = config->addr_idx;
  395. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  396. config->addr_type[idx] == ETM_ADDR_TYPE_START)) {
  397. spin_unlock(&drvdata->spinlock);
  398. return -EPERM;
  399. }
  400. config->addr_val[idx] = val;
  401. config->addr_type[idx] = ETM_ADDR_TYPE_START;
  402. config->startstop_ctrl |= (1 << idx);
  403. config->enable_ctrl1 |= BIT(25);
  404. spin_unlock(&drvdata->spinlock);
  405. return size;
  406. }
  407. static DEVICE_ATTR_RW(addr_start);
  408. static ssize_t addr_stop_show(struct device *dev,
  409. struct device_attribute *attr, char *buf)
  410. {
  411. u8 idx;
  412. unsigned long val;
  413. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  414. struct etm_config *config = &drvdata->config;
  415. spin_lock(&drvdata->spinlock);
  416. idx = config->addr_idx;
  417. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  418. config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
  419. spin_unlock(&drvdata->spinlock);
  420. return -EPERM;
  421. }
  422. val = config->addr_val[idx];
  423. spin_unlock(&drvdata->spinlock);
  424. return sprintf(buf, "%#lx\n", val);
  425. }
  426. static ssize_t addr_stop_store(struct device *dev,
  427. struct device_attribute *attr,
  428. const char *buf, size_t size)
  429. {
  430. u8 idx;
  431. int ret;
  432. unsigned long val;
  433. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  434. struct etm_config *config = &drvdata->config;
  435. ret = kstrtoul(buf, 16, &val);
  436. if (ret)
  437. return ret;
  438. spin_lock(&drvdata->spinlock);
  439. idx = config->addr_idx;
  440. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  441. config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
  442. spin_unlock(&drvdata->spinlock);
  443. return -EPERM;
  444. }
  445. config->addr_val[idx] = val;
  446. config->addr_type[idx] = ETM_ADDR_TYPE_STOP;
  447. config->startstop_ctrl |= (1 << (idx + 16));
  448. config->enable_ctrl1 |= ETMTECR1_START_STOP;
  449. spin_unlock(&drvdata->spinlock);
  450. return size;
  451. }
  452. static DEVICE_ATTR_RW(addr_stop);
  453. static ssize_t addr_acctype_show(struct device *dev,
  454. struct device_attribute *attr, char *buf)
  455. {
  456. unsigned long val;
  457. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  458. struct etm_config *config = &drvdata->config;
  459. spin_lock(&drvdata->spinlock);
  460. val = config->addr_acctype[config->addr_idx];
  461. spin_unlock(&drvdata->spinlock);
  462. return sprintf(buf, "%#lx\n", val);
  463. }
  464. static ssize_t addr_acctype_store(struct device *dev,
  465. struct device_attribute *attr,
  466. const char *buf, size_t size)
  467. {
  468. int ret;
  469. unsigned long val;
  470. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  471. struct etm_config *config = &drvdata->config;
  472. ret = kstrtoul(buf, 16, &val);
  473. if (ret)
  474. return ret;
  475. spin_lock(&drvdata->spinlock);
  476. config->addr_acctype[config->addr_idx] = val;
  477. spin_unlock(&drvdata->spinlock);
  478. return size;
  479. }
  480. static DEVICE_ATTR_RW(addr_acctype);
  481. static ssize_t cntr_idx_show(struct device *dev,
  482. struct device_attribute *attr, char *buf)
  483. {
  484. unsigned long val;
  485. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  486. struct etm_config *config = &drvdata->config;
  487. val = config->cntr_idx;
  488. return sprintf(buf, "%#lx\n", val);
  489. }
  490. static ssize_t cntr_idx_store(struct device *dev,
  491. struct device_attribute *attr,
  492. const char *buf, size_t size)
  493. {
  494. int ret;
  495. unsigned long val;
  496. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  497. struct etm_config *config = &drvdata->config;
  498. ret = kstrtoul(buf, 16, &val);
  499. if (ret)
  500. return ret;
  501. if (val >= drvdata->nr_cntr)
  502. return -EINVAL;
  503. /*
  504. * Use spinlock to ensure index doesn't change while it gets
  505. * dereferenced multiple times within a spinlock block elsewhere.
  506. */
  507. spin_lock(&drvdata->spinlock);
  508. config->cntr_idx = val;
  509. spin_unlock(&drvdata->spinlock);
  510. return size;
  511. }
  512. static DEVICE_ATTR_RW(cntr_idx);
  513. static ssize_t cntr_rld_val_show(struct device *dev,
  514. struct device_attribute *attr, char *buf)
  515. {
  516. unsigned long val;
  517. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  518. struct etm_config *config = &drvdata->config;
  519. spin_lock(&drvdata->spinlock);
  520. val = config->cntr_rld_val[config->cntr_idx];
  521. spin_unlock(&drvdata->spinlock);
  522. return sprintf(buf, "%#lx\n", val);
  523. }
  524. static ssize_t cntr_rld_val_store(struct device *dev,
  525. struct device_attribute *attr,
  526. const char *buf, size_t size)
  527. {
  528. int ret;
  529. unsigned long val;
  530. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  531. struct etm_config *config = &drvdata->config;
  532. ret = kstrtoul(buf, 16, &val);
  533. if (ret)
  534. return ret;
  535. spin_lock(&drvdata->spinlock);
  536. config->cntr_rld_val[config->cntr_idx] = val;
  537. spin_unlock(&drvdata->spinlock);
  538. return size;
  539. }
  540. static DEVICE_ATTR_RW(cntr_rld_val);
  541. static ssize_t cntr_event_show(struct device *dev,
  542. struct device_attribute *attr, char *buf)
  543. {
  544. unsigned long val;
  545. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  546. struct etm_config *config = &drvdata->config;
  547. spin_lock(&drvdata->spinlock);
  548. val = config->cntr_event[config->cntr_idx];
  549. spin_unlock(&drvdata->spinlock);
  550. return sprintf(buf, "%#lx\n", val);
  551. }
  552. static ssize_t cntr_event_store(struct device *dev,
  553. struct device_attribute *attr,
  554. const char *buf, size_t size)
  555. {
  556. int ret;
  557. unsigned long val;
  558. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  559. struct etm_config *config = &drvdata->config;
  560. ret = kstrtoul(buf, 16, &val);
  561. if (ret)
  562. return ret;
  563. spin_lock(&drvdata->spinlock);
  564. config->cntr_event[config->cntr_idx] = val & ETM_EVENT_MASK;
  565. spin_unlock(&drvdata->spinlock);
  566. return size;
  567. }
  568. static DEVICE_ATTR_RW(cntr_event);
  569. static ssize_t cntr_rld_event_show(struct device *dev,
  570. struct device_attribute *attr, char *buf)
  571. {
  572. unsigned long val;
  573. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  574. struct etm_config *config = &drvdata->config;
  575. spin_lock(&drvdata->spinlock);
  576. val = config->cntr_rld_event[config->cntr_idx];
  577. spin_unlock(&drvdata->spinlock);
  578. return sprintf(buf, "%#lx\n", val);
  579. }
  580. static ssize_t cntr_rld_event_store(struct device *dev,
  581. struct device_attribute *attr,
  582. const char *buf, size_t size)
  583. {
  584. int ret;
  585. unsigned long val;
  586. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  587. struct etm_config *config = &drvdata->config;
  588. ret = kstrtoul(buf, 16, &val);
  589. if (ret)
  590. return ret;
  591. spin_lock(&drvdata->spinlock);
  592. config->cntr_rld_event[config->cntr_idx] = val & ETM_EVENT_MASK;
  593. spin_unlock(&drvdata->spinlock);
  594. return size;
  595. }
  596. static DEVICE_ATTR_RW(cntr_rld_event);
  597. static ssize_t cntr_val_show(struct device *dev,
  598. struct device_attribute *attr, char *buf)
  599. {
  600. int i, ret = 0;
  601. u32 val;
  602. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  603. struct etm_config *config = &drvdata->config;
  604. if (!local_read(&drvdata->mode)) {
  605. spin_lock(&drvdata->spinlock);
  606. for (i = 0; i < drvdata->nr_cntr; i++)
  607. ret += sprintf(buf, "counter %d: %x\n",
  608. i, config->cntr_val[i]);
  609. spin_unlock(&drvdata->spinlock);
  610. return ret;
  611. }
  612. for (i = 0; i < drvdata->nr_cntr; i++) {
  613. val = etm_readl(drvdata, ETMCNTVRn(i));
  614. ret += sprintf(buf, "counter %d: %x\n", i, val);
  615. }
  616. return ret;
  617. }
  618. static ssize_t cntr_val_store(struct device *dev,
  619. struct device_attribute *attr,
  620. const char *buf, size_t size)
  621. {
  622. int ret;
  623. unsigned long val;
  624. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  625. struct etm_config *config = &drvdata->config;
  626. ret = kstrtoul(buf, 16, &val);
  627. if (ret)
  628. return ret;
  629. spin_lock(&drvdata->spinlock);
  630. config->cntr_val[config->cntr_idx] = val;
  631. spin_unlock(&drvdata->spinlock);
  632. return size;
  633. }
  634. static DEVICE_ATTR_RW(cntr_val);
  635. static ssize_t seq_12_event_show(struct device *dev,
  636. struct device_attribute *attr, char *buf)
  637. {
  638. unsigned long val;
  639. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  640. struct etm_config *config = &drvdata->config;
  641. val = config->seq_12_event;
  642. return sprintf(buf, "%#lx\n", val);
  643. }
  644. static ssize_t seq_12_event_store(struct device *dev,
  645. struct device_attribute *attr,
  646. const char *buf, size_t size)
  647. {
  648. int ret;
  649. unsigned long val;
  650. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  651. struct etm_config *config = &drvdata->config;
  652. ret = kstrtoul(buf, 16, &val);
  653. if (ret)
  654. return ret;
  655. config->seq_12_event = val & ETM_EVENT_MASK;
  656. return size;
  657. }
  658. static DEVICE_ATTR_RW(seq_12_event);
  659. static ssize_t seq_21_event_show(struct device *dev,
  660. struct device_attribute *attr, char *buf)
  661. {
  662. unsigned long val;
  663. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  664. struct etm_config *config = &drvdata->config;
  665. val = config->seq_21_event;
  666. return sprintf(buf, "%#lx\n", val);
  667. }
  668. static ssize_t seq_21_event_store(struct device *dev,
  669. struct device_attribute *attr,
  670. const char *buf, size_t size)
  671. {
  672. int ret;
  673. unsigned long val;
  674. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  675. struct etm_config *config = &drvdata->config;
  676. ret = kstrtoul(buf, 16, &val);
  677. if (ret)
  678. return ret;
  679. config->seq_21_event = val & ETM_EVENT_MASK;
  680. return size;
  681. }
  682. static DEVICE_ATTR_RW(seq_21_event);
  683. static ssize_t seq_23_event_show(struct device *dev,
  684. struct device_attribute *attr, char *buf)
  685. {
  686. unsigned long val;
  687. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  688. struct etm_config *config = &drvdata->config;
  689. val = config->seq_23_event;
  690. return sprintf(buf, "%#lx\n", val);
  691. }
  692. static ssize_t seq_23_event_store(struct device *dev,
  693. struct device_attribute *attr,
  694. const char *buf, size_t size)
  695. {
  696. int ret;
  697. unsigned long val;
  698. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  699. struct etm_config *config = &drvdata->config;
  700. ret = kstrtoul(buf, 16, &val);
  701. if (ret)
  702. return ret;
  703. config->seq_23_event = val & ETM_EVENT_MASK;
  704. return size;
  705. }
  706. static DEVICE_ATTR_RW(seq_23_event);
  707. static ssize_t seq_31_event_show(struct device *dev,
  708. struct device_attribute *attr, char *buf)
  709. {
  710. unsigned long val;
  711. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  712. struct etm_config *config = &drvdata->config;
  713. val = config->seq_31_event;
  714. return sprintf(buf, "%#lx\n", val);
  715. }
  716. static ssize_t seq_31_event_store(struct device *dev,
  717. struct device_attribute *attr,
  718. const char *buf, size_t size)
  719. {
  720. int ret;
  721. unsigned long val;
  722. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  723. struct etm_config *config = &drvdata->config;
  724. ret = kstrtoul(buf, 16, &val);
  725. if (ret)
  726. return ret;
  727. config->seq_31_event = val & ETM_EVENT_MASK;
  728. return size;
  729. }
  730. static DEVICE_ATTR_RW(seq_31_event);
  731. static ssize_t seq_32_event_show(struct device *dev,
  732. struct device_attribute *attr, char *buf)
  733. {
  734. unsigned long val;
  735. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  736. struct etm_config *config = &drvdata->config;
  737. val = config->seq_32_event;
  738. return sprintf(buf, "%#lx\n", val);
  739. }
  740. static ssize_t seq_32_event_store(struct device *dev,
  741. struct device_attribute *attr,
  742. const char *buf, size_t size)
  743. {
  744. int ret;
  745. unsigned long val;
  746. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  747. struct etm_config *config = &drvdata->config;
  748. ret = kstrtoul(buf, 16, &val);
  749. if (ret)
  750. return ret;
  751. config->seq_32_event = val & ETM_EVENT_MASK;
  752. return size;
  753. }
  754. static DEVICE_ATTR_RW(seq_32_event);
  755. static ssize_t seq_13_event_show(struct device *dev,
  756. struct device_attribute *attr, char *buf)
  757. {
  758. unsigned long val;
  759. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  760. struct etm_config *config = &drvdata->config;
  761. val = config->seq_13_event;
  762. return sprintf(buf, "%#lx\n", val);
  763. }
  764. static ssize_t seq_13_event_store(struct device *dev,
  765. struct device_attribute *attr,
  766. const char *buf, size_t size)
  767. {
  768. int ret;
  769. unsigned long val;
  770. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  771. struct etm_config *config = &drvdata->config;
  772. ret = kstrtoul(buf, 16, &val);
  773. if (ret)
  774. return ret;
  775. config->seq_13_event = val & ETM_EVENT_MASK;
  776. return size;
  777. }
  778. static DEVICE_ATTR_RW(seq_13_event);
  779. static ssize_t seq_curr_state_show(struct device *dev,
  780. struct device_attribute *attr, char *buf)
  781. {
  782. unsigned long val, flags;
  783. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  784. struct etm_config *config = &drvdata->config;
  785. if (!local_read(&drvdata->mode)) {
  786. val = config->seq_curr_state;
  787. goto out;
  788. }
  789. pm_runtime_get_sync(drvdata->dev);
  790. spin_lock_irqsave(&drvdata->spinlock, flags);
  791. CS_UNLOCK(drvdata->base);
  792. val = (etm_readl(drvdata, ETMSQR) & ETM_SQR_MASK);
  793. CS_LOCK(drvdata->base);
  794. spin_unlock_irqrestore(&drvdata->spinlock, flags);
  795. pm_runtime_put(drvdata->dev);
  796. out:
  797. return sprintf(buf, "%#lx\n", val);
  798. }
  799. static ssize_t seq_curr_state_store(struct device *dev,
  800. struct device_attribute *attr,
  801. const char *buf, size_t size)
  802. {
  803. int ret;
  804. unsigned long val;
  805. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  806. struct etm_config *config = &drvdata->config;
  807. ret = kstrtoul(buf, 16, &val);
  808. if (ret)
  809. return ret;
  810. if (val > ETM_SEQ_STATE_MAX_VAL)
  811. return -EINVAL;
  812. config->seq_curr_state = val;
  813. return size;
  814. }
  815. static DEVICE_ATTR_RW(seq_curr_state);
  816. static ssize_t ctxid_idx_show(struct device *dev,
  817. struct device_attribute *attr, char *buf)
  818. {
  819. unsigned long val;
  820. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  821. struct etm_config *config = &drvdata->config;
  822. val = config->ctxid_idx;
  823. return sprintf(buf, "%#lx\n", val);
  824. }
  825. static ssize_t ctxid_idx_store(struct device *dev,
  826. struct device_attribute *attr,
  827. const char *buf, size_t size)
  828. {
  829. int ret;
  830. unsigned long val;
  831. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  832. struct etm_config *config = &drvdata->config;
  833. ret = kstrtoul(buf, 16, &val);
  834. if (ret)
  835. return ret;
  836. if (val >= drvdata->nr_ctxid_cmp)
  837. return -EINVAL;
  838. /*
  839. * Use spinlock to ensure index doesn't change while it gets
  840. * dereferenced multiple times within a spinlock block elsewhere.
  841. */
  842. spin_lock(&drvdata->spinlock);
  843. config->ctxid_idx = val;
  844. spin_unlock(&drvdata->spinlock);
  845. return size;
  846. }
  847. static DEVICE_ATTR_RW(ctxid_idx);
  848. static ssize_t ctxid_pid_show(struct device *dev,
  849. struct device_attribute *attr, char *buf)
  850. {
  851. unsigned long val;
  852. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  853. struct etm_config *config = &drvdata->config;
  854. spin_lock(&drvdata->spinlock);
  855. val = config->ctxid_vpid[config->ctxid_idx];
  856. spin_unlock(&drvdata->spinlock);
  857. return sprintf(buf, "%#lx\n", val);
  858. }
  859. static ssize_t ctxid_pid_store(struct device *dev,
  860. struct device_attribute *attr,
  861. const char *buf, size_t size)
  862. {
  863. int ret;
  864. unsigned long vpid, pid;
  865. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  866. struct etm_config *config = &drvdata->config;
  867. ret = kstrtoul(buf, 16, &vpid);
  868. if (ret)
  869. return ret;
  870. pid = coresight_vpid_to_pid(vpid);
  871. spin_lock(&drvdata->spinlock);
  872. config->ctxid_pid[config->ctxid_idx] = pid;
  873. config->ctxid_vpid[config->ctxid_idx] = vpid;
  874. spin_unlock(&drvdata->spinlock);
  875. return size;
  876. }
  877. static DEVICE_ATTR_RW(ctxid_pid);
  878. static ssize_t ctxid_mask_show(struct device *dev,
  879. struct device_attribute *attr, char *buf)
  880. {
  881. unsigned long val;
  882. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  883. struct etm_config *config = &drvdata->config;
  884. val = config->ctxid_mask;
  885. return sprintf(buf, "%#lx\n", val);
  886. }
  887. static ssize_t ctxid_mask_store(struct device *dev,
  888. struct device_attribute *attr,
  889. const char *buf, size_t size)
  890. {
  891. int ret;
  892. unsigned long val;
  893. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  894. struct etm_config *config = &drvdata->config;
  895. ret = kstrtoul(buf, 16, &val);
  896. if (ret)
  897. return ret;
  898. config->ctxid_mask = val;
  899. return size;
  900. }
  901. static DEVICE_ATTR_RW(ctxid_mask);
  902. static ssize_t sync_freq_show(struct device *dev,
  903. struct device_attribute *attr, char *buf)
  904. {
  905. unsigned long val;
  906. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  907. struct etm_config *config = &drvdata->config;
  908. val = config->sync_freq;
  909. return sprintf(buf, "%#lx\n", val);
  910. }
  911. static ssize_t sync_freq_store(struct device *dev,
  912. struct device_attribute *attr,
  913. const char *buf, size_t size)
  914. {
  915. int ret;
  916. unsigned long val;
  917. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  918. struct etm_config *config = &drvdata->config;
  919. ret = kstrtoul(buf, 16, &val);
  920. if (ret)
  921. return ret;
  922. config->sync_freq = val & ETM_SYNC_MASK;
  923. return size;
  924. }
  925. static DEVICE_ATTR_RW(sync_freq);
  926. static ssize_t timestamp_event_show(struct device *dev,
  927. struct device_attribute *attr, char *buf)
  928. {
  929. unsigned long val;
  930. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  931. struct etm_config *config = &drvdata->config;
  932. val = config->timestamp_event;
  933. return sprintf(buf, "%#lx\n", val);
  934. }
  935. static ssize_t timestamp_event_store(struct device *dev,
  936. struct device_attribute *attr,
  937. const char *buf, size_t size)
  938. {
  939. int ret;
  940. unsigned long val;
  941. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  942. struct etm_config *config = &drvdata->config;
  943. ret = kstrtoul(buf, 16, &val);
  944. if (ret)
  945. return ret;
  946. config->timestamp_event = val & ETM_EVENT_MASK;
  947. return size;
  948. }
  949. static DEVICE_ATTR_RW(timestamp_event);
  950. static ssize_t cpu_show(struct device *dev,
  951. struct device_attribute *attr, char *buf)
  952. {
  953. int val;
  954. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  955. val = drvdata->cpu;
  956. return scnprintf(buf, PAGE_SIZE, "%d\n", val);
  957. }
  958. static DEVICE_ATTR_RO(cpu);
  959. static ssize_t traceid_show(struct device *dev,
  960. struct device_attribute *attr, char *buf)
  961. {
  962. unsigned long val;
  963. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  964. val = etm_get_trace_id(drvdata);
  965. return sprintf(buf, "%#lx\n", val);
  966. }
  967. static ssize_t traceid_store(struct device *dev,
  968. struct device_attribute *attr,
  969. const char *buf, size_t size)
  970. {
  971. int ret;
  972. unsigned long val;
  973. struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
  974. ret = kstrtoul(buf, 16, &val);
  975. if (ret)
  976. return ret;
  977. drvdata->traceid = val & ETM_TRACEID_MASK;
  978. return size;
  979. }
  980. static DEVICE_ATTR_RW(traceid);
  981. static struct attribute *coresight_etm_attrs[] = {
  982. &dev_attr_nr_addr_cmp.attr,
  983. &dev_attr_nr_cntr.attr,
  984. &dev_attr_nr_ctxid_cmp.attr,
  985. &dev_attr_etmsr.attr,
  986. &dev_attr_reset.attr,
  987. &dev_attr_mode.attr,
  988. &dev_attr_trigger_event.attr,
  989. &dev_attr_enable_event.attr,
  990. &dev_attr_fifofull_level.attr,
  991. &dev_attr_addr_idx.attr,
  992. &dev_attr_addr_single.attr,
  993. &dev_attr_addr_range.attr,
  994. &dev_attr_addr_start.attr,
  995. &dev_attr_addr_stop.attr,
  996. &dev_attr_addr_acctype.attr,
  997. &dev_attr_cntr_idx.attr,
  998. &dev_attr_cntr_rld_val.attr,
  999. &dev_attr_cntr_event.attr,
  1000. &dev_attr_cntr_rld_event.attr,
  1001. &dev_attr_cntr_val.attr,
  1002. &dev_attr_seq_12_event.attr,
  1003. &dev_attr_seq_21_event.attr,
  1004. &dev_attr_seq_23_event.attr,
  1005. &dev_attr_seq_31_event.attr,
  1006. &dev_attr_seq_32_event.attr,
  1007. &dev_attr_seq_13_event.attr,
  1008. &dev_attr_seq_curr_state.attr,
  1009. &dev_attr_ctxid_idx.attr,
  1010. &dev_attr_ctxid_pid.attr,
  1011. &dev_attr_ctxid_mask.attr,
  1012. &dev_attr_sync_freq.attr,
  1013. &dev_attr_timestamp_event.attr,
  1014. &dev_attr_traceid.attr,
  1015. &dev_attr_cpu.attr,
  1016. NULL,
  1017. };
  1018. #define coresight_etm3x_simple_func(name, offset) \
  1019. coresight_simple_func(struct etm_drvdata, NULL, name, offset)
  1020. coresight_etm3x_simple_func(etmccr, ETMCCR);
  1021. coresight_etm3x_simple_func(etmccer, ETMCCER);
  1022. coresight_etm3x_simple_func(etmscr, ETMSCR);
  1023. coresight_etm3x_simple_func(etmidr, ETMIDR);
  1024. coresight_etm3x_simple_func(etmcr, ETMCR);
  1025. coresight_etm3x_simple_func(etmtraceidr, ETMTRACEIDR);
  1026. coresight_etm3x_simple_func(etmteevr, ETMTEEVR);
  1027. coresight_etm3x_simple_func(etmtssvr, ETMTSSCR);
  1028. coresight_etm3x_simple_func(etmtecr1, ETMTECR1);
  1029. coresight_etm3x_simple_func(etmtecr2, ETMTECR2);
  1030. static struct attribute *coresight_etm_mgmt_attrs[] = {
  1031. &dev_attr_etmccr.attr,
  1032. &dev_attr_etmccer.attr,
  1033. &dev_attr_etmscr.attr,
  1034. &dev_attr_etmidr.attr,
  1035. &dev_attr_etmcr.attr,
  1036. &dev_attr_etmtraceidr.attr,
  1037. &dev_attr_etmteevr.attr,
  1038. &dev_attr_etmtssvr.attr,
  1039. &dev_attr_etmtecr1.attr,
  1040. &dev_attr_etmtecr2.attr,
  1041. NULL,
  1042. };
  1043. static const struct attribute_group coresight_etm_group = {
  1044. .attrs = coresight_etm_attrs,
  1045. };
  1046. static const struct attribute_group coresight_etm_mgmt_group = {
  1047. .attrs = coresight_etm_mgmt_attrs,
  1048. .name = "mgmt",
  1049. };
  1050. const struct attribute_group *coresight_etm_groups[] = {
  1051. &coresight_etm_group,
  1052. &coresight_etm_mgmt_group,
  1053. NULL,
  1054. };