vmwgfx_stdu.c 35 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243
  1. /******************************************************************************
  2. *
  3. * COPYRIGHT © 2014-2015 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. ******************************************************************************/
  27. #include "vmwgfx_kms.h"
  28. #include "device_include/svga3d_surfacedefs.h"
  29. #include <drm/drm_plane_helper.h>
  30. #define vmw_crtc_to_stdu(x) \
  31. container_of(x, struct vmw_screen_target_display_unit, base.crtc)
  32. #define vmw_encoder_to_stdu(x) \
  33. container_of(x, struct vmw_screen_target_display_unit, base.encoder)
  34. #define vmw_connector_to_stdu(x) \
  35. container_of(x, struct vmw_screen_target_display_unit, base.connector)
  36. enum stdu_content_type {
  37. SAME_AS_DISPLAY = 0,
  38. SEPARATE_SURFACE,
  39. SEPARATE_DMA
  40. };
  41. /**
  42. * struct vmw_stdu_dirty - closure structure for the update functions
  43. *
  44. * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
  45. * @transfer: Transfer direction for DMA command.
  46. * @left: Left side of bounding box.
  47. * @right: Right side of bounding box.
  48. * @top: Top side of bounding box.
  49. * @bottom: Bottom side of bounding box.
  50. * @buf: DMA buffer when DMA-ing between buffer and screen targets.
  51. * @sid: Surface ID when copying between surface and screen targets.
  52. */
  53. struct vmw_stdu_dirty {
  54. struct vmw_kms_dirty base;
  55. SVGA3dTransferType transfer;
  56. s32 left, right, top, bottom;
  57. u32 pitch;
  58. union {
  59. struct vmw_dma_buffer *buf;
  60. u32 sid;
  61. };
  62. };
  63. /*
  64. * SVGA commands that are used by this code. Please see the device headers
  65. * for explanation.
  66. */
  67. struct vmw_stdu_update {
  68. SVGA3dCmdHeader header;
  69. SVGA3dCmdUpdateGBScreenTarget body;
  70. };
  71. struct vmw_stdu_dma {
  72. SVGA3dCmdHeader header;
  73. SVGA3dCmdSurfaceDMA body;
  74. };
  75. struct vmw_stdu_surface_copy {
  76. SVGA3dCmdHeader header;
  77. SVGA3dCmdSurfaceCopy body;
  78. };
  79. /**
  80. * struct vmw_screen_target_display_unit
  81. *
  82. * @base: VMW specific DU structure
  83. * @display_srf: surface to be displayed. The dimension of this will always
  84. * match the display mode. If the display mode matches
  85. * content_vfbs dimensions, then this is a pointer into the
  86. * corresponding field in content_vfbs. If not, then this
  87. * is a separate buffer to which content_vfbs will blit to.
  88. * @content_type: content_fb type
  89. * @defined: true if the current display unit has been initialized
  90. */
  91. struct vmw_screen_target_display_unit {
  92. struct vmw_display_unit base;
  93. struct vmw_surface *display_srf;
  94. enum stdu_content_type content_fb_type;
  95. bool defined;
  96. };
  97. static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
  98. /******************************************************************************
  99. * Screen Target Display Unit helper Functions
  100. *****************************************************************************/
  101. /**
  102. * vmw_stdu_unpin_display - unpins the resource associated with display surface
  103. *
  104. * @stdu: contains the display surface
  105. *
  106. * If the display surface was privatedly allocated by
  107. * vmw_surface_gb_priv_define() and not registered as a framebuffer, then it
  108. * won't be automatically cleaned up when all the framebuffers are freed. As
  109. * such, we have to explicitly call vmw_resource_unreference() to get it freed.
  110. */
  111. static void vmw_stdu_unpin_display(struct vmw_screen_target_display_unit *stdu)
  112. {
  113. if (stdu->display_srf) {
  114. struct vmw_resource *res = &stdu->display_srf->res;
  115. vmw_resource_unpin(res);
  116. vmw_surface_unreference(&stdu->display_srf);
  117. }
  118. }
  119. /******************************************************************************
  120. * Screen Target Display Unit CRTC Functions
  121. *****************************************************************************/
  122. /**
  123. * vmw_stdu_crtc_destroy - cleans up the STDU
  124. *
  125. * @crtc: used to get a reference to the containing STDU
  126. */
  127. static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
  128. {
  129. vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
  130. }
  131. /**
  132. * vmw_stdu_define_st - Defines a Screen Target
  133. *
  134. * @dev_priv: VMW DRM device
  135. * @stdu: display unit to create a Screen Target for
  136. * @mode: The mode to set.
  137. * @crtc_x: X coordinate of screen target relative to framebuffer origin.
  138. * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
  139. *
  140. * Creates a STDU that we can used later. This function is called whenever the
  141. * framebuffer size changes.
  142. *
  143. * RETURNs:
  144. * 0 on success, error code on failure
  145. */
  146. static int vmw_stdu_define_st(struct vmw_private *dev_priv,
  147. struct vmw_screen_target_display_unit *stdu,
  148. struct drm_display_mode *mode,
  149. int crtc_x, int crtc_y)
  150. {
  151. struct {
  152. SVGA3dCmdHeader header;
  153. SVGA3dCmdDefineGBScreenTarget body;
  154. } *cmd;
  155. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  156. if (unlikely(cmd == NULL)) {
  157. DRM_ERROR("Out of FIFO space defining Screen Target\n");
  158. return -ENOMEM;
  159. }
  160. cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
  161. cmd->header.size = sizeof(cmd->body);
  162. cmd->body.stid = stdu->base.unit;
  163. cmd->body.width = mode->hdisplay;
  164. cmd->body.height = mode->vdisplay;
  165. cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
  166. cmd->body.dpi = 0;
  167. if (stdu->base.is_implicit) {
  168. cmd->body.xRoot = crtc_x;
  169. cmd->body.yRoot = crtc_y;
  170. } else {
  171. cmd->body.xRoot = stdu->base.gui_x;
  172. cmd->body.yRoot = stdu->base.gui_y;
  173. }
  174. stdu->base.set_gui_x = cmd->body.xRoot;
  175. stdu->base.set_gui_y = cmd->body.yRoot;
  176. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  177. stdu->defined = true;
  178. return 0;
  179. }
  180. /**
  181. * vmw_stdu_bind_st - Binds a surface to a Screen Target
  182. *
  183. * @dev_priv: VMW DRM device
  184. * @stdu: display unit affected
  185. * @res: Buffer to bind to the screen target. Set to NULL to blank screen.
  186. *
  187. * Binding a surface to a Screen Target the same as flipping
  188. */
  189. static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
  190. struct vmw_screen_target_display_unit *stdu,
  191. struct vmw_resource *res)
  192. {
  193. SVGA3dSurfaceImageId image;
  194. struct {
  195. SVGA3dCmdHeader header;
  196. SVGA3dCmdBindGBScreenTarget body;
  197. } *cmd;
  198. if (!stdu->defined) {
  199. DRM_ERROR("No screen target defined\n");
  200. return -EINVAL;
  201. }
  202. /* Set up image using information in vfb */
  203. memset(&image, 0, sizeof(image));
  204. image.sid = res ? res->id : SVGA3D_INVALID_ID;
  205. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  206. if (unlikely(cmd == NULL)) {
  207. DRM_ERROR("Out of FIFO space binding a screen target\n");
  208. return -ENOMEM;
  209. }
  210. cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
  211. cmd->header.size = sizeof(cmd->body);
  212. cmd->body.stid = stdu->base.unit;
  213. cmd->body.image = image;
  214. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  215. return 0;
  216. }
  217. /**
  218. * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
  219. * bounding box.
  220. *
  221. * @cmd: Pointer to command stream.
  222. * @unit: Screen target unit.
  223. * @left: Left side of bounding box.
  224. * @right: Right side of bounding box.
  225. * @top: Top side of bounding box.
  226. * @bottom: Bottom side of bounding box.
  227. */
  228. static void vmw_stdu_populate_update(void *cmd, int unit,
  229. s32 left, s32 right, s32 top, s32 bottom)
  230. {
  231. struct vmw_stdu_update *update = cmd;
  232. update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
  233. update->header.size = sizeof(update->body);
  234. update->body.stid = unit;
  235. update->body.rect.x = left;
  236. update->body.rect.y = top;
  237. update->body.rect.w = right - left;
  238. update->body.rect.h = bottom - top;
  239. }
  240. /**
  241. * vmw_stdu_update_st - Full update of a Screen Target
  242. *
  243. * @dev_priv: VMW DRM device
  244. * @stdu: display unit affected
  245. *
  246. * This function needs to be called whenever the content of a screen
  247. * target has changed completely. Typically as a result of a backing
  248. * surface change.
  249. *
  250. * RETURNS:
  251. * 0 on success, error code on failure
  252. */
  253. static int vmw_stdu_update_st(struct vmw_private *dev_priv,
  254. struct vmw_screen_target_display_unit *stdu)
  255. {
  256. struct vmw_stdu_update *cmd;
  257. struct drm_crtc *crtc = &stdu->base.crtc;
  258. if (!stdu->defined) {
  259. DRM_ERROR("No screen target defined");
  260. return -EINVAL;
  261. }
  262. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  263. if (unlikely(cmd == NULL)) {
  264. DRM_ERROR("Out of FIFO space updating a Screen Target\n");
  265. return -ENOMEM;
  266. }
  267. vmw_stdu_populate_update(cmd, stdu->base.unit, 0, crtc->mode.hdisplay,
  268. 0, crtc->mode.vdisplay);
  269. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  270. return 0;
  271. }
  272. /**
  273. * vmw_stdu_destroy_st - Destroy a Screen Target
  274. *
  275. * @dev_priv: VMW DRM device
  276. * @stdu: display unit to destroy
  277. */
  278. static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
  279. struct vmw_screen_target_display_unit *stdu)
  280. {
  281. int ret;
  282. struct {
  283. SVGA3dCmdHeader header;
  284. SVGA3dCmdDestroyGBScreenTarget body;
  285. } *cmd;
  286. /* Nothing to do if not successfully defined */
  287. if (unlikely(!stdu->defined))
  288. return 0;
  289. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  290. if (unlikely(cmd == NULL)) {
  291. DRM_ERROR("Out of FIFO space, screen target not destroyed\n");
  292. return -ENOMEM;
  293. }
  294. cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
  295. cmd->header.size = sizeof(cmd->body);
  296. cmd->body.stid = stdu->base.unit;
  297. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  298. /* Force sync */
  299. ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
  300. if (unlikely(ret != 0))
  301. DRM_ERROR("Failed to sync with HW");
  302. stdu->defined = false;
  303. return ret;
  304. }
  305. /**
  306. * vmw_stdu_bind_fb - Bind an fb to a defined screen target
  307. *
  308. * @dev_priv: Pointer to a device private struct.
  309. * @crtc: The crtc holding the screen target.
  310. * @mode: The mode currently used by the screen target. Must be non-NULL.
  311. * @new_fb: The new framebuffer to bind. Must be non-NULL.
  312. *
  313. * RETURNS:
  314. * 0 on success, error code on failure.
  315. */
  316. static int vmw_stdu_bind_fb(struct vmw_private *dev_priv,
  317. struct drm_crtc *crtc,
  318. struct drm_display_mode *mode,
  319. struct drm_framebuffer *new_fb)
  320. {
  321. struct vmw_screen_target_display_unit *stdu = vmw_crtc_to_stdu(crtc);
  322. struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(new_fb);
  323. struct vmw_surface *new_display_srf = NULL;
  324. enum stdu_content_type new_content_type;
  325. struct vmw_framebuffer_surface *new_vfbs;
  326. int ret;
  327. WARN_ON_ONCE(!stdu->defined);
  328. new_vfbs = (vfb->dmabuf) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
  329. if (new_vfbs && new_vfbs->surface->base_size.width == mode->hdisplay &&
  330. new_vfbs->surface->base_size.height == mode->vdisplay)
  331. new_content_type = SAME_AS_DISPLAY;
  332. else if (vfb->dmabuf)
  333. new_content_type = SEPARATE_DMA;
  334. else
  335. new_content_type = SEPARATE_SURFACE;
  336. if (new_content_type != SAME_AS_DISPLAY &&
  337. !stdu->display_srf) {
  338. struct vmw_surface content_srf;
  339. struct drm_vmw_size display_base_size = {0};
  340. display_base_size.width = mode->hdisplay;
  341. display_base_size.height = mode->vdisplay;
  342. display_base_size.depth = 1;
  343. /*
  344. * If content buffer is a DMA buf, then we have to construct
  345. * surface info
  346. */
  347. if (new_content_type == SEPARATE_DMA) {
  348. switch (new_fb->format->cpp[0] * 8) {
  349. case 32:
  350. content_srf.format = SVGA3D_X8R8G8B8;
  351. break;
  352. case 16:
  353. content_srf.format = SVGA3D_R5G6B5;
  354. break;
  355. case 8:
  356. content_srf.format = SVGA3D_P8;
  357. break;
  358. default:
  359. DRM_ERROR("Invalid format\n");
  360. return -EINVAL;
  361. }
  362. content_srf.flags = 0;
  363. content_srf.mip_levels[0] = 1;
  364. content_srf.multisample_count = 0;
  365. } else {
  366. content_srf = *new_vfbs->surface;
  367. }
  368. ret = vmw_surface_gb_priv_define(crtc->dev,
  369. 0, /* because kernel visible only */
  370. content_srf.flags,
  371. content_srf.format,
  372. true, /* a scanout buffer */
  373. content_srf.mip_levels[0],
  374. content_srf.multisample_count,
  375. 0,
  376. display_base_size,
  377. &new_display_srf);
  378. if (unlikely(ret != 0)) {
  379. DRM_ERROR("Could not allocate screen target surface.\n");
  380. return ret;
  381. }
  382. } else if (new_content_type == SAME_AS_DISPLAY) {
  383. new_display_srf = vmw_surface_reference(new_vfbs->surface);
  384. }
  385. if (new_display_srf) {
  386. /* Pin new surface before flipping */
  387. ret = vmw_resource_pin(&new_display_srf->res, false);
  388. if (ret)
  389. goto out_srf_unref;
  390. ret = vmw_stdu_bind_st(dev_priv, stdu, &new_display_srf->res);
  391. if (ret)
  392. goto out_srf_unpin;
  393. /* Unpin and unreference old surface */
  394. vmw_stdu_unpin_display(stdu);
  395. /* Transfer the reference */
  396. stdu->display_srf = new_display_srf;
  397. new_display_srf = NULL;
  398. }
  399. crtc->primary->fb = new_fb;
  400. stdu->content_fb_type = new_content_type;
  401. return 0;
  402. out_srf_unpin:
  403. vmw_resource_unpin(&new_display_srf->res);
  404. out_srf_unref:
  405. vmw_surface_unreference(&new_display_srf);
  406. return ret;
  407. }
  408. /**
  409. * vmw_stdu_crtc_set_config - Sets a mode
  410. *
  411. * @set: mode parameters
  412. *
  413. * This function is the device-specific portion of the DRM CRTC mode set.
  414. * For the SVGA device, we do this by defining a Screen Target, binding a
  415. * GB Surface to that target, and finally update the screen target.
  416. *
  417. * RETURNS:
  418. * 0 on success, error code otherwise
  419. */
  420. static int vmw_stdu_crtc_set_config(struct drm_mode_set *set)
  421. {
  422. struct vmw_private *dev_priv;
  423. struct vmw_framebuffer *vfb;
  424. struct vmw_screen_target_display_unit *stdu;
  425. struct drm_display_mode *mode;
  426. struct drm_framebuffer *new_fb;
  427. struct drm_crtc *crtc;
  428. struct drm_encoder *encoder;
  429. struct drm_connector *connector;
  430. bool turning_off;
  431. int ret;
  432. if (!set || !set->crtc)
  433. return -EINVAL;
  434. crtc = set->crtc;
  435. stdu = vmw_crtc_to_stdu(crtc);
  436. mode = set->mode;
  437. new_fb = set->fb;
  438. dev_priv = vmw_priv(crtc->dev);
  439. turning_off = set->num_connectors == 0 || !mode || !new_fb;
  440. vfb = (new_fb) ? vmw_framebuffer_to_vfb(new_fb) : NULL;
  441. if (set->num_connectors > 1) {
  442. DRM_ERROR("Too many connectors\n");
  443. return -EINVAL;
  444. }
  445. if (set->num_connectors == 1 &&
  446. set->connectors[0] != &stdu->base.connector) {
  447. DRM_ERROR("Connectors don't match %p %p\n",
  448. set->connectors[0], &stdu->base.connector);
  449. return -EINVAL;
  450. }
  451. if (!turning_off && (set->x + mode->hdisplay > new_fb->width ||
  452. set->y + mode->vdisplay > new_fb->height)) {
  453. DRM_ERROR("Set outside of framebuffer\n");
  454. return -EINVAL;
  455. }
  456. /* Only one active implicit frame-buffer at a time. */
  457. mutex_lock(&dev_priv->global_kms_state_mutex);
  458. if (!turning_off && stdu->base.is_implicit && dev_priv->implicit_fb &&
  459. !(dev_priv->num_implicit == 1 && stdu->base.active_implicit)
  460. && dev_priv->implicit_fb != vfb) {
  461. mutex_unlock(&dev_priv->global_kms_state_mutex);
  462. DRM_ERROR("Multiple implicit framebuffers not supported.\n");
  463. return -EINVAL;
  464. }
  465. mutex_unlock(&dev_priv->global_kms_state_mutex);
  466. /* Since they always map one to one these are safe */
  467. connector = &stdu->base.connector;
  468. encoder = &stdu->base.encoder;
  469. if (stdu->defined) {
  470. ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
  471. if (ret)
  472. return ret;
  473. vmw_stdu_unpin_display(stdu);
  474. (void) vmw_stdu_update_st(dev_priv, stdu);
  475. vmw_kms_del_active(dev_priv, &stdu->base);
  476. ret = vmw_stdu_destroy_st(dev_priv, stdu);
  477. if (ret)
  478. return ret;
  479. crtc->primary->fb = NULL;
  480. crtc->enabled = false;
  481. encoder->crtc = NULL;
  482. connector->encoder = NULL;
  483. stdu->content_fb_type = SAME_AS_DISPLAY;
  484. crtc->x = set->x;
  485. crtc->y = set->y;
  486. }
  487. if (turning_off)
  488. return 0;
  489. /*
  490. * Steps to displaying a surface, assume surface is already
  491. * bound:
  492. * 1. define a screen target
  493. * 2. bind a fb to the screen target
  494. * 3. update that screen target (this is done later by
  495. * vmw_kms_stdu_do_surface_dirty_or_present)
  496. */
  497. /*
  498. * Note on error handling: We can't really restore the crtc to
  499. * it's original state on error, but we at least update the
  500. * current state to what's submitted to hardware to enable
  501. * future recovery.
  502. */
  503. vmw_svga_enable(dev_priv);
  504. ret = vmw_stdu_define_st(dev_priv, stdu, mode, set->x, set->y);
  505. if (ret)
  506. return ret;
  507. crtc->x = set->x;
  508. crtc->y = set->y;
  509. crtc->mode = *mode;
  510. ret = vmw_stdu_bind_fb(dev_priv, crtc, mode, new_fb);
  511. if (ret)
  512. return ret;
  513. vmw_kms_add_active(dev_priv, &stdu->base, vfb);
  514. crtc->enabled = true;
  515. connector->encoder = encoder;
  516. encoder->crtc = crtc;
  517. return 0;
  518. }
  519. /**
  520. * vmw_stdu_crtc_page_flip - Binds a buffer to a screen target
  521. *
  522. * @crtc: CRTC to attach FB to
  523. * @fb: FB to attach
  524. * @event: Event to be posted. This event should've been alloced
  525. * using k[mz]alloc, and should've been completely initialized.
  526. * @page_flip_flags: Input flags.
  527. *
  528. * If the STDU uses the same display and content buffers, i.e. a true flip,
  529. * this function will replace the existing display buffer with the new content
  530. * buffer.
  531. *
  532. * If the STDU uses different display and content buffers, i.e. a blit, then
  533. * only the content buffer will be updated.
  534. *
  535. * RETURNS:
  536. * 0 on success, error code on failure
  537. */
  538. static int vmw_stdu_crtc_page_flip(struct drm_crtc *crtc,
  539. struct drm_framebuffer *new_fb,
  540. struct drm_pending_vblank_event *event,
  541. uint32_t flags)
  542. {
  543. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  544. struct vmw_screen_target_display_unit *stdu;
  545. struct drm_vmw_rect vclips;
  546. struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(new_fb);
  547. int ret;
  548. dev_priv = vmw_priv(crtc->dev);
  549. stdu = vmw_crtc_to_stdu(crtc);
  550. if (!stdu->defined || !vmw_kms_crtc_flippable(dev_priv, crtc))
  551. return -EINVAL;
  552. ret = vmw_stdu_bind_fb(dev_priv, crtc, &crtc->mode, new_fb);
  553. if (ret)
  554. return ret;
  555. if (stdu->base.is_implicit)
  556. vmw_kms_update_implicit_fb(dev_priv, crtc);
  557. vclips.x = crtc->x;
  558. vclips.y = crtc->y;
  559. vclips.w = crtc->mode.hdisplay;
  560. vclips.h = crtc->mode.vdisplay;
  561. if (vfb->dmabuf)
  562. ret = vmw_kms_stdu_dma(dev_priv, NULL, vfb, NULL, NULL, &vclips,
  563. 1, 1, true, false);
  564. else
  565. ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, &vclips,
  566. NULL, 0, 0, 1, 1, NULL);
  567. if (ret)
  568. return ret;
  569. if (event) {
  570. struct vmw_fence_obj *fence = NULL;
  571. struct drm_file *file_priv = event->base.file_priv;
  572. vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);
  573. if (!fence)
  574. return -ENOMEM;
  575. ret = vmw_event_fence_action_queue(file_priv, fence,
  576. &event->base,
  577. &event->event.tv_sec,
  578. &event->event.tv_usec,
  579. true);
  580. vmw_fence_obj_unreference(&fence);
  581. } else {
  582. vmw_fifo_flush(dev_priv, false);
  583. }
  584. return 0;
  585. }
  586. /**
  587. * vmw_stdu_dmabuf_clip - Callback to encode a suface DMA command cliprect
  588. *
  589. * @dirty: The closure structure.
  590. *
  591. * Encodes a surface DMA command cliprect and updates the bounding box
  592. * for the DMA.
  593. */
  594. static void vmw_stdu_dmabuf_clip(struct vmw_kms_dirty *dirty)
  595. {
  596. struct vmw_stdu_dirty *ddirty =
  597. container_of(dirty, struct vmw_stdu_dirty, base);
  598. struct vmw_stdu_dma *cmd = dirty->cmd;
  599. struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
  600. blit += dirty->num_hits;
  601. blit->srcx = dirty->fb_x;
  602. blit->srcy = dirty->fb_y;
  603. blit->x = dirty->unit_x1;
  604. blit->y = dirty->unit_y1;
  605. blit->d = 1;
  606. blit->w = dirty->unit_x2 - dirty->unit_x1;
  607. blit->h = dirty->unit_y2 - dirty->unit_y1;
  608. dirty->num_hits++;
  609. if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
  610. return;
  611. /* Destination bounding box */
  612. ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
  613. ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
  614. ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
  615. ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
  616. }
  617. /**
  618. * vmw_stdu_dmabuf_fifo_commit - Callback to fill in and submit a DMA command.
  619. *
  620. * @dirty: The closure structure.
  621. *
  622. * Fills in the missing fields in a DMA command, and optionally encodes
  623. * a screen target update command, depending on transfer direction.
  624. */
  625. static void vmw_stdu_dmabuf_fifo_commit(struct vmw_kms_dirty *dirty)
  626. {
  627. struct vmw_stdu_dirty *ddirty =
  628. container_of(dirty, struct vmw_stdu_dirty, base);
  629. struct vmw_screen_target_display_unit *stdu =
  630. container_of(dirty->unit, typeof(*stdu), base);
  631. struct vmw_stdu_dma *cmd = dirty->cmd;
  632. struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
  633. SVGA3dCmdSurfaceDMASuffix *suffix =
  634. (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
  635. size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
  636. if (!dirty->num_hits) {
  637. vmw_fifo_commit(dirty->dev_priv, 0);
  638. return;
  639. }
  640. cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
  641. cmd->header.size = sizeof(cmd->body) + blit_size;
  642. vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
  643. cmd->body.guest.pitch = ddirty->pitch;
  644. cmd->body.host.sid = stdu->display_srf->res.id;
  645. cmd->body.host.face = 0;
  646. cmd->body.host.mipmap = 0;
  647. cmd->body.transfer = ddirty->transfer;
  648. suffix->suffixSize = sizeof(*suffix);
  649. suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
  650. if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
  651. blit_size += sizeof(struct vmw_stdu_update);
  652. vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
  653. ddirty->left, ddirty->right,
  654. ddirty->top, ddirty->bottom);
  655. }
  656. vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
  657. ddirty->left = ddirty->top = S32_MAX;
  658. ddirty->right = ddirty->bottom = S32_MIN;
  659. }
  660. /**
  661. * vmw_kms_stdu_dma - Perform a DMA transfer between a dma-buffer backed
  662. * framebuffer and the screen target system.
  663. *
  664. * @dev_priv: Pointer to the device private structure.
  665. * @file_priv: Pointer to a struct drm-file identifying the caller. May be
  666. * set to NULL, but then @user_fence_rep must also be set to NULL.
  667. * @vfb: Pointer to the dma-buffer backed framebuffer.
  668. * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
  669. * @vclips: Alternate array of clip rects. Either @clips or @vclips must
  670. * be NULL.
  671. * @num_clips: Number of clip rects in @clips or @vclips.
  672. * @increment: Increment to use when looping over @clips or @vclips.
  673. * @to_surface: Whether to DMA to the screen target system as opposed to
  674. * from the screen target system.
  675. * @interruptible: Whether to perform waits interruptible if possible.
  676. *
  677. * If DMA-ing till the screen target system, the function will also notify
  678. * the screen target system that a bounding box of the cliprects has been
  679. * updated.
  680. * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
  681. * interrupted.
  682. */
  683. int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
  684. struct drm_file *file_priv,
  685. struct vmw_framebuffer *vfb,
  686. struct drm_vmw_fence_rep __user *user_fence_rep,
  687. struct drm_clip_rect *clips,
  688. struct drm_vmw_rect *vclips,
  689. uint32_t num_clips,
  690. int increment,
  691. bool to_surface,
  692. bool interruptible)
  693. {
  694. struct vmw_dma_buffer *buf =
  695. container_of(vfb, struct vmw_framebuffer_dmabuf, base)->buffer;
  696. struct vmw_stdu_dirty ddirty;
  697. int ret;
  698. ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, interruptible,
  699. false);
  700. if (ret)
  701. return ret;
  702. ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
  703. SVGA3D_READ_HOST_VRAM;
  704. ddirty.left = ddirty.top = S32_MAX;
  705. ddirty.right = ddirty.bottom = S32_MIN;
  706. ddirty.pitch = vfb->base.pitches[0];
  707. ddirty.buf = buf;
  708. ddirty.base.fifo_commit = vmw_stdu_dmabuf_fifo_commit;
  709. ddirty.base.clip = vmw_stdu_dmabuf_clip;
  710. ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
  711. num_clips * sizeof(SVGA3dCopyBox) +
  712. sizeof(SVGA3dCmdSurfaceDMASuffix);
  713. if (to_surface)
  714. ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
  715. ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
  716. 0, 0, num_clips, increment, &ddirty.base);
  717. vmw_kms_helper_buffer_finish(dev_priv, file_priv, buf, NULL,
  718. user_fence_rep);
  719. return ret;
  720. }
  721. /**
  722. * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
  723. *
  724. * @dirty: The closure structure.
  725. *
  726. * Encodes a surface copy command cliprect and updates the bounding box
  727. * for the copy.
  728. */
  729. static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
  730. {
  731. struct vmw_stdu_dirty *sdirty =
  732. container_of(dirty, struct vmw_stdu_dirty, base);
  733. struct vmw_stdu_surface_copy *cmd = dirty->cmd;
  734. struct vmw_screen_target_display_unit *stdu =
  735. container_of(dirty->unit, typeof(*stdu), base);
  736. if (sdirty->sid != stdu->display_srf->res.id) {
  737. struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
  738. blit += dirty->num_hits;
  739. blit->srcx = dirty->fb_x;
  740. blit->srcy = dirty->fb_y;
  741. blit->x = dirty->unit_x1;
  742. blit->y = dirty->unit_y1;
  743. blit->d = 1;
  744. blit->w = dirty->unit_x2 - dirty->unit_x1;
  745. blit->h = dirty->unit_y2 - dirty->unit_y1;
  746. }
  747. dirty->num_hits++;
  748. /* Destination bounding box */
  749. sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
  750. sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
  751. sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
  752. sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
  753. }
  754. /**
  755. * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
  756. * copy command.
  757. *
  758. * @dirty: The closure structure.
  759. *
  760. * Fills in the missing fields in a surface copy command, and encodes a screen
  761. * target update command.
  762. */
  763. static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
  764. {
  765. struct vmw_stdu_dirty *sdirty =
  766. container_of(dirty, struct vmw_stdu_dirty, base);
  767. struct vmw_screen_target_display_unit *stdu =
  768. container_of(dirty->unit, typeof(*stdu), base);
  769. struct vmw_stdu_surface_copy *cmd = dirty->cmd;
  770. struct vmw_stdu_update *update;
  771. size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
  772. size_t commit_size;
  773. if (!dirty->num_hits) {
  774. vmw_fifo_commit(dirty->dev_priv, 0);
  775. return;
  776. }
  777. if (sdirty->sid != stdu->display_srf->res.id) {
  778. struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
  779. cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
  780. cmd->header.size = sizeof(cmd->body) + blit_size;
  781. cmd->body.src.sid = sdirty->sid;
  782. cmd->body.dest.sid = stdu->display_srf->res.id;
  783. update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
  784. commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
  785. } else {
  786. update = dirty->cmd;
  787. commit_size = sizeof(*update);
  788. }
  789. vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
  790. sdirty->right, sdirty->top, sdirty->bottom);
  791. vmw_fifo_commit(dirty->dev_priv, commit_size);
  792. sdirty->left = sdirty->top = S32_MAX;
  793. sdirty->right = sdirty->bottom = S32_MIN;
  794. }
  795. /**
  796. * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
  797. *
  798. * @dev_priv: Pointer to the device private structure.
  799. * @framebuffer: Pointer to the surface-buffer backed framebuffer.
  800. * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
  801. * @vclips: Alternate array of clip rects. Either @clips or @vclips must
  802. * be NULL.
  803. * @srf: Pointer to surface to blit from. If NULL, the surface attached
  804. * to @framebuffer will be used.
  805. * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
  806. * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
  807. * @num_clips: Number of clip rects in @clips.
  808. * @inc: Increment to use when looping over @clips.
  809. * @out_fence: If non-NULL, will return a ref-counted pointer to a
  810. * struct vmw_fence_obj. The returned fence pointer may be NULL in which
  811. * case the device has already synchronized.
  812. *
  813. * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
  814. * interrupted.
  815. */
  816. int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
  817. struct vmw_framebuffer *framebuffer,
  818. struct drm_clip_rect *clips,
  819. struct drm_vmw_rect *vclips,
  820. struct vmw_resource *srf,
  821. s32 dest_x,
  822. s32 dest_y,
  823. unsigned num_clips, int inc,
  824. struct vmw_fence_obj **out_fence)
  825. {
  826. struct vmw_framebuffer_surface *vfbs =
  827. container_of(framebuffer, typeof(*vfbs), base);
  828. struct vmw_stdu_dirty sdirty;
  829. int ret;
  830. if (!srf)
  831. srf = &vfbs->surface->res;
  832. ret = vmw_kms_helper_resource_prepare(srf, true);
  833. if (ret)
  834. return ret;
  835. if (vfbs->is_dmabuf_proxy) {
  836. ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
  837. if (ret)
  838. goto out_finish;
  839. }
  840. sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
  841. sdirty.base.clip = vmw_kms_stdu_surface_clip;
  842. sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
  843. sizeof(SVGA3dCopyBox) * num_clips +
  844. sizeof(struct vmw_stdu_update);
  845. sdirty.sid = srf->id;
  846. sdirty.left = sdirty.top = S32_MAX;
  847. sdirty.right = sdirty.bottom = S32_MIN;
  848. ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
  849. dest_x, dest_y, num_clips, inc,
  850. &sdirty.base);
  851. out_finish:
  852. vmw_kms_helper_resource_finish(srf, out_fence);
  853. return ret;
  854. }
  855. /*
  856. * Screen Target CRTC dispatch table
  857. */
  858. static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
  859. .cursor_set2 = vmw_du_crtc_cursor_set2,
  860. .cursor_move = vmw_du_crtc_cursor_move,
  861. .gamma_set = vmw_du_crtc_gamma_set,
  862. .destroy = vmw_stdu_crtc_destroy,
  863. .set_config = vmw_stdu_crtc_set_config,
  864. .page_flip = vmw_stdu_crtc_page_flip,
  865. };
  866. /******************************************************************************
  867. * Screen Target Display Unit Encoder Functions
  868. *****************************************************************************/
  869. /**
  870. * vmw_stdu_encoder_destroy - cleans up the STDU
  871. *
  872. * @encoder: used the get the containing STDU
  873. *
  874. * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
  875. * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
  876. * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
  877. * get called.
  878. */
  879. static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
  880. {
  881. vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
  882. }
  883. static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
  884. .destroy = vmw_stdu_encoder_destroy,
  885. };
  886. /******************************************************************************
  887. * Screen Target Display Unit Connector Functions
  888. *****************************************************************************/
  889. /**
  890. * vmw_stdu_connector_destroy - cleans up the STDU
  891. *
  892. * @connector: used to get the containing STDU
  893. *
  894. * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
  895. * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
  896. * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
  897. * get called.
  898. */
  899. static void vmw_stdu_connector_destroy(struct drm_connector *connector)
  900. {
  901. vmw_stdu_destroy(vmw_connector_to_stdu(connector));
  902. }
  903. static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
  904. .dpms = vmw_du_connector_dpms,
  905. .detect = vmw_du_connector_detect,
  906. .fill_modes = vmw_du_connector_fill_modes,
  907. .set_property = vmw_du_connector_set_property,
  908. .destroy = vmw_stdu_connector_destroy,
  909. };
  910. /**
  911. * vmw_stdu_init - Sets up a Screen Target Display Unit
  912. *
  913. * @dev_priv: VMW DRM device
  914. * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
  915. *
  916. * This function is called once per CRTC, and allocates one Screen Target
  917. * display unit to represent that CRTC. Since the SVGA device does not separate
  918. * out encoder and connector, they are represented as part of the STDU as well.
  919. */
  920. static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
  921. {
  922. struct vmw_screen_target_display_unit *stdu;
  923. struct drm_device *dev = dev_priv->dev;
  924. struct drm_connector *connector;
  925. struct drm_encoder *encoder;
  926. struct drm_crtc *crtc;
  927. stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
  928. if (!stdu)
  929. return -ENOMEM;
  930. stdu->base.unit = unit;
  931. crtc = &stdu->base.crtc;
  932. encoder = &stdu->base.encoder;
  933. connector = &stdu->base.connector;
  934. stdu->base.pref_active = (unit == 0);
  935. stdu->base.pref_width = dev_priv->initial_width;
  936. stdu->base.pref_height = dev_priv->initial_height;
  937. stdu->base.is_implicit = false;
  938. drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
  939. DRM_MODE_CONNECTOR_VIRTUAL);
  940. connector->status = vmw_du_connector_detect(connector, false);
  941. drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
  942. DRM_MODE_ENCODER_VIRTUAL, NULL);
  943. drm_mode_connector_attach_encoder(connector, encoder);
  944. encoder->possible_crtcs = (1 << unit);
  945. encoder->possible_clones = 0;
  946. (void) drm_connector_register(connector);
  947. drm_crtc_init(dev, crtc, &vmw_stdu_crtc_funcs);
  948. drm_mode_crtc_set_gamma_size(crtc, 256);
  949. drm_object_attach_property(&connector->base,
  950. dev_priv->hotplug_mode_update_property, 1);
  951. drm_object_attach_property(&connector->base,
  952. dev->mode_config.suggested_x_property, 0);
  953. drm_object_attach_property(&connector->base,
  954. dev->mode_config.suggested_y_property, 0);
  955. if (dev_priv->implicit_placement_property)
  956. drm_object_attach_property
  957. (&connector->base,
  958. dev_priv->implicit_placement_property,
  959. stdu->base.is_implicit);
  960. return 0;
  961. }
  962. /**
  963. * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
  964. *
  965. * @stdu: Screen Target Display Unit to be destroyed
  966. *
  967. * Clean up after vmw_stdu_init
  968. */
  969. static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
  970. {
  971. vmw_stdu_unpin_display(stdu);
  972. vmw_du_cleanup(&stdu->base);
  973. kfree(stdu);
  974. }
  975. /******************************************************************************
  976. * Screen Target Display KMS Functions
  977. *
  978. * These functions are called by the common KMS code in vmwgfx_kms.c
  979. *****************************************************************************/
  980. /**
  981. * vmw_kms_stdu_init_display - Initializes a Screen Target based display
  982. *
  983. * @dev_priv: VMW DRM device
  984. *
  985. * This function initialize a Screen Target based display device. It checks
  986. * the capability bits to make sure the underlying hardware can support
  987. * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
  988. * Units, as supported by the display hardware.
  989. *
  990. * RETURNS:
  991. * 0 on success, error code otherwise
  992. */
  993. int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
  994. {
  995. struct drm_device *dev = dev_priv->dev;
  996. int i, ret;
  997. /* Do nothing if Screen Target support is turned off */
  998. if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
  999. return -ENOSYS;
  1000. if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
  1001. return -ENOSYS;
  1002. ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
  1003. if (unlikely(ret != 0))
  1004. return ret;
  1005. dev_priv->active_display_unit = vmw_du_screen_target;
  1006. vmw_kms_create_implicit_placement_property(dev_priv, false);
  1007. for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
  1008. ret = vmw_stdu_init(dev_priv, i);
  1009. if (unlikely(ret != 0)) {
  1010. DRM_ERROR("Failed to initialize STDU %d", i);
  1011. goto err_vblank_cleanup;
  1012. }
  1013. }
  1014. DRM_INFO("Screen Target Display device initialized\n");
  1015. return 0;
  1016. err_vblank_cleanup:
  1017. drm_vblank_cleanup(dev);
  1018. return ret;
  1019. }
  1020. /**
  1021. * vmw_kms_stdu_close_display - Cleans up after vmw_kms_stdu_init_display
  1022. *
  1023. * @dev_priv: VMW DRM device
  1024. *
  1025. * Frees up any resources allocated by vmw_kms_stdu_init_display
  1026. *
  1027. * RETURNS:
  1028. * 0 on success
  1029. */
  1030. int vmw_kms_stdu_close_display(struct vmw_private *dev_priv)
  1031. {
  1032. struct drm_device *dev = dev_priv->dev;
  1033. drm_vblank_cleanup(dev);
  1034. return 0;
  1035. }