vmwgfx_ioctl.c 12 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_drv.h"
  28. #include <drm/vmwgfx_drm.h>
  29. #include "vmwgfx_kms.h"
  30. #include "device_include/svga3d_caps.h"
  31. struct svga_3d_compat_cap {
  32. SVGA3dCapsRecordHeader header;
  33. SVGA3dCapPair pairs[SVGA3D_DEVCAP_MAX];
  34. };
  35. int vmw_getparam_ioctl(struct drm_device *dev, void *data,
  36. struct drm_file *file_priv)
  37. {
  38. struct vmw_private *dev_priv = vmw_priv(dev);
  39. struct drm_vmw_getparam_arg *param =
  40. (struct drm_vmw_getparam_arg *)data;
  41. struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
  42. switch (param->param) {
  43. case DRM_VMW_PARAM_NUM_STREAMS:
  44. param->value = vmw_overlay_num_overlays(dev_priv);
  45. break;
  46. case DRM_VMW_PARAM_NUM_FREE_STREAMS:
  47. param->value = vmw_overlay_num_free_overlays(dev_priv);
  48. break;
  49. case DRM_VMW_PARAM_3D:
  50. param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
  51. break;
  52. case DRM_VMW_PARAM_HW_CAPS:
  53. param->value = dev_priv->capabilities;
  54. break;
  55. case DRM_VMW_PARAM_FIFO_CAPS:
  56. param->value = dev_priv->fifo.capabilities;
  57. break;
  58. case DRM_VMW_PARAM_MAX_FB_SIZE:
  59. param->value = dev_priv->prim_bb_mem;
  60. break;
  61. case DRM_VMW_PARAM_FIFO_HW_VERSION:
  62. {
  63. u32 *fifo_mem = dev_priv->mmio_virt;
  64. const struct vmw_fifo_state *fifo = &dev_priv->fifo;
  65. if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
  66. param->value = SVGA3D_HWVERSION_WS8_B1;
  67. break;
  68. }
  69. param->value =
  70. vmw_mmio_read(fifo_mem +
  71. ((fifo->capabilities &
  72. SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
  73. SVGA_FIFO_3D_HWVERSION_REVISED :
  74. SVGA_FIFO_3D_HWVERSION));
  75. break;
  76. }
  77. case DRM_VMW_PARAM_MAX_SURF_MEMORY:
  78. if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
  79. !vmw_fp->gb_aware)
  80. param->value = dev_priv->max_mob_pages * PAGE_SIZE / 2;
  81. else
  82. param->value = dev_priv->memory_size;
  83. break;
  84. case DRM_VMW_PARAM_3D_CAPS_SIZE:
  85. if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
  86. vmw_fp->gb_aware)
  87. param->value = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
  88. else if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS)
  89. param->value = sizeof(struct svga_3d_compat_cap) +
  90. sizeof(uint32_t);
  91. else
  92. param->value = (SVGA_FIFO_3D_CAPS_LAST -
  93. SVGA_FIFO_3D_CAPS + 1) *
  94. sizeof(uint32_t);
  95. break;
  96. case DRM_VMW_PARAM_MAX_MOB_MEMORY:
  97. vmw_fp->gb_aware = true;
  98. param->value = dev_priv->max_mob_pages * PAGE_SIZE;
  99. break;
  100. case DRM_VMW_PARAM_MAX_MOB_SIZE:
  101. param->value = dev_priv->max_mob_size;
  102. break;
  103. case DRM_VMW_PARAM_SCREEN_TARGET:
  104. param->value =
  105. (dev_priv->active_display_unit == vmw_du_screen_target);
  106. break;
  107. case DRM_VMW_PARAM_DX:
  108. param->value = dev_priv->has_dx;
  109. break;
  110. default:
  111. DRM_ERROR("Illegal vmwgfx get param request: %d\n",
  112. param->param);
  113. return -EINVAL;
  114. }
  115. return 0;
  116. }
  117. static u32 vmw_mask_multisample(unsigned int cap, u32 fmt_value)
  118. {
  119. /* If the header is updated, update the format test as well! */
  120. BUILD_BUG_ON(SVGA3D_DEVCAP_DXFMT_BC5_UNORM + 1 != SVGA3D_DEVCAP_MAX);
  121. if (cap >= SVGA3D_DEVCAP_DXFMT_X8R8G8B8 &&
  122. cap <= SVGA3D_DEVCAP_DXFMT_BC5_UNORM)
  123. fmt_value &= ~(SVGADX_DXFMT_MULTISAMPLE_2 |
  124. SVGADX_DXFMT_MULTISAMPLE_4 |
  125. SVGADX_DXFMT_MULTISAMPLE_8);
  126. else if (cap == SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES)
  127. return 0;
  128. return fmt_value;
  129. }
  130. static int vmw_fill_compat_cap(struct vmw_private *dev_priv, void *bounce,
  131. size_t size)
  132. {
  133. struct svga_3d_compat_cap *compat_cap =
  134. (struct svga_3d_compat_cap *) bounce;
  135. unsigned int i;
  136. size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs);
  137. unsigned int max_size;
  138. if (size < pair_offset)
  139. return -EINVAL;
  140. max_size = (size - pair_offset) / sizeof(SVGA3dCapPair);
  141. if (max_size > SVGA3D_DEVCAP_MAX)
  142. max_size = SVGA3D_DEVCAP_MAX;
  143. compat_cap->header.length =
  144. (pair_offset + max_size * sizeof(SVGA3dCapPair)) / sizeof(u32);
  145. compat_cap->header.type = SVGA3DCAPS_RECORD_DEVCAPS;
  146. spin_lock(&dev_priv->cap_lock);
  147. for (i = 0; i < max_size; ++i) {
  148. vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
  149. compat_cap->pairs[i][0] = i;
  150. compat_cap->pairs[i][1] = vmw_mask_multisample
  151. (i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
  152. }
  153. spin_unlock(&dev_priv->cap_lock);
  154. return 0;
  155. }
  156. int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data,
  157. struct drm_file *file_priv)
  158. {
  159. struct drm_vmw_get_3d_cap_arg *arg =
  160. (struct drm_vmw_get_3d_cap_arg *) data;
  161. struct vmw_private *dev_priv = vmw_priv(dev);
  162. uint32_t size;
  163. u32 *fifo_mem;
  164. void __user *buffer = (void __user *)((unsigned long)(arg->buffer));
  165. void *bounce;
  166. int ret;
  167. bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS);
  168. struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
  169. if (unlikely(arg->pad64 != 0)) {
  170. DRM_ERROR("Illegal GET_3D_CAP argument.\n");
  171. return -EINVAL;
  172. }
  173. if (gb_objects && vmw_fp->gb_aware)
  174. size = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
  175. else if (gb_objects)
  176. size = sizeof(struct svga_3d_compat_cap) + sizeof(uint32_t);
  177. else
  178. size = (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) *
  179. sizeof(uint32_t);
  180. if (arg->max_size < size)
  181. size = arg->max_size;
  182. bounce = vzalloc(size);
  183. if (unlikely(bounce == NULL)) {
  184. DRM_ERROR("Failed to allocate bounce buffer for 3D caps.\n");
  185. return -ENOMEM;
  186. }
  187. if (gb_objects && vmw_fp->gb_aware) {
  188. int i, num;
  189. uint32_t *bounce32 = (uint32_t *) bounce;
  190. num = size / sizeof(uint32_t);
  191. if (num > SVGA3D_DEVCAP_MAX)
  192. num = SVGA3D_DEVCAP_MAX;
  193. spin_lock(&dev_priv->cap_lock);
  194. for (i = 0; i < num; ++i) {
  195. vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
  196. *bounce32++ = vmw_mask_multisample
  197. (i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
  198. }
  199. spin_unlock(&dev_priv->cap_lock);
  200. } else if (gb_objects) {
  201. ret = vmw_fill_compat_cap(dev_priv, bounce, size);
  202. if (unlikely(ret != 0))
  203. goto out_err;
  204. } else {
  205. fifo_mem = dev_priv->mmio_virt;
  206. memcpy(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);
  207. }
  208. ret = copy_to_user(buffer, bounce, size);
  209. if (ret)
  210. ret = -EFAULT;
  211. out_err:
  212. vfree(bounce);
  213. if (unlikely(ret != 0))
  214. DRM_ERROR("Failed to report 3D caps info.\n");
  215. return ret;
  216. }
  217. int vmw_present_ioctl(struct drm_device *dev, void *data,
  218. struct drm_file *file_priv)
  219. {
  220. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  221. struct vmw_private *dev_priv = vmw_priv(dev);
  222. struct drm_vmw_present_arg *arg =
  223. (struct drm_vmw_present_arg *)data;
  224. struct vmw_surface *surface;
  225. struct drm_vmw_rect __user *clips_ptr;
  226. struct drm_vmw_rect *clips = NULL;
  227. struct drm_framebuffer *fb;
  228. struct vmw_framebuffer *vfb;
  229. struct vmw_resource *res;
  230. uint32_t num_clips;
  231. int ret;
  232. num_clips = arg->num_clips;
  233. clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;
  234. if (unlikely(num_clips == 0))
  235. return 0;
  236. if (clips_ptr == NULL) {
  237. DRM_ERROR("Variable clips_ptr must be specified.\n");
  238. ret = -EINVAL;
  239. goto out_clips;
  240. }
  241. clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
  242. if (clips == NULL) {
  243. DRM_ERROR("Failed to allocate clip rect list.\n");
  244. ret = -ENOMEM;
  245. goto out_clips;
  246. }
  247. ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
  248. if (ret) {
  249. DRM_ERROR("Failed to copy clip rects from userspace.\n");
  250. ret = -EFAULT;
  251. goto out_no_copy;
  252. }
  253. drm_modeset_lock_all(dev);
  254. fb = drm_framebuffer_lookup(dev, arg->fb_id);
  255. if (!fb) {
  256. DRM_ERROR("Invalid framebuffer id.\n");
  257. ret = -ENOENT;
  258. goto out_no_fb;
  259. }
  260. vfb = vmw_framebuffer_to_vfb(fb);
  261. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  262. if (unlikely(ret != 0))
  263. goto out_no_ttm_lock;
  264. ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid,
  265. user_surface_converter,
  266. &res);
  267. if (ret)
  268. goto out_no_surface;
  269. surface = vmw_res_to_srf(res);
  270. ret = vmw_kms_present(dev_priv, file_priv,
  271. vfb, surface, arg->sid,
  272. arg->dest_x, arg->dest_y,
  273. clips, num_clips);
  274. /* vmw_user_surface_lookup takes one ref so does new_fb */
  275. vmw_surface_unreference(&surface);
  276. out_no_surface:
  277. ttm_read_unlock(&dev_priv->reservation_sem);
  278. out_no_ttm_lock:
  279. drm_framebuffer_unreference(fb);
  280. out_no_fb:
  281. drm_modeset_unlock_all(dev);
  282. out_no_copy:
  283. kfree(clips);
  284. out_clips:
  285. return ret;
  286. }
  287. int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
  288. struct drm_file *file_priv)
  289. {
  290. struct vmw_private *dev_priv = vmw_priv(dev);
  291. struct drm_vmw_present_readback_arg *arg =
  292. (struct drm_vmw_present_readback_arg *)data;
  293. struct drm_vmw_fence_rep __user *user_fence_rep =
  294. (struct drm_vmw_fence_rep __user *)
  295. (unsigned long)arg->fence_rep;
  296. struct drm_vmw_rect __user *clips_ptr;
  297. struct drm_vmw_rect *clips = NULL;
  298. struct drm_framebuffer *fb;
  299. struct vmw_framebuffer *vfb;
  300. uint32_t num_clips;
  301. int ret;
  302. num_clips = arg->num_clips;
  303. clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;
  304. if (unlikely(num_clips == 0))
  305. return 0;
  306. if (clips_ptr == NULL) {
  307. DRM_ERROR("Argument clips_ptr must be specified.\n");
  308. ret = -EINVAL;
  309. goto out_clips;
  310. }
  311. clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
  312. if (clips == NULL) {
  313. DRM_ERROR("Failed to allocate clip rect list.\n");
  314. ret = -ENOMEM;
  315. goto out_clips;
  316. }
  317. ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
  318. if (ret) {
  319. DRM_ERROR("Failed to copy clip rects from userspace.\n");
  320. ret = -EFAULT;
  321. goto out_no_copy;
  322. }
  323. drm_modeset_lock_all(dev);
  324. fb = drm_framebuffer_lookup(dev, arg->fb_id);
  325. if (!fb) {
  326. DRM_ERROR("Invalid framebuffer id.\n");
  327. ret = -ENOENT;
  328. goto out_no_fb;
  329. }
  330. vfb = vmw_framebuffer_to_vfb(fb);
  331. if (!vfb->dmabuf) {
  332. DRM_ERROR("Framebuffer not dmabuf backed.\n");
  333. ret = -EINVAL;
  334. goto out_no_ttm_lock;
  335. }
  336. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  337. if (unlikely(ret != 0))
  338. goto out_no_ttm_lock;
  339. ret = vmw_kms_readback(dev_priv, file_priv,
  340. vfb, user_fence_rep,
  341. clips, num_clips);
  342. ttm_read_unlock(&dev_priv->reservation_sem);
  343. out_no_ttm_lock:
  344. drm_framebuffer_unreference(fb);
  345. out_no_fb:
  346. drm_modeset_unlock_all(dev);
  347. out_no_copy:
  348. kfree(clips);
  349. out_clips:
  350. return ret;
  351. }
  352. /**
  353. * vmw_fops_poll - wrapper around the drm_poll function
  354. *
  355. * @filp: See the linux fops poll documentation.
  356. * @wait: See the linux fops poll documentation.
  357. *
  358. * Wrapper around the drm_poll function that makes sure the device is
  359. * processing the fifo if drm_poll decides to wait.
  360. */
  361. unsigned int vmw_fops_poll(struct file *filp, struct poll_table_struct *wait)
  362. {
  363. struct drm_file *file_priv = filp->private_data;
  364. struct vmw_private *dev_priv =
  365. vmw_priv(file_priv->minor->dev);
  366. vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
  367. return drm_poll(filp, wait);
  368. }
  369. /**
  370. * vmw_fops_read - wrapper around the drm_read function
  371. *
  372. * @filp: See the linux fops read documentation.
  373. * @buffer: See the linux fops read documentation.
  374. * @count: See the linux fops read documentation.
  375. * offset: See the linux fops read documentation.
  376. *
  377. * Wrapper around the drm_read function that makes sure the device is
  378. * processing the fifo if drm_read decides to wait.
  379. */
  380. ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
  381. size_t count, loff_t *offset)
  382. {
  383. struct drm_file *file_priv = filp->private_data;
  384. struct vmw_private *dev_priv =
  385. vmw_priv(file_priv->minor->dev);
  386. vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
  387. return drm_read(filp, buffer, count, offset);
  388. }