drm.c 26 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108
  1. /*
  2. * Copyright (C) 2012 Avionic Design GmbH
  3. * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/host1x.h>
  10. #include <linux/iommu.h>
  11. #include <drm/drm_atomic.h>
  12. #include <drm/drm_atomic_helper.h>
  13. #include "drm.h"
  14. #include "gem.h"
  15. #define DRIVER_NAME "tegra"
  16. #define DRIVER_DESC "NVIDIA Tegra graphics"
  17. #define DRIVER_DATE "20120330"
  18. #define DRIVER_MAJOR 0
  19. #define DRIVER_MINOR 0
  20. #define DRIVER_PATCHLEVEL 0
  21. struct tegra_drm_file {
  22. struct list_head contexts;
  23. };
  24. static void tegra_atomic_schedule(struct tegra_drm *tegra,
  25. struct drm_atomic_state *state)
  26. {
  27. tegra->commit.state = state;
  28. schedule_work(&tegra->commit.work);
  29. }
  30. static void tegra_atomic_complete(struct tegra_drm *tegra,
  31. struct drm_atomic_state *state)
  32. {
  33. struct drm_device *drm = tegra->drm;
  34. /*
  35. * Everything below can be run asynchronously without the need to grab
  36. * any modeset locks at all under one condition: It must be guaranteed
  37. * that the asynchronous work has either been cancelled (if the driver
  38. * supports it, which at least requires that the framebuffers get
  39. * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
  40. * before the new state gets committed on the software side with
  41. * drm_atomic_helper_swap_state().
  42. *
  43. * This scheme allows new atomic state updates to be prepared and
  44. * checked in parallel to the asynchronous completion of the previous
  45. * update. Which is important since compositors need to figure out the
  46. * composition of the next frame right after having submitted the
  47. * current layout.
  48. */
  49. drm_atomic_helper_commit_modeset_disables(drm, state);
  50. drm_atomic_helper_commit_modeset_enables(drm, state);
  51. drm_atomic_helper_commit_planes(drm, state,
  52. DRM_PLANE_COMMIT_ACTIVE_ONLY);
  53. drm_atomic_helper_wait_for_vblanks(drm, state);
  54. drm_atomic_helper_cleanup_planes(drm, state);
  55. drm_atomic_state_put(state);
  56. }
  57. static void tegra_atomic_work(struct work_struct *work)
  58. {
  59. struct tegra_drm *tegra = container_of(work, struct tegra_drm,
  60. commit.work);
  61. tegra_atomic_complete(tegra, tegra->commit.state);
  62. }
  63. static int tegra_atomic_commit(struct drm_device *drm,
  64. struct drm_atomic_state *state, bool nonblock)
  65. {
  66. struct tegra_drm *tegra = drm->dev_private;
  67. int err;
  68. err = drm_atomic_helper_prepare_planes(drm, state);
  69. if (err)
  70. return err;
  71. /* serialize outstanding nonblocking commits */
  72. mutex_lock(&tegra->commit.lock);
  73. flush_work(&tegra->commit.work);
  74. /*
  75. * This is the point of no return - everything below never fails except
  76. * when the hw goes bonghits. Which means we can commit the new state on
  77. * the software side now.
  78. */
  79. drm_atomic_helper_swap_state(state, true);
  80. drm_atomic_state_get(state);
  81. if (nonblock)
  82. tegra_atomic_schedule(tegra, state);
  83. else
  84. tegra_atomic_complete(tegra, state);
  85. mutex_unlock(&tegra->commit.lock);
  86. return 0;
  87. }
  88. static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
  89. .fb_create = tegra_fb_create,
  90. #ifdef CONFIG_DRM_FBDEV_EMULATION
  91. .output_poll_changed = tegra_fb_output_poll_changed,
  92. #endif
  93. .atomic_check = drm_atomic_helper_check,
  94. .atomic_commit = tegra_atomic_commit,
  95. };
  96. static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
  97. {
  98. struct host1x_device *device = to_host1x_device(drm->dev);
  99. struct tegra_drm *tegra;
  100. int err;
  101. tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
  102. if (!tegra)
  103. return -ENOMEM;
  104. if (iommu_present(&platform_bus_type)) {
  105. struct iommu_domain_geometry *geometry;
  106. u64 start, end;
  107. tegra->domain = iommu_domain_alloc(&platform_bus_type);
  108. if (!tegra->domain) {
  109. err = -ENOMEM;
  110. goto free;
  111. }
  112. geometry = &tegra->domain->geometry;
  113. start = geometry->aperture_start;
  114. end = geometry->aperture_end;
  115. DRM_DEBUG_DRIVER("IOMMU aperture initialized (%#llx-%#llx)\n",
  116. start, end);
  117. drm_mm_init(&tegra->mm, start, end - start + 1);
  118. }
  119. mutex_init(&tegra->clients_lock);
  120. INIT_LIST_HEAD(&tegra->clients);
  121. mutex_init(&tegra->commit.lock);
  122. INIT_WORK(&tegra->commit.work, tegra_atomic_work);
  123. drm->dev_private = tegra;
  124. tegra->drm = drm;
  125. drm_mode_config_init(drm);
  126. drm->mode_config.min_width = 0;
  127. drm->mode_config.min_height = 0;
  128. drm->mode_config.max_width = 4096;
  129. drm->mode_config.max_height = 4096;
  130. drm->mode_config.funcs = &tegra_drm_mode_funcs;
  131. err = tegra_drm_fb_prepare(drm);
  132. if (err < 0)
  133. goto config;
  134. drm_kms_helper_poll_init(drm);
  135. err = host1x_device_init(device);
  136. if (err < 0)
  137. goto fbdev;
  138. /*
  139. * We don't use the drm_irq_install() helpers provided by the DRM
  140. * core, so we need to set this manually in order to allow the
  141. * DRM_IOCTL_WAIT_VBLANK to operate correctly.
  142. */
  143. drm->irq_enabled = true;
  144. /* syncpoints are used for full 32-bit hardware VBLANK counters */
  145. drm->max_vblank_count = 0xffffffff;
  146. err = drm_vblank_init(drm, drm->mode_config.num_crtc);
  147. if (err < 0)
  148. goto device;
  149. drm_mode_config_reset(drm);
  150. err = tegra_drm_fb_init(drm);
  151. if (err < 0)
  152. goto vblank;
  153. return 0;
  154. vblank:
  155. drm_vblank_cleanup(drm);
  156. device:
  157. host1x_device_exit(device);
  158. fbdev:
  159. drm_kms_helper_poll_fini(drm);
  160. tegra_drm_fb_free(drm);
  161. config:
  162. drm_mode_config_cleanup(drm);
  163. if (tegra->domain) {
  164. iommu_domain_free(tegra->domain);
  165. drm_mm_takedown(&tegra->mm);
  166. }
  167. free:
  168. kfree(tegra);
  169. return err;
  170. }
  171. static void tegra_drm_unload(struct drm_device *drm)
  172. {
  173. struct host1x_device *device = to_host1x_device(drm->dev);
  174. struct tegra_drm *tegra = drm->dev_private;
  175. int err;
  176. drm_kms_helper_poll_fini(drm);
  177. tegra_drm_fb_exit(drm);
  178. drm_mode_config_cleanup(drm);
  179. drm_vblank_cleanup(drm);
  180. err = host1x_device_exit(device);
  181. if (err < 0)
  182. return;
  183. if (tegra->domain) {
  184. iommu_domain_free(tegra->domain);
  185. drm_mm_takedown(&tegra->mm);
  186. }
  187. kfree(tegra);
  188. }
  189. static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
  190. {
  191. struct tegra_drm_file *fpriv;
  192. fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
  193. if (!fpriv)
  194. return -ENOMEM;
  195. INIT_LIST_HEAD(&fpriv->contexts);
  196. filp->driver_priv = fpriv;
  197. return 0;
  198. }
  199. static void tegra_drm_context_free(struct tegra_drm_context *context)
  200. {
  201. context->client->ops->close_channel(context);
  202. kfree(context);
  203. }
  204. static void tegra_drm_lastclose(struct drm_device *drm)
  205. {
  206. #ifdef CONFIG_DRM_FBDEV_EMULATION
  207. struct tegra_drm *tegra = drm->dev_private;
  208. tegra_fbdev_restore_mode(tegra->fbdev);
  209. #endif
  210. }
  211. static struct host1x_bo *
  212. host1x_bo_lookup(struct drm_file *file, u32 handle)
  213. {
  214. struct drm_gem_object *gem;
  215. struct tegra_bo *bo;
  216. gem = drm_gem_object_lookup(file, handle);
  217. if (!gem)
  218. return NULL;
  219. drm_gem_object_unreference_unlocked(gem);
  220. bo = to_tegra_bo(gem);
  221. return &bo->base;
  222. }
  223. static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
  224. struct drm_tegra_reloc __user *src,
  225. struct drm_device *drm,
  226. struct drm_file *file)
  227. {
  228. u32 cmdbuf, target;
  229. int err;
  230. err = get_user(cmdbuf, &src->cmdbuf.handle);
  231. if (err < 0)
  232. return err;
  233. err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
  234. if (err < 0)
  235. return err;
  236. err = get_user(target, &src->target.handle);
  237. if (err < 0)
  238. return err;
  239. err = get_user(dest->target.offset, &src->target.offset);
  240. if (err < 0)
  241. return err;
  242. err = get_user(dest->shift, &src->shift);
  243. if (err < 0)
  244. return err;
  245. dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
  246. if (!dest->cmdbuf.bo)
  247. return -ENOENT;
  248. dest->target.bo = host1x_bo_lookup(file, target);
  249. if (!dest->target.bo)
  250. return -ENOENT;
  251. return 0;
  252. }
  253. int tegra_drm_submit(struct tegra_drm_context *context,
  254. struct drm_tegra_submit *args, struct drm_device *drm,
  255. struct drm_file *file)
  256. {
  257. unsigned int num_cmdbufs = args->num_cmdbufs;
  258. unsigned int num_relocs = args->num_relocs;
  259. unsigned int num_waitchks = args->num_waitchks;
  260. struct drm_tegra_cmdbuf __user *cmdbufs =
  261. (void __user *)(uintptr_t)args->cmdbufs;
  262. struct drm_tegra_reloc __user *relocs =
  263. (void __user *)(uintptr_t)args->relocs;
  264. struct drm_tegra_waitchk __user *waitchks =
  265. (void __user *)(uintptr_t)args->waitchks;
  266. struct drm_tegra_syncpt syncpt;
  267. struct host1x_job *job;
  268. int err;
  269. /* We don't yet support other than one syncpt_incr struct per submit */
  270. if (args->num_syncpts != 1)
  271. return -EINVAL;
  272. job = host1x_job_alloc(context->channel, args->num_cmdbufs,
  273. args->num_relocs, args->num_waitchks);
  274. if (!job)
  275. return -ENOMEM;
  276. job->num_relocs = args->num_relocs;
  277. job->num_waitchk = args->num_waitchks;
  278. job->client = (u32)args->context;
  279. job->class = context->client->base.class;
  280. job->serialize = true;
  281. while (num_cmdbufs) {
  282. struct drm_tegra_cmdbuf cmdbuf;
  283. struct host1x_bo *bo;
  284. if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
  285. err = -EFAULT;
  286. goto fail;
  287. }
  288. bo = host1x_bo_lookup(file, cmdbuf.handle);
  289. if (!bo) {
  290. err = -ENOENT;
  291. goto fail;
  292. }
  293. host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
  294. num_cmdbufs--;
  295. cmdbufs++;
  296. }
  297. /* copy and resolve relocations from submit */
  298. while (num_relocs--) {
  299. err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
  300. &relocs[num_relocs], drm,
  301. file);
  302. if (err < 0)
  303. goto fail;
  304. }
  305. if (copy_from_user(job->waitchk, waitchks,
  306. sizeof(*waitchks) * num_waitchks)) {
  307. err = -EFAULT;
  308. goto fail;
  309. }
  310. if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
  311. sizeof(syncpt))) {
  312. err = -EFAULT;
  313. goto fail;
  314. }
  315. job->is_addr_reg = context->client->ops->is_addr_reg;
  316. job->syncpt_incrs = syncpt.incrs;
  317. job->syncpt_id = syncpt.id;
  318. job->timeout = 10000;
  319. if (args->timeout && args->timeout < 10000)
  320. job->timeout = args->timeout;
  321. err = host1x_job_pin(job, context->client->base.dev);
  322. if (err)
  323. goto fail;
  324. err = host1x_job_submit(job);
  325. if (err)
  326. goto fail_submit;
  327. args->fence = job->syncpt_end;
  328. host1x_job_put(job);
  329. return 0;
  330. fail_submit:
  331. host1x_job_unpin(job);
  332. fail:
  333. host1x_job_put(job);
  334. return err;
  335. }
  336. #ifdef CONFIG_DRM_TEGRA_STAGING
  337. static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
  338. {
  339. return (struct tegra_drm_context *)(uintptr_t)context;
  340. }
  341. static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
  342. struct tegra_drm_context *context)
  343. {
  344. struct tegra_drm_context *ctx;
  345. list_for_each_entry(ctx, &file->contexts, list)
  346. if (ctx == context)
  347. return true;
  348. return false;
  349. }
  350. static int tegra_gem_create(struct drm_device *drm, void *data,
  351. struct drm_file *file)
  352. {
  353. struct drm_tegra_gem_create *args = data;
  354. struct tegra_bo *bo;
  355. bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
  356. &args->handle);
  357. if (IS_ERR(bo))
  358. return PTR_ERR(bo);
  359. return 0;
  360. }
  361. static int tegra_gem_mmap(struct drm_device *drm, void *data,
  362. struct drm_file *file)
  363. {
  364. struct drm_tegra_gem_mmap *args = data;
  365. struct drm_gem_object *gem;
  366. struct tegra_bo *bo;
  367. gem = drm_gem_object_lookup(file, args->handle);
  368. if (!gem)
  369. return -EINVAL;
  370. bo = to_tegra_bo(gem);
  371. args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
  372. drm_gem_object_unreference_unlocked(gem);
  373. return 0;
  374. }
  375. static int tegra_syncpt_read(struct drm_device *drm, void *data,
  376. struct drm_file *file)
  377. {
  378. struct host1x *host = dev_get_drvdata(drm->dev->parent);
  379. struct drm_tegra_syncpt_read *args = data;
  380. struct host1x_syncpt *sp;
  381. sp = host1x_syncpt_get(host, args->id);
  382. if (!sp)
  383. return -EINVAL;
  384. args->value = host1x_syncpt_read_min(sp);
  385. return 0;
  386. }
  387. static int tegra_syncpt_incr(struct drm_device *drm, void *data,
  388. struct drm_file *file)
  389. {
  390. struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
  391. struct drm_tegra_syncpt_incr *args = data;
  392. struct host1x_syncpt *sp;
  393. sp = host1x_syncpt_get(host1x, args->id);
  394. if (!sp)
  395. return -EINVAL;
  396. return host1x_syncpt_incr(sp);
  397. }
  398. static int tegra_syncpt_wait(struct drm_device *drm, void *data,
  399. struct drm_file *file)
  400. {
  401. struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
  402. struct drm_tegra_syncpt_wait *args = data;
  403. struct host1x_syncpt *sp;
  404. sp = host1x_syncpt_get(host1x, args->id);
  405. if (!sp)
  406. return -EINVAL;
  407. return host1x_syncpt_wait(sp, args->thresh, args->timeout,
  408. &args->value);
  409. }
  410. static int tegra_open_channel(struct drm_device *drm, void *data,
  411. struct drm_file *file)
  412. {
  413. struct tegra_drm_file *fpriv = file->driver_priv;
  414. struct tegra_drm *tegra = drm->dev_private;
  415. struct drm_tegra_open_channel *args = data;
  416. struct tegra_drm_context *context;
  417. struct tegra_drm_client *client;
  418. int err = -ENODEV;
  419. context = kzalloc(sizeof(*context), GFP_KERNEL);
  420. if (!context)
  421. return -ENOMEM;
  422. list_for_each_entry(client, &tegra->clients, list)
  423. if (client->base.class == args->client) {
  424. err = client->ops->open_channel(client, context);
  425. if (err)
  426. break;
  427. list_add(&context->list, &fpriv->contexts);
  428. args->context = (uintptr_t)context;
  429. context->client = client;
  430. return 0;
  431. }
  432. kfree(context);
  433. return err;
  434. }
  435. static int tegra_close_channel(struct drm_device *drm, void *data,
  436. struct drm_file *file)
  437. {
  438. struct tegra_drm_file *fpriv = file->driver_priv;
  439. struct drm_tegra_close_channel *args = data;
  440. struct tegra_drm_context *context;
  441. context = tegra_drm_get_context(args->context);
  442. if (!tegra_drm_file_owns_context(fpriv, context))
  443. return -EINVAL;
  444. list_del(&context->list);
  445. tegra_drm_context_free(context);
  446. return 0;
  447. }
  448. static int tegra_get_syncpt(struct drm_device *drm, void *data,
  449. struct drm_file *file)
  450. {
  451. struct tegra_drm_file *fpriv = file->driver_priv;
  452. struct drm_tegra_get_syncpt *args = data;
  453. struct tegra_drm_context *context;
  454. struct host1x_syncpt *syncpt;
  455. context = tegra_drm_get_context(args->context);
  456. if (!tegra_drm_file_owns_context(fpriv, context))
  457. return -ENODEV;
  458. if (args->index >= context->client->base.num_syncpts)
  459. return -EINVAL;
  460. syncpt = context->client->base.syncpts[args->index];
  461. args->id = host1x_syncpt_id(syncpt);
  462. return 0;
  463. }
  464. static int tegra_submit(struct drm_device *drm, void *data,
  465. struct drm_file *file)
  466. {
  467. struct tegra_drm_file *fpriv = file->driver_priv;
  468. struct drm_tegra_submit *args = data;
  469. struct tegra_drm_context *context;
  470. context = tegra_drm_get_context(args->context);
  471. if (!tegra_drm_file_owns_context(fpriv, context))
  472. return -ENODEV;
  473. return context->client->ops->submit(context, args, drm, file);
  474. }
  475. static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
  476. struct drm_file *file)
  477. {
  478. struct tegra_drm_file *fpriv = file->driver_priv;
  479. struct drm_tegra_get_syncpt_base *args = data;
  480. struct tegra_drm_context *context;
  481. struct host1x_syncpt_base *base;
  482. struct host1x_syncpt *syncpt;
  483. context = tegra_drm_get_context(args->context);
  484. if (!tegra_drm_file_owns_context(fpriv, context))
  485. return -ENODEV;
  486. if (args->syncpt >= context->client->base.num_syncpts)
  487. return -EINVAL;
  488. syncpt = context->client->base.syncpts[args->syncpt];
  489. base = host1x_syncpt_get_base(syncpt);
  490. if (!base)
  491. return -ENXIO;
  492. args->id = host1x_syncpt_base_id(base);
  493. return 0;
  494. }
  495. static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
  496. struct drm_file *file)
  497. {
  498. struct drm_tegra_gem_set_tiling *args = data;
  499. enum tegra_bo_tiling_mode mode;
  500. struct drm_gem_object *gem;
  501. unsigned long value = 0;
  502. struct tegra_bo *bo;
  503. switch (args->mode) {
  504. case DRM_TEGRA_GEM_TILING_MODE_PITCH:
  505. mode = TEGRA_BO_TILING_MODE_PITCH;
  506. if (args->value != 0)
  507. return -EINVAL;
  508. break;
  509. case DRM_TEGRA_GEM_TILING_MODE_TILED:
  510. mode = TEGRA_BO_TILING_MODE_TILED;
  511. if (args->value != 0)
  512. return -EINVAL;
  513. break;
  514. case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
  515. mode = TEGRA_BO_TILING_MODE_BLOCK;
  516. if (args->value > 5)
  517. return -EINVAL;
  518. value = args->value;
  519. break;
  520. default:
  521. return -EINVAL;
  522. }
  523. gem = drm_gem_object_lookup(file, args->handle);
  524. if (!gem)
  525. return -ENOENT;
  526. bo = to_tegra_bo(gem);
  527. bo->tiling.mode = mode;
  528. bo->tiling.value = value;
  529. drm_gem_object_unreference_unlocked(gem);
  530. return 0;
  531. }
  532. static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
  533. struct drm_file *file)
  534. {
  535. struct drm_tegra_gem_get_tiling *args = data;
  536. struct drm_gem_object *gem;
  537. struct tegra_bo *bo;
  538. int err = 0;
  539. gem = drm_gem_object_lookup(file, args->handle);
  540. if (!gem)
  541. return -ENOENT;
  542. bo = to_tegra_bo(gem);
  543. switch (bo->tiling.mode) {
  544. case TEGRA_BO_TILING_MODE_PITCH:
  545. args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
  546. args->value = 0;
  547. break;
  548. case TEGRA_BO_TILING_MODE_TILED:
  549. args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
  550. args->value = 0;
  551. break;
  552. case TEGRA_BO_TILING_MODE_BLOCK:
  553. args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
  554. args->value = bo->tiling.value;
  555. break;
  556. default:
  557. err = -EINVAL;
  558. break;
  559. }
  560. drm_gem_object_unreference_unlocked(gem);
  561. return err;
  562. }
  563. static int tegra_gem_set_flags(struct drm_device *drm, void *data,
  564. struct drm_file *file)
  565. {
  566. struct drm_tegra_gem_set_flags *args = data;
  567. struct drm_gem_object *gem;
  568. struct tegra_bo *bo;
  569. if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
  570. return -EINVAL;
  571. gem = drm_gem_object_lookup(file, args->handle);
  572. if (!gem)
  573. return -ENOENT;
  574. bo = to_tegra_bo(gem);
  575. bo->flags = 0;
  576. if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
  577. bo->flags |= TEGRA_BO_BOTTOM_UP;
  578. drm_gem_object_unreference_unlocked(gem);
  579. return 0;
  580. }
  581. static int tegra_gem_get_flags(struct drm_device *drm, void *data,
  582. struct drm_file *file)
  583. {
  584. struct drm_tegra_gem_get_flags *args = data;
  585. struct drm_gem_object *gem;
  586. struct tegra_bo *bo;
  587. gem = drm_gem_object_lookup(file, args->handle);
  588. if (!gem)
  589. return -ENOENT;
  590. bo = to_tegra_bo(gem);
  591. args->flags = 0;
  592. if (bo->flags & TEGRA_BO_BOTTOM_UP)
  593. args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
  594. drm_gem_object_unreference_unlocked(gem);
  595. return 0;
  596. }
  597. #endif
  598. static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
  599. #ifdef CONFIG_DRM_TEGRA_STAGING
  600. DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 0),
  601. DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 0),
  602. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 0),
  603. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 0),
  604. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 0),
  605. DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 0),
  606. DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 0),
  607. DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 0),
  608. DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 0),
  609. DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 0),
  610. DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 0),
  611. DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 0),
  612. DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 0),
  613. DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 0),
  614. #endif
  615. };
  616. static const struct file_operations tegra_drm_fops = {
  617. .owner = THIS_MODULE,
  618. .open = drm_open,
  619. .release = drm_release,
  620. .unlocked_ioctl = drm_ioctl,
  621. .mmap = tegra_drm_mmap,
  622. .poll = drm_poll,
  623. .read = drm_read,
  624. .compat_ioctl = drm_compat_ioctl,
  625. .llseek = noop_llseek,
  626. };
  627. static u32 tegra_drm_get_vblank_counter(struct drm_device *drm,
  628. unsigned int pipe)
  629. {
  630. struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
  631. struct tegra_dc *dc = to_tegra_dc(crtc);
  632. if (!crtc)
  633. return 0;
  634. return tegra_dc_get_vblank_counter(dc);
  635. }
  636. static int tegra_drm_enable_vblank(struct drm_device *drm, unsigned int pipe)
  637. {
  638. struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
  639. struct tegra_dc *dc = to_tegra_dc(crtc);
  640. if (!crtc)
  641. return -ENODEV;
  642. tegra_dc_enable_vblank(dc);
  643. return 0;
  644. }
  645. static void tegra_drm_disable_vblank(struct drm_device *drm, unsigned int pipe)
  646. {
  647. struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
  648. struct tegra_dc *dc = to_tegra_dc(crtc);
  649. if (crtc)
  650. tegra_dc_disable_vblank(dc);
  651. }
  652. static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
  653. {
  654. struct tegra_drm_file *fpriv = file->driver_priv;
  655. struct tegra_drm_context *context, *tmp;
  656. list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
  657. tegra_drm_context_free(context);
  658. kfree(fpriv);
  659. }
  660. #ifdef CONFIG_DEBUG_FS
  661. static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
  662. {
  663. struct drm_info_node *node = (struct drm_info_node *)s->private;
  664. struct drm_device *drm = node->minor->dev;
  665. struct drm_framebuffer *fb;
  666. mutex_lock(&drm->mode_config.fb_lock);
  667. list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
  668. seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
  669. fb->base.id, fb->width, fb->height,
  670. fb->format->depth,
  671. fb->format->cpp[0] * 8,
  672. drm_framebuffer_read_refcount(fb));
  673. }
  674. mutex_unlock(&drm->mode_config.fb_lock);
  675. return 0;
  676. }
  677. static int tegra_debugfs_iova(struct seq_file *s, void *data)
  678. {
  679. struct drm_info_node *node = (struct drm_info_node *)s->private;
  680. struct drm_device *drm = node->minor->dev;
  681. struct tegra_drm *tegra = drm->dev_private;
  682. struct drm_printer p = drm_seq_file_printer(s);
  683. drm_mm_print(&tegra->mm, &p);
  684. return 0;
  685. }
  686. static struct drm_info_list tegra_debugfs_list[] = {
  687. { "framebuffers", tegra_debugfs_framebuffers, 0 },
  688. { "iova", tegra_debugfs_iova, 0 },
  689. };
  690. static int tegra_debugfs_init(struct drm_minor *minor)
  691. {
  692. return drm_debugfs_create_files(tegra_debugfs_list,
  693. ARRAY_SIZE(tegra_debugfs_list),
  694. minor->debugfs_root, minor);
  695. }
  696. static void tegra_debugfs_cleanup(struct drm_minor *minor)
  697. {
  698. drm_debugfs_remove_files(tegra_debugfs_list,
  699. ARRAY_SIZE(tegra_debugfs_list), minor);
  700. }
  701. #endif
  702. static struct drm_driver tegra_drm_driver = {
  703. .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
  704. DRIVER_ATOMIC,
  705. .load = tegra_drm_load,
  706. .unload = tegra_drm_unload,
  707. .open = tegra_drm_open,
  708. .preclose = tegra_drm_preclose,
  709. .lastclose = tegra_drm_lastclose,
  710. .get_vblank_counter = tegra_drm_get_vblank_counter,
  711. .enable_vblank = tegra_drm_enable_vblank,
  712. .disable_vblank = tegra_drm_disable_vblank,
  713. #if defined(CONFIG_DEBUG_FS)
  714. .debugfs_init = tegra_debugfs_init,
  715. .debugfs_cleanup = tegra_debugfs_cleanup,
  716. #endif
  717. .gem_free_object_unlocked = tegra_bo_free_object,
  718. .gem_vm_ops = &tegra_bo_vm_ops,
  719. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  720. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  721. .gem_prime_export = tegra_gem_prime_export,
  722. .gem_prime_import = tegra_gem_prime_import,
  723. .dumb_create = tegra_bo_dumb_create,
  724. .dumb_map_offset = tegra_bo_dumb_map_offset,
  725. .dumb_destroy = drm_gem_dumb_destroy,
  726. .ioctls = tegra_drm_ioctls,
  727. .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
  728. .fops = &tegra_drm_fops,
  729. .name = DRIVER_NAME,
  730. .desc = DRIVER_DESC,
  731. .date = DRIVER_DATE,
  732. .major = DRIVER_MAJOR,
  733. .minor = DRIVER_MINOR,
  734. .patchlevel = DRIVER_PATCHLEVEL,
  735. };
  736. int tegra_drm_register_client(struct tegra_drm *tegra,
  737. struct tegra_drm_client *client)
  738. {
  739. mutex_lock(&tegra->clients_lock);
  740. list_add_tail(&client->list, &tegra->clients);
  741. mutex_unlock(&tegra->clients_lock);
  742. return 0;
  743. }
  744. int tegra_drm_unregister_client(struct tegra_drm *tegra,
  745. struct tegra_drm_client *client)
  746. {
  747. mutex_lock(&tegra->clients_lock);
  748. list_del_init(&client->list);
  749. mutex_unlock(&tegra->clients_lock);
  750. return 0;
  751. }
  752. static int host1x_drm_probe(struct host1x_device *dev)
  753. {
  754. struct drm_driver *driver = &tegra_drm_driver;
  755. struct drm_device *drm;
  756. int err;
  757. drm = drm_dev_alloc(driver, &dev->dev);
  758. if (IS_ERR(drm))
  759. return PTR_ERR(drm);
  760. dev_set_drvdata(&dev->dev, drm);
  761. err = drm_dev_register(drm, 0);
  762. if (err < 0)
  763. goto unref;
  764. return 0;
  765. unref:
  766. drm_dev_unref(drm);
  767. return err;
  768. }
  769. static int host1x_drm_remove(struct host1x_device *dev)
  770. {
  771. struct drm_device *drm = dev_get_drvdata(&dev->dev);
  772. drm_dev_unregister(drm);
  773. drm_dev_unref(drm);
  774. return 0;
  775. }
  776. #ifdef CONFIG_PM_SLEEP
  777. static int host1x_drm_suspend(struct device *dev)
  778. {
  779. struct drm_device *drm = dev_get_drvdata(dev);
  780. struct tegra_drm *tegra = drm->dev_private;
  781. drm_kms_helper_poll_disable(drm);
  782. tegra_drm_fb_suspend(drm);
  783. tegra->state = drm_atomic_helper_suspend(drm);
  784. if (IS_ERR(tegra->state)) {
  785. tegra_drm_fb_resume(drm);
  786. drm_kms_helper_poll_enable(drm);
  787. return PTR_ERR(tegra->state);
  788. }
  789. return 0;
  790. }
  791. static int host1x_drm_resume(struct device *dev)
  792. {
  793. struct drm_device *drm = dev_get_drvdata(dev);
  794. struct tegra_drm *tegra = drm->dev_private;
  795. drm_atomic_helper_resume(drm, tegra->state);
  796. tegra_drm_fb_resume(drm);
  797. drm_kms_helper_poll_enable(drm);
  798. return 0;
  799. }
  800. #endif
  801. static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
  802. host1x_drm_resume);
  803. static const struct of_device_id host1x_drm_subdevs[] = {
  804. { .compatible = "nvidia,tegra20-dc", },
  805. { .compatible = "nvidia,tegra20-hdmi", },
  806. { .compatible = "nvidia,tegra20-gr2d", },
  807. { .compatible = "nvidia,tegra20-gr3d", },
  808. { .compatible = "nvidia,tegra30-dc", },
  809. { .compatible = "nvidia,tegra30-hdmi", },
  810. { .compatible = "nvidia,tegra30-gr2d", },
  811. { .compatible = "nvidia,tegra30-gr3d", },
  812. { .compatible = "nvidia,tegra114-dsi", },
  813. { .compatible = "nvidia,tegra114-hdmi", },
  814. { .compatible = "nvidia,tegra114-gr3d", },
  815. { .compatible = "nvidia,tegra124-dc", },
  816. { .compatible = "nvidia,tegra124-sor", },
  817. { .compatible = "nvidia,tegra124-hdmi", },
  818. { .compatible = "nvidia,tegra124-dsi", },
  819. { .compatible = "nvidia,tegra132-dsi", },
  820. { .compatible = "nvidia,tegra210-dc", },
  821. { .compatible = "nvidia,tegra210-dsi", },
  822. { .compatible = "nvidia,tegra210-sor", },
  823. { .compatible = "nvidia,tegra210-sor1", },
  824. { /* sentinel */ }
  825. };
  826. static struct host1x_driver host1x_drm_driver = {
  827. .driver = {
  828. .name = "drm",
  829. .pm = &host1x_drm_pm_ops,
  830. },
  831. .probe = host1x_drm_probe,
  832. .remove = host1x_drm_remove,
  833. .subdevs = host1x_drm_subdevs,
  834. };
  835. static struct platform_driver * const drivers[] = {
  836. &tegra_dc_driver,
  837. &tegra_hdmi_driver,
  838. &tegra_dsi_driver,
  839. &tegra_dpaux_driver,
  840. &tegra_sor_driver,
  841. &tegra_gr2d_driver,
  842. &tegra_gr3d_driver,
  843. };
  844. static int __init host1x_drm_init(void)
  845. {
  846. int err;
  847. err = host1x_driver_register(&host1x_drm_driver);
  848. if (err < 0)
  849. return err;
  850. err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
  851. if (err < 0)
  852. goto unregister_host1x;
  853. return 0;
  854. unregister_host1x:
  855. host1x_driver_unregister(&host1x_drm_driver);
  856. return err;
  857. }
  858. module_init(host1x_drm_init);
  859. static void __exit host1x_drm_exit(void)
  860. {
  861. platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
  862. host1x_driver_unregister(&host1x_drm_driver);
  863. }
  864. module_exit(host1x_drm_exit);
  865. MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
  866. MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
  867. MODULE_LICENSE("GPL v2");