sti_hdmi.h 3.3 KB

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  1. /*
  2. * Copyright (C) STMicroelectronics SA 2014
  3. * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
  4. * License terms: GNU General Public License (GPL), version 2
  5. */
  6. #ifndef _STI_HDMI_H_
  7. #define _STI_HDMI_H_
  8. #include <linux/hdmi.h>
  9. #include <linux/platform_device.h>
  10. #include <drm/drmP.h>
  11. #define HDMI_STA 0x0010
  12. #define HDMI_STA_DLL_LCK BIT(5)
  13. #define HDMI_STA_HOT_PLUG BIT(4)
  14. struct sti_hdmi;
  15. struct hdmi_phy_ops {
  16. bool (*start)(struct sti_hdmi *hdmi);
  17. void (*stop)(struct sti_hdmi *hdmi);
  18. };
  19. struct hdmi_audio_params {
  20. bool enabled;
  21. unsigned int sample_width;
  22. unsigned int sample_rate;
  23. struct hdmi_audio_infoframe cea;
  24. };
  25. /* values for the framing mode property */
  26. enum sti_hdmi_modes {
  27. HDMI_MODE_HDMI,
  28. HDMI_MODE_DVI,
  29. };
  30. static const struct drm_prop_enum_list hdmi_mode_names[] = {
  31. { HDMI_MODE_HDMI, "hdmi" },
  32. { HDMI_MODE_DVI, "dvi" },
  33. };
  34. #define DEFAULT_HDMI_MODE HDMI_MODE_HDMI
  35. static const struct drm_prop_enum_list colorspace_mode_names[] = {
  36. { HDMI_COLORSPACE_RGB, "rgb" },
  37. { HDMI_COLORSPACE_YUV422, "yuv422" },
  38. { HDMI_COLORSPACE_YUV444, "yuv444" },
  39. };
  40. #define DEFAULT_COLORSPACE_MODE HDMI_COLORSPACE_RGB
  41. /**
  42. * STI hdmi structure
  43. *
  44. * @dev: driver device
  45. * @drm_dev: pointer to drm device
  46. * @mode: current display mode selected
  47. * @regs: hdmi register
  48. * @syscfg: syscfg register for pll rejection configuration
  49. * @clk_pix: hdmi pixel clock
  50. * @clk_tmds: hdmi tmds clock
  51. * @clk_phy: hdmi phy clock
  52. * @clk_audio: hdmi audio clock
  53. * @irq: hdmi interrupt number
  54. * @irq_status: interrupt status register
  55. * @phy_ops: phy start/stop operations
  56. * @enabled: true if hdmi is enabled else false
  57. * @hpd: hot plug detect status
  58. * @wait_event: wait event
  59. * @event_received: wait event status
  60. * @reset: reset control of the hdmi phy
  61. * @ddc_adapt: i2c ddc adapter
  62. * @colorspace: current colorspace selected
  63. * @hdmi_mode: select framing for HDMI or DVI
  64. * @audio_pdev: ASoC hdmi-codec platform device
  65. * @audio: hdmi audio parameters.
  66. * @drm_connector: hdmi connector
  67. */
  68. struct sti_hdmi {
  69. struct device dev;
  70. struct drm_device *drm_dev;
  71. struct drm_display_mode mode;
  72. void __iomem *regs;
  73. void __iomem *syscfg;
  74. struct clk *clk_pix;
  75. struct clk *clk_tmds;
  76. struct clk *clk_phy;
  77. struct clk *clk_audio;
  78. int irq;
  79. u32 irq_status;
  80. struct hdmi_phy_ops *phy_ops;
  81. bool enabled;
  82. bool hpd;
  83. wait_queue_head_t wait_event;
  84. bool event_received;
  85. struct reset_control *reset;
  86. struct i2c_adapter *ddc_adapt;
  87. enum hdmi_colorspace colorspace;
  88. enum sti_hdmi_modes hdmi_mode;
  89. struct platform_device *audio_pdev;
  90. struct hdmi_audio_params audio;
  91. struct drm_connector *drm_connector;
  92. };
  93. u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
  94. void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);
  95. /**
  96. * hdmi phy config structure
  97. *
  98. * A pointer to an array of these structures is passed to a TMDS (HDMI) output
  99. * via the control interface to provide board and SoC specific
  100. * configurations of the HDMI PHY. Each entry in the array specifies a hardware
  101. * specific configuration for a given TMDS clock frequency range.
  102. *
  103. * @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
  104. * @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
  105. * @config: SoC specific register configuration
  106. */
  107. struct hdmi_phy_config {
  108. u32 min_tmds_freq;
  109. u32 max_tmds_freq;
  110. u32 config[4];
  111. };
  112. #endif