rcar_du_plane.c 22 KB

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  1. /*
  2. * rcar_du_plane.c -- R-Car Display Unit Planes
  3. *
  4. * Copyright (C) 2013-2015 Renesas Electronics Corporation
  5. *
  6. * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <drm/drmP.h>
  14. #include <drm/drm_atomic.h>
  15. #include <drm/drm_atomic_helper.h>
  16. #include <drm/drm_crtc.h>
  17. #include <drm/drm_crtc_helper.h>
  18. #include <drm/drm_fb_cma_helper.h>
  19. #include <drm/drm_gem_cma_helper.h>
  20. #include <drm/drm_plane_helper.h>
  21. #include "rcar_du_drv.h"
  22. #include "rcar_du_group.h"
  23. #include "rcar_du_kms.h"
  24. #include "rcar_du_plane.h"
  25. #include "rcar_du_regs.h"
  26. /* -----------------------------------------------------------------------------
  27. * Atomic hardware plane allocator
  28. *
  29. * The hardware plane allocator is solely based on the atomic plane states
  30. * without keeping any external state to avoid races between .atomic_check()
  31. * and .atomic_commit().
  32. *
  33. * The core idea is to avoid using a free planes bitmask that would need to be
  34. * shared between check and commit handlers with a collective knowledge based on
  35. * the allocated hardware plane(s) for each KMS plane. The allocator then loops
  36. * over all plane states to compute the free planes bitmask, allocates hardware
  37. * planes based on that bitmask, and stores the result back in the plane states.
  38. *
  39. * For this to work we need to access the current state of planes not touched by
  40. * the atomic update. To ensure that it won't be modified, we need to lock all
  41. * planes using drm_atomic_get_plane_state(). This effectively serializes atomic
  42. * updates from .atomic_check() up to completion (when swapping the states if
  43. * the check step has succeeded) or rollback (when freeing the states if the
  44. * check step has failed).
  45. *
  46. * Allocation is performed in the .atomic_check() handler and applied
  47. * automatically when the core swaps the old and new states.
  48. */
  49. static bool rcar_du_plane_needs_realloc(struct rcar_du_plane *plane,
  50. struct rcar_du_plane_state *new_state)
  51. {
  52. struct rcar_du_plane_state *cur_state;
  53. cur_state = to_rcar_plane_state(plane->plane.state);
  54. /* Lowering the number of planes doesn't strictly require reallocation
  55. * as the extra hardware plane will be freed when committing, but doing
  56. * so could lead to more fragmentation.
  57. */
  58. if (!cur_state->format ||
  59. cur_state->format->planes != new_state->format->planes)
  60. return true;
  61. /* Reallocate hardware planes if the source has changed. */
  62. if (cur_state->source != new_state->source)
  63. return true;
  64. return false;
  65. }
  66. static unsigned int rcar_du_plane_hwmask(struct rcar_du_plane_state *state)
  67. {
  68. unsigned int mask;
  69. if (state->hwindex == -1)
  70. return 0;
  71. mask = 1 << state->hwindex;
  72. if (state->format->planes == 2)
  73. mask |= 1 << ((state->hwindex + 1) % 8);
  74. return mask;
  75. }
  76. /*
  77. * The R8A7790 DU can source frames directly from the VSP1 devices VSPD0 and
  78. * VSPD1. VSPD0 feeds DU0/1 plane 0, and VSPD1 feeds either DU2 plane 0 or
  79. * DU0/1 plane 1.
  80. *
  81. * Allocate the correct fixed plane when sourcing frames from VSPD0 or VSPD1,
  82. * and allocate planes in reverse index order otherwise to ensure maximum
  83. * availability of planes 0 and 1.
  84. *
  85. * The caller is responsible for ensuring that the requested source is
  86. * compatible with the DU revision.
  87. */
  88. static int rcar_du_plane_hwalloc(struct rcar_du_plane *plane,
  89. struct rcar_du_plane_state *state,
  90. unsigned int free)
  91. {
  92. unsigned int num_planes = state->format->planes;
  93. int fixed = -1;
  94. int i;
  95. if (state->source == RCAR_DU_PLANE_VSPD0) {
  96. /* VSPD0 feeds plane 0 on DU0/1. */
  97. if (plane->group->index != 0)
  98. return -EINVAL;
  99. fixed = 0;
  100. } else if (state->source == RCAR_DU_PLANE_VSPD1) {
  101. /* VSPD1 feeds plane 1 on DU0/1 or plane 0 on DU2. */
  102. fixed = plane->group->index == 0 ? 1 : 0;
  103. }
  104. if (fixed >= 0)
  105. return free & (1 << fixed) ? fixed : -EBUSY;
  106. for (i = RCAR_DU_NUM_HW_PLANES - 1; i >= 0; --i) {
  107. if (!(free & (1 << i)))
  108. continue;
  109. if (num_planes == 1 || free & (1 << ((i + 1) % 8)))
  110. break;
  111. }
  112. return i < 0 ? -EBUSY : i;
  113. }
  114. int rcar_du_atomic_check_planes(struct drm_device *dev,
  115. struct drm_atomic_state *state)
  116. {
  117. struct rcar_du_device *rcdu = dev->dev_private;
  118. unsigned int group_freed_planes[RCAR_DU_MAX_GROUPS] = { 0, };
  119. unsigned int group_free_planes[RCAR_DU_MAX_GROUPS] = { 0, };
  120. bool needs_realloc = false;
  121. unsigned int groups = 0;
  122. unsigned int i;
  123. struct drm_plane *drm_plane;
  124. struct drm_plane_state *drm_plane_state;
  125. /* Check if hardware planes need to be reallocated. */
  126. for_each_plane_in_state(state, drm_plane, drm_plane_state, i) {
  127. struct rcar_du_plane_state *plane_state;
  128. struct rcar_du_plane *plane;
  129. unsigned int index;
  130. plane = to_rcar_plane(drm_plane);
  131. plane_state = to_rcar_plane_state(drm_plane_state);
  132. dev_dbg(rcdu->dev, "%s: checking plane (%u,%tu)\n", __func__,
  133. plane->group->index, plane - plane->group->planes);
  134. /* If the plane is being disabled we don't need to go through
  135. * the full reallocation procedure. Just mark the hardware
  136. * plane(s) as freed.
  137. */
  138. if (!plane_state->format) {
  139. dev_dbg(rcdu->dev, "%s: plane is being disabled\n",
  140. __func__);
  141. index = plane - plane->group->planes;
  142. group_freed_planes[plane->group->index] |= 1 << index;
  143. plane_state->hwindex = -1;
  144. continue;
  145. }
  146. /* If the plane needs to be reallocated mark it as such, and
  147. * mark the hardware plane(s) as free.
  148. */
  149. if (rcar_du_plane_needs_realloc(plane, plane_state)) {
  150. dev_dbg(rcdu->dev, "%s: plane needs reallocation\n",
  151. __func__);
  152. groups |= 1 << plane->group->index;
  153. needs_realloc = true;
  154. index = plane - plane->group->planes;
  155. group_freed_planes[plane->group->index] |= 1 << index;
  156. plane_state->hwindex = -1;
  157. }
  158. }
  159. if (!needs_realloc)
  160. return 0;
  161. /* Grab all plane states for the groups that need reallocation to ensure
  162. * locking and avoid racy updates. This serializes the update operation,
  163. * but there's not much we can do about it as that's the hardware
  164. * design.
  165. *
  166. * Compute the used planes mask for each group at the same time to avoid
  167. * looping over the planes separately later.
  168. */
  169. while (groups) {
  170. unsigned int index = ffs(groups) - 1;
  171. struct rcar_du_group *group = &rcdu->groups[index];
  172. unsigned int used_planes = 0;
  173. dev_dbg(rcdu->dev, "%s: finding free planes for group %u\n",
  174. __func__, index);
  175. for (i = 0; i < group->num_planes; ++i) {
  176. struct rcar_du_plane *plane = &group->planes[i];
  177. struct rcar_du_plane_state *plane_state;
  178. struct drm_plane_state *s;
  179. s = drm_atomic_get_plane_state(state, &plane->plane);
  180. if (IS_ERR(s))
  181. return PTR_ERR(s);
  182. /* If the plane has been freed in the above loop its
  183. * hardware planes must not be added to the used planes
  184. * bitmask. However, the current state doesn't reflect
  185. * the free state yet, as we've modified the new state
  186. * above. Use the local freed planes list to check for
  187. * that condition instead.
  188. */
  189. if (group_freed_planes[index] & (1 << i)) {
  190. dev_dbg(rcdu->dev,
  191. "%s: plane (%u,%tu) has been freed, skipping\n",
  192. __func__, plane->group->index,
  193. plane - plane->group->planes);
  194. continue;
  195. }
  196. plane_state = to_rcar_plane_state(plane->plane.state);
  197. used_planes |= rcar_du_plane_hwmask(plane_state);
  198. dev_dbg(rcdu->dev,
  199. "%s: plane (%u,%tu) uses %u hwplanes (index %d)\n",
  200. __func__, plane->group->index,
  201. plane - plane->group->planes,
  202. plane_state->format ?
  203. plane_state->format->planes : 0,
  204. plane_state->hwindex);
  205. }
  206. group_free_planes[index] = 0xff & ~used_planes;
  207. groups &= ~(1 << index);
  208. dev_dbg(rcdu->dev, "%s: group %u free planes mask 0x%02x\n",
  209. __func__, index, group_free_planes[index]);
  210. }
  211. /* Reallocate hardware planes for each plane that needs it. */
  212. for_each_plane_in_state(state, drm_plane, drm_plane_state, i) {
  213. struct rcar_du_plane_state *plane_state;
  214. struct rcar_du_plane *plane;
  215. unsigned int crtc_planes;
  216. unsigned int free;
  217. int idx;
  218. plane = to_rcar_plane(drm_plane);
  219. plane_state = to_rcar_plane_state(drm_plane_state);
  220. dev_dbg(rcdu->dev, "%s: allocating plane (%u,%tu)\n", __func__,
  221. plane->group->index, plane - plane->group->planes);
  222. /* Skip planes that are being disabled or don't need to be
  223. * reallocated.
  224. */
  225. if (!plane_state->format ||
  226. !rcar_du_plane_needs_realloc(plane, plane_state))
  227. continue;
  228. /* Try to allocate the plane from the free planes currently
  229. * associated with the target CRTC to avoid restarting the CRTC
  230. * group and thus minimize flicker. If it fails fall back to
  231. * allocating from all free planes.
  232. */
  233. crtc_planes = to_rcar_crtc(plane_state->state.crtc)->index % 2
  234. ? plane->group->dptsr_planes
  235. : ~plane->group->dptsr_planes;
  236. free = group_free_planes[plane->group->index];
  237. idx = rcar_du_plane_hwalloc(plane, plane_state,
  238. free & crtc_planes);
  239. if (idx < 0)
  240. idx = rcar_du_plane_hwalloc(plane, plane_state,
  241. free);
  242. if (idx < 0) {
  243. dev_dbg(rcdu->dev, "%s: no available hardware plane\n",
  244. __func__);
  245. return idx;
  246. }
  247. dev_dbg(rcdu->dev, "%s: allocated %u hwplanes (index %u)\n",
  248. __func__, plane_state->format->planes, idx);
  249. plane_state->hwindex = idx;
  250. group_free_planes[plane->group->index] &=
  251. ~rcar_du_plane_hwmask(plane_state);
  252. dev_dbg(rcdu->dev, "%s: group %u free planes mask 0x%02x\n",
  253. __func__, plane->group->index,
  254. group_free_planes[plane->group->index]);
  255. }
  256. return 0;
  257. }
  258. /* -----------------------------------------------------------------------------
  259. * Plane Setup
  260. */
  261. #define RCAR_DU_COLORKEY_NONE (0 << 24)
  262. #define RCAR_DU_COLORKEY_SOURCE (1 << 24)
  263. #define RCAR_DU_COLORKEY_MASK (1 << 24)
  264. static void rcar_du_plane_write(struct rcar_du_group *rgrp,
  265. unsigned int index, u32 reg, u32 data)
  266. {
  267. rcar_du_write(rgrp->dev, rgrp->mmio_offset + index * PLANE_OFF + reg,
  268. data);
  269. }
  270. static void rcar_du_plane_setup_scanout(struct rcar_du_group *rgrp,
  271. const struct rcar_du_plane_state *state)
  272. {
  273. unsigned int src_x = state->state.src_x >> 16;
  274. unsigned int src_y = state->state.src_y >> 16;
  275. unsigned int index = state->hwindex;
  276. unsigned int pitch;
  277. bool interlaced;
  278. u32 dma[2];
  279. interlaced = state->state.crtc->state->adjusted_mode.flags
  280. & DRM_MODE_FLAG_INTERLACE;
  281. if (state->source == RCAR_DU_PLANE_MEMORY) {
  282. struct drm_framebuffer *fb = state->state.fb;
  283. struct drm_gem_cma_object *gem;
  284. unsigned int i;
  285. if (state->format->planes == 2)
  286. pitch = fb->pitches[0];
  287. else
  288. pitch = fb->pitches[0] * 8 / state->format->bpp;
  289. for (i = 0; i < state->format->planes; ++i) {
  290. gem = drm_fb_cma_get_gem_obj(fb, i);
  291. dma[i] = gem->paddr + fb->offsets[i];
  292. }
  293. } else {
  294. pitch = state->state.src_w >> 16;
  295. dma[0] = 0;
  296. dma[1] = 0;
  297. }
  298. /* Memory pitch (expressed in pixels). Must be doubled for interlaced
  299. * operation with 32bpp formats.
  300. */
  301. rcar_du_plane_write(rgrp, index, PnMWR,
  302. (interlaced && state->format->bpp == 32) ?
  303. pitch * 2 : pitch);
  304. /* The Y position is expressed in raster line units and must be doubled
  305. * for 32bpp formats, according to the R8A7790 datasheet. No mention of
  306. * doubling the Y position is found in the R8A7779 datasheet, but the
  307. * rule seems to apply there as well.
  308. *
  309. * Despite not being documented, doubling seem not to be needed when
  310. * operating in interlaced mode.
  311. *
  312. * Similarly, for the second plane, NV12 and NV21 formats seem to
  313. * require a halved Y position value, in both progressive and interlaced
  314. * modes.
  315. */
  316. rcar_du_plane_write(rgrp, index, PnSPXR, src_x);
  317. rcar_du_plane_write(rgrp, index, PnSPYR, src_y *
  318. (!interlaced && state->format->bpp == 32 ? 2 : 1));
  319. rcar_du_plane_write(rgrp, index, PnDSA0R, dma[0]);
  320. if (state->format->planes == 2) {
  321. index = (index + 1) % 8;
  322. rcar_du_plane_write(rgrp, index, PnMWR, pitch);
  323. rcar_du_plane_write(rgrp, index, PnSPXR, src_x);
  324. rcar_du_plane_write(rgrp, index, PnSPYR, src_y *
  325. (state->format->bpp == 16 ? 2 : 1) / 2);
  326. rcar_du_plane_write(rgrp, index, PnDSA0R, dma[1]);
  327. }
  328. }
  329. static void rcar_du_plane_setup_mode(struct rcar_du_group *rgrp,
  330. unsigned int index,
  331. const struct rcar_du_plane_state *state)
  332. {
  333. u32 colorkey;
  334. u32 pnmr;
  335. /* The PnALPHAR register controls alpha-blending in 16bpp formats
  336. * (ARGB1555 and XRGB1555).
  337. *
  338. * For ARGB, set the alpha value to 0, and enable alpha-blending when
  339. * the A bit is 0. This maps A=0 to alpha=0 and A=1 to alpha=255.
  340. *
  341. * For XRGB, set the alpha value to the plane-wide alpha value and
  342. * enable alpha-blending regardless of the X bit value.
  343. */
  344. if (state->format->fourcc != DRM_FORMAT_XRGB1555)
  345. rcar_du_plane_write(rgrp, index, PnALPHAR, PnALPHAR_ABIT_0);
  346. else
  347. rcar_du_plane_write(rgrp, index, PnALPHAR,
  348. PnALPHAR_ABIT_X | state->alpha);
  349. pnmr = PnMR_BM_MD | state->format->pnmr;
  350. /* Disable color keying when requested. YUV formats have the
  351. * PnMR_SPIM_TP_OFF bit set in their pnmr field, disabling color keying
  352. * automatically.
  353. */
  354. if ((state->colorkey & RCAR_DU_COLORKEY_MASK) == RCAR_DU_COLORKEY_NONE)
  355. pnmr |= PnMR_SPIM_TP_OFF;
  356. /* For packed YUV formats we need to select the U/V order. */
  357. if (state->format->fourcc == DRM_FORMAT_YUYV)
  358. pnmr |= PnMR_YCDF_YUYV;
  359. rcar_du_plane_write(rgrp, index, PnMR, pnmr);
  360. switch (state->format->fourcc) {
  361. case DRM_FORMAT_RGB565:
  362. colorkey = ((state->colorkey & 0xf80000) >> 8)
  363. | ((state->colorkey & 0x00fc00) >> 5)
  364. | ((state->colorkey & 0x0000f8) >> 3);
  365. rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
  366. break;
  367. case DRM_FORMAT_ARGB1555:
  368. case DRM_FORMAT_XRGB1555:
  369. colorkey = ((state->colorkey & 0xf80000) >> 9)
  370. | ((state->colorkey & 0x00f800) >> 6)
  371. | ((state->colorkey & 0x0000f8) >> 3);
  372. rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
  373. break;
  374. case DRM_FORMAT_XRGB8888:
  375. case DRM_FORMAT_ARGB8888:
  376. rcar_du_plane_write(rgrp, index, PnTC3R,
  377. PnTC3R_CODE | (state->colorkey & 0xffffff));
  378. break;
  379. }
  380. }
  381. static void rcar_du_plane_setup_format_gen2(struct rcar_du_group *rgrp,
  382. unsigned int index,
  383. const struct rcar_du_plane_state *state)
  384. {
  385. u32 ddcr2 = PnDDCR2_CODE;
  386. u32 ddcr4;
  387. /* Data format
  388. *
  389. * The data format is selected by the DDDF field in PnMR and the EDF
  390. * field in DDCR4.
  391. */
  392. rcar_du_plane_setup_mode(rgrp, index, state);
  393. if (state->format->planes == 2) {
  394. if (state->hwindex != index) {
  395. if (state->format->fourcc == DRM_FORMAT_NV12 ||
  396. state->format->fourcc == DRM_FORMAT_NV21)
  397. ddcr2 |= PnDDCR2_Y420;
  398. if (state->format->fourcc == DRM_FORMAT_NV21)
  399. ddcr2 |= PnDDCR2_NV21;
  400. ddcr2 |= PnDDCR2_DIVU;
  401. } else {
  402. ddcr2 |= PnDDCR2_DIVY;
  403. }
  404. }
  405. rcar_du_plane_write(rgrp, index, PnDDCR2, ddcr2);
  406. ddcr4 = state->format->edf | PnDDCR4_CODE;
  407. if (state->source != RCAR_DU_PLANE_MEMORY)
  408. ddcr4 |= PnDDCR4_VSPS;
  409. rcar_du_plane_write(rgrp, index, PnDDCR4, ddcr4);
  410. }
  411. static void rcar_du_plane_setup_format_gen3(struct rcar_du_group *rgrp,
  412. unsigned int index,
  413. const struct rcar_du_plane_state *state)
  414. {
  415. rcar_du_plane_write(rgrp, index, PnMR,
  416. PnMR_SPIM_TP_OFF | state->format->pnmr);
  417. rcar_du_plane_write(rgrp, index, PnDDCR4,
  418. state->format->edf | PnDDCR4_CODE);
  419. }
  420. static void rcar_du_plane_setup_format(struct rcar_du_group *rgrp,
  421. unsigned int index,
  422. const struct rcar_du_plane_state *state)
  423. {
  424. struct rcar_du_device *rcdu = rgrp->dev;
  425. if (rcdu->info->gen < 3)
  426. rcar_du_plane_setup_format_gen2(rgrp, index, state);
  427. else
  428. rcar_du_plane_setup_format_gen3(rgrp, index, state);
  429. /* Destination position and size */
  430. rcar_du_plane_write(rgrp, index, PnDSXR, state->state.crtc_w);
  431. rcar_du_plane_write(rgrp, index, PnDSYR, state->state.crtc_h);
  432. rcar_du_plane_write(rgrp, index, PnDPXR, state->state.crtc_x);
  433. rcar_du_plane_write(rgrp, index, PnDPYR, state->state.crtc_y);
  434. if (rcdu->info->gen < 3) {
  435. /* Wrap-around and blinking, disabled */
  436. rcar_du_plane_write(rgrp, index, PnWASPR, 0);
  437. rcar_du_plane_write(rgrp, index, PnWAMWR, 4095);
  438. rcar_du_plane_write(rgrp, index, PnBTR, 0);
  439. rcar_du_plane_write(rgrp, index, PnMLR, 0);
  440. }
  441. }
  442. void __rcar_du_plane_setup(struct rcar_du_group *rgrp,
  443. const struct rcar_du_plane_state *state)
  444. {
  445. struct rcar_du_device *rcdu = rgrp->dev;
  446. rcar_du_plane_setup_format(rgrp, state->hwindex, state);
  447. if (state->format->planes == 2)
  448. rcar_du_plane_setup_format(rgrp, (state->hwindex + 1) % 8,
  449. state);
  450. if (rcdu->info->gen < 3)
  451. rcar_du_plane_setup_scanout(rgrp, state);
  452. if (state->source == RCAR_DU_PLANE_VSPD1) {
  453. unsigned int vspd1_sink = rgrp->index ? 2 : 0;
  454. if (rcdu->vspd1_sink != vspd1_sink) {
  455. rcdu->vspd1_sink = vspd1_sink;
  456. rcar_du_set_dpad0_vsp1_routing(rcdu);
  457. }
  458. }
  459. }
  460. static int rcar_du_plane_atomic_check(struct drm_plane *plane,
  461. struct drm_plane_state *state)
  462. {
  463. struct rcar_du_plane_state *rstate = to_rcar_plane_state(state);
  464. struct rcar_du_plane *rplane = to_rcar_plane(plane);
  465. struct rcar_du_device *rcdu = rplane->group->dev;
  466. if (!state->fb || !state->crtc) {
  467. rstate->format = NULL;
  468. return 0;
  469. }
  470. if (state->src_w >> 16 != state->crtc_w ||
  471. state->src_h >> 16 != state->crtc_h) {
  472. dev_dbg(rcdu->dev, "%s: scaling not supported\n", __func__);
  473. return -EINVAL;
  474. }
  475. rstate->format = rcar_du_format_info(state->fb->format->format);
  476. if (rstate->format == NULL) {
  477. dev_dbg(rcdu->dev, "%s: unsupported format %08x\n", __func__,
  478. state->fb->format->format);
  479. return -EINVAL;
  480. }
  481. return 0;
  482. }
  483. static void rcar_du_plane_atomic_update(struct drm_plane *plane,
  484. struct drm_plane_state *old_state)
  485. {
  486. struct rcar_du_plane *rplane = to_rcar_plane(plane);
  487. struct rcar_du_plane_state *old_rstate;
  488. struct rcar_du_plane_state *new_rstate;
  489. if (!plane->state->crtc)
  490. return;
  491. rcar_du_plane_setup(rplane);
  492. /* Check whether the source has changed from memory to live source or
  493. * from live source to memory. The source has been configured by the
  494. * VSPS bit in the PnDDCR4 register. Although the datasheet states that
  495. * the bit is updated during vertical blanking, it seems that updates
  496. * only occur when the DU group is held in reset through the DSYSR.DRES
  497. * bit. We thus need to restart the group if the source changes.
  498. */
  499. old_rstate = to_rcar_plane_state(old_state);
  500. new_rstate = to_rcar_plane_state(plane->state);
  501. if ((old_rstate->source == RCAR_DU_PLANE_MEMORY) !=
  502. (new_rstate->source == RCAR_DU_PLANE_MEMORY))
  503. rplane->group->need_restart = true;
  504. }
  505. static const struct drm_plane_helper_funcs rcar_du_plane_helper_funcs = {
  506. .atomic_check = rcar_du_plane_atomic_check,
  507. .atomic_update = rcar_du_plane_atomic_update,
  508. };
  509. static struct drm_plane_state *
  510. rcar_du_plane_atomic_duplicate_state(struct drm_plane *plane)
  511. {
  512. struct rcar_du_plane_state *state;
  513. struct rcar_du_plane_state *copy;
  514. if (WARN_ON(!plane->state))
  515. return NULL;
  516. state = to_rcar_plane_state(plane->state);
  517. copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
  518. if (copy == NULL)
  519. return NULL;
  520. __drm_atomic_helper_plane_duplicate_state(plane, &copy->state);
  521. return &copy->state;
  522. }
  523. static void rcar_du_plane_atomic_destroy_state(struct drm_plane *plane,
  524. struct drm_plane_state *state)
  525. {
  526. __drm_atomic_helper_plane_destroy_state(state);
  527. kfree(to_rcar_plane_state(state));
  528. }
  529. static void rcar_du_plane_reset(struct drm_plane *plane)
  530. {
  531. struct rcar_du_plane_state *state;
  532. if (plane->state) {
  533. rcar_du_plane_atomic_destroy_state(plane, plane->state);
  534. plane->state = NULL;
  535. }
  536. state = kzalloc(sizeof(*state), GFP_KERNEL);
  537. if (state == NULL)
  538. return;
  539. state->hwindex = -1;
  540. state->source = RCAR_DU_PLANE_MEMORY;
  541. state->alpha = 255;
  542. state->colorkey = RCAR_DU_COLORKEY_NONE;
  543. state->state.zpos = plane->type == DRM_PLANE_TYPE_PRIMARY ? 0 : 1;
  544. plane->state = &state->state;
  545. plane->state->plane = plane;
  546. }
  547. static int rcar_du_plane_atomic_set_property(struct drm_plane *plane,
  548. struct drm_plane_state *state,
  549. struct drm_property *property,
  550. uint64_t val)
  551. {
  552. struct rcar_du_plane_state *rstate = to_rcar_plane_state(state);
  553. struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev;
  554. if (property == rcdu->props.alpha)
  555. rstate->alpha = val;
  556. else if (property == rcdu->props.colorkey)
  557. rstate->colorkey = val;
  558. else
  559. return -EINVAL;
  560. return 0;
  561. }
  562. static int rcar_du_plane_atomic_get_property(struct drm_plane *plane,
  563. const struct drm_plane_state *state, struct drm_property *property,
  564. uint64_t *val)
  565. {
  566. const struct rcar_du_plane_state *rstate =
  567. container_of(state, const struct rcar_du_plane_state, state);
  568. struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev;
  569. if (property == rcdu->props.alpha)
  570. *val = rstate->alpha;
  571. else if (property == rcdu->props.colorkey)
  572. *val = rstate->colorkey;
  573. else
  574. return -EINVAL;
  575. return 0;
  576. }
  577. static const struct drm_plane_funcs rcar_du_plane_funcs = {
  578. .update_plane = drm_atomic_helper_update_plane,
  579. .disable_plane = drm_atomic_helper_disable_plane,
  580. .reset = rcar_du_plane_reset,
  581. .set_property = drm_atomic_helper_plane_set_property,
  582. .destroy = drm_plane_cleanup,
  583. .atomic_duplicate_state = rcar_du_plane_atomic_duplicate_state,
  584. .atomic_destroy_state = rcar_du_plane_atomic_destroy_state,
  585. .atomic_set_property = rcar_du_plane_atomic_set_property,
  586. .atomic_get_property = rcar_du_plane_atomic_get_property,
  587. };
  588. static const uint32_t formats[] = {
  589. DRM_FORMAT_RGB565,
  590. DRM_FORMAT_ARGB1555,
  591. DRM_FORMAT_XRGB1555,
  592. DRM_FORMAT_XRGB8888,
  593. DRM_FORMAT_ARGB8888,
  594. DRM_FORMAT_UYVY,
  595. DRM_FORMAT_YUYV,
  596. DRM_FORMAT_NV12,
  597. DRM_FORMAT_NV21,
  598. DRM_FORMAT_NV16,
  599. };
  600. int rcar_du_planes_init(struct rcar_du_group *rgrp)
  601. {
  602. struct rcar_du_device *rcdu = rgrp->dev;
  603. unsigned int crtcs;
  604. unsigned int i;
  605. int ret;
  606. /* Create one primary plane per CRTC in this group and seven overlay
  607. * planes.
  608. */
  609. rgrp->num_planes = rgrp->num_crtcs + 7;
  610. crtcs = ((1 << rcdu->num_crtcs) - 1) & (3 << (2 * rgrp->index));
  611. for (i = 0; i < rgrp->num_planes; ++i) {
  612. enum drm_plane_type type = i < rgrp->num_crtcs
  613. ? DRM_PLANE_TYPE_PRIMARY
  614. : DRM_PLANE_TYPE_OVERLAY;
  615. struct rcar_du_plane *plane = &rgrp->planes[i];
  616. plane->group = rgrp;
  617. ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
  618. &rcar_du_plane_funcs, formats,
  619. ARRAY_SIZE(formats), type,
  620. NULL);
  621. if (ret < 0)
  622. return ret;
  623. drm_plane_helper_add(&plane->plane,
  624. &rcar_du_plane_helper_funcs);
  625. if (type == DRM_PLANE_TYPE_PRIMARY)
  626. continue;
  627. drm_object_attach_property(&plane->plane.base,
  628. rcdu->props.alpha, 255);
  629. drm_object_attach_property(&plane->plane.base,
  630. rcdu->props.colorkey,
  631. RCAR_DU_COLORKEY_NONE);
  632. drm_plane_create_zpos_property(&plane->plane, 1, 1, 7);
  633. }
  634. return 0;
  635. }