auxg94.c 5.0 KB

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  1. /*
  2. * Copyright 2015 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial busions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs <bskeggs@redhat.com>
  23. */
  24. #define g94_i2c_aux(p) container_of((p), struct g94_i2c_aux, base)
  25. #include "aux.h"
  26. struct g94_i2c_aux {
  27. struct nvkm_i2c_aux base;
  28. int ch;
  29. };
  30. static void
  31. g94_i2c_aux_fini(struct g94_i2c_aux *aux)
  32. {
  33. struct nvkm_device *device = aux->base.pad->i2c->subdev.device;
  34. nvkm_mask(device, 0x00e4e4 + (aux->ch * 0x50), 0x00310000, 0x00000000);
  35. }
  36. static int
  37. g94_i2c_aux_init(struct g94_i2c_aux *aux)
  38. {
  39. struct nvkm_device *device = aux->base.pad->i2c->subdev.device;
  40. const u32 unksel = 1; /* nfi which to use, or if it matters.. */
  41. const u32 ureq = unksel ? 0x00100000 : 0x00200000;
  42. const u32 urep = unksel ? 0x01000000 : 0x02000000;
  43. u32 ctrl, timeout;
  44. /* wait up to 1ms for any previous transaction to be done... */
  45. timeout = 1000;
  46. do {
  47. ctrl = nvkm_rd32(device, 0x00e4e4 + (aux->ch * 0x50));
  48. udelay(1);
  49. if (!timeout--) {
  50. AUX_ERR(&aux->base, "begin idle timeout %08x", ctrl);
  51. return -EBUSY;
  52. }
  53. } while (ctrl & 0x03010000);
  54. /* set some magic, and wait up to 1ms for it to appear */
  55. nvkm_mask(device, 0x00e4e4 + (aux->ch * 0x50), 0x00300000, ureq);
  56. timeout = 1000;
  57. do {
  58. ctrl = nvkm_rd32(device, 0x00e4e4 + (aux->ch * 0x50));
  59. udelay(1);
  60. if (!timeout--) {
  61. AUX_ERR(&aux->base, "magic wait %08x", ctrl);
  62. g94_i2c_aux_fini(aux);
  63. return -EBUSY;
  64. }
  65. } while ((ctrl & 0x03000000) != urep);
  66. return 0;
  67. }
  68. static int
  69. g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry,
  70. u8 type, u32 addr, u8 *data, u8 size)
  71. {
  72. struct g94_i2c_aux *aux = g94_i2c_aux(obj);
  73. struct nvkm_device *device = aux->base.pad->i2c->subdev.device;
  74. const u32 base = aux->ch * 0x50;
  75. u32 ctrl, stat, timeout, retries = 0;
  76. u32 xbuf[4] = {};
  77. int ret, i;
  78. AUX_TRACE(&aux->base, "%d: %08x %d", type, addr, size);
  79. ret = g94_i2c_aux_init(aux);
  80. if (ret < 0)
  81. goto out;
  82. stat = nvkm_rd32(device, 0x00e4e8 + base);
  83. if (!(stat & 0x10000000)) {
  84. AUX_TRACE(&aux->base, "sink not detected");
  85. ret = -ENXIO;
  86. goto out;
  87. }
  88. if (!(type & 1)) {
  89. memcpy(xbuf, data, size);
  90. for (i = 0; i < 16; i += 4) {
  91. AUX_TRACE(&aux->base, "wr %08x", xbuf[i / 4]);
  92. nvkm_wr32(device, 0x00e4c0 + base + i, xbuf[i / 4]);
  93. }
  94. }
  95. ctrl = nvkm_rd32(device, 0x00e4e4 + base);
  96. ctrl &= ~0x0001f0ff;
  97. ctrl |= type << 12;
  98. ctrl |= size - 1;
  99. nvkm_wr32(device, 0x00e4e0 + base, addr);
  100. /* (maybe) retry transaction a number of times on failure... */
  101. do {
  102. /* reset, and delay a while if this is a retry */
  103. nvkm_wr32(device, 0x00e4e4 + base, 0x80000000 | ctrl);
  104. nvkm_wr32(device, 0x00e4e4 + base, 0x00000000 | ctrl);
  105. if (retries)
  106. udelay(400);
  107. /* transaction request, wait up to 1ms for it to complete */
  108. nvkm_wr32(device, 0x00e4e4 + base, 0x00010000 | ctrl);
  109. timeout = 1000;
  110. do {
  111. ctrl = nvkm_rd32(device, 0x00e4e4 + base);
  112. udelay(1);
  113. if (!timeout--) {
  114. AUX_ERR(&aux->base, "timeout %08x", ctrl);
  115. ret = -EIO;
  116. goto out;
  117. }
  118. } while (ctrl & 0x00010000);
  119. ret = 0;
  120. /* read status, and check if transaction completed ok */
  121. stat = nvkm_mask(device, 0x00e4e8 + base, 0, 0);
  122. if ((stat & 0x000f0000) == 0x00080000 ||
  123. (stat & 0x000f0000) == 0x00020000)
  124. ret = 1;
  125. if ((stat & 0x00000100))
  126. ret = -ETIMEDOUT;
  127. if ((stat & 0x00000e00))
  128. ret = -EIO;
  129. AUX_TRACE(&aux->base, "%02d %08x %08x", retries, ctrl, stat);
  130. } while (ret && retry && retries++ < 32);
  131. if (type & 1) {
  132. for (i = 0; i < 16; i += 4) {
  133. xbuf[i / 4] = nvkm_rd32(device, 0x00e4d0 + base + i);
  134. AUX_TRACE(&aux->base, "rd %08x", xbuf[i / 4]);
  135. }
  136. memcpy(data, xbuf, size);
  137. }
  138. out:
  139. g94_i2c_aux_fini(aux);
  140. return ret < 0 ? ret : (stat & 0x000f0000) >> 16;
  141. }
  142. static const struct nvkm_i2c_aux_func
  143. g94_i2c_aux_func = {
  144. .xfer = g94_i2c_aux_xfer,
  145. };
  146. int
  147. g94_i2c_aux_new(struct nvkm_i2c_pad *pad, int index, u8 drive,
  148. struct nvkm_i2c_aux **paux)
  149. {
  150. struct g94_i2c_aux *aux;
  151. if (!(aux = kzalloc(sizeof(*aux), GFP_KERNEL)))
  152. return -ENOMEM;
  153. *paux = &aux->base;
  154. nvkm_i2c_aux_ctor(&g94_i2c_aux_func, pad, index, &aux->base);
  155. aux->ch = drive;
  156. aux->base.intr = 1 << aux->ch;
  157. return 0;
  158. }