ramgp100.c 4.4 KB

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  1. /*
  2. * Copyright 2013 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include "ram.h"
  25. #include <subdev/bios.h>
  26. #include <subdev/bios/init.h>
  27. #include <subdev/bios/rammap.h>
  28. static int
  29. gp100_ram_init(struct nvkm_ram *ram)
  30. {
  31. struct nvkm_subdev *subdev = &ram->fb->subdev;
  32. struct nvkm_device *device = subdev->device;
  33. struct nvkm_bios *bios = device->bios;
  34. u8 ver, hdr, cnt, len, snr, ssz;
  35. u32 data;
  36. int i;
  37. /* run a bunch of tables from rammap table. there's actually
  38. * individual pointers for each rammap entry too, but, nvidia
  39. * seem to just run the last two entries' scripts early on in
  40. * their init, and never again.. we'll just run 'em all once
  41. * for now.
  42. *
  43. * i strongly suspect that each script is for a separate mode
  44. * (likely selected by 0x9a065c's lower bits?), and the
  45. * binary driver skips the one that's already been setup by
  46. * the init tables.
  47. */
  48. data = nvbios_rammapTe(bios, &ver, &hdr, &cnt, &len, &snr, &ssz);
  49. if (!data || hdr < 0x15)
  50. return -EINVAL;
  51. cnt = nvbios_rd08(bios, data + 0x14); /* guess at count */
  52. data = nvbios_rd32(bios, data + 0x10); /* guess u32... */
  53. if (cnt) {
  54. u32 save = nvkm_rd32(device, 0x9a065c) & 0x000000f0;
  55. for (i = 0; i < cnt; i++, data += 4) {
  56. if (i != save >> 4) {
  57. nvkm_mask(device, 0x9a065c, 0x000000f0, i << 4);
  58. nvbios_exec(&(struct nvbios_init) {
  59. .subdev = subdev,
  60. .bios = bios,
  61. .offset = nvbios_rd32(bios, data),
  62. .execute = 1,
  63. });
  64. }
  65. }
  66. nvkm_mask(device, 0x9a065c, 0x000000f0, save);
  67. }
  68. nvkm_mask(device, 0x9a0584, 0x11000000, 0x00000000);
  69. nvkm_wr32(device, 0x10ecc0, 0xffffffff);
  70. nvkm_mask(device, 0x9a0160, 0x00000010, 0x00000010);
  71. return 0;
  72. }
  73. static const struct nvkm_ram_func
  74. gp100_ram_func = {
  75. .init = gp100_ram_init,
  76. .get = gf100_ram_get,
  77. .put = gf100_ram_put,
  78. };
  79. int
  80. gp100_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
  81. {
  82. struct nvkm_ram *ram;
  83. struct nvkm_subdev *subdev = &fb->subdev;
  84. struct nvkm_device *device = subdev->device;
  85. enum nvkm_ram_type type = nvkm_fb_bios_memtype(device->bios);
  86. const u32 rsvd_head = ( 256 * 1024); /* vga memory */
  87. const u32 rsvd_tail = (1024 * 1024); /* vbios etc */
  88. u32 fbpa_num = nvkm_rd32(device, 0x02243c), fbpa;
  89. u32 fbio_opt = nvkm_rd32(device, 0x021c14);
  90. u64 part, size = 0, comm = ~0ULL;
  91. bool mixed = false;
  92. int ret;
  93. nvkm_debug(subdev, "02243c: %08x\n", fbpa_num);
  94. nvkm_debug(subdev, "021c14: %08x\n", fbio_opt);
  95. for (fbpa = 0; fbpa < fbpa_num; fbpa++) {
  96. if (!(fbio_opt & (1 << fbpa))) {
  97. part = nvkm_rd32(device, 0x90020c + (fbpa * 0x4000));
  98. nvkm_debug(subdev, "fbpa %02x: %lld MiB\n", fbpa, part);
  99. part = part << 20;
  100. if (part != comm) {
  101. if (comm != ~0ULL)
  102. mixed = true;
  103. comm = min(comm, part);
  104. }
  105. size = size + part;
  106. }
  107. }
  108. ret = nvkm_ram_new_(&gp100_ram_func, fb, type, size, 0, &ram);
  109. *pram = ram;
  110. if (ret)
  111. return ret;
  112. nvkm_mm_fini(&ram->vram);
  113. if (mixed) {
  114. ret = nvkm_mm_init(&ram->vram, rsvd_head >> NVKM_RAM_MM_SHIFT,
  115. ((comm * fbpa_num) - rsvd_head) >>
  116. NVKM_RAM_MM_SHIFT, 1);
  117. if (ret)
  118. return ret;
  119. ret = nvkm_mm_init(&ram->vram, (0x1000000000ULL + comm) >>
  120. NVKM_RAM_MM_SHIFT,
  121. (size - (comm * fbpa_num) - rsvd_tail) >>
  122. NVKM_RAM_MM_SHIFT, 1);
  123. if (ret)
  124. return ret;
  125. } else {
  126. ret = nvkm_mm_init(&ram->vram, rsvd_head >> NVKM_RAM_MM_SHIFT,
  127. (size - rsvd_head - rsvd_tail) >>
  128. NVKM_RAM_MM_SHIFT, 1);
  129. if (ret)
  130. return ret;
  131. }
  132. return 0;
  133. }