nv50.c 4.4 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include "nv50.h"
  25. #include <core/gpuobj.h>
  26. #include <engine/disp.h>
  27. #include <engine/fifo/chan.h>
  28. #include <subdev/bar.h>
  29. #include <nvif/class.h>
  30. #include <nvif/event.h>
  31. /*******************************************************************************
  32. * software context
  33. ******************************************************************************/
  34. static int
  35. nv50_sw_chan_vblsem_release(struct nvkm_notify *notify)
  36. {
  37. struct nv50_sw_chan *chan =
  38. container_of(notify, typeof(*chan), vblank.notify[notify->index]);
  39. struct nvkm_sw *sw = chan->base.sw;
  40. struct nvkm_device *device = sw->engine.subdev.device;
  41. nvkm_wr32(device, 0x001704, chan->base.fifo->inst->addr >> 12);
  42. nvkm_wr32(device, 0x001710, 0x80000000 | chan->vblank.ctxdma);
  43. nvkm_bar_flush(device->bar);
  44. if (device->chipset == 0x50) {
  45. nvkm_wr32(device, 0x001570, chan->vblank.offset);
  46. nvkm_wr32(device, 0x001574, chan->vblank.value);
  47. } else {
  48. nvkm_wr32(device, 0x060010, chan->vblank.offset);
  49. nvkm_wr32(device, 0x060014, chan->vblank.value);
  50. }
  51. return NVKM_NOTIFY_DROP;
  52. }
  53. static bool
  54. nv50_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data)
  55. {
  56. struct nv50_sw_chan *chan = nv50_sw_chan(base);
  57. struct nvkm_engine *engine = chan->base.object.engine;
  58. struct nvkm_device *device = engine->subdev.device;
  59. switch (mthd) {
  60. case 0x018c: chan->vblank.ctxdma = data; return true;
  61. case 0x0400: chan->vblank.offset = data; return true;
  62. case 0x0404: chan->vblank.value = data; return true;
  63. case 0x0408:
  64. if (data < device->disp->vblank.index_nr) {
  65. nvkm_notify_get(&chan->vblank.notify[data]);
  66. return true;
  67. }
  68. break;
  69. default:
  70. break;
  71. }
  72. return false;
  73. }
  74. void *
  75. nv50_sw_chan_dtor(struct nvkm_sw_chan *base)
  76. {
  77. struct nv50_sw_chan *chan = nv50_sw_chan(base);
  78. int i;
  79. for (i = 0; i < ARRAY_SIZE(chan->vblank.notify); i++)
  80. nvkm_notify_fini(&chan->vblank.notify[i]);
  81. return chan;
  82. }
  83. static const struct nvkm_sw_chan_func
  84. nv50_sw_chan = {
  85. .dtor = nv50_sw_chan_dtor,
  86. .mthd = nv50_sw_chan_mthd,
  87. };
  88. static int
  89. nv50_sw_chan_new(struct nvkm_sw *sw, struct nvkm_fifo_chan *fifoch,
  90. const struct nvkm_oclass *oclass, struct nvkm_object **pobject)
  91. {
  92. struct nvkm_disp *disp = sw->engine.subdev.device->disp;
  93. struct nv50_sw_chan *chan;
  94. int ret, i;
  95. if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL)))
  96. return -ENOMEM;
  97. *pobject = &chan->base.object;
  98. ret = nvkm_sw_chan_ctor(&nv50_sw_chan, sw, fifoch, oclass, &chan->base);
  99. if (ret)
  100. return ret;
  101. for (i = 0; disp && i < disp->vblank.index_nr; i++) {
  102. ret = nvkm_notify_init(NULL, &disp->vblank,
  103. nv50_sw_chan_vblsem_release, false,
  104. &(struct nvif_notify_head_req_v0) {
  105. .head = i,
  106. },
  107. sizeof(struct nvif_notify_head_req_v0),
  108. sizeof(struct nvif_notify_head_rep_v0),
  109. &chan->vblank.notify[i]);
  110. if (ret)
  111. return ret;
  112. }
  113. return 0;
  114. }
  115. /*******************************************************************************
  116. * software engine/subdev functions
  117. ******************************************************************************/
  118. static const struct nvkm_sw_func
  119. nv50_sw = {
  120. .chan_new = nv50_sw_chan_new,
  121. .sclass = {
  122. { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV50 } },
  123. {}
  124. }
  125. };
  126. int
  127. nv50_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw)
  128. {
  129. return nvkm_sw_new_(&nv50_sw, device, index, psw);
  130. }