nv44.c 6.0 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #define nv44_mpeg(p) container_of((p), struct nv44_mpeg, engine)
  25. #include "priv.h"
  26. #include <core/client.h>
  27. #include <core/gpuobj.h>
  28. #include <engine/fifo.h>
  29. #include <nvif/class.h>
  30. struct nv44_mpeg {
  31. struct nvkm_engine engine;
  32. struct list_head chan;
  33. };
  34. /*******************************************************************************
  35. * PMPEG context
  36. ******************************************************************************/
  37. #define nv44_mpeg_chan(p) container_of((p), struct nv44_mpeg_chan, object)
  38. struct nv44_mpeg_chan {
  39. struct nvkm_object object;
  40. struct nv44_mpeg *mpeg;
  41. struct nvkm_fifo_chan *fifo;
  42. struct list_head head;
  43. u32 inst;
  44. };
  45. static int
  46. nv44_mpeg_chan_bind(struct nvkm_object *object, struct nvkm_gpuobj *parent,
  47. int align, struct nvkm_gpuobj **pgpuobj)
  48. {
  49. struct nv44_mpeg_chan *chan = nv44_mpeg_chan(object);
  50. int ret = nvkm_gpuobj_new(chan->object.engine->subdev.device, 264 * 4,
  51. align, true, parent, pgpuobj);
  52. if (ret == 0) {
  53. chan->inst = (*pgpuobj)->addr;
  54. nvkm_kmap(*pgpuobj);
  55. nvkm_wo32(*pgpuobj, 0x78, 0x02001ec1);
  56. nvkm_done(*pgpuobj);
  57. }
  58. return ret;
  59. }
  60. static int
  61. nv44_mpeg_chan_fini(struct nvkm_object *object, bool suspend)
  62. {
  63. struct nv44_mpeg_chan *chan = nv44_mpeg_chan(object);
  64. struct nv44_mpeg *mpeg = chan->mpeg;
  65. struct nvkm_device *device = mpeg->engine.subdev.device;
  66. u32 inst = 0x80000000 | (chan->inst >> 4);
  67. nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000000);
  68. if (nvkm_rd32(device, 0x00b318) == inst)
  69. nvkm_mask(device, 0x00b318, 0x80000000, 0x00000000);
  70. nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001);
  71. return 0;
  72. }
  73. static void *
  74. nv44_mpeg_chan_dtor(struct nvkm_object *object)
  75. {
  76. struct nv44_mpeg_chan *chan = nv44_mpeg_chan(object);
  77. struct nv44_mpeg *mpeg = chan->mpeg;
  78. unsigned long flags;
  79. spin_lock_irqsave(&mpeg->engine.lock, flags);
  80. list_del(&chan->head);
  81. spin_unlock_irqrestore(&mpeg->engine.lock, flags);
  82. return chan;
  83. }
  84. static const struct nvkm_object_func
  85. nv44_mpeg_chan = {
  86. .dtor = nv44_mpeg_chan_dtor,
  87. .fini = nv44_mpeg_chan_fini,
  88. .bind = nv44_mpeg_chan_bind,
  89. };
  90. static int
  91. nv44_mpeg_chan_new(struct nvkm_fifo_chan *fifoch,
  92. const struct nvkm_oclass *oclass,
  93. struct nvkm_object **pobject)
  94. {
  95. struct nv44_mpeg *mpeg = nv44_mpeg(oclass->engine);
  96. struct nv44_mpeg_chan *chan;
  97. unsigned long flags;
  98. if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL)))
  99. return -ENOMEM;
  100. nvkm_object_ctor(&nv44_mpeg_chan, oclass, &chan->object);
  101. chan->mpeg = mpeg;
  102. chan->fifo = fifoch;
  103. *pobject = &chan->object;
  104. spin_lock_irqsave(&mpeg->engine.lock, flags);
  105. list_add(&chan->head, &mpeg->chan);
  106. spin_unlock_irqrestore(&mpeg->engine.lock, flags);
  107. return 0;
  108. }
  109. /*******************************************************************************
  110. * PMPEG engine/subdev functions
  111. ******************************************************************************/
  112. static bool
  113. nv44_mpeg_mthd(struct nvkm_device *device, u32 mthd, u32 data)
  114. {
  115. switch (mthd) {
  116. case 0x190:
  117. case 0x1a0:
  118. case 0x1b0:
  119. return nv40_mpeg_mthd_dma(device, mthd, data);
  120. default:
  121. break;
  122. }
  123. return false;
  124. }
  125. static void
  126. nv44_mpeg_intr(struct nvkm_engine *engine)
  127. {
  128. struct nv44_mpeg *mpeg = nv44_mpeg(engine);
  129. struct nvkm_subdev *subdev = &mpeg->engine.subdev;
  130. struct nvkm_device *device = subdev->device;
  131. struct nv44_mpeg_chan *temp, *chan = NULL;
  132. unsigned long flags;
  133. u32 inst = nvkm_rd32(device, 0x00b318) & 0x000fffff;
  134. u32 stat = nvkm_rd32(device, 0x00b100);
  135. u32 type = nvkm_rd32(device, 0x00b230);
  136. u32 mthd = nvkm_rd32(device, 0x00b234);
  137. u32 data = nvkm_rd32(device, 0x00b238);
  138. u32 show = stat;
  139. spin_lock_irqsave(&mpeg->engine.lock, flags);
  140. list_for_each_entry(temp, &mpeg->chan, head) {
  141. if (temp->inst >> 4 == inst) {
  142. chan = temp;
  143. list_del(&chan->head);
  144. list_add(&chan->head, &mpeg->chan);
  145. break;
  146. }
  147. }
  148. if (stat & 0x01000000) {
  149. /* happens on initial binding of the object */
  150. if (type == 0x00000020 && mthd == 0x0000) {
  151. nvkm_mask(device, 0x00b308, 0x00000000, 0x00000000);
  152. show &= ~0x01000000;
  153. }
  154. if (type == 0x00000010) {
  155. if (!nv44_mpeg_mthd(subdev->device, mthd, data))
  156. show &= ~0x01000000;
  157. }
  158. }
  159. nvkm_wr32(device, 0x00b100, stat);
  160. nvkm_wr32(device, 0x00b230, 0x00000001);
  161. if (show) {
  162. nvkm_error(subdev, "ch %d [%08x %s] %08x %08x %08x %08x\n",
  163. chan ? chan->fifo->chid : -1, inst << 4,
  164. chan ? chan->object.client->name : "unknown",
  165. stat, type, mthd, data);
  166. }
  167. spin_unlock_irqrestore(&mpeg->engine.lock, flags);
  168. }
  169. static const struct nvkm_engine_func
  170. nv44_mpeg = {
  171. .init = nv31_mpeg_init,
  172. .intr = nv44_mpeg_intr,
  173. .tile = nv31_mpeg_tile,
  174. .fifo.cclass = nv44_mpeg_chan_new,
  175. .sclass = {
  176. { -1, -1, NV31_MPEG, &nv31_mpeg_object },
  177. {}
  178. }
  179. };
  180. int
  181. nv44_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg)
  182. {
  183. struct nv44_mpeg *mpeg;
  184. if (!(mpeg = kzalloc(sizeof(*mpeg), GFP_KERNEL)))
  185. return -ENOMEM;
  186. INIT_LIST_HEAD(&mpeg->chan);
  187. *pmpeg = &mpeg->engine;
  188. return nvkm_engine_ctor(&nv44_mpeg, device, index, true, &mpeg->engine);
  189. }