sornv50.c 2.4 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include "nv50.h"
  25. #include "outp.h"
  26. #include <core/client.h>
  27. #include <subdev/timer.h>
  28. #include <nvif/cl5070.h>
  29. #include <nvif/unpack.h>
  30. int
  31. nv50_sor_power(NV50_DISP_MTHD_V1)
  32. {
  33. struct nvkm_device *device = disp->base.engine.subdev.device;
  34. union {
  35. struct nv50_disp_sor_pwr_v0 v0;
  36. } *args = data;
  37. const u32 soff = outp->or * 0x800;
  38. u32 stat;
  39. int ret = -ENOSYS;
  40. nvif_ioctl(object, "disp sor pwr size %d\n", size);
  41. if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
  42. nvif_ioctl(object, "disp sor pwr vers %d state %d\n",
  43. args->v0.version, args->v0.state);
  44. stat = !!args->v0.state;
  45. } else
  46. return ret;
  47. nvkm_msec(device, 2000,
  48. if (!(nvkm_rd32(device, 0x61c004 + soff) & 0x80000000))
  49. break;
  50. );
  51. nvkm_mask(device, 0x61c004 + soff, 0x80000001, 0x80000000 | stat);
  52. nvkm_msec(device, 2000,
  53. if (!(nvkm_rd32(device, 0x61c004 + soff) & 0x80000000))
  54. break;
  55. );
  56. nvkm_msec(device, 2000,
  57. if (!(nvkm_rd32(device, 0x61c030 + soff) & 0x10000000))
  58. break;
  59. );
  60. return 0;
  61. }
  62. static const struct nvkm_output_func
  63. nv50_sor_output_func = {
  64. };
  65. int
  66. nv50_sor_output_new(struct nvkm_disp *disp, int index,
  67. struct dcb_output *dcbE, struct nvkm_output **poutp)
  68. {
  69. return nvkm_output_new_(&nv50_sor_output_func, disp,
  70. index, dcbE, poutp);
  71. }