disp.h 4.4 KB

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  1. #ifndef __NV04_DISPLAY_H__
  2. #define __NV04_DISPLAY_H__
  3. #include <subdev/bios.h>
  4. #include <subdev/bios/pll.h>
  5. #include "nouveau_display.h"
  6. enum nv04_fp_display_regs {
  7. FP_DISPLAY_END,
  8. FP_TOTAL,
  9. FP_CRTC,
  10. FP_SYNC_START,
  11. FP_SYNC_END,
  12. FP_VALID_START,
  13. FP_VALID_END
  14. };
  15. struct nv04_crtc_reg {
  16. unsigned char MiscOutReg;
  17. uint8_t CRTC[0xa0];
  18. uint8_t CR58[0x10];
  19. uint8_t Sequencer[5];
  20. uint8_t Graphics[9];
  21. uint8_t Attribute[21];
  22. unsigned char DAC[768];
  23. /* PCRTC regs */
  24. uint32_t fb_start;
  25. uint32_t crtc_cfg;
  26. uint32_t cursor_cfg;
  27. uint32_t gpio_ext;
  28. uint32_t crtc_830;
  29. uint32_t crtc_834;
  30. uint32_t crtc_850;
  31. uint32_t crtc_eng_ctrl;
  32. /* PRAMDAC regs */
  33. uint32_t nv10_cursync;
  34. struct nvkm_pll_vals pllvals;
  35. uint32_t ramdac_gen_ctrl;
  36. uint32_t ramdac_630;
  37. uint32_t ramdac_634;
  38. uint32_t tv_setup;
  39. uint32_t tv_vtotal;
  40. uint32_t tv_vskew;
  41. uint32_t tv_vsync_delay;
  42. uint32_t tv_htotal;
  43. uint32_t tv_hskew;
  44. uint32_t tv_hsync_delay;
  45. uint32_t tv_hsync_delay2;
  46. uint32_t fp_horiz_regs[7];
  47. uint32_t fp_vert_regs[7];
  48. uint32_t dither;
  49. uint32_t fp_control;
  50. uint32_t dither_regs[6];
  51. uint32_t fp_debug_0;
  52. uint32_t fp_debug_1;
  53. uint32_t fp_debug_2;
  54. uint32_t fp_margin_color;
  55. uint32_t ramdac_8c0;
  56. uint32_t ramdac_a20;
  57. uint32_t ramdac_a24;
  58. uint32_t ramdac_a34;
  59. uint32_t ctv_regs[38];
  60. };
  61. struct nv04_output_reg {
  62. uint32_t output;
  63. int head;
  64. };
  65. struct nv04_mode_state {
  66. struct nv04_crtc_reg crtc_reg[2];
  67. uint32_t pllsel;
  68. uint32_t sel_clk;
  69. };
  70. struct nv04_display {
  71. struct nv04_mode_state mode_reg;
  72. struct nv04_mode_state saved_reg;
  73. uint32_t saved_vga_font[4][16384];
  74. uint32_t dac_users[4];
  75. struct nouveau_bo *image[2];
  76. };
  77. static inline struct nv04_display *
  78. nv04_display(struct drm_device *dev)
  79. {
  80. return nouveau_display(dev)->priv;
  81. }
  82. /* nv04_display.c */
  83. int nv04_display_create(struct drm_device *);
  84. void nv04_display_destroy(struct drm_device *);
  85. int nv04_display_init(struct drm_device *);
  86. void nv04_display_fini(struct drm_device *);
  87. /* nv04_crtc.c */
  88. int nv04_crtc_create(struct drm_device *, int index);
  89. /* nv04_dac.c */
  90. int nv04_dac_create(struct drm_connector *, struct dcb_output *);
  91. uint32_t nv17_dac_sample_load(struct drm_encoder *encoder);
  92. int nv04_dac_output_offset(struct drm_encoder *encoder);
  93. void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable);
  94. bool nv04_dac_in_use(struct drm_encoder *encoder);
  95. /* nv04_dfp.c */
  96. int nv04_dfp_create(struct drm_connector *, struct dcb_output *);
  97. int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_output *dcbent);
  98. void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_output *dcbent,
  99. int head, bool dl);
  100. void nv04_dfp_disable(struct drm_device *dev, int head);
  101. void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode);
  102. /* nv04_tv.c */
  103. int nv04_tv_identify(struct drm_device *dev, int i2c_index);
  104. int nv04_tv_create(struct drm_connector *, struct dcb_output *);
  105. /* nv17_tv.c */
  106. int nv17_tv_create(struct drm_connector *, struct dcb_output *);
  107. /* overlay.c */
  108. void nouveau_overlay_init(struct drm_device *dev);
  109. static inline bool
  110. nv_two_heads(struct drm_device *dev)
  111. {
  112. struct nouveau_drm *drm = nouveau_drm(dev);
  113. const int impl = dev->pdev->device & 0x0ff0;
  114. if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS && impl != 0x0100 &&
  115. impl != 0x0150 && impl != 0x01a0 && impl != 0x0200)
  116. return true;
  117. return false;
  118. }
  119. static inline bool
  120. nv_gf4_disp_arch(struct drm_device *dev)
  121. {
  122. return nv_two_heads(dev) && (dev->pdev->device & 0x0ff0) != 0x0110;
  123. }
  124. static inline bool
  125. nv_two_reg_pll(struct drm_device *dev)
  126. {
  127. struct nouveau_drm *drm = nouveau_drm(dev);
  128. const int impl = dev->pdev->device & 0x0ff0;
  129. if (impl == 0x0310 || impl == 0x0340 || drm->device.info.family >= NV_DEVICE_INFO_V0_CURIE)
  130. return true;
  131. return false;
  132. }
  133. static inline bool
  134. nv_match_device(struct drm_device *dev, unsigned device,
  135. unsigned sub_vendor, unsigned sub_device)
  136. {
  137. return dev->pdev->device == device &&
  138. dev->pdev->subsystem_vendor == sub_vendor &&
  139. dev->pdev->subsystem_device == sub_device;
  140. }
  141. #include <subdev/bios.h>
  142. #include <subdev/bios/init.h>
  143. static inline void
  144. nouveau_bios_run_init_table(struct drm_device *dev, u16 table,
  145. struct dcb_output *outp, int crtc)
  146. {
  147. struct nouveau_drm *drm = nouveau_drm(dev);
  148. struct nvkm_bios *bios = nvxx_bios(&drm->device);
  149. struct nvbios_init init = {
  150. .subdev = &bios->subdev,
  151. .bios = bios,
  152. .offset = table,
  153. .outp = outp,
  154. .crtc = crtc,
  155. .execute = 1,
  156. };
  157. nvbios_exec(&init);
  158. }
  159. #endif