mdp4_dtv_encoder.c 8.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283
  1. /*
  2. * Copyright (C) 2013 Red Hat
  3. * Author: Rob Clark <robdclark@gmail.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #include "mdp4_kms.h"
  18. #include "drm_crtc.h"
  19. #include "drm_crtc_helper.h"
  20. struct mdp4_dtv_encoder {
  21. struct drm_encoder base;
  22. struct clk *hdmi_clk;
  23. struct clk *mdp_clk;
  24. unsigned long int pixclock;
  25. bool enabled;
  26. uint32_t bsc;
  27. };
  28. #define to_mdp4_dtv_encoder(x) container_of(x, struct mdp4_dtv_encoder, base)
  29. static struct mdp4_kms *get_kms(struct drm_encoder *encoder)
  30. {
  31. struct msm_drm_private *priv = encoder->dev->dev_private;
  32. return to_mdp4_kms(to_mdp_kms(priv->kms));
  33. }
  34. #ifdef DOWNSTREAM_CONFIG_MSM_BUS_SCALING
  35. #include <mach/board.h>
  36. /* not ironically named at all.. no, really.. */
  37. static void bs_init(struct mdp4_dtv_encoder *mdp4_dtv_encoder)
  38. {
  39. struct drm_device *dev = mdp4_dtv_encoder->base.dev;
  40. struct lcdc_platform_data *dtv_pdata = mdp4_find_pdata("dtv.0");
  41. if (!dtv_pdata) {
  42. dev_err(dev->dev, "could not find dtv pdata\n");
  43. return;
  44. }
  45. if (dtv_pdata->bus_scale_table) {
  46. mdp4_dtv_encoder->bsc = msm_bus_scale_register_client(
  47. dtv_pdata->bus_scale_table);
  48. DBG("bus scale client: %08x", mdp4_dtv_encoder->bsc);
  49. DBG("lcdc_power_save: %p", dtv_pdata->lcdc_power_save);
  50. if (dtv_pdata->lcdc_power_save)
  51. dtv_pdata->lcdc_power_save(1);
  52. }
  53. }
  54. static void bs_fini(struct mdp4_dtv_encoder *mdp4_dtv_encoder)
  55. {
  56. if (mdp4_dtv_encoder->bsc) {
  57. msm_bus_scale_unregister_client(mdp4_dtv_encoder->bsc);
  58. mdp4_dtv_encoder->bsc = 0;
  59. }
  60. }
  61. static void bs_set(struct mdp4_dtv_encoder *mdp4_dtv_encoder, int idx)
  62. {
  63. if (mdp4_dtv_encoder->bsc) {
  64. DBG("set bus scaling: %d", idx);
  65. msm_bus_scale_client_update_request(mdp4_dtv_encoder->bsc, idx);
  66. }
  67. }
  68. #else
  69. static void bs_init(struct mdp4_dtv_encoder *mdp4_dtv_encoder) {}
  70. static void bs_fini(struct mdp4_dtv_encoder *mdp4_dtv_encoder) {}
  71. static void bs_set(struct mdp4_dtv_encoder *mdp4_dtv_encoder, int idx) {}
  72. #endif
  73. static void mdp4_dtv_encoder_destroy(struct drm_encoder *encoder)
  74. {
  75. struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
  76. bs_fini(mdp4_dtv_encoder);
  77. drm_encoder_cleanup(encoder);
  78. kfree(mdp4_dtv_encoder);
  79. }
  80. static const struct drm_encoder_funcs mdp4_dtv_encoder_funcs = {
  81. .destroy = mdp4_dtv_encoder_destroy,
  82. };
  83. static void mdp4_dtv_encoder_mode_set(struct drm_encoder *encoder,
  84. struct drm_display_mode *mode,
  85. struct drm_display_mode *adjusted_mode)
  86. {
  87. struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
  88. struct mdp4_kms *mdp4_kms = get_kms(encoder);
  89. uint32_t dtv_hsync_skew, vsync_period, vsync_len, ctrl_pol;
  90. uint32_t display_v_start, display_v_end;
  91. uint32_t hsync_start_x, hsync_end_x;
  92. mode = adjusted_mode;
  93. DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
  94. mode->base.id, mode->name,
  95. mode->vrefresh, mode->clock,
  96. mode->hdisplay, mode->hsync_start,
  97. mode->hsync_end, mode->htotal,
  98. mode->vdisplay, mode->vsync_start,
  99. mode->vsync_end, mode->vtotal,
  100. mode->type, mode->flags);
  101. mdp4_dtv_encoder->pixclock = mode->clock * 1000;
  102. DBG("pixclock=%lu", mdp4_dtv_encoder->pixclock);
  103. ctrl_pol = 0;
  104. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  105. ctrl_pol |= MDP4_DTV_CTRL_POLARITY_HSYNC_LOW;
  106. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  107. ctrl_pol |= MDP4_DTV_CTRL_POLARITY_VSYNC_LOW;
  108. /* probably need to get DATA_EN polarity from panel.. */
  109. dtv_hsync_skew = 0; /* get this from panel? */
  110. hsync_start_x = (mode->htotal - mode->hsync_start);
  111. hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1;
  112. vsync_period = mode->vtotal * mode->htotal;
  113. vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal;
  114. display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dtv_hsync_skew;
  115. display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_skew - 1;
  116. mdp4_write(mdp4_kms, REG_MDP4_DTV_HSYNC_CTRL,
  117. MDP4_DTV_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) |
  118. MDP4_DTV_HSYNC_CTRL_PERIOD(mode->htotal));
  119. mdp4_write(mdp4_kms, REG_MDP4_DTV_VSYNC_PERIOD, vsync_period);
  120. mdp4_write(mdp4_kms, REG_MDP4_DTV_VSYNC_LEN, vsync_len);
  121. mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_HCTRL,
  122. MDP4_DTV_DISPLAY_HCTRL_START(hsync_start_x) |
  123. MDP4_DTV_DISPLAY_HCTRL_END(hsync_end_x));
  124. mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_VSTART, display_v_start);
  125. mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_VEND, display_v_end);
  126. mdp4_write(mdp4_kms, REG_MDP4_DTV_BORDER_CLR, 0);
  127. mdp4_write(mdp4_kms, REG_MDP4_DTV_UNDERFLOW_CLR,
  128. MDP4_DTV_UNDERFLOW_CLR_ENABLE_RECOVERY |
  129. MDP4_DTV_UNDERFLOW_CLR_COLOR(0xff));
  130. mdp4_write(mdp4_kms, REG_MDP4_DTV_HSYNC_SKEW, dtv_hsync_skew);
  131. mdp4_write(mdp4_kms, REG_MDP4_DTV_CTRL_POLARITY, ctrl_pol);
  132. mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_HCTL,
  133. MDP4_DTV_ACTIVE_HCTL_START(0) |
  134. MDP4_DTV_ACTIVE_HCTL_END(0));
  135. mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_VSTART, 0);
  136. mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_VEND, 0);
  137. }
  138. static void mdp4_dtv_encoder_disable(struct drm_encoder *encoder)
  139. {
  140. struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
  141. struct mdp4_kms *mdp4_kms = get_kms(encoder);
  142. if (WARN_ON(!mdp4_dtv_encoder->enabled))
  143. return;
  144. mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0);
  145. /*
  146. * Wait for a vsync so we know the ENABLE=0 latched before
  147. * the (connector) source of the vsync's gets disabled,
  148. * otherwise we end up in a funny state if we re-enable
  149. * before the disable latches, which results that some of
  150. * the settings changes for the new modeset (like new
  151. * scanout buffer) don't latch properly..
  152. */
  153. mdp_irq_wait(&mdp4_kms->base, MDP4_IRQ_EXTERNAL_VSYNC);
  154. clk_disable_unprepare(mdp4_dtv_encoder->hdmi_clk);
  155. clk_disable_unprepare(mdp4_dtv_encoder->mdp_clk);
  156. bs_set(mdp4_dtv_encoder, 0);
  157. mdp4_dtv_encoder->enabled = false;
  158. }
  159. static void mdp4_dtv_encoder_enable(struct drm_encoder *encoder)
  160. {
  161. struct drm_device *dev = encoder->dev;
  162. struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
  163. struct mdp4_kms *mdp4_kms = get_kms(encoder);
  164. unsigned long pc = mdp4_dtv_encoder->pixclock;
  165. int ret;
  166. if (WARN_ON(mdp4_dtv_encoder->enabled))
  167. return;
  168. mdp4_crtc_set_config(encoder->crtc,
  169. MDP4_DMA_CONFIG_R_BPC(BPC8) |
  170. MDP4_DMA_CONFIG_G_BPC(BPC8) |
  171. MDP4_DMA_CONFIG_B_BPC(BPC8) |
  172. MDP4_DMA_CONFIG_PACK(0x21));
  173. mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 1);
  174. bs_set(mdp4_dtv_encoder, 1);
  175. DBG("setting mdp_clk=%lu", pc);
  176. ret = clk_set_rate(mdp4_dtv_encoder->mdp_clk, pc);
  177. if (ret)
  178. dev_err(dev->dev, "failed to set mdp_clk to %lu: %d\n",
  179. pc, ret);
  180. ret = clk_prepare_enable(mdp4_dtv_encoder->mdp_clk);
  181. if (ret)
  182. dev_err(dev->dev, "failed to enabled mdp_clk: %d\n", ret);
  183. ret = clk_prepare_enable(mdp4_dtv_encoder->hdmi_clk);
  184. if (ret)
  185. dev_err(dev->dev, "failed to enable hdmi_clk: %d\n", ret);
  186. mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 1);
  187. mdp4_dtv_encoder->enabled = true;
  188. }
  189. static const struct drm_encoder_helper_funcs mdp4_dtv_encoder_helper_funcs = {
  190. .mode_set = mdp4_dtv_encoder_mode_set,
  191. .enable = mdp4_dtv_encoder_enable,
  192. .disable = mdp4_dtv_encoder_disable,
  193. };
  194. long mdp4_dtv_round_pixclk(struct drm_encoder *encoder, unsigned long rate)
  195. {
  196. struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
  197. return clk_round_rate(mdp4_dtv_encoder->mdp_clk, rate);
  198. }
  199. /* initialize encoder */
  200. struct drm_encoder *mdp4_dtv_encoder_init(struct drm_device *dev)
  201. {
  202. struct drm_encoder *encoder = NULL;
  203. struct mdp4_dtv_encoder *mdp4_dtv_encoder;
  204. int ret;
  205. mdp4_dtv_encoder = kzalloc(sizeof(*mdp4_dtv_encoder), GFP_KERNEL);
  206. if (!mdp4_dtv_encoder) {
  207. ret = -ENOMEM;
  208. goto fail;
  209. }
  210. encoder = &mdp4_dtv_encoder->base;
  211. drm_encoder_init(dev, encoder, &mdp4_dtv_encoder_funcs,
  212. DRM_MODE_ENCODER_TMDS, NULL);
  213. drm_encoder_helper_add(encoder, &mdp4_dtv_encoder_helper_funcs);
  214. mdp4_dtv_encoder->hdmi_clk = devm_clk_get(dev->dev, "hdmi_clk");
  215. if (IS_ERR(mdp4_dtv_encoder->hdmi_clk)) {
  216. dev_err(dev->dev, "failed to get hdmi_clk\n");
  217. ret = PTR_ERR(mdp4_dtv_encoder->hdmi_clk);
  218. goto fail;
  219. }
  220. mdp4_dtv_encoder->mdp_clk = devm_clk_get(dev->dev, "tv_clk");
  221. if (IS_ERR(mdp4_dtv_encoder->mdp_clk)) {
  222. dev_err(dev->dev, "failed to get tv_clk\n");
  223. ret = PTR_ERR(mdp4_dtv_encoder->mdp_clk);
  224. goto fail;
  225. }
  226. bs_init(mdp4_dtv_encoder);
  227. return encoder;
  228. fail:
  229. if (encoder)
  230. mdp4_dtv_encoder_destroy(encoder);
  231. return ERR_PTR(ret);
  232. }