mtk_disp_rdma.c 6.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241
  1. /*
  2. * Copyright (c) 2015 MediaTek Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <drm/drmP.h>
  14. #include <linux/clk.h>
  15. #include <linux/component.h>
  16. #include <linux/of_device.h>
  17. #include <linux/of_irq.h>
  18. #include <linux/platform_device.h>
  19. #include "mtk_drm_crtc.h"
  20. #include "mtk_drm_ddp_comp.h"
  21. #define DISP_REG_RDMA_INT_ENABLE 0x0000
  22. #define DISP_REG_RDMA_INT_STATUS 0x0004
  23. #define RDMA_TARGET_LINE_INT BIT(5)
  24. #define RDMA_FIFO_UNDERFLOW_INT BIT(4)
  25. #define RDMA_EOF_ABNORMAL_INT BIT(3)
  26. #define RDMA_FRAME_END_INT BIT(2)
  27. #define RDMA_FRAME_START_INT BIT(1)
  28. #define RDMA_REG_UPDATE_INT BIT(0)
  29. #define DISP_REG_RDMA_GLOBAL_CON 0x0010
  30. #define RDMA_ENGINE_EN BIT(0)
  31. #define DISP_REG_RDMA_SIZE_CON_0 0x0014
  32. #define DISP_REG_RDMA_SIZE_CON_1 0x0018
  33. #define DISP_REG_RDMA_TARGET_LINE 0x001c
  34. #define DISP_REG_RDMA_FIFO_CON 0x0040
  35. #define RDMA_FIFO_UNDERFLOW_EN BIT(31)
  36. #define RDMA_FIFO_PSEUDO_SIZE(bytes) (((bytes) / 16) << 16)
  37. #define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) ((bytes) / 16)
  38. /**
  39. * struct mtk_disp_rdma - DISP_RDMA driver structure
  40. * @ddp_comp - structure containing type enum and hardware resources
  41. * @crtc - associated crtc to report irq events to
  42. */
  43. struct mtk_disp_rdma {
  44. struct mtk_ddp_comp ddp_comp;
  45. struct drm_crtc *crtc;
  46. };
  47. static irqreturn_t mtk_disp_rdma_irq_handler(int irq, void *dev_id)
  48. {
  49. struct mtk_disp_rdma *priv = dev_id;
  50. struct mtk_ddp_comp *rdma = &priv->ddp_comp;
  51. /* Clear frame completion interrupt */
  52. writel(0x0, rdma->regs + DISP_REG_RDMA_INT_STATUS);
  53. if (!priv->crtc)
  54. return IRQ_NONE;
  55. mtk_crtc_ddp_irq(priv->crtc, rdma);
  56. return IRQ_HANDLED;
  57. }
  58. static void rdma_update_bits(struct mtk_ddp_comp *comp, unsigned int reg,
  59. unsigned int mask, unsigned int val)
  60. {
  61. unsigned int tmp = readl(comp->regs + reg);
  62. tmp = (tmp & ~mask) | (val & mask);
  63. writel(tmp, comp->regs + reg);
  64. }
  65. static void mtk_rdma_enable_vblank(struct mtk_ddp_comp *comp,
  66. struct drm_crtc *crtc)
  67. {
  68. struct mtk_disp_rdma *priv = container_of(comp, struct mtk_disp_rdma,
  69. ddp_comp);
  70. priv->crtc = crtc;
  71. rdma_update_bits(comp, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT,
  72. RDMA_FRAME_END_INT);
  73. }
  74. static void mtk_rdma_disable_vblank(struct mtk_ddp_comp *comp)
  75. {
  76. struct mtk_disp_rdma *priv = container_of(comp, struct mtk_disp_rdma,
  77. ddp_comp);
  78. priv->crtc = NULL;
  79. rdma_update_bits(comp, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT, 0);
  80. }
  81. static void mtk_rdma_start(struct mtk_ddp_comp *comp)
  82. {
  83. rdma_update_bits(comp, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN,
  84. RDMA_ENGINE_EN);
  85. }
  86. static void mtk_rdma_stop(struct mtk_ddp_comp *comp)
  87. {
  88. rdma_update_bits(comp, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN, 0);
  89. }
  90. static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
  91. unsigned int height, unsigned int vrefresh,
  92. unsigned int bpc)
  93. {
  94. unsigned int threshold;
  95. unsigned int reg;
  96. rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width);
  97. rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_1, 0xfffff, height);
  98. /*
  99. * Enable FIFO underflow since DSI and DPI can't be blocked.
  100. * Keep the FIFO pseudo size reset default of 8 KiB. Set the
  101. * output threshold to 6 microseconds with 7/6 overhead to
  102. * account for blanking, and with a pixel depth of 4 bytes:
  103. */
  104. threshold = width * height * vrefresh * 4 * 7 / 1000000;
  105. reg = RDMA_FIFO_UNDERFLOW_EN |
  106. RDMA_FIFO_PSEUDO_SIZE(SZ_8K) |
  107. RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
  108. writel(reg, comp->regs + DISP_REG_RDMA_FIFO_CON);
  109. }
  110. static const struct mtk_ddp_comp_funcs mtk_disp_rdma_funcs = {
  111. .config = mtk_rdma_config,
  112. .start = mtk_rdma_start,
  113. .stop = mtk_rdma_stop,
  114. .enable_vblank = mtk_rdma_enable_vblank,
  115. .disable_vblank = mtk_rdma_disable_vblank,
  116. };
  117. static int mtk_disp_rdma_bind(struct device *dev, struct device *master,
  118. void *data)
  119. {
  120. struct mtk_disp_rdma *priv = dev_get_drvdata(dev);
  121. struct drm_device *drm_dev = data;
  122. int ret;
  123. ret = mtk_ddp_comp_register(drm_dev, &priv->ddp_comp);
  124. if (ret < 0) {
  125. dev_err(dev, "Failed to register component %s: %d\n",
  126. dev->of_node->full_name, ret);
  127. return ret;
  128. }
  129. return 0;
  130. }
  131. static void mtk_disp_rdma_unbind(struct device *dev, struct device *master,
  132. void *data)
  133. {
  134. struct mtk_disp_rdma *priv = dev_get_drvdata(dev);
  135. struct drm_device *drm_dev = data;
  136. mtk_ddp_comp_unregister(drm_dev, &priv->ddp_comp);
  137. }
  138. static const struct component_ops mtk_disp_rdma_component_ops = {
  139. .bind = mtk_disp_rdma_bind,
  140. .unbind = mtk_disp_rdma_unbind,
  141. };
  142. static int mtk_disp_rdma_probe(struct platform_device *pdev)
  143. {
  144. struct device *dev = &pdev->dev;
  145. struct mtk_disp_rdma *priv;
  146. int comp_id;
  147. int irq;
  148. int ret;
  149. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  150. if (!priv)
  151. return -ENOMEM;
  152. irq = platform_get_irq(pdev, 0);
  153. if (irq < 0)
  154. return irq;
  155. comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DISP_RDMA);
  156. if (comp_id < 0) {
  157. dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
  158. return comp_id;
  159. }
  160. ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id,
  161. &mtk_disp_rdma_funcs);
  162. if (ret) {
  163. dev_err(dev, "Failed to initialize component: %d\n", ret);
  164. return ret;
  165. }
  166. /* Disable and clear pending interrupts */
  167. writel(0x0, priv->ddp_comp.regs + DISP_REG_RDMA_INT_ENABLE);
  168. writel(0x0, priv->ddp_comp.regs + DISP_REG_RDMA_INT_STATUS);
  169. ret = devm_request_irq(dev, irq, mtk_disp_rdma_irq_handler,
  170. IRQF_TRIGGER_NONE, dev_name(dev), priv);
  171. if (ret < 0) {
  172. dev_err(dev, "Failed to request irq %d: %d\n", irq, ret);
  173. return ret;
  174. }
  175. platform_set_drvdata(pdev, priv);
  176. ret = component_add(dev, &mtk_disp_rdma_component_ops);
  177. if (ret)
  178. dev_err(dev, "Failed to add component: %d\n", ret);
  179. return ret;
  180. }
  181. static int mtk_disp_rdma_remove(struct platform_device *pdev)
  182. {
  183. component_del(&pdev->dev, &mtk_disp_rdma_component_ops);
  184. return 0;
  185. }
  186. static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = {
  187. { .compatible = "mediatek,mt8173-disp-rdma", },
  188. {},
  189. };
  190. MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match);
  191. struct platform_driver mtk_disp_rdma_driver = {
  192. .probe = mtk_disp_rdma_probe,
  193. .remove = mtk_disp_rdma_remove,
  194. .driver = {
  195. .name = "mediatek-disp-rdma",
  196. .owner = THIS_MODULE,
  197. .of_match_table = mtk_disp_rdma_driver_dt_match,
  198. },
  199. };