intel_breadcrumbs.c 19 KB

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  1. /*
  2. * Copyright © 2015 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. */
  24. #include <linux/kthread.h>
  25. #include "i915_drv.h"
  26. static void intel_breadcrumbs_hangcheck(unsigned long data)
  27. {
  28. struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
  29. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  30. if (!b->irq_enabled)
  31. return;
  32. if (time_before(jiffies, b->timeout)) {
  33. mod_timer(&b->hangcheck, b->timeout);
  34. return;
  35. }
  36. DRM_DEBUG("Hangcheck timer elapsed... %s idle\n", engine->name);
  37. set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
  38. mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
  39. /* Ensure that even if the GPU hangs, we get woken up.
  40. *
  41. * However, note that if no one is waiting, we never notice
  42. * a gpu hang. Eventually, we will have to wait for a resource
  43. * held by the GPU and so trigger a hangcheck. In the most
  44. * pathological case, this will be upon memory starvation! To
  45. * prevent this, we also queue the hangcheck from the retire
  46. * worker.
  47. */
  48. i915_queue_hangcheck(engine->i915);
  49. }
  50. static unsigned long wait_timeout(void)
  51. {
  52. return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
  53. }
  54. static void intel_breadcrumbs_fake_irq(unsigned long data)
  55. {
  56. struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
  57. /*
  58. * The timer persists in case we cannot enable interrupts,
  59. * or if we have previously seen seqno/interrupt incoherency
  60. * ("missed interrupt" syndrome). Here the worker will wake up
  61. * every jiffie in order to kick the oldest waiter to do the
  62. * coherent seqno check.
  63. */
  64. if (intel_engine_wakeup(engine))
  65. mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
  66. }
  67. static void irq_enable(struct intel_engine_cs *engine)
  68. {
  69. /* Enabling the IRQ may miss the generation of the interrupt, but
  70. * we still need to force the barrier before reading the seqno,
  71. * just in case.
  72. */
  73. engine->breadcrumbs.irq_posted = true;
  74. /* Caller disables interrupts */
  75. spin_lock(&engine->i915->irq_lock);
  76. engine->irq_enable(engine);
  77. spin_unlock(&engine->i915->irq_lock);
  78. }
  79. static void irq_disable(struct intel_engine_cs *engine)
  80. {
  81. /* Caller disables interrupts */
  82. spin_lock(&engine->i915->irq_lock);
  83. engine->irq_disable(engine);
  84. spin_unlock(&engine->i915->irq_lock);
  85. engine->breadcrumbs.irq_posted = false;
  86. }
  87. static void __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
  88. {
  89. struct intel_engine_cs *engine =
  90. container_of(b, struct intel_engine_cs, breadcrumbs);
  91. struct drm_i915_private *i915 = engine->i915;
  92. assert_spin_locked(&b->lock);
  93. if (b->rpm_wakelock)
  94. return;
  95. /* Since we are waiting on a request, the GPU should be busy
  96. * and should have its own rpm reference. For completeness,
  97. * record an rpm reference for ourselves to cover the
  98. * interrupt we unmask.
  99. */
  100. intel_runtime_pm_get_noresume(i915);
  101. b->rpm_wakelock = true;
  102. /* No interrupts? Kick the waiter every jiffie! */
  103. if (intel_irqs_enabled(i915)) {
  104. if (!test_bit(engine->id, &i915->gpu_error.test_irq_rings))
  105. irq_enable(engine);
  106. b->irq_enabled = true;
  107. }
  108. if (!b->irq_enabled ||
  109. test_bit(engine->id, &i915->gpu_error.missed_irq_rings)) {
  110. mod_timer(&b->fake_irq, jiffies + 1);
  111. } else {
  112. /* Ensure we never sleep indefinitely */
  113. GEM_BUG_ON(!time_after(b->timeout, jiffies));
  114. mod_timer(&b->hangcheck, b->timeout);
  115. }
  116. }
  117. static void __intel_breadcrumbs_disable_irq(struct intel_breadcrumbs *b)
  118. {
  119. struct intel_engine_cs *engine =
  120. container_of(b, struct intel_engine_cs, breadcrumbs);
  121. assert_spin_locked(&b->lock);
  122. if (!b->rpm_wakelock)
  123. return;
  124. if (b->irq_enabled) {
  125. irq_disable(engine);
  126. b->irq_enabled = false;
  127. }
  128. intel_runtime_pm_put(engine->i915);
  129. b->rpm_wakelock = false;
  130. }
  131. static inline struct intel_wait *to_wait(struct rb_node *node)
  132. {
  133. return rb_entry(node, struct intel_wait, node);
  134. }
  135. static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
  136. struct intel_wait *wait)
  137. {
  138. assert_spin_locked(&b->lock);
  139. /* This request is completed, so remove it from the tree, mark it as
  140. * complete, and *then* wake up the associated task.
  141. */
  142. rb_erase(&wait->node, &b->waiters);
  143. RB_CLEAR_NODE(&wait->node);
  144. wake_up_process(wait->tsk); /* implicit smp_wmb() */
  145. }
  146. static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
  147. struct intel_wait *wait)
  148. {
  149. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  150. struct rb_node **p, *parent, *completed;
  151. bool first;
  152. u32 seqno;
  153. /* Insert the request into the retirement ordered list
  154. * of waiters by walking the rbtree. If we are the oldest
  155. * seqno in the tree (the first to be retired), then
  156. * set ourselves as the bottom-half.
  157. *
  158. * As we descend the tree, prune completed branches since we hold the
  159. * spinlock we know that the first_waiter must be delayed and can
  160. * reduce some of the sequential wake up latency if we take action
  161. * ourselves and wake up the completed tasks in parallel. Also, by
  162. * removing stale elements in the tree, we may be able to reduce the
  163. * ping-pong between the old bottom-half and ourselves as first-waiter.
  164. */
  165. first = true;
  166. parent = NULL;
  167. completed = NULL;
  168. seqno = intel_engine_get_seqno(engine);
  169. /* If the request completed before we managed to grab the spinlock,
  170. * return now before adding ourselves to the rbtree. We let the
  171. * current bottom-half handle any pending wakeups and instead
  172. * try and get out of the way quickly.
  173. */
  174. if (i915_seqno_passed(seqno, wait->seqno)) {
  175. RB_CLEAR_NODE(&wait->node);
  176. return first;
  177. }
  178. p = &b->waiters.rb_node;
  179. while (*p) {
  180. parent = *p;
  181. if (wait->seqno == to_wait(parent)->seqno) {
  182. /* We have multiple waiters on the same seqno, select
  183. * the highest priority task (that with the smallest
  184. * task->prio) to serve as the bottom-half for this
  185. * group.
  186. */
  187. if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
  188. p = &parent->rb_right;
  189. first = false;
  190. } else {
  191. p = &parent->rb_left;
  192. }
  193. } else if (i915_seqno_passed(wait->seqno,
  194. to_wait(parent)->seqno)) {
  195. p = &parent->rb_right;
  196. if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
  197. completed = parent;
  198. else
  199. first = false;
  200. } else {
  201. p = &parent->rb_left;
  202. }
  203. }
  204. rb_link_node(&wait->node, parent, p);
  205. rb_insert_color(&wait->node, &b->waiters);
  206. GEM_BUG_ON(!first && !rcu_access_pointer(b->irq_seqno_bh));
  207. if (completed) {
  208. struct rb_node *next = rb_next(completed);
  209. GEM_BUG_ON(!next && !first);
  210. if (next && next != &wait->node) {
  211. GEM_BUG_ON(first);
  212. b->timeout = wait_timeout();
  213. b->first_wait = to_wait(next);
  214. rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
  215. /* As there is a delay between reading the current
  216. * seqno, processing the completed tasks and selecting
  217. * the next waiter, we may have missed the interrupt
  218. * and so need for the next bottom-half to wakeup.
  219. *
  220. * Also as we enable the IRQ, we may miss the
  221. * interrupt for that seqno, so we have to wake up
  222. * the next bottom-half in order to do a coherent check
  223. * in case the seqno passed.
  224. */
  225. __intel_breadcrumbs_enable_irq(b);
  226. if (READ_ONCE(b->irq_posted))
  227. wake_up_process(to_wait(next)->tsk);
  228. }
  229. do {
  230. struct intel_wait *crumb = to_wait(completed);
  231. completed = rb_prev(completed);
  232. __intel_breadcrumbs_finish(b, crumb);
  233. } while (completed);
  234. }
  235. if (first) {
  236. GEM_BUG_ON(rb_first(&b->waiters) != &wait->node);
  237. b->timeout = wait_timeout();
  238. b->first_wait = wait;
  239. rcu_assign_pointer(b->irq_seqno_bh, wait->tsk);
  240. /* After assigning ourselves as the new bottom-half, we must
  241. * perform a cursory check to prevent a missed interrupt.
  242. * Either we miss the interrupt whilst programming the hardware,
  243. * or if there was a previous waiter (for a later seqno) they
  244. * may be woken instead of us (due to the inherent race
  245. * in the unlocked read of b->irq_seqno_bh in the irq handler)
  246. * and so we miss the wake up.
  247. */
  248. __intel_breadcrumbs_enable_irq(b);
  249. }
  250. GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh));
  251. GEM_BUG_ON(!b->first_wait);
  252. GEM_BUG_ON(rb_first(&b->waiters) != &b->first_wait->node);
  253. return first;
  254. }
  255. bool intel_engine_add_wait(struct intel_engine_cs *engine,
  256. struct intel_wait *wait)
  257. {
  258. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  259. bool first;
  260. spin_lock_irq(&b->lock);
  261. first = __intel_engine_add_wait(engine, wait);
  262. spin_unlock_irq(&b->lock);
  263. return first;
  264. }
  265. static inline bool chain_wakeup(struct rb_node *rb, int priority)
  266. {
  267. return rb && to_wait(rb)->tsk->prio <= priority;
  268. }
  269. static inline int wakeup_priority(struct intel_breadcrumbs *b,
  270. struct task_struct *tsk)
  271. {
  272. if (tsk == b->signaler)
  273. return INT_MIN;
  274. else
  275. return tsk->prio;
  276. }
  277. void intel_engine_remove_wait(struct intel_engine_cs *engine,
  278. struct intel_wait *wait)
  279. {
  280. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  281. /* Quick check to see if this waiter was already decoupled from
  282. * the tree by the bottom-half to avoid contention on the spinlock
  283. * by the herd.
  284. */
  285. if (RB_EMPTY_NODE(&wait->node))
  286. return;
  287. spin_lock_irq(&b->lock);
  288. if (RB_EMPTY_NODE(&wait->node))
  289. goto out_unlock;
  290. if (b->first_wait == wait) {
  291. const int priority = wakeup_priority(b, wait->tsk);
  292. struct rb_node *next;
  293. GEM_BUG_ON(rcu_access_pointer(b->irq_seqno_bh) != wait->tsk);
  294. /* We are the current bottom-half. Find the next candidate,
  295. * the first waiter in the queue on the remaining oldest
  296. * request. As multiple seqnos may complete in the time it
  297. * takes us to wake up and find the next waiter, we have to
  298. * wake up that waiter for it to perform its own coherent
  299. * completion check.
  300. */
  301. next = rb_next(&wait->node);
  302. if (chain_wakeup(next, priority)) {
  303. /* If the next waiter is already complete,
  304. * wake it up and continue onto the next waiter. So
  305. * if have a small herd, they will wake up in parallel
  306. * rather than sequentially, which should reduce
  307. * the overall latency in waking all the completed
  308. * clients.
  309. *
  310. * However, waking up a chain adds extra latency to
  311. * the first_waiter. This is undesirable if that
  312. * waiter is a high priority task.
  313. */
  314. u32 seqno = intel_engine_get_seqno(engine);
  315. while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
  316. struct rb_node *n = rb_next(next);
  317. __intel_breadcrumbs_finish(b, to_wait(next));
  318. next = n;
  319. if (!chain_wakeup(next, priority))
  320. break;
  321. }
  322. }
  323. if (next) {
  324. /* In our haste, we may have completed the first waiter
  325. * before we enabled the interrupt. Do so now as we
  326. * have a second waiter for a future seqno. Afterwards,
  327. * we have to wake up that waiter in case we missed
  328. * the interrupt, or if we have to handle an
  329. * exception rather than a seqno completion.
  330. */
  331. b->timeout = wait_timeout();
  332. b->first_wait = to_wait(next);
  333. rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
  334. if (b->first_wait->seqno != wait->seqno)
  335. __intel_breadcrumbs_enable_irq(b);
  336. wake_up_process(b->first_wait->tsk);
  337. } else {
  338. b->first_wait = NULL;
  339. rcu_assign_pointer(b->irq_seqno_bh, NULL);
  340. __intel_breadcrumbs_disable_irq(b);
  341. }
  342. } else {
  343. GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
  344. }
  345. GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
  346. rb_erase(&wait->node, &b->waiters);
  347. out_unlock:
  348. GEM_BUG_ON(b->first_wait == wait);
  349. GEM_BUG_ON(rb_first(&b->waiters) !=
  350. (b->first_wait ? &b->first_wait->node : NULL));
  351. GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh) ^ RB_EMPTY_ROOT(&b->waiters));
  352. spin_unlock_irq(&b->lock);
  353. }
  354. static bool signal_complete(struct drm_i915_gem_request *request)
  355. {
  356. if (!request)
  357. return false;
  358. /* If another process served as the bottom-half it may have already
  359. * signalled that this wait is already completed.
  360. */
  361. if (intel_wait_complete(&request->signaling.wait))
  362. return true;
  363. /* Carefully check if the request is complete, giving time for the
  364. * seqno to be visible or if the GPU hung.
  365. */
  366. if (__i915_request_irq_complete(request))
  367. return true;
  368. return false;
  369. }
  370. static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
  371. {
  372. return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
  373. }
  374. static void signaler_set_rtpriority(void)
  375. {
  376. struct sched_param param = { .sched_priority = 1 };
  377. sched_setscheduler_nocheck(current, SCHED_FIFO, &param);
  378. }
  379. static int intel_breadcrumbs_signaler(void *arg)
  380. {
  381. struct intel_engine_cs *engine = arg;
  382. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  383. struct drm_i915_gem_request *request;
  384. /* Install ourselves with high priority to reduce signalling latency */
  385. signaler_set_rtpriority();
  386. do {
  387. set_current_state(TASK_INTERRUPTIBLE);
  388. /* We are either woken up by the interrupt bottom-half,
  389. * or by a client adding a new signaller. In both cases,
  390. * the GPU seqno may have advanced beyond our oldest signal.
  391. * If it has, propagate the signal, remove the waiter and
  392. * check again with the next oldest signal. Otherwise we
  393. * need to wait for a new interrupt from the GPU or for
  394. * a new client.
  395. */
  396. request = READ_ONCE(b->first_signal);
  397. if (signal_complete(request)) {
  398. /* Wake up all other completed waiters and select the
  399. * next bottom-half for the next user interrupt.
  400. */
  401. intel_engine_remove_wait(engine,
  402. &request->signaling.wait);
  403. local_bh_disable();
  404. dma_fence_signal(&request->fence);
  405. local_bh_enable(); /* kick start the tasklets */
  406. /* Find the next oldest signal. Note that as we have
  407. * not been holding the lock, another client may
  408. * have installed an even older signal than the one
  409. * we just completed - so double check we are still
  410. * the oldest before picking the next one.
  411. */
  412. spin_lock_irq(&b->lock);
  413. if (request == b->first_signal) {
  414. struct rb_node *rb =
  415. rb_next(&request->signaling.node);
  416. b->first_signal = rb ? to_signaler(rb) : NULL;
  417. }
  418. rb_erase(&request->signaling.node, &b->signals);
  419. spin_unlock_irq(&b->lock);
  420. i915_gem_request_put(request);
  421. } else {
  422. if (kthread_should_stop())
  423. break;
  424. schedule();
  425. }
  426. } while (1);
  427. __set_current_state(TASK_RUNNING);
  428. return 0;
  429. }
  430. void intel_engine_enable_signaling(struct drm_i915_gem_request *request)
  431. {
  432. struct intel_engine_cs *engine = request->engine;
  433. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  434. struct rb_node *parent, **p;
  435. bool first, wakeup;
  436. /* Note that we may be called from an interrupt handler on another
  437. * device (e.g. nouveau signaling a fence completion causing us
  438. * to submit a request, and so enable signaling). As such,
  439. * we need to make sure that all other users of b->lock protect
  440. * against interrupts, i.e. use spin_lock_irqsave.
  441. */
  442. /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
  443. assert_spin_locked(&request->lock);
  444. if (!request->global_seqno)
  445. return;
  446. request->signaling.wait.tsk = b->signaler;
  447. request->signaling.wait.seqno = request->global_seqno;
  448. i915_gem_request_get(request);
  449. spin_lock(&b->lock);
  450. /* First add ourselves into the list of waiters, but register our
  451. * bottom-half as the signaller thread. As per usual, only the oldest
  452. * waiter (not just signaller) is tasked as the bottom-half waking
  453. * up all completed waiters after the user interrupt.
  454. *
  455. * If we are the oldest waiter, enable the irq (after which we
  456. * must double check that the seqno did not complete).
  457. */
  458. wakeup = __intel_engine_add_wait(engine, &request->signaling.wait);
  459. /* Now insert ourselves into the retirement ordered list of signals
  460. * on this engine. We track the oldest seqno as that will be the
  461. * first signal to complete.
  462. */
  463. parent = NULL;
  464. first = true;
  465. p = &b->signals.rb_node;
  466. while (*p) {
  467. parent = *p;
  468. if (i915_seqno_passed(request->global_seqno,
  469. to_signaler(parent)->global_seqno)) {
  470. p = &parent->rb_right;
  471. first = false;
  472. } else {
  473. p = &parent->rb_left;
  474. }
  475. }
  476. rb_link_node(&request->signaling.node, parent, p);
  477. rb_insert_color(&request->signaling.node, &b->signals);
  478. if (first)
  479. smp_store_mb(b->first_signal, request);
  480. spin_unlock(&b->lock);
  481. if (wakeup)
  482. wake_up_process(b->signaler);
  483. }
  484. int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
  485. {
  486. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  487. struct task_struct *tsk;
  488. spin_lock_init(&b->lock);
  489. setup_timer(&b->fake_irq,
  490. intel_breadcrumbs_fake_irq,
  491. (unsigned long)engine);
  492. setup_timer(&b->hangcheck,
  493. intel_breadcrumbs_hangcheck,
  494. (unsigned long)engine);
  495. /* Spawn a thread to provide a common bottom-half for all signals.
  496. * As this is an asynchronous interface we cannot steal the current
  497. * task for handling the bottom-half to the user interrupt, therefore
  498. * we create a thread to do the coherent seqno dance after the
  499. * interrupt and then signal the waitqueue (via the dma-buf/fence).
  500. */
  501. tsk = kthread_run(intel_breadcrumbs_signaler, engine,
  502. "i915/signal:%d", engine->id);
  503. if (IS_ERR(tsk))
  504. return PTR_ERR(tsk);
  505. b->signaler = tsk;
  506. return 0;
  507. }
  508. static void cancel_fake_irq(struct intel_engine_cs *engine)
  509. {
  510. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  511. del_timer_sync(&b->hangcheck);
  512. del_timer_sync(&b->fake_irq);
  513. clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
  514. }
  515. void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
  516. {
  517. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  518. cancel_fake_irq(engine);
  519. spin_lock_irq(&b->lock);
  520. __intel_breadcrumbs_disable_irq(b);
  521. if (intel_engine_has_waiter(engine)) {
  522. b->timeout = wait_timeout();
  523. __intel_breadcrumbs_enable_irq(b);
  524. if (READ_ONCE(b->irq_posted))
  525. wake_up_process(b->first_wait->tsk);
  526. } else {
  527. /* sanitize the IMR and unmask any auxiliary interrupts */
  528. irq_disable(engine);
  529. }
  530. spin_unlock_irq(&b->lock);
  531. }
  532. void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
  533. {
  534. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  535. /* The engines should be idle and all requests accounted for! */
  536. WARN_ON(READ_ONCE(b->first_wait));
  537. WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
  538. WARN_ON(READ_ONCE(b->first_signal));
  539. WARN_ON(!RB_EMPTY_ROOT(&b->signals));
  540. if (!IS_ERR_OR_NULL(b->signaler))
  541. kthread_stop(b->signaler);
  542. cancel_fake_irq(engine);
  543. }
  544. unsigned int intel_breadcrumbs_busy(struct drm_i915_private *i915)
  545. {
  546. struct intel_engine_cs *engine;
  547. enum intel_engine_id id;
  548. unsigned int mask = 0;
  549. for_each_engine(engine, i915, id) {
  550. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  551. spin_lock_irq(&b->lock);
  552. if (b->first_wait) {
  553. wake_up_process(b->first_wait->tsk);
  554. mask |= intel_engine_flag(engine);
  555. }
  556. if (b->first_signal) {
  557. wake_up_process(b->signaler);
  558. mask |= intel_engine_flag(engine);
  559. }
  560. spin_unlock_irq(&b->lock);
  561. }
  562. return mask;
  563. }